Online prediction system and method for residual life of power supply chip

Abstract

The invention provides an online prediction system and method for the residual life of a power supply chip, and the system comprises a switch module which comprises an upper switch tube and a lower switch tube, and the upper switch tube and the lower switch tube are connected in series between a first power supply and a reference ground; the detection module is used for detecting the upper side current flowing through the upper side switch tube in real time, and / or detecting the lower side current flowing through the lower side switch tube in real time; the calculation module is used for obtaining on-resistance of the upper-side switch tube at different moments based on the upper-side current of the upper-side switch tube at different moments and predicting the residual life of the upper-side switch tube based on the on-resistance, and / or obtaining on-resistance of the lower-side switch tube at different moments based on the lower-side current of the lower-side switch tube at different moments and predicting the residual life of the upper-side switch tube based on the on-resistance. Based on this, the remaining life of the lower switching tube is predicted. According to the invention, online prediction of the residual life of the power supply chip is better realized, and the problem that the residual life of the low-current power supply chip in use cannot be predicted in the prior art is solved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to an online prediction system and method for the remaining life of a power supply chip. Background Art

[0002] With the rise of domestic large models such as Deepseek, artificial intelligence (AI) has continuously improved the efficiency of the industry and benefited all walks of life. As the hardware devices of AI large models, for example, AI data center chips and cloud computing chips, as well as cloud computing servers and supercomputing processors built by these chips, have greatly improved computing power and storage space. In addition, fiber optic transmission networks with speeds exceeding Tbps transmit remote data to the data center for processing quickly and with ultra-low latency, and send the processing results back to the terminal for response with almost negligible latency.

[0003] The operation of all the above devices is inseparable from the power supply provided by the power supply chip to support their operation. Once the power supply device is damaged, the operation of the entire device will be greatly affected or even paralyzed, causing incalculable losses. Among these AI servers and other local or terminal devices, there are dozens to thousands of power supply chips to support the normal operation and timely response of the devices on the entire application chain. Manually detecting the quality of these power supply chips is extremely laborious and unrealistic. Therefore, it has become necessary to introduce the supercomputing power of AI and its ultra-low latency network to continuously collect a large amount of core parameter data of the power supply chip, and based on these long-term running massive data, calculate and analyze the changes of the core parameters, so as to understand the state of the power supply chip, calculate the expected life, and ensure the stable and reliable operation of the entire system.

[0004] In the prior art, there are also related designs for chip self-checking by means of data analysis, but they are all realized based on indirect data. For example, data such as efficiency, temperature, and voltage, which involve the entire system and are relatively general data; through the establishment of learning models and machine learning methods, when the system has anomalies, such as too high or too low temperature or voltage, etc., monitoring and alarm can be carried out, which focuses on responding to the occurred faults, but it is difficult to calculate the remaining life of the power supply chip during operation, and the ability to detect and warn potential faults in advance is also very limited.

[0005] Especially for power supply chips with small currents, for example, DCDC chips with an output of 100 mA at 3.3 V or 1.2 V, when applied to an 800 W server board, their output power is only 1.5 in ten thousandths of 800 W, which is very small and in a negligible state. Even if the efficiency of the DCDC chip has dropped from the normal 85% to the abnormal 50%, it is still ignored and the system cannot detect it. No matter what learning model or machine learning method is established, it cannot be recognized. Moreover, each power supply node of the system has a capacitor, and the values used to calculate the efficiency are all average values after capacitor filtering, which cannot reflect transient conditions, so it is impossible to monitor subtle changes and damages.

[0006] Based on the above background, with the help of the supercomputing power of AI and its ultra-low-latency network, how to accurately calculate the remaining life of the small-current power supply chips in use has become one of the focus issues discussed in the industry.

[0007] It should be noted that the above introduction of the technical background is only for the convenience of clearly and completely explaining the technical solutions of the present invention and facilitating the understanding of those skilled in the art. It cannot be simply considered that the above technical solutions are well-known to those skilled in the art just because these solutions are described in the background art part of the present invention. Summary of the Invention

[0008] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide an online prediction system and method for the remaining life of a power supply chip, which is used to solve the problem that the prior art cannot predict the remaining life of the small-current power supply chips in use.

[0009] To achieve the above object and other related objects, the present invention provides an online prediction system for the remaining life of a power supply chip, including:

[0010] A switching module, including an upper switching transistor and a lower switching transistor, which are connected in series between a first power supply and a reference ground;

[0011] A detection module, connected to the switching module, for real-time detecting the upper current flowing through the upper switching transistor and / or real-time detecting the lower current flowing through the lower switching transistor;

[0012] A calculation module, connected to the detection module, obtaining the on-resistance of the upper switching transistor at different times based on the upper current of the upper switching transistor at different times, and predicting the remaining life of the upper switching transistor based on this, and / or obtaining the on-resistance of the lower switching transistor at different times based on the lower current of the lower switching transistor at different times, and predicting the remaining life of the lower switching transistor based on this.

[0013] Optionally, when the detection module detects the upper current flowing through the upper switching transistor in real time, it includes at least one upper detection unit, forms an upper reference voltage by adjusting the upper reference current, compares the upper reference voltage with the upper node voltage, and based on the upper reference current corresponding to the inversion of the upper comparison result, obtains the upper current of the upper switching transistor at the current moment, where the upper node voltage is the voltage at the connection node of the upper switching transistor and the lower switching transistor or the voltage of the first power supply;

[0014] When the detection module detects the lower current flowing through the lower switching transistor in real time, it includes at least one lower detection unit, forms a lower reference voltage by adjusting the lower reference current, compares the lower reference voltage with the lower node voltage, and based on the lower reference current corresponding to the inversion of the lower comparison result, obtains the lower current of the lower switching transistor at the current moment, where the lower node voltage is the voltage at the connection node of the upper switching transistor and the lower switching transistor.

[0015] Optionally, when the detection module includes an upper detection unit, the upper detection unit adjusts the upper reference current based on the upper comparison result with an upper preset step; when the number of upper detection units is greater than one, in each upper detection unit, the adjustment ranges of any two upper reference currents are at least partially different;

[0016] When the detection module includes a lower detection unit, the lower detection unit adjusts the lower reference current based on the lower comparison result with a lower preset step; when the number of lower detection units is greater than one, in each lower detection unit, the adjustment ranges of any two lower reference currents are at least partially different.

[0017] Optionally, the upper switching transistor is a P-type switching device or an N-type switching device, and the lower switching transistor is an N-type switching device;

[0018] When the upper switch tube is a P-type switching device and the detection module includes an upper detection unit, the upper detection unit includes a first upper reference tube, a first upper current source, and a first upper comparator. The first upper reference tube and the first upper current source are connected in series between a first power supply and a reference ground. The first upper current source is regulated by a first upper current control signal and provides the upper reference current to generate the upper reference voltage at the connection node between the first upper reference tube and the first upper current source. The first input terminal of the first upper comparator receives the upper node voltage, the second input terminal of the first upper comparator receives the upper reference voltage, and the output terminal of the first upper comparator generates the upper comparison result. Wherein, the device types of the first upper reference tube and the upper switch tube are the same, and the control terminals of the first upper reference tube and the upper switch tube are at the same potential. The upper node voltage is the voltage at the connection node between the upper switch tube and the lower switch tube.

[0019] When the upper switch tube is an N-type switching device and the detection module includes an upper detection unit, the upper detection unit includes a second upper reference tube, a second upper current source, and a second upper comparator. The second upper current source and the second upper reference tube are connected in series between a second power supply and the connection node between the upper switch tube and the lower switch tube. The second upper current source is regulated by a second upper current control signal and provides the upper reference current to generate the upper reference voltage at the connection node between the second upper current source and the second upper reference tube. The first input terminal of the second upper comparator receives the upper node voltage, the second input terminal of the second upper comparator receives the upper reference voltage, and the output terminal of the second upper comparator generates the upper comparison result. Wherein, the device types of the second upper reference tube and the upper switch tube are the same, and the control terminals of the second upper reference tube and the upper switch tube are at the same potential. The upper node voltage is the voltage of the first power supply.

[0020] When the detection module includes a lower detection unit, the lower detection unit includes a lower reference tube, a lower current source, and a lower comparator. The lower current source and the lower reference tube are connected in series between a first power supply and a reference ground. The lower current source is regulated by a lower current control signal and provides the lower reference current to generate the lower reference voltage at the connection node between the lower current source and the lower reference tube. The first input terminal of the lower comparator receives the lower node voltage, the second input terminal of the lower comparator receives the lower reference voltage, and the output terminal of the lower comparator generates the lower comparison result. Wherein, the device types of the lower reference tube and the lower switch tube are the same, and the control terminals of the lower reference tube and the lower switch tube are at the same potential.

[0021] Optionally, when the detection module includes an upper-side detection unit, it further includes an upper-side overvoltage protection unit for overvoltage protection of the first upper-side reference transistor or the second upper-side reference transistor in the upper-side detection unit. Among them, the upper-side switch control signal connected to the control end of the upper-side switch transistor is output after passing through the upper-side overvoltage protection unit to access the corresponding upper-side reference control signal connected to the control end of the corresponding upper-side reference transistor;

[0022] When the detection module includes a lower-side detection unit, it further includes a lower-side overvoltage protection unit for overvoltage protection of the lower-side reference transistor in the lower-side detection unit. Among them, the lower-side switch control signal connected to the control end of the lower-side switch transistor is output after passing through the lower-side overvoltage protection unit to access the lower-side reference control signal connected to the control end of the lower-side reference transistor.

[0023] Optionally, the calculation module obtains an upper-side resistance model based on the on-resistance of the upper-side switch transistor at different times, and predicts the remaining life of the upper-side switch transistor by comparing the upper-side resistance model with the aging test model of the upper-side switch transistor regarding the on-resistance; and / or, the calculation module obtains a lower-side resistance model based on the on-resistance of the lower-side switch transistor at different times, and predicts the remaining life of the lower-side switch transistor by comparing the lower-side resistance model with the aging test model of the lower-side switch transistor regarding the on-resistance.

[0024] The present invention also provides an online prediction method for the remaining life of a power chip, including:

[0025] Obtaining the on-resistance of the upper-side switch transistor at different times, and predicting the remaining life of the upper-side switch transistor based on this; and, characterizing the remaining life of the power chip based on the remaining life of the upper-side switch transistor;

[0026] and / or, obtaining the on-resistance of the lower-side switch transistor at different times, and predicting the remaining life of the lower-side switch transistor based on this; and, characterizing the remaining life of the power chip based on the remaining life of the lower-side switch transistor.

[0027] Optionally, the method for obtaining the on-resistance of the upper-side switch transistor at different times includes:

[0028] Step S11a, forming an upper-side reference voltage based on the upper-side reference current in the upper-side detection unit;

[0029] Step S12a, comparing the upper-side reference voltage with the upper-side node voltage and generating an upper-side comparison result, where the node voltage is the voltage at the connection node of the upper-side switch transistor and the lower-side switch transistor or the voltage of the first power supply;

[0030] Step S13a, determining whether the upper-side comparison result flips;

[0031] If there is no inversion, adjust the upper reference current based on the upper preset step, and jump to step S11a when the adjusted current value on the upper side does not reach the upper end point current value;

[0032] If there is an inversion, based on the upper reference current at the current moment, obtain the upper current of the upper switching transistor at the current moment;

[0033] Step S14a, repeatedly execute steps S11a to S13a to obtain the upper currents of the upper switching transistor at different moments;

[0034] Step S15a, based on the upper currents of the upper switching transistor at different moments, obtain the on-resistances of the upper switching transistor at different moments;

[0035] And / or, the method for obtaining the on-resistances of the lower switching transistor at different moments includes:

[0036] Step S11b, form a lower reference voltage based on the lower reference current in the lower detection unit;

[0037] Step S12b, compare the lower reference voltage and the lower node voltage and generate a lower comparison result, where the node voltage is the voltage at the connection node of the upper switching transistor and the lower switching transistor;

[0038] Step S13b, determine whether the lower comparison result has an inversion;

[0039] If there is no inversion, adjust the lower reference current based on the lower preset step, and jump to step S11b when the adjusted current value on the lower side does not reach the lower end point current value;

[0040] If there is an inversion, based on the lower reference current at the current moment, obtain the lower current of the lower switching transistor at the current moment;

[0041] Step S14b, repeatedly execute steps S11b to S13b to obtain the lower currents of the lower switching transistor at different moments;

[0042] Step S15b, based on the lower currents of the lower switching transistor at different moments, obtain the on-resistances of the lower switching transistor at different moments.

[0043] Optionally, obtain the upper currents of the upper switching transistor at different moments through at least two upper detection units, where the current detection ranges corresponding to different upper detection units are at least partially different; and / or, obtain the lower currents of the lower switching transistor at different moments through at least two lower detection units, where the current detection ranges corresponding to different lower detection units are at least partially different.

[0044] Optionally, the method for predicting the remaining life of the upper switching transistor includes:

[0045] Obtain an upper resistance model based on the on-resistance of the upper switching transistor at different times, and obtain an aging test model of the upper switching transistor with respect to the on-resistance;

[0046] Compare the upper resistance model with the aging test model of the upper switching transistor with respect to the on-resistance, and predict the remaining life of the upper switching transistor based on the comparison result;

[0047] And / or, the method for predicting the remaining life of the lower switching transistor includes:

[0048] Obtain a lower resistance model based on the on-resistance of the lower switching transistor at different times, and obtain an aging test model of the lower switching transistor with respect to the on-resistance;

[0049] Compare the lower resistance model with the aging test model of the lower switching transistor with respect to the on-resistance, and predict the remaining life of the lower switching transistor based on the comparison result.

[0050] As described above, the online prediction system and method for the remaining life of the power chip of the present invention can accurately predict the remaining life of the switching transistor by monitoring the on-resistance of the switching transistor in the power chip (especially the low-current power chip) in use through the detection module and the calculation module, and realize characterizing the remaining life of the power chip based on the remaining life of the switching transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 It shows a schematic structural diagram of the online prediction system in the first embodiment of the present invention.

[0052] Figure 2 It shows another schematic structural diagram of the online prediction system in the first embodiment of the present invention.

[0053] Figure 3 It shows Figure 1 The relevant voltage waveform diagram corresponding to the first upper detection unit in the shown online prediction system.

[0054] Figure 4 It shows a schematic structural diagram of the online prediction system in the second embodiment of the present invention.

[0055] Description of Component Labels

[0056] 100 Online prediction system

[0057] 110 Switching module

[0058] 120 Detection module

[0059] 121 Upper detection unit

[0060] 122 Upper overvoltage protection unit

[0061] 123 Lower detection unit

[0062] 124 Lower overvoltage protection unit

[0063] 130 Calculation module

[0064] 131 Connection unit

[0065] 132 Calculation unit

[0066] 133 Level conversion unit Specific implementation manners

[0067] The following uses specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0068] Please refer to Figures 1 to 4 . It should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The form, number, and ratio of each component in actual implementation can be arbitrarily changed, and the layout form of its components may also be more complex.

[0069] The applicant has found through a large amount of research that the most critical device for the stability and reliability of a power chip is the switching transistor. Therefore, the remaining life of the power chip can be characterized by predicting the remaining life of the switching transistor in the power chip. Taking the switching transistor as a MOS device as an example for analysis, the failure mechanisms of MOS devices are diverse, mainly including physical, chemical, and electrical degradation processes; among them, some common failure mechanisms include: hot carrier injection (HCI), negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), time-dependent dielectric breakdown (TDDB), thermal stress, short channel effect (SCE), interface traps and oxide traps, radiation effects; the above failure mechanisms will all cause changes in the internal resistance of MOS devices; and by monitoring the change in the internal resistance of MOS devices, the remaining life of MOS devices can be predicted.

[0070] When the MOS device is fully turned on, it is in the deep linear region, and its on-resistance satisfies Equation 1: R ON =L CH / (W*μ*Cox*(V GS -V TH ))), where RON is the on-resistance, L CH is the channel length, W is the channel width, μ is the effective mobility of electrons in the inversion layer, Cox is the gate oxide capacitance per unit area, V GS is the gate-source voltage, V TH is the threshold voltage; it can be seen that the on-resistance is proportional to the threshold, that is, when the threshold increases, the on-resistance becomes larger, and vice versa, when the threshold decreases, the on-resistance becomes smaller. The on-resistance is also proportional to the mobility.

[0071] In this application, the on-resistance of the switching transistor in the power supply chip (especially the low-current power supply chip) in use is used as the target for monitoring and extracting parameters. By online monitoring the on-resistance of the switching transistor, the remaining life of the switching transistor can be accurately predicted, potential problems of the switching transistor can be discovered and early warnings can be given in advance to ensure the more reliable operation of the system. This application directly monitors and extracts the real parameters of the internal core hardware of the actual product in real time, which is closer to the actual product and parameters, and can more efficiently and timely discover abnormal failures including premature failures.

[0072] Embodiment 1

[0073] As Figure 1 and Figure 2 shown, this embodiment provides an online prediction system 100 for the remaining life of a power supply chip, including a switching module 110, a detection module 120, and a calculation module 130.

[0074] The switching module 110 converts the first power supply VDD1 into an output power supply VOUT through switch switching and is the main part of the power supply chip. Specifically, the switching module 110 includes an upper switching transistor SQ1 and a lower switching transistor SQ2; further, an inductor L and a capacitor C are also included.

[0075] The upper switching transistor SQ1 and the lower switching transistor SQ2 are connected in series between the first power supply VDD1 and the reference ground and are respectively controlled by an upper switching control signal G1 and a lower switching control signal G2; that is, the control end of the upper switching transistor SQ1 receives the upper switching control signal G1, the first end of the upper switching transistor SQ1 is connected to the first power supply VDD1, the second end of the upper switching transistor SQ1 is connected to the first end of the lower switching transistor SQ2, the control end of the lower switching transistor SQ2 receives the lower switching control signal G2, and the second end of the lower switching transistor SQ2 is connected to the reference ground. The first end of the inductor L is connected to the connection node of the upper switching transistor SQ1 and the lower switching transistor SQ2, and the second end of the inductor L is connected to the reference ground through the capacitor C to generate the output power supply VOUT.

[0076] In one example, as Figure 1As shown, the upper switch tube SQ1 is a P-type switching device, and the lower switch tube SQ2 is an N-type switching device. Taking the switching device as a MOS device as an example, in the upper switch tube SQ1, the control terminal refers to the gate terminal, the first terminal refers to the source terminal, and the second terminal refers to the drain terminal. In the lower switch tube SQ2, the control terminal refers to the gate terminal, the first terminal refers to the drain terminal, and the second terminal refers to the source terminal. In another example, as Figure 2 shown, the upper switch tube SQ1 is an N-type switching device, and the lower switch tube SQ2 is an N-type switching device. Taking the switching device as a MOS device as an example, in the upper switch tube SQ1, the control terminal refers to the gate terminal, the first terminal refers to the drain terminal, and the second terminal refers to the source terminal. In the lower switch tube SQ2, the control terminal refers to the gate terminal, the first terminal refers to the drain terminal, and the second terminal refers to the source terminal.

[0077] The detection module 120 is connected to the switch module 110 and is used to detect the upper current flowing through the upper switch tube SQ1 in real time. Specifically, the detection module 120 includes at least one upper detection unit 121; further, it also includes an upper overvoltage protection unit 122. In practical applications, the number of upper detection units 121 can be one or more than one; by designing the number of upper detection units 121 as multiple, it is beneficial to improve the detection speed and detection accuracy of the upper current.

[0078] The upper detection unit 121 forms an upper reference voltage by adjusting the upper reference current, compares the upper reference voltage with the upper node voltage VHSW, and obtains the upper current of the upper switch tube SQ1 at the current moment based on the upper reference current corresponding to the flip when the upper comparison result occurs. In one implementation manner, the upper detection unit 121 adjusts the upper reference current with a preset upper step based on the upper comparison result; in another implementation manner, the upper detection unit 121 adjusts the upper reference current by the dichotomy method based on the upper comparison result; of course, in other implementation manners, the upper detection unit 121 can also adjust the upper reference current in other ways (such as the ramp method, etc.) based on the upper comparison result. The present embodiment does not particularly limit the adjustment manner of the upper reference current. Among them, the upper node voltage VHSW is the voltage at the connection node of the upper switch tube SQ1 and the lower switch tube SQ2 or the voltage of the first power supply; actually, the selection of the upper node voltage VHSW is related to the device type of the upper switch tube SQ1. If the upper switch tube SQ1 is a P-type switching device, the upper node voltage VHSW is the voltage at the connection node of the upper switch tube SQ1 and the lower switch tube SQ2. If the upper switch tube SQ1 is an N-type switching device, the upper node voltage VHSW is the voltage VDD1 of the first power supply.

[0079] In addition, for the case where the number of the upper detection units 121 is more than one (i.e., greater than one), among the upper detection units 121, the adjustment ranges of any two upper reference currents are at least partially different; further, for the case of adjusting the upper reference current with a preset upper step, preferably, the preset upper steps of all the upper detection units 121 are the same. Taking the number of the upper detection units 121 being three and the total adjustment range being 0 to 600 mA as an example, the adjustment range of the upper reference current of the first upper detection unit 121 is designed to be 0 to 200 mA, the adjustment range of the upper reference current of the second upper detection unit 121 is designed to be 200 mA to 400 mA, and the adjustment range of the upper reference current of the third upper detection unit 121 is designed to be 400 mA to 600 mA. In this way, when detecting the current by adjusting the upper reference current with the preset upper step, through the design of the three upper detection units 121, the current detection within 0 to 600 mA can be quickly realized, and moreover, the preset upper step can be designed to be smaller, thereby improving the detection accuracy; of course, when detecting the current by adjusting the upper reference current in other ways such as the dichotomy method, through the design of the three upper detection units 121, the detection speed and detection accuracy of the upper current can also be improved. In practical applications, the total adjustment range can be designed based on the working current range of the upper switching transistor SQ1, and usually, the total adjustment range is slightly larger than the working current range.

[0080] In one example, for the case where the upper switching transistor SQ1 is a P-type switching device, such as Figure 1As shown, the upper detection unit 121 includes a first upper reference tube (e.g., HQ11), a first upper current source (e.g., HI11), and a first upper comparator (e.g., HCMP11); the first upper reference tube (e.g., HQ11) and the first upper current source (e.g., HI11) are connected in series between the first power supply VDD1 and the reference ground, that is, the control terminal of the first upper reference tube (e.g., HQ11) receives the first upper reference control signal GH1, the first terminal of the first upper reference tube (e.g., HQ11) is connected to the first power supply VDD1, the second terminal of the first upper reference tube (e.g., HQ11) is connected to the reference ground via the first upper current source (e.g., HI11), the first upper current source (e.g., HI11) is regulated by the first upper current control signal and provides an upper reference current to generate an upper reference voltage (e.g., VH1) at the connection node of the first upper reference tube (e.g., HQ11) and the first upper current source (e.g., HI11), the first input terminal of the first upper comparator (e.g., HCMP11) receives the upper node voltage VHSW, the second input terminal of the first upper comparator (e.g., HCMP11) receives the upper reference voltage (e.g., VH1), and the output terminal of the first upper comparator (e.g., HCMP11) generates an upper comparison result; wherein, the device types of the first upper reference tube (e.g., HQ11) and the upper switch tube SQ1 are the same, and the control terminals of the first upper reference tube (e.g., HQ11) and the upper switch tube SQ1 are at the same potential. In this example, both the first upper reference tube (e.g., HQ11) and the upper switch tube SQ1 are P-type switching devices. Taking the switching device as a MOS device as an example, in the first upper reference tube (e.g., HQ11), the control terminal refers to the gate terminal, the first terminal refers to the source terminal, and the second terminal refers to the drain terminal. Additionally, in the first upper comparator (e.g., HCMP11), the first input terminal refers to the non-inverting input terminal, and the second input terminal refers to the inverting input terminal; of course, it is also feasible that the first input terminal refers to the inverting input terminal and the second input terminal refers to the non-inverting input terminal.

[0081] In another example, for the case where the upper switch tube SQ1 is an N-type switching device, as Figure 2As shown, the upper detection unit 121 includes a second upper reference tube (e.g., HQ21), a second upper current source (e.g., HI21), and a second upper comparator (e.g., HCMP21); the second upper current source (e.g., HI21) and the second upper reference tube (e.g., HQ21) are connected in series between the second power supply VDD2 and the connection node of the upper switch tube SQ1 and the lower switch tube SQ2. That is, the input end of the second upper current source (e.g., HI21) is connected to the second power supply VDD2, the output end of the second upper current source (e.g., HI21) is connected to the first end of the second upper reference tube (e.g., HQ21), the control end of the second upper reference tube (e.g., HQ21) receives the second upper reference control signal GH2, the second end of the second upper reference tube (e.g., HQ21) is connected to the connection node of the upper switch tube SQ1 and the lower switch tube SQ2, and the second upper current source (e.g., HI21) is controlled by the second upper current control signal to adjust and provide an upper reference current, so as to generate an upper reference voltage (e.g., VH1) at the connection node of the second upper current source (e.g., HI21) and the second upper reference tube (e.g., HQ21). The first input end of the second upper comparator (e.g., HCMP21) receives the upper node voltage VHSW, the second input end of the second upper comparator (e.g., HCMP21) receives the upper reference voltage (e.g., VH1), and the output end of the second upper comparator (e.g., HCMP21) generates an upper comparison result; wherein, the device types of the second upper reference tube (e.g., HQ21) and the upper switch tube SQ1 are the same, and the control ends of the second upper reference tube (e.g., HQ21) and the upper switch tube SQ1 are at the same potential. In this example, both the second upper reference tube (e.g., HQ21) and the upper switch tube SQ1 are N-type switching devices. Taking the switching device as a MOS device as an example, in the second upper reference tube (e.g., HQ21), the control end refers to the gate terminal, the first end refers to the drain terminal, and the second end refers to the source terminal. In addition, in the second upper comparator (e.g., HCMP21), the first input end refers to the non-inverting input end, and the second input end refers to the inverting input end; of course, it is also feasible that the first input end refers to the inverting input end and the second input end refers to the non-inverting input end.

[0082] In practical applications, when designing the upper detection unit, a preset distance should be provided between the first upper reference tube or the second upper reference tube and the position of the upper switch tube SQ1. This preset distance can play a role in physical isolation and temperature reduction, ensuring that when the upper switch tube SQ1 is damaged due to overheating during extreme over-temperature, it will not cause the first upper reference tube or the second upper reference tube to be damaged due to overheating; it should be noted that the selection of this preset distance should be determined in combination with the actual situation, and this embodiment does not impose too many restrictions on this. In addition, in order to cooperate with the calculation module 130 to achieve high-speed data processing, the first upper comparator or the second upper comparator is usually implemented by a high-speed comparator.

[0083] The upper overvoltage protection unit 122 is used to protect the first upper reference tube or the second upper reference tube in the upper detection unit 121 against overvoltage. Among them, the upper switch control signal G1 passes through the upper overvoltage protection unit 122 and then outputs the first upper reference control signal GH1 or the second upper reference control signal GH2, so as to prevent the first upper reference tube or the second upper reference tube from being damaged when the upper switch control signal G1 has an abnormal high voltage. It should be noted that the upper overvoltage protection unit 122 can be implemented by any existing known overvoltage protection circuit, and there is no limitation on this.

[0084] The calculation module 130 is connected to the detection module 120. Based on the upper current of the upper switch tube SQ1 at different times, the on-resistance of the upper switch tube SQ1 at different times is obtained, and based on this, the remaining life of the upper switch tube SQ1 is predicted. Of course, based on this, it is also possible to check whether there are some potential problems with the upper switch tube SQ1 for early warning. In one implementation manner, the calculation module 130 obtains an upper resistance model based on the on-resistance of the upper switch tube SQ1 at different times, and predicts the remaining life of the upper switch tube SQ1 by comparing the upper resistance model with the aging test model of the upper switch tube SQ1 regarding the on-resistance. In practical applications, the calculation module 130 also generates a first upper current control signal or a second upper current control signal based on the upper comparison result, so as to adjust the upper reference current based on the upper preset step or dichotomy method, etc. At the same time, the calculation module 130 also records and stores the current value after each adjustment; of course, the calculation module 130 also obtains the upper current of the upper switch tube SQ1 at the current moment based on the upper reference current corresponding to the inversion of the upper comparison result.

[0085] In an example, for the case where the upper switch tube SQ1 is a P-type switching device, as Figure 1 shown, the calculation module 130 includes a connection unit 131 and a calculation unit 132; among them, the connection unit 131 is a high-speed interface, which is used to transmit the upper comparison result output by the detection module 120 to the calculation unit 132 for relevant processing, and to transmit the first upper current control signal output by the calculation unit 132 to the first upper current source; of course, it is also feasible that the connection unit 131 is a memory. In another example, for the case where the upper switch tube SQ1 is an N-type switching device, as Figure 2As shown in the figure, the calculation module 130 includes a connection unit 131, a calculation unit 132, and a level conversion unit 133. Among them, the connection unit 131 is a high-speed interface for transmitting the upper-side comparison result output by the detection module 120 to the calculation unit 132 for relevant processing, and for transmitting the second upper-side current control signal output by the calculation unit 132 to the second upper-side current source after passing through the level conversion unit 133. Of course, it is also feasible that the connection unit 131 is a memory.

[0086] In practical applications, the online prediction system 100 of this embodiment further includes an upper-side driving module and a lower-side driving module (not shown in the figure). Among them, the upper-side driving module is used to provide an upper-side switch control signal G1, and the lower-side driving module is used to provide a lower-side switch control signal G2. For the case where the upper-side switch tube SQ1 is a P-type switching device, the upper-side driving module only includes a driving unit for improving the driving ability of the signal. For the case where the upper-side switch tube SQ1 is an N-type switching device, the upper-side driving module includes a driving unit and a level conversion unit for improving the driving ability of the signal and performing level adaptation at the same time. The lower-side driving module only includes a driving unit for improving the driving ability of the signal.

[0087] Correspondingly, this embodiment also provides an online prediction method for the remaining life of a power chip, which can be implemented by the online prediction system 100 described above in this embodiment. Among them, the online prediction method includes: obtaining the on-resistance of the upper-side switch tube SQ1 at different times, and predicting the remaining life of the upper-side switch tube SQ1 based on this; and characterizing the remaining life of the power chip based on the remaining life of the upper-side switch tube SQ1.

[0088] In one implementation manner, the step-scan method is used to obtain the on-resistance of the upper-side switch tube SQ1 at different times. In another implementation manner, the dichotomy method is used to obtain the on-resistance of the upper-side switch tube SQ1 at different times. Of course, in other implementation manners, other methods (such as the ramp method, etc.) can also be used to obtain the on-resistance of the upper-side switch tube SQ1 at different times. In this embodiment, during the process of obtaining the on-resistance of the upper-side switch tube SQ1 at different times, the states of the corresponding upper-side reference tube (the first upper-side reference tube or the second upper-side reference tube) and the upper-side switch tube SQ1 in the upper-side detection unit 121 are kept consistent. At this time, the upper-side switch tube SQ1 and the corresponding upper-side reference tube are fully turned on based on their respective control signals in the deep linear region.

[0089] Since the device types and the control terminal potentials of the corresponding upper-side reference tube and the upper-side switch tube SQ1 are the same, the ratio of the on-resistance of the corresponding upper-side reference tube to the on-resistance of the upper-side switch tube SQ1 only depends on the ratio of L CH / W to each other in Formula 1; for example, the channel length L of the corresponding upper-side reference tube CHis 0.2μm and the channel width W is 20μm, corresponding to L CH The value of / W is 1E-2, and the channel length L of the upper switch tube SQ1 CH is 0.2μm and the channel width W is 20Kμm, corresponding to L CH The value of / W is 1E-6, so the L between each other CH The ratio K1 of / W = 1E-2 / 1E-6 = 1E4. That is to say, the on-resistance of the upper reference tube corresponding to it is 10,000 times that of the upper switch tube SQ1. In practical applications, this ratio can be solidified in the online prediction system 100 presented in hardware, in the form of known values or design values, and there are no excessive restrictions on this.

[0090] Specifically, the method of using the step-scanning method to obtain the on-resistance of the upper switch tube SQ1 at different times includes the following steps, that is, steps S11a to S15a.

[0091] Step S11a, forming an upper reference voltage based on the upper reference current in the upper detection unit 121. Taking Figure 1 the first upper detection unit 121 in as an example, when there is current output in the first upper current source HI11, due to the voltage drop formed by the on-resistance of the first upper reference tube HQ11, an upper reference voltage VH1 will be generated at the connection node of the first upper reference tube HQ11 and the first upper current source HI11. It should be noted that as this step is repeatedly executed, the upper reference current gradually increases from the upper initial current value, and the increase amplitude each time is the upper preset step.

[0092] Step S12a, comparing the upper reference voltage and the upper node voltage VHSW and generating an upper comparison result, where the upper node voltage VHSW is the voltage at the connection node of the upper switch tube SQ1 and the lower switch tube SQ2 or the voltage of the first power supply. In practical applications, for the case where the upper switch tube SQ1 is a P-type switching device, the upper node voltage VHSW is the voltage at the connection node of the upper switch tube SQ1 and the lower switch tube SQ2; for the case where the upper switch tube SQ1 is an N-type switching device, the upper node voltage VHSW is the voltage of the first power supply. Taking Figure 1 the first upper detection unit 121 in as an example, the upper node voltage VHSW is connected to the non-inverting input terminal of the first upper comparator HCMP11, and the upper reference voltage VH1 is connected to the inverting input terminal of the first upper comparator HCMP11; when the upper reference voltage VH1 is greater than the upper node voltage VHSW, the upper comparison result output by the first upper comparator HCMP11 is a low level. As the upper reference voltage VH1 gradually decreases, when the upper reference voltage VH1 reaches the upper node voltage VHSW, the upper comparison result output by the first upper comparator HCMP11 flips, changing from a low level to a high level. It should be noted thatFigure 1 In this case, during the previous comparison period, the upper reference voltage is greater than the upper node voltage VHSW, but Figure 2 in this case, during the previous comparison period, the upper reference voltage is less than the upper node voltage VHSW. Therefore, Figure 1 and Figure 2 in this case, the levels at which the upper comparison result flips are exactly opposite.

[0093] Step S13a: Determine whether the upper comparison result flips. Taking the first upper detection unit 121 in Figure 1 as an example, if there is no flip, it indicates that the upper reference voltage VH1 is still greater than the upper node voltage VHSW, that is, the product of the upper reference current and K1 is less than the upper current. At this time, based on the upper preset step, adjust the upper reference current to gradually increase the upper reference current to obtain the upper adjustment current value, and jump to step S11a when the upper adjustment current value does not reach the upper end current value. If there is a flip, it indicates that the upper reference voltage VH1 reaches the upper node voltage VHSW, that is, the product of the upper reference current and K1 is equal to the upper current. At this time, obtain the upper current of the upper switch tube SQ1 at the current moment based on the upper reference current at the current moment, where the upper current at the current moment is equal to the product of the upper reference current at the current moment and K1. Figure 2 The principle is similar, so it will not be elaborated further. It should be noted that in the upper detection unit 121, the corresponding upper current source has a preset adjustment range. The upper initial current value mentioned in step S11a is the minimum value of this adjustment range, and the upper end current value mentioned in this step is the maximum value of this adjustment range.

[0094] Step S14a: Repeat steps S11a to S13a to obtain the upper currents of the upper switch tube SQ1 at different moments.

[0095] Step S15a: Based on the upper currents of the upper switch tube SQ1 at different moments, obtain the on-resistances of the upper switch tube SQ1 at different moments. It should be noted that for the upper switch tube SQ1, obtaining the on-resistance based on the upper current is a well-known technology to those skilled in the art, so it will not be specifically elaborated.

[0096] Of course, other methods such as the dichotomy method can be used to obtain the on-resistance of the upper switch tube SQ1 at different times. This method is similar to the step-scan method described above in this embodiment, except that the adjustment method of the upper reference current is different. Taking the dichotomy method as an example: Step S11a, for the corresponding upper current source in the upper detection unit 121, select the intermediate current value as the upper reference current from the adjustment range defined by the upper initial current value and the upper endpoint current value; Step S12a, form the upper reference voltage based on the upper reference current, compare the upper reference voltage with the upper node voltage VHSW and generate the upper comparison result; Step S13a, determine whether the upper comparison result has flipped. If it has not flipped, select the next intermediate current value as the upper reference current from the adjustment range defined by the corresponding intermediate current value and the upper endpoint current value and jump to Step S12a. If it has flipped, select the next intermediate current value as the upper reference current from the adjustment range defined by the upper initial current value and the corresponding intermediate current value and jump to Step S12a; Step S14a, repeat the process of Step S12a and Step S13a. When the adjustment range is reduced to the preset range, end, and obtain the upper current of the upper switch tube SQ1 at the current time based on the upper reference current corresponding to this adjustment range; Step S15a, repeat Step S11a to Step S14a to obtain the upper currents of the upper switch tube SQ1 at different times, and obtain the on-resistances of the upper switch tube SQ1 at different times based on this.

[0097] In practical applications, when obtaining the upper current of the upper switch tube SQ1 at different times through the upper detection unit 121, it can be achieved through one upper detection unit 121 or at least two upper detection units 121; when obtaining the upper current of the upper switch tube SQ1 at different times through multiple upper detection units 121, the current detection ranges corresponding to different upper detection units 121 are at least partially different, that is, the current adjustment ranges of the corresponding upper current sources in each upper detection unit 121 are at least partially different. This design is beneficial to improving the detection speed and detection accuracy of the upper current.

[0098] In this embodiment, for a power chip with a frequency of 1 MHz, the on-time of one switch is greater than 200 ns, the comparison time of the high-speed comparator is 10 ns, and the level establishment time is 10 ns. One comparison period is 20 ns. It can be seen that 10 comparisons can be performed within the on-time of one switch. Taking the number of upper detection units 121 as one and using the step-scan method for current detection as an example, when the output of the high-speed comparator does not flip, each comparison will increase the upper reference current by one upper preset step, which Figure 1 is to gradually decrease the upper reference voltage, such as Figure 3As shown, where the upper reference voltage is equal to the first power supply voltage minus the product of the upper reference current and the on-resistance of the corresponding upper reference transistor (however, for Figure 2 the upper reference voltage is gradually increased, where the upper reference voltage is equal to the product of the upper reference current and the on-resistance of the corresponding upper reference transistor); when the upper reference current increases to make the upper reference voltage reach the upper node voltage, the output of the high-speed comparator flips. At this time, it indicates that the product of the upper reference current at the current moment and K1 is equal to the upper current flowing through the upper switching transistor SQ1 at the current moment. Based on the above high-speed scanning method, the upper current of the upper switching transistor SQ1 at different moments can be obtained, the current waveform of the upper switching transistor SQ1 during operation can be obtained, and thus the waveform of the on-resistance can be obtained. If the upper switching transistor SQ1 is damaged, the current reflected by it will change, resulting in a deviated current, and the calculated value of the on-resistance will also deviate; comparing the deviated value of the on-resistance with the aging test model can predict its remaining life.

[0099] In one embodiment, the method for predicting the remaining life of the upper switching transistor SQ1 includes the following steps.

[0100] Step S21, obtain the upper resistance model based on the on-resistance of the upper switching transistor SQ1 at different moments, and obtain the aging test model of the upper switching transistor SQ1 with respect to the on-resistance. Among them, by plotting the waveform based on the on-resistance of the upper switching transistor SQ1 at different moments, the upper resistance model can be obtained. The aging test model of the upper switching transistor SQ1 with respect to the on-resistance can directly use the relevant model provided by the chip original manufacturer; of course, it can also be measured through the operation for a preset time (for example, several days or several months) after the online prediction system 100 in this embodiment is built, and there is no limitation on this. In addition, the aging test model of the upper switching transistor SQ1 with respect to the on-resistance is measured with at least one of the failure mechanisms mentioned above as the failure condition, where the aging test model can be one or multiple.

[0101] Step S22, compare the upper resistance model with the aging test model of the upper switching transistor with respect to the on-resistance, and predict the remaining life of the upper switching transistor SQ1 based on the comparison result. When the number of aging test models is greater than one, the upper resistance model is compared with each aging test model respectively, and find an aging test model that best fits the upper resistance model as the target model. Finally, based on the difference between the two models, evaluate the health status of the upper switching transistor SQ1 and predict the remaining life. Of course, it can also be based on the difference between the two models to check whether there are some potential problems with the upper switching transistor SQ1.

[0102] Embodiment 2

[0103] As Figure 4As shown in the figure, this embodiment provides an online prediction system 100 for the remaining life of a power chip, which includes a switching module 110, a detection module 120, and a calculation module 130.

[0104] The switching module 110 is the same as that in Embodiment 1. For relevant content, please refer to the above text and will not be elaborated here.

[0105] The detection module 120 is connected to the switching module 110 and is used to detect the lower current flowing through the lower switching transistor SQ2 in real time. Specifically, the detection module 120 includes at least one lower detection unit 123; further, it also includes a lower overvoltage protection unit 124. In practical applications, the number of lower detection units 123 can be one or more than one; by designing the number of lower detection units 123 as multiple, it is beneficial to improve the detection speed and detection accuracy of the lower current.

[0106] The lower detection unit 123 forms a lower reference voltage by adjusting the lower reference current, compares the lower reference voltage with the lower node voltage VLSW, and obtains the lower current of the lower switching transistor SQ2 at the current moment based on the lower reference current corresponding to the inversion of the lower comparison result. In one implementation manner, the lower detection unit 123 adjusts the lower reference current with a lower preset step based on the lower comparison result; in another implementation manner, the lower detection unit 123 adjusts the lower reference current by the dichotomy method based on the lower comparison result; of course, in other implementation manners, the lower detection unit 123 can also adjust the lower reference current in other ways (such as the ramp method, etc.) based on the lower comparison result. This embodiment does not particularly limit the adjustment method of the lower reference current. Among them, the lower node voltage VLSW is the voltage at the connection node of the upper switching transistor SQ1 and the lower switching transistor SQ2.

[0107] In addition, for the case where the number of the lower detection units 123 is multiple (i.e., greater than one), in each of the lower detection units 123, the adjustment ranges of any two lower reference currents are at least partially different; further, for the case of adjusting the lower reference current with a preset lower stepping, preferably, the preset lower stepping in each of the lower detection units 123 is the same. Taking the number of the lower detection units 123 being three and the total adjustment range being 0 to 600 mA as an example, it is designed that the adjustment range of the lower reference current of the first lower detection unit 123 is 0 to 200 mA, the adjustment range of the lower reference current of the second lower detection unit 123 is 200 mA to 400 mA, and the adjustment range of the lower reference current of the third lower detection unit 123 is 400 mA to 600 mA. Thus, when detecting the current by adjusting the lower reference current with the preset lower stepping, through the design of the three lower detection units 123, the current detection within 0 to 600 mA can be quickly realized, and moreover, the preset lower stepping can be designed to be smaller, thereby improving the detection accuracy; of course, when detecting the current by adjusting the lower reference current in other ways such as the dichotomy method, through the design of the three lower detection units 123, the detection speed and detection accuracy of the lower current can also be improved. In practical applications, the total adjustment range can be designed based on the working current range of the lower switching transistor SQ2, and usually, the total adjustment range is slightly larger than the working current range.

[0108] In one example, the lower detection unit 123 includes a lower reference tube (e.g., LQ1), a lower current source (e.g., LI1), and a lower comparator (e.g., LCMP1); the lower current source (e.g., LI1) and the lower reference tube (e.g., LQ1) are connected in series between the first power supply VDD1 and the reference ground, that is, the input end of the lower current source (e.g., LI1) is connected to the first power supply VDD1, the output end of the lower current source (e.g., LI1) is connected to the first end of the lower reference tube (e.g., LQ1), the control end of the lower reference tube (e.g., LQ1) receives the lower reference control signal GL, the second end of the lower reference tube (e.g., LQ1) is connected to the reference ground, the lower current source (e.g., LI1) is controlled by the lower current control signal to adjust and provide a lower reference current, so as to generate a lower reference voltage (e.g., VL1) at the connection node between the lower current source (e.g., LI1) and the lower reference tube (e.g., LQ1), the first input end of the lower comparator (e.g., LCMP1) receives the lower node voltage VLSW, the second input end of the lower comparator (e.g., LCMP1) receives the lower reference voltage (e.g., VL1), and the output end of the lower comparator (e.g., LCMP1) generates a lower comparison result; wherein, the device types of the lower reference tube (e.g., LQ1) and the lower switching tube SQ2 are the same, and the control ends of the lower reference tube (e.g., LQ1) and the lower switching tube SQ2 are at the same potential. In this example, both the lower reference tube (e.g., LQ1) and the lower switching tube SQ2 are N-type switching devices. Taking the switching device as a MOS device as an example, in the lower reference tube (e.g., LQ1), the control end refers to the gate terminal, the first end refers to the drain terminal, and the second end refers to the source terminal. In addition, in the lower comparator (e.g., LCMP1), the first input end refers to the non-inverting input end, and the second input end refers to the inverting input end; of course, it is also feasible that the first input end refers to the inverting input end and the second input end refers to the non-inverting input end.

[0109] In practical applications, when designing the lower detection unit, a preset distance should be provided between the positions of the lower reference tube and the lower switching tube SQ2. This preset distance can play a role in physical isolation and temperature reduction, ensuring that when the lower switching tube SQ2 is damaged due to overheating during extreme over-temperature, the lower reference tube will not be damaged due to overheating; it should be noted that the selection of this preset distance should be determined according to the actual situation and will not be overly restricted. In addition, in order to cooperate with the calculation module 130 to achieve fast data processing, the lower comparator is usually implemented by a high-speed comparator.

[0110] The lower overvoltage protection unit 124 is used to protect the lower reference tube in the lower detection unit 123 from overvoltage. Among them, the lower reference control signal GL is output after the lower switching control signal G2 passes through the lower overvoltage protection unit 124, so as to prevent the lower reference tube from being damaged when the lower switching control signal G2 has an abnormal high voltage. It should be noted that the lower overvoltage protection unit 124 can be implemented by any existing known overvoltage protection circuit, and there is no limitation on this.

[0111] The calculation module 130 is connected to the detection module 120. Based on the lower current of the lower switching transistor SQ2 at different times, the on-resistance of the lower switching transistor SQ2 at different times is obtained, and based on this, the remaining life of the lower switching transistor SQ2 is predicted. Of course, based on this, it is also possible to check whether there are some potential problems with the lower switching transistor SQ2 for early warning. In one implementation, the calculation module 130 obtains a lower resistance model based on the on-resistance of the lower switching transistor SQ2 at different times, and predicts the remaining life of the lower switching transistor SQ2 by comparing the lower resistance model with the aging test model of the lower switching transistor SQ2 regarding the on-resistance. In practical applications, the calculation module 130 also generates a lower current control signal based on the lower comparison result to adjust the lower reference current based on the lower preset step or dichotomy method, etc. At the same time, the adjusted current value is recorded and stored; of course, the calculation module 130 also obtains the lower current of the lower switching transistor SQ2 at the current moment based on the lower reference current corresponding to the inversion of the lower comparison result.

[0112] In one example, the calculation module 130 includes a connection unit 131 and a calculation unit 132; among them, the connection unit 131 is a high-speed interface, which is used to transmit the lower comparison result output by the detection module 120 to the calculation unit 132 for relevant processing, and transmit the lower current control signal output by the calculation unit 132 to the lower current source; of course, it is also feasible that the connection unit 131 is a memory.

[0113] In practical applications, the online prediction system 100 of this embodiment further includes an upper driving module and a lower driving module (not shown in the figure). Among them, the upper driving module is used to provide the upper switching control signal G1, and the lower driving module is used to provide the lower switching control signal G2. For the case where the upper switching transistor SQ1 is a P-type switching device, the upper driving module only includes a driving unit for improving the driving ability of the signal; for the case where the upper switching transistor SQ1 is an N-type switching device, the upper driving module includes a driving unit and a level conversion unit for improving the driving ability of the signal and performing level adaptation at the same time. The lower driving module only includes a driving unit for improving the driving ability of the signal.

[0114] Correspondingly, this embodiment also provides an online prediction method for the remaining life of a power chip, which can be implemented by the online prediction system 100 described above in this embodiment. Among them, the online prediction method includes: obtaining the on-resistance of the lower switch tube SQ2 at different times, and predicting the remaining life of the lower switch tube SQ2 based on this; and, characterizing the remaining life of the power chip based on the remaining life of the lower switch tube SQ2.

[0115] In one implementation manner, the step-scan method is used to obtain the on-resistance of the lower switch tube SQ2 at different times; in another implementation manner, the dichotomy method is used to obtain the on-resistance of the lower switch tube SQ2 at different times; of course, in other implementation manners, other methods (such as the ramp method, etc.) can also be used to obtain the on-resistance of the lower switch tube SQ2 at different times. In this embodiment, during the process of obtaining the on-resistance of the lower switch tube SQ2 at different times, the states of the lower reference tube and the lower switch tube SQ2 in the lower detection unit 123 are kept consistent. At this time, the lower switch tube SQ2 and the lower reference tube are fully turned on based on their respective control signals in the deep linear region.

[0116] Since the device types of the lower reference tube and the lower switch tube SQ2 are the same and the control terminal potentials are the same, the ratio of the on-resistance of the lower reference tube to the on-resistance of the lower switch tube SQ2 only depends on the ratio of L CH / W to each other in Formula 1; for example, the channel length L CH of the lower reference tube is 0.2 μm and the channel width W is 20 μm, corresponding to the value of L CH / W being 1E-2, the channel length L CH of the lower switch tube SQ2 is 0.2 μm and the channel width W is 20K μm, corresponding to the value of L CH / W being 1E-6, so the ratio of L CH / W to each other K2 = 1E-2 / 1E-6 = 1E4, that is to say, the on-resistance of the lower reference tube is 10,000 times that of the lower switch tube SQ2. In practical applications, this ratio can be solidified in the online prediction system 100 presented in hardware, in the form of known values or design values, and no excessive restrictions are imposed on this.

[0117] Specifically, the method for obtaining the on-resistance of the lower switch tube SQ2 at different times by using the step-scan method includes the following steps, that is, steps S11b to S15b.

[0118] Step S11b, forming a lower reference voltage based on the lower reference current in the lower detection unit 123. Figure 4Taking the first lower - side detection unit 123 in [[]] as an example, when there is current output in the lower - side current source LI1, due to the voltage drop formed by the on - resistance of the lower - side reference transistor LQ1, a lower - side reference voltage VL1 will be generated at the connection node between the lower - side current source LI1 and the lower - side reference transistor LQ1. It should be noted that as this step is repeatedly executed, the lower - side reference current gradually increases from the lower - side initial current value, and the increase amplitude each time is the lower - side preset step.

[0119] Step S12b: Compare the lower - side reference voltage with the lower - side node voltage VLSW and generate a lower - side comparison result. Here, the lower - side node voltage VLSW is the voltage at the connection node between the upper - side switching transistor SQ1 and the lower - side switching transistor SQ2. Taking Figure 4 the first lower - side detection unit 123 in [[]] as an example, the lower - side node voltage VLSW is connected to the non - inverting input terminal of the lower - side comparator LCMP1, and the lower - side reference voltage VL1 is connected to the inverting input terminal of the lower - side comparator LCMP1; when the lower - side reference voltage VL1 is less than the lower - side node voltage VLSW, the lower - side comparison result output by the lower - side comparator LCMP1 is at a high level. As the lower - side reference voltage VL1 gradually increases, when the lower - side reference voltage VL1 reaches the lower - side node voltage VLSW, the lower - side comparison result output by the lower - side comparator LCMP1 flips, changing from a high level to a low level.

[0120] Step S13b: Determine whether the lower - side comparison result flips. Taking Figure 4 the first lower - side detection unit 123 in [[]] as an example, if there is no flip, it means that the lower - side reference voltage VL1 is still less than the lower - side node voltage VLSW, that is, the product of the lower - side reference current and K2 is less than the lower - side current. At this time, adjust the lower - side reference current based on the lower - side preset step, gradually increasing the lower - side reference current to obtain a lower - side adjusted current value, and jump to step S11b when the lower - side adjusted current value does not reach the lower - side end - point current value. If there is a flip, it means that the lower - side reference voltage VL1 reaches the lower - side node voltage VLSW, that is, the product of the lower - side reference current and K2 is equal to the lower - side current. At this time, obtain the lower - side current of the lower - side switching transistor SQ2 at the current moment based on the lower - side reference current at the current moment, where the lower - side current at the current moment is equal to the product of the lower - side reference current at the current moment and K2. It should be noted that in the lower - side detection unit 123, the lower - side current source has a preset adjustment range. The lower - side initial current value mentioned in step S11b is the minimum value of this adjustment range, and the lower - side end - point current value mentioned in this step is the maximum value of this adjustment range.

[0121] Step S14b: Repeatedly execute steps S11b to S13b to obtain the lower - side currents of the lower - side switching transistor SQ2 at different moments.

[0122] Step S15b: Based on the lower - side current of the lower - side switch SQ2 at different times, obtain the on - resistance of the lower - side switch SQ2 at different times. It should be noted that for the lower - side switch SQ2, obtaining the on - resistance based on the lower - side current is a well - known technique to those skilled in the art, so it will not be elaborated specifically.

[0123] Of course, other methods such as the dichotomy method to obtain the on - resistance of the lower - side switch SQ2 at different times are similar to the step - by - step scanning method described above in this embodiment, except that the adjustment method of the lower - side reference current is different. Taking the dichotomy method as an example: Step S11b: For the lower - side current source in the lower - side detection unit 123, select the middle current value as the lower - side reference current from the adjustment range defined by the lower - side initial current value and the lower - side end - point current value; Step S12b: Form the lower - side reference voltage based on the lower - side reference current, compare the lower - side reference voltage with the lower - side node voltage VLSW and generate the lower - side comparison result; Step S13b: Determine whether the lower - side comparison result flips. If it does not flip, select the next middle current value as the lower - side reference current from the adjustment range defined by the corresponding middle current value and the lower - side end - point current value and jump to Step S12b. If it flips, select the next middle current value as the lower - side reference current from the adjustment range defined by the lower - side initial current value and the corresponding middle current value and jump to Step S12b; Step S14b: Repeat the process of Step S12b and Step S13b. End when the adjustment range is reduced to the preset range, and obtain the lower - side current of the lower - side switch SQ2 at the current time based on the lower - side reference current corresponding to this adjustment range; Step S15b: Repeat Steps S11b to S14b to obtain the lower - side currents of the lower - side switch SQ2 at different times, and based on this, obtain the on - resistances of the lower - side switch SQ2 at different times.

[0124] In practical applications, when obtaining the lower - side current of the lower - side switch SQ2 at different times through the lower - side detection unit 123, it can be achieved by one lower - side detection unit 123 or at least two lower - side detection units 123; when obtaining the lower - side currents of the lower - side switch at different times through multiple lower - side detection units 123, the current detection ranges corresponding to different lower - side detection units 123 are at least partially different, that is, the current adjustment ranges of the lower - side current sources in each lower - side detection unit 123 are at least partially different. This design is beneficial to improving the detection speed and detection accuracy of the lower - side current.

[0125] In this embodiment, taking the case where the number of the lower-side detection units 123 is one and the step-scanning method is used for current detection, when the output of the high-speed comparator does not flip, each comparison will increase the lower-side reference current by a lower-side preset step, so that the lower-side reference voltage gradually increases. Among them, the lower-side reference voltage is equal to the product of the lower-side reference current and the on-resistance of the lower-side reference transistor; when the lower-side reference current increases to make the lower-side reference voltage reach the lower-side node voltage, the output of the high-speed comparator flips. At this time, it indicates that the product of the lower-side reference current at the current moment and K2 is equal to the lower-side current flowing through the lower-side switching transistor SQ2 at the current moment. Based on the above high-speed scanning method, the lower-side currents of the lower-side switching transistor SQ2 at different moments can be obtained, and the current waveform of the lower-side switching transistor SQ2 during operation can be obtained, so as to obtain the waveform of the on-resistance. If the lower-side switching transistor SQ2 is damaged, the current reflected by it will change, resulting in a deviated current, and the calculated value of the on-resistance will also deviate; the deviated value of the on-resistance can be compared with the aging test model to predict its remaining life.

[0126] In one embodiment, the method for predicting the remaining life of the lower-side switching transistor SQ2 includes the following steps.

[0127] Step S21, obtain a lower-side resistance model based on the on-resistances of the lower-side switching transistor SQ2 at different moments, and obtain an aging test model of the lower-side switching transistor SQ2 with respect to the on-resistance. Among them, by plotting the waveform based on the on-resistances of the lower-side switching transistor SQ2 at different moments, the lower-side resistance model can be obtained. The aging test model of the lower-side switching transistor SQ2 with respect to the on-resistance can directly use the relevant model provided by the chip original manufacturer; of course, it can also be measured through the operation for a preset time (for example, several days or several months) after the online prediction system 100 in this embodiment is built, and there is no limitation on this. In addition, the aging test model of the lower-side switching transistor SQ2 with respect to the on-resistance is measured with at least one of the failure mechanisms mentioned above as the failure condition. Among them, the aging test model can be one or multiple.

[0128] Step S22, compare the lower-side resistance model with the aging test model of the lower-side switching transistor with respect to the on-resistance, and predict the remaining life of the lower-side switching transistor SQ2 based on the comparison result. When the number of the aging test models is greater than one, the lower-side resistance model is respectively compared with each aging test model, and an aging test model that best fits the lower-side resistance model is found as the target model. Finally, based on the difference between the two models, the health status of the lower-side switching transistor SQ2 is evaluated and the remaining life is predicted. Of course, it is also possible to check whether there are some potential problems with the lower-side switching transistor SQ2 based on the difference between the two models.

[0129] Embodiment III

[0130] Combined withFigure 1 , Figure 2 and Figure 4 , this embodiment further provides an online prediction system 100 for the remaining life of a power chip, including a switching module 110, a detection module 120, and a calculation module 130.

[0131] The switching module 110 is the same as that in the first embodiment, and the relevant content can be found in the above text and will not be elaborated here.

[0132] The detection module 120 is connected to the switching module 110 and is used to detect the upper current flowing through the upper switching transistor SQ1 and the lower current flowing through the lower switching transistor SQ2 in real time. Specifically, the detection module 120 includes at least one upper detection unit 121 and at least one lower detection unit 123; further, it also includes an upper overvoltage protection unit 122 and a lower overvoltage protection unit 124. In practical applications, the number of upper detection units 121 can be one or more than one. By designing the number of upper detection units 121 as multiple, it is beneficial to improve the detection speed and accuracy of the upper current; similarly, the number of lower detection units 123 can be one or more than one. By designing the number of lower detection units 123 as multiple, it is beneficial to improve the detection speed and accuracy of the lower current. It should be noted that the upper detection unit 121 and the upper overvoltage protection unit 122 are the same as those in the first embodiment, and the lower detection unit 123 and the lower overvoltage protection unit 124 are the same as those in the second embodiment. The relevant content can be found in the above text and will not be elaborated here.

[0133] The calculation module 130 is connected to the detection module 120. Based on the upper current of the upper switch tube SQ1 at different times, the on-resistance of the upper switch tube SQ1 at different times is obtained, and based on this, the remaining life of the upper switch tube SQ1 is predicted. Also, based on the lower current of the lower switch tube SQ2 at different times, the on-resistance of the lower switch tube SQ2 at different times is obtained, and based on this, the remaining life of the lower switch tube SQ2 is predicted. In one implementation, the calculation module 130 obtains an upper resistance model based on the on-resistance of the upper switch tube SQ1 at different times, and predicts the remaining life of the upper switch tube SQ1 by comparing the upper resistance model with the aging test model of the upper switch tube SQ1 regarding the on-resistance. Also, an lower resistance model is obtained based on the on-resistance of the lower switch tube SQ2 at different times, and the remaining life of the lower switch tube SQ2 is predicted by comparing the lower resistance model with the aging test model of the lower switch tube SQ2 regarding the on-resistance. In practical applications, the calculation module 130 also generates a first upper current control signal or a second upper current control signal based on the upper comparison result to adjust the upper reference current based on the upper preset step or the dichotomy method, etc. At the same time, the adjusted current value is recorded and stored. Of course, the upper current of the upper switch tube SQ1 at the current moment is obtained based on the upper reference current corresponding to the inversion of the upper comparison result. Also, a lower current control signal is generated based on the lower comparison result to adjust the lower reference current based on the lower preset step or the dichotomy method, etc. At the same time, the adjusted current value is recorded and stored. Of course, the lower current of the lower switch tube SQ2 at the current moment is obtained based on the lower reference current corresponding to the inversion of the lower comparison result.

[0134] In one example, for the case where the upper switch tube SQ1 is a P-type switching device, the calculation module 130 includes a connection unit 131 and a calculation unit 132. Among them, the connection unit 131 is a high-speed interface, which is used to transmit the upper comparison result and the lower comparison result output by the detection module 120 to the calculation unit 132 for relevant processing, and to transmit the first upper current control signal output by the calculation unit 132 to the first upper current source, and transmit the lower current control signal output by the calculation unit 132 to the lower current source. Of course, it is also feasible that the connection unit 131 is a memory. In another example, for the case where the upper switch tube SQ1 is an N-type switching device, the calculation module 130 includes a connection unit 131, a calculation unit 132, and a level conversion unit 133. Among them, the connection unit 131 is a high-speed interface, which is used to transmit the upper comparison result and the lower comparison result output by the detection module 120 to the calculation unit 132 for relevant processing, and to transmit the second upper current control signal output by the calculation unit 132 to the second upper current source after passing through the level conversion unit 133, and transmit the lower current control signal output by the calculation unit 132 to the lower current source. Of course, it is also feasible that the connection unit 131 is a memory.

[0135] In practical applications, the online prediction system 100 of this embodiment further includes an upper driving module and a lower driving module (not shown in the figure). Among them, the upper driving module is used to provide the upper switch control signal G1, and the lower driving module is used to provide the lower switch control signal G2. For the case where the upper switch tube SQ1 is a P-type switching device, the upper driving module only includes a driving unit, which is used to improve the driving ability of the signal. For the case where the upper switch tube SQ1 is an N-type switching device, the upper driving module includes a driving unit and a level conversion unit, which are used to improve the driving ability of the signal and perform level adaptation at the same time. The lower driving module only includes a driving unit, which is used to improve the driving ability of the signal.

[0136] Correspondingly, this embodiment also provides an online prediction method for the remaining life of a power chip, which can be implemented by the online prediction system 100 described above in this embodiment. Among them, the online prediction method includes: obtaining the on-resistance of the upper switch tube SQ1 at different times, and predicting the remaining life of the upper switch tube SQ1 based on this; obtaining the on-resistance of the lower switch tube SQ2 at different times, and predicting the remaining life of the lower switch tube SQ2 based on this; and characterizing the remaining life of the power chip based on the remaining lives of the upper switch tube SQ1 and the lower switch tube SQ2. It should be noted that the specific method of obtaining the on-resistance of the upper switch tube SQ1 at different times and predicting the remaining life of the upper switch tube SQ1 based on this is the same as that in Embodiment 1, and the specific method of obtaining the on-resistance of the lower switch tube SQ2 at different times and predicting the remaining life of the lower switch tube SQ2 based on this is the same as that in Embodiment 2. For relevant content, see the above, and it will not be elaborated here.

[0137] In summary, for the online prediction system and method for the remaining life of a power chip of the present invention, by monitoring the on-resistance of the switch tubes in the power chip (especially the small-current power chip) in use through the detection module and the calculation module, the remaining life of the switch tubes can be accurately predicted, and the remaining life of the power chip can be characterized based on the remaining lives of the switch tubes. Therefore, the present invention effectively overcomes various disadvantages in the prior art and has high industrial utilization value.

[0138] The above embodiments are only illustrative of the principles and effects of the present invention, and are not used to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.

Claims

1. An online prediction system for the remaining life of a power chip, characterized in that: include: A switch module, comprising an upper switch tube and a lower switch tube, which are connected in series between a first power supply and a reference ground; A detection module, connected to the switch module, for detecting the upper current flowing through the upper switch tube in real time, and / or detecting the lower current flowing through the lower switch tube in real time; A calculation module is connected to the detection module, and obtains the on-resistance of the upper switch tube at different times based on the upper current of the upper switch tube at different times, and predicts the remaining life of the upper switch tube based on this, and / or obtains the on-resistance of the lower switch tube at different times based on the lower current of the lower switch tube at different times, and predicts the remaining life of the lower switch tube based on this.

2. The online prediction system for the remaining life of a power chip according to claim 1 is characterized in that: When the detection module detects the upper current flowing through the upper switch tube in real time, it includes at least one upper detection unit, which forms an upper reference voltage by adjusting the upper reference current, compares the upper reference voltage with the upper node voltage, and obtains the upper current of the upper switch tube at the current moment based on the upper reference current corresponding to the upper comparison result when the upper comparison result is flipped, wherein the upper node voltage is the voltage at the node where the upper switch tube is connected to the lower switch tube or the voltage of the first power supply; When the detection module detects the lower current flowing through the lower switch tube in real time, it includes at least one lower detection unit, which forms a lower reference voltage by adjusting the lower reference current, compares the lower reference voltage and the lower node voltage, and obtains the lower current of the lower switch tube at the current moment based on the lower reference current corresponding to the lower comparison result when the lower comparison result is flipped, wherein the lower node voltage is the voltage at the node where the upper switch tube and the lower switch tube are connected.

3. The online prediction system for the remaining life of a power chip according to claim 2 is characterized in that: When the detection module includes an upper detection unit, the upper detection unit adjusts the upper reference current with an upper preset step based on the upper comparison result; when the number of the upper detection units is greater than one, in each upper detection unit, the adjustment ranges of any two upper reference currents are at least partially different; When the detection module includes a lower side detection unit, the lower side detection unit adjusts the lower side reference current with a lower side preset step based on the lower side comparison result; when the number of the lower side detection units is greater than one, in each lower side detection unit, the adjustment ranges of any two lower side reference currents are at least partially different.

4. The online prediction system for the remaining life of a power chip according to claim 2 or 3, characterized in that: The upper switch tube is a P-type switch device or an N-type switch device, and the lower switch tube is an N-type switch device; When the upper switch tube is a P-type switch device and the detection module includes an upper detection unit, the upper detection unit includes a first upper reference tube, a first upper current source and a first upper comparator, wherein the first upper reference tube and the first upper current source are connected in series between a first power supply and a reference ground, the first upper current source is regulated by a first upper current control signal and provides the upper reference current, so as to generate the upper reference voltage at a connection node between the first upper reference tube and the first upper current source, a first input terminal of the first upper comparator receives the upper node voltage, a second input terminal of the first upper comparator receives the upper reference voltage, and an output terminal of the first upper comparator generates the upper comparison result; wherein the first upper reference tube and the upper switch tube are of the same device type, and the control terminals of the first upper reference tube and the upper switch tube are at the same potential, and the upper node voltage is the voltage at the connection node between the upper switch tube and the lower switch tube; When the upper switch tube is an N-type switch device and the detection module includes an upper detection unit, the upper detection unit includes a second upper reference tube, a second upper current source and a second upper comparator, the second upper current source and the second upper reference tube are connected in series between a second power supply and a connection node between the upper switch tube and the lower switch tube, the second upper current source is controlled by a second upper current control signal to adjust and provide the upper reference current, so as to generate the upper reference voltage at the connection node between the second upper current source and the second upper reference tube, the first input terminal of the second upper comparator receives the upper node voltage, the second input terminal of the second upper comparator receives the upper reference voltage, and the output terminal of the second upper comparator generates the upper comparison result; wherein the second upper reference tube and the upper switch tube are of the same device type, and the control terminals of the second upper reference tube and the upper switch tube are at the same potential, and the upper node voltage is the voltage of the first power supply; When the detection module includes a lower detection unit, the lower detection unit includes a lower reference tube, a lower current source and a lower comparator. The lower current source and the lower reference tube are connected in series between a first power supply and a reference ground. The lower current source is controlled by a lower current control signal and provides the lower reference current to generate the lower reference voltage at a connection node between the lower current source and the lower reference tube. The first input terminal of the lower comparator receives the lower node voltage, the second input terminal of the lower comparator receives the lower reference voltage, and the output terminal of the lower comparator generates the lower comparison result. The lower reference tube and the lower switch tube are of the same device type, and the control terminals of the lower reference tube and the lower switch tube are at the same potential.

5. The online prediction system for the remaining life of a power chip according to claim 4, characterized in that: When the detection module includes an upper detection unit, it also includes an upper overvoltage protection unit, which is used to perform overvoltage protection on the first upper reference tube or the second upper reference tube in the upper detection unit, wherein the upper switch control signal connected to the control end of the upper switch tube is output through the upper overvoltage protection unit to output a corresponding upper reference control signal connected to the control end of the corresponding upper reference tube; When the detection module includes a lower detection unit, it also includes a lower overvoltage protection unit, which is used to perform overvoltage protection on the lower reference tube in the lower detection unit, wherein the lower switch control signal connected to the control end of the lower switch tube passes through the lower overvoltage protection unit and then outputs the lower reference control signal connected to the control end of the lower reference tube.

6. The online prediction system for the remaining life of a power chip according to claim 1, characterized in that: The calculation module obtains an upper resistance model based on the on-resistance of the upper switch tube at different times, and predicts the remaining life of the upper switch tube by comparing the upper resistance model with an aging test model of the on-resistance of the upper switch tube; and / or, the calculation module obtains a lower resistance model based on the on-resistance of the lower switch tube at different times, and predicts the remaining life of the lower switch tube by comparing the lower resistance model with an aging test model of the on-resistance of the lower switch tube.

7. An online prediction method for the remaining life of a power chip, characterized in that: include: Obtaining the on-resistance of the upper switch tube at different times, and predicting the remaining life of the upper switch tube based on the on-resistance; And, based on the remaining life of the upper switch tube, characterizing the remaining life of the power chip; And / or, obtaining the on-resistance of the lower switch tube at different times, and predicting the remaining life of the lower switch tube based on the on-resistance; and, characterizing the remaining life of the power chip based on the remaining life of the lower switch tube.

8. The online prediction method for the remaining life of a power chip according to claim 7, characterized in that: The method for obtaining the on-resistance of the upper switch tube at different times includes: Step S11a, forming an upper reference voltage based on an upper reference current in the upper detection unit; Step S12a, comparing the upper reference voltage and the upper node voltage and generating an upper comparison result, wherein the node voltage is the voltage at the connection node between the upper switch tube and the lower switch tube or the voltage of the first power supply; Step S13a, determining whether the upper comparison result is flipped; If no flipping occurs, the upper reference current is adjusted based on the upper preset step, and when the upper adjustment current value does not reach the upper endpoint current value, the process jumps to step S11a; If a flip occurs, based on the upper reference current at the current moment, the upper current of the upper switch tube at the current moment is obtained; Step S14a, repeatedly executing steps S11a to S13a to obtain the upper current of the upper switch tube at different times; Step S15a, obtaining the on-resistance of the upper switch tube at different times based on the upper current of the upper switch tube at different times; And / or, the method for obtaining the on-resistance of the lower switch tube at different times includes: Step S11b, forming a lower reference voltage based on a lower reference current in the lower detection unit; Step S12b, comparing the lower reference voltage and the lower node voltage and generating a lower comparison result, wherein the node voltage is the voltage at the node where the upper switch tube and the lower switch tube are connected; Step S13b, determining whether the lower comparison result is flipped; If no flipping occurs, the lower reference current is adjusted based on the lower preset step, and when the lower adjusted current value does not reach the lower end current value, the process jumps to step S11b; If a flip occurs, based on the lower reference current at the current moment, the lower current of the lower switch tube at the current moment is obtained; Step S14b, repeatedly executing steps S11b to S13b to obtain the lower current of the lower switch tube at different times; Step S15b, based on the lower current of the lower switch tube at different times, obtaining the on-resistance of the lower switch tube at different times.

9. The online prediction method for the remaining life of a power chip according to claim 8, characterized in that: The upper side current of the upper side switch tube at different times is obtained through at least two upper side detection units, wherein the current detection ranges corresponding to different upper side detection units are at least partially different; and / or, the lower side current of the lower side switch tube at different times is obtained through at least two lower side detection units, wherein the current detection ranges corresponding to different lower side detection units are at least partially different.

10. The online prediction method for the remaining life of a power chip according to claim 7, characterized in that: Methods for predicting the remaining life of the upper switch include: Obtaining an upper resistance model based on the on-resistance of the upper switch tube at different times, and obtaining an aging test model of the upper switch tube with respect to the on-resistance; Compare the upper resistance model with the aging test model of the upper switch tube regarding the on-resistance, and predict the remaining life of the upper switch tube based on the comparison result; And / or, the method for predicting the remaining life of the lower switch tube includes: A lower resistance model is obtained based on the on-resistance of the lower switch tube at different times, and an aging test model of the lower switch tube with respect to the on-resistance is obtained; The lower resistance model is compared with the aging test model of the lower switch tube regarding the on-resistance, and the remaining life of the lower switch tube is predicted based on the comparison result.

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