Circuit board product detection method

Abstract

The invention provides a circuit board product detection method, which belongs to the technical field of electric digital data processing, and comprises the following steps: firstly, obtaining basic aging data of a circuit board through six basic tests of temperature circulation, damp heat, high-pressure stress, mechanical vibration, power supply circulation and electromagnetic interference; secondly, scientifically calculating an optimal parameter combination of a functional load test by utilizing an aging parameter optimization equation set, wherein the optimal parameter combination comprises load intensity percentage and duration; and then analyzing all test data by adopting a pre-trained circuit life prediction model, dynamically optimizing rapid temperature shock test parameters, and finally evaluating the aging effect by detecting the change rate of key electrical parameters. According to the method, a parameter optimization system based on data driving is established, scientific, accurate and intelligent configuration of circuit board aging test parameters is realized, and the technical problem of low test efficiency caused by lack of scientific basis in traditional aging test parameter setting is effectively solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic digital data processing. Specifically, it relates to a method for detecting circuit board products. Background Art

[0002] The aging test of circuit boards is a key link in evaluating the reliability of electronic devices. Traditional aging test methods include temperature cycling, damp heat aging, voltage stress testing, etc. These methods are carried out in accordance with industrial standards such as IPC-9701, MIL-STD-202, etc. The setting of test parameters mainly depends on fixed standard values or the experience values of engineers. In practical applications, circuit boards in fields such as aerospace, medical equipment, and communication infrastructure usually need to undergo aging tests for hundreds or even thousands of hours to ensure their long-term reliability in harsh environments.

[0003] However, there are obvious defects in the setting of traditional circuit board aging test parameters: First, the selection of test parameters lacks pertinence and fails to optimize and adjust according to the specific characteristics and application environment of the circuit board; second, there is a lack of correlation analysis between various test parameters, and the pre-test data is not fully utilized to guide the selection of subsequent test parameters; third, the test parameters are often too conservative, and the reliability is ensured by simply extending the test time or increasing the test intensity, resulting in a long test cycle and waste of resources.

[0004] That is to say, there is a technical problem in the prior art that the aging test parameters of circuit boards often rely on empirical adjustment and lack scientific optimization methods, resulting in low test efficiency. Summary of the Invention

[0005] In view of this, the present invention provides a method for detecting circuit board products, which can solve the technical problem in the prior art that the aging test parameters of circuit boards often rely on empirical adjustment and lack scientific optimization methods, resulting in low test efficiency.

[0006] The present invention is implemented as follows: The present invention provides a method for detecting circuit board products, including: obtaining basic aging data; using an aging parameter optimization equation set to determine the best combination of the load intensity percentage and the optimal aging duration in the functional load test method. The aging parameter optimization equation set includes a load intensity equation, an aging time equation, an aging efficiency equation, an aging quality equation, and an aging cost equation. The input of the load intensity equation includes circuit board thermal stress aging test data, circuit board rated power value, circuit board design life, circuit board heat dissipation coefficient, and circuit board damp heat aging test data, and the output is the optimized load intensity percentage; using a pre-trained circuit life prediction model to analyze various aging test data and dynamically adjust the rapid temperature shock test parameters; determining whether the circuit board is qualified by detecting the change rate of key electrical parameters before and after the circuit board aging.

[0007] Among them, the aging time equation is used to calculate the shortest test time required to achieve the expected aging effect. The inputs include the optimized load intensity percentage, mechanical vibration aging test data, circuit board design working temperature, actual test temperature, and electromagnetic interference aging test data. The output is the optimal aging duration, which is used to determine the duration of the functional load test method.

[0008] Among them, the aging efficiency equation is used to evaluate the overall efficiency of the aging test plan. The inputs include the optimized load intensity percentage, optimal aging duration, coefficient of thermal expansion of the circuit board material, expected failure rate of circuit board aging, and power cycle aging test data. The output is the aging efficiency score, which is used for the calculation of the aging quality equation.

[0009] Among them, the aging quality equation is used to evaluate the quality level of the aging test plan. The inputs include the aging efficiency score, circuit board working frequency parameter, circuit board quality grade standard, aging test coverage rate, and voltage aging test data. The output is the aging quality score, which is used for the calculation of the aging cost equation and the parameter adjustment of the pre-trained circuit life prediction model.

[0010] Among them, the aging cost equation is used to calculate the economic index of the aging test plan. The inputs include the optimal aging duration, energy consumption coefficient, depreciation cost of aging equipment, labor cost coefficient, and aging quality score. The output is the unit aging cost index, which is used to determine the best combination of functional load test methods.

[0011] Among them, the specific structure of the pre-trained circuit life prediction model is a deep learning model based on the combination of a multi-layer time series attention mechanism and a recurrent neural network, which includes six main parts: an input layer, a feature extraction layer, a time series analysis layer, an attention layer, a fully connected layer, and an output layer.

[0012] Among them, in the pre-trained circuit life prediction model, the input layer receives the multi-dimensional electrical parameter time series data collected during the aging process. The feature extraction layer extracts the electrical parameter fluctuation features through a convolutional neural network. The time series analysis layer uses a bidirectional long short-term memory network to capture the changing trend of aging parameters over time. The attention layer uses a multi-head self-attention mechanism to assign different weights to different aging stages. The fully connected layer fuses multi-dimensional features to form a unified representation. The output layer predicts the remaining service life of the circuit board and the future changing trends of various electrical parameters.

[0013] Among them, obtaining the basic aging data is specifically achieved by performing various aging tests on the circuit board using the temperature cycle test method, high humidity environmental chamber, high voltage stress test, mechanical vibration aging test, power cycle aging test, and electromagnetic interference simulator.

[0014] Among them, the specific steps for dynamically adjusting the rapid temperature shock test parameters are that the temperature change range is from -55 °C to +125 °C, the holding time is 15 minutes, the conversion time is less than 10 seconds, and the number of cycles is 200 times.

[0015] Among them, the specific steps for determining whether the circuit board is qualified by detecting the change rate of key electrical parameters before and after the circuit board aging are that if it exceeds the set threshold of 5%, the circuit board is determined to be unqualified, and the performance index data after aging is recorded.

[0016] Compared with the prior art, a method for detecting a circuit board product provided by the present invention proposes a circuit board aging method based on a multi-dimensional parameter optimization equation set and a deep learning model. By constructing an intelligent optimization system including multi-dimensional equations such as load intensity, aging time, aging efficiency, aging quality, and aging cost, scientific configuration and dynamic adjustment of test parameters are realized.

[0017] This method solves the core problem of parameter setting in traditional aging tests: First, by establishing a parameter optimization equation set, scientific calculation of the optimal test parameters is realized according to the specific characteristics of the circuit board and the previous test data, avoiding empirical and one-size-fits-all parameter setting methods; Second, introducing the previous test data as the input for subsequent test parameter optimization, establishing data associations between each test link, and forming a parameter optimization closed loop; Third, applying a pre-trained circuit life prediction model to analyze the test data and dynamically adjust the rapid temperature shock test parameters, realizing intelligent optimization of the parameters.

[0018] Through this parameter optimization method, the present invention successfully solves the technical problem of low test efficiency caused by the lack of a scientific optimization method for circuit board aging test parameters, significantly improves the aging test efficiency while ensuring the test effectiveness, and can reduce the test time by 30% - 50% on average. Description of the Drawings

[0019] Figure 1 It is a flowchart of the method of the present invention. Specific Embodiments

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0021] As Figure 1 shown, it is a flowchart of a method for detecting a circuit board product provided by the present invention, and this method includes the following steps: S01. Adopt the temperature cycle test method to set the cycle temperature range from the lowest temperature of -40 °C to the highest temperature of +85 °C to complete the thermal stress aging test of the circuit board; S02. Use a high-humidity environmental chamber to adjust the relative humidity to 85%, set the temperature to 60 degrees Celsius, and maintain for 96 hours to complete the damp heat aging test of the circuit board; S03. Set the high-voltage stress test voltage value according to 1.2 times the upper limit of the circuit board working voltage, and continuously apply it for 48 hours to conduct the voltage aging test; S04. Establish a vibration frequency scanning range from 10 Hz to 2000 Hz, with an acceleration of 5G, and the test time for each axis is 30 minutes to conduct the mechanical vibration aging test; S05. Conduct a power cycle aging test, set the power switch cycle to turn on for 1 minute and turn off for 30 seconds, and the total number of cycles is 1000 times; S06. Use an electromagnetic interference simulator to generate interference signals that meet the electromagnetic interference intensity of the circuit board usage environment, and maintain for 24 hours to complete the electromagnetic interference aging test; S07. Use the aging parameter optimization equation set to determine the best combination of the load intensity percentage and the optimal aging duration in the functional load test method, and make the circuit board operate according to the functional load test method under the high-voltage stress test voltage value obtained in S03; S08. Use the pre-trained circuit life prediction model to analyze the aging test data from S01 to S07, dynamically adjust the rapid temperature shock test parameters, with a temperature change range from -55 degrees Celsius to +125 degrees Celsius, a holding time of 15 minutes, a conversion time less than 10 seconds, and the number of cycles is 200 times; S09. By detecting the change rate of key electrical parameters before and after the circuit board aging, if it exceeds the set threshold of 5%, it is determined that the circuit board is unqualified, and record the performance index data after aging.

[0022] Among them, the temperature cycle test method specifically refers to placing the circuit board in a controllable temperature environment and performing a cyclic heating and cooling process according to a preset temperature curve to simulate the temperature change environment encountered by the circuit board during actual use, and verify the reliability and durability of the circuit board under temperature change conditions.

[0023] Among them, the high-voltage stress test voltage value specifically refers to applying a voltage higher than the normal working voltage to the circuit board by a certain proportion, so that the circuit board experiences electrical aging problems that occur during long-term use in a short time, and test the electrical insulation performance of the circuit board and the voltage withstand capacity of components.

[0024] Among them, the aging parameter optimization equation set specifically refers to a mathematical model used to determine the optimal parameter combination of the functional load test of the circuit board. By establishing a quantitative relationship between the load intensity percentage and the aging effect, the aging test efficiency is optimized.

[0025] Among them, the functional load test method specifically refers to applying the maximum design load while the circuit board executes its designed functions, enabling the circuit board to operate under the most demanding working conditions for a long time, and testing the stability and heat dissipation performance of the circuit board under long-term full-load conditions.

[0026] Among them, the rapid temperature shock test specifically refers to subjecting the circuit board to extremely large temperature difference changes in a very short time, testing the firmness of the circuit board solder joints and the stress problems caused by differences in the thermal expansion coefficients of materials, and is one of the most effective methods for detecting the mechanical structure stability of the circuit board.

[0027] The aging parameter optimization equation set includes a load intensity equation, an aging time equation, an aging efficiency equation, an aging quality equation, and an aging cost equation; The load intensity equation is used to determine the optimal load intensity percentage in the functional load test method of the circuit board. The inputs include the thermal stress aging test data of the circuit board obtained by S01, the rated power value of the circuit board, the designed life of the circuit board, the heat dissipation coefficient of the circuit board, and the damp heat aging test data of the circuit board obtained by S02. The output is the optimized load intensity percentage for determining the load size in the functional load test method in S07; The aging time equation is used to calculate the shortest test time required to achieve the expected aging effect. The inputs include the optimized load intensity percentage, the mechanical vibration aging test data obtained by S04, the designed working temperature of the circuit board, the actual test temperature set in S01, and the electromagnetic interference aging test data obtained by S06. The output is the optimal aging duration for determining the duration of the functional load test method in S07; The aging efficiency equation is used to evaluate the overall efficiency of the aging test plan. The inputs include the optimized load intensity percentage, the optimal aging duration, the thermal expansion coefficient of the circuit board material, the expected failure rate of the circuit board aging, and the power cycle aging test data obtained by S05. The output is the aging efficiency score for calculating in the aging quality equation; The aging quality equation is used to evaluate the quality level of the aging test plan. The inputs include the aging efficiency score, the working frequency parameter of the circuit board, the circuit board quality grade standard, the aging test coverage rate, and the voltage aging test data obtained by S03. The output is the aging quality score for calculating in the aging cost equation and adjusting the parameters of the pre-trained circuit life prediction model; The aging cost equation is used to calculate the economic index of the aging test plan. The inputs include the optimal aging duration, the energy consumption coefficient, the depreciation cost of the aging equipment, the labor cost coefficient, and the aging quality score. The output is the unit aging cost index for determining the best combination of the functional load test method in S07.

[0028] The specific structure of the pre-trained circuit life prediction model is a deep learning model based on the combination of a multi-layer temporal attention mechanism and a recurrent neural network, including six main parts: an input layer, a feature extraction layer, a temporal analysis layer, an attention layer, a fully connected layer, and an output layer. The input layer receives multi-dimensional electrical parameter time series data collected during the aging process. The feature extraction layer extracts electrical parameter fluctuation features through a convolutional neural network. The temporal analysis layer uses a bidirectional long short-term memory network to capture the changing trend of aging parameters over time. The attention layer uses a multi-head self-attention mechanism to assign different weights to different aging stages. The fully connected layer fuses multi-dimensional features to form a unified representation. The output layer predicts the remaining service life of the circuit board and the future change trends of various electrical parameters. The number of heads in the attention mechanism is adaptively adjusted according to the circuit board complexity and the number of parameters to be measured. The hidden layer dimension is proportional to the number of circuit board aging test items. The steps for establishing the training data set of the pre-trained circuit life prediction model specifically include collecting the operation data of the complete life cycle of circuit boards of different models, setting up the whole-process monitoring of each circuit board from the initial state to complete failure, recording the change curves of key parameters such as voltage volatility, current stability, signal integrity, power fluctuation, temperature distribution, and electromagnetic radiation intensity at different aging stages of the circuit board, and at the same time recording the corresponding relationship between the performance of each circuit board in various accelerated aging tests and its actual life. Through data preprocessing, noise and outliers are eliminated, the time series data is standardized, and the sliding window method is used to construct input feature and target label pairs, and finally a heterogeneous circuit board pre-trained data set containing multiple samples is formed. The steps for pre-training the pre-trained circuit life prediction model specifically include first performing large-scale self-supervised pre-training on the pre-trained circuit life prediction model to enable the pre-trained circuit life prediction model to learn the common features and laws in the aging processes of different circuit boards. During the pre-training stage, the masked auto-encoding task is adopted to prompt the pre-trained circuit life prediction model to understand the internal correlations of aging parameters. Subsequently, supervised fine-tuning training is carried out for different types of circuit boards. The domain adaptation layer is introduced during the fine-tuning process to handle the differences in parameter distributions of different circuit boards. The early stopping strategy is adopted during the training process to prevent overfitting. The weight decay regularization method is used to improve the generalization ability of the pre-trained circuit life prediction model. The gradient clipping technique is used to solve the problem of unstable training. At the same time, the multi-task learning mechanism is introduced to predict multiple aging-related indicators simultaneously. After evaluation by the validation set, the optimal model parameters are selected as the final state of the pre-trained circuit life prediction model. Finally, the performance of the pre-trained circuit life prediction model is verified on the real circuit board aging test data set to ensure that the pre-trained circuit life prediction model has excellent performance in predicting the aging processes of different types of circuit boards.

[0029] Among them, the circuit board quality grade standard specifically refers to a grading evaluation system formulated according to the design purpose of the circuit board and the severity of the working environment. Through comprehensive evaluation of aspects such as circuit board materials, manufacturing processes, component selection, and electrical performance requirements, it provides a reference basis for the intensity and item selection of aging tests.

[0030] Among them, the aging test coverage rate specifically refers to an index for evaluating the integrity of aging test items. By calculating the proportion of the actually executed aging test items in the test items corresponding to all potential failure modes of the circuit board, it reflects the comprehensiveness and effectiveness of the aging test plan.

[0031] Among them, the multi-layer temporal attention mechanism specifically refers to a structure used to process the aging temporal data of circuit boards in a pre-trained circuit life prediction model. By using a hierarchical attention mechanism to capture the changing laws of aging indicators at different time scales, it comprehensively analyzes the aging process of circuit boards from short-term fluctuations to long-term trends.

[0032] The specific implementation manners of the above steps are described in detail below. The specific implementation manner of step S01 is to use a temperature cycle test device to implement the thermal stress aging test of the circuit board. First, fix the circuit board on the test rack to ensure that all parts of the circuit board can fully contact the ambient temperature. Then set the temperature cycle parameters, including the minimum temperature of -40°C and the maximum temperature of +85°C, the heating rate of 2°C to 5°C per minute, and the cooling rate of 1°C to 3°C per minute. The holding time at each temperature extreme point is set to 30 minutes to ensure that the internal temperature of the circuit board is fully balanced. The number of temperature cycles is determined according to the design life of the circuit board, usually 100 to 200 times. The temperature cycle adopts a trapezoidal wave mode, that is, a cycle process of slow heating, high-temperature holding, slow cooling, and low-temperature holding. During the whole test process, monitor the surface temperature distribution of the circuit board through thermocouples to ensure temperature uniformity, and control the temperature deviation within ±2°C. This test is based on the principle of the difference in thermal expansion coefficients, simulates the temperature stress faced by the circuit board in actual use, and can effectively detect the reliability of solder joints, the bonding strength of material interfaces, and the thermal stability of components.

[0033] The specific implementation of step S02 is to conduct a damp heat aging test on the circuit board through a high humidity environmental chamber. Place the circuit board in the damp heat test chamber, adjust the relative humidity to 85% ± 3%, set the temperature to 60°C ± 2°C, and the duration is 96 hours. To ensure the test effect, pre-treat the circuit board first, including cleaning and dehumidification, to ensure the consistency of the initial state. During the test, check the surface condensate of the circuit board every 12 hours and wipe it gently if necessary to avoid short circuits caused by water droplet accumulation. Continuously record the temperature and humidity parameters during the test, and control the temperature and humidity fluctuation range within ± 3%. After the test, place the circuit board under standard environmental conditions (25°C, 50% relative humidity) and restore it for 24 hours before conducting a function test. This test is based on the principle of accelerated moisture penetration, using a high temperature and high humidity environment to promote the diffusion and absorption of moisture in the circuit board material, and to test the insulation performance, corrosion resistance and moisture-proof design effectiveness of the circuit board in a humid environment. The threshold is usually that the insulation resistance reduction does not exceed 20% of the initial value.

[0034] The specific implementation of step S03 is to conduct a voltage aging test. First, determine the upper limit value of the circuit board working voltage based on the maximum working voltage specified in the circuit board specification manual. Calculate the high voltage stress test voltage value as 1.2 times the upper limit value of the working voltage. For example, if the upper limit of the working voltage is 12V, the test voltage is 14.4V. Conduct an insulation check on the circuit board before the test to ensure there are no obvious insulation defects. During the test, use an adjustable DC power supply to supply power to the circuit board, and control the voltage stability within ± 0.5% range. Continuously apply high voltage for 48 hours, and record the voltage value and temperature of key points on the circuit board every 4 hours during this period to monitor the temperature rise of the circuit board. The temperature rise should not exceed 15°C under normal working conditions. If abnormal heating or current mutation is found during the test, immediately abort the test and record the fault information. This test is based on the dielectric breakdown theory and the principle of electromigration accelerated aging. By applying a voltage value higher than the normal working voltage, it accelerates the aging process of internal electrical components of the circuit board, and focuses on testing the insulation performance of the circuit board, the voltage withstand capacity of electronic components and the effectiveness of circuit protection design.

[0035] The specific implementation of step S04 is to conduct mechanical vibration aging tests on the circuit board through a vibration table device. First, fix the circuit board on the vibration table in the actual installation manner, using the same fixing points and fixing methods as in the actual application. Set the vibration frequency scanning range from 10 Hz to 2000 Hz, the acceleration to 5G, and the amplitude to be controlled between 0.2 mm and 2 mm. Conduct tests along the three axes of X, Y, and Z respectively, with a test time of 30 minutes for each axis. The test adopts a sine sweep frequency method, and the sweep rate is set to 1 octave per minute, that is, it takes about 7.7 minutes to scan from 10 Hz to 2000 Hz, and reciprocally scan about 4 times within the full frequency band. During the test, install an acceleration sensor to monitor the vibration response of the circuit board, record the resonance frequency points, and appropriately extend the dwell time at the resonance frequency points for at least 30 seconds. After the test, check the solder joints of the components on the circuit board through a microscope, focusing on large components, connectors, and the board edge area, and the solder joint cracking rate should not exceed 0.5%. This test is based on the fatigue fracture mechanism and resonance amplification effect, and by simulating the vibration environment that the circuit board may encounter during transportation and use, it examines the mechanical strength of the circuit board, the welding quality of components, and the effectiveness of the anti-vibration design.

[0036] The specific implementation of step S05 is to conduct power cycle aging tests. First, connect the programmable power controller to the power input terminal of the circuit board to ensure that the supply voltage is stable and consistent with the rated operating voltage of the circuit board. Set the power switch cycle parameters, with each cycle including 1 minute of on-time and 30 seconds of off-time, and the total number of cycles being 1000 times. Record the initial state of the circuit board before the test, including the power-on time, the peak start-up current, and the steady-state current value. During the test, monitor and record the change trend of the start-up current, the power supply voltage stability, and the circuit board temperature change after every 100 cycles. At the same time, set the current threshold monitoring, and issue an alarm when the start-up current exceeds 130% of the initial value or is lower than 70% of the initial value. After the test, conduct a comprehensive functional test to verify the normal operation of each functional module of the circuit board. This test is based on the thermal cycle fatigue and contact oxidation theory of electronic components, and by repeatedly turning the power on and off, it simulates the stress state of the circuit board frequently turning on and off in actual use, focusing on examining the reliability of the power management circuit, the performance attenuation of filter capacitors, and the durability of the start-up circuit, and verifying the reliability of the circuit board under long-term power cycle use conditions.

[0037] The specific implementation of step S06 is to complete the electromagnetic interference aging test. First, according to the electromagnetic characteristics of the actual working environment of the circuit board, determine the types of electromagnetic interference sources, including two categories: conducted interference and radiated interference. Set the parameters of the electromagnetic interference simulator. The frequency range of conducted interference is from 150 kHz to 30 MHz, and the voltage amplitude is from 3 V to 10 V; the frequency range of radiated interference is from 30 MHz to 1 GHz, and the field strength is from 3 V / m to 10 V / m. Place the circuit board in an electromagnetic compatibility test chamber, and install and power it according to the actual usage state. The duration of the applied interference signal is 24 hours. During this period, the circuit board is subjected to a function test every 30 minutes, and the working state and performance parameters of the circuit board under different frequency interferences are recorded. The test focuses on the signal integrity of the circuit board, the data transmission error rate, and the stability of the control system. The deterioration of signal integrity should not exceed 20%, and the increase in the data transmission error rate should not exceed 5 times the initial value. This test is based on electromagnetic compatibility theory and electromagnetic interference coupling mechanism. By simulating various electromagnetic interference environments, it examines the anti-interference ability of the circuit board in a harsh electromagnetic environment, the effectiveness of the shielding design, and the performance of the filtering circuit, ensuring that the circuit board can still work stably and reliably in a complex electromagnetic environment.

[0038] The specific implementation of step S07 is to use the aging parameter optimization equation set to determine the optimal parameter combination of the functional load test method. First, calculate the optimal load intensity percentage through the load intensity equation. The input parameters of this equation include the thermal stress aging data (the influence coefficient of temperature cycle on solder joint reliability, temperature cycle failure rate, etc.) obtained in step S01, the rated power value of the circuit board, the designed life of the circuit board (usually in hours), the heat dissipation coefficient of the circuit board (W / ℃), and the damp heat aging test data (insulation resistance change rate, leakage current increase rate, etc.) obtained in step S02. Through non-linear fitting calculation, the optimized load intensity percentage is obtained, usually between 75% and 90%. Then, use the aging time equation to calculate the optimal aging duration. The input includes the optimized load intensity percentage calculated in the previous step, the mechanical vibration aging test data (resonance frequency point, vibration response acceleration, etc.) obtained in step S04, the designed working temperature of the circuit board, the actual test temperature in step S01, and the electromagnetic interference aging test data (interference sensitive frequency band, maximum tolerable interference level, etc.) obtained in step S06. The optimal aging duration is calculated, usually 96 hours to 168 hours. After determining these two key parameters, make the circuit board operate under the high-voltage stress test voltage value obtained in step S03 according to the functional load test method, that is, let the circuit board execute its designed function while applying the calculated load intensity, and continuously operate for the calculated optimal duration. This method is based on the accelerated aging theory and computer parameter optimization algorithm. By mathematical modeling, it finds the most efficient aging parameter combination to achieve the balance between maximizing the accelerated aging effect of the circuit board and minimizing the test time, while ensuring that the aging process does not introduce abnormal failure modes under non-actual usage conditions.

[0039] The specific implementation of step S08 is to use a pre-trained circuit life prediction model to analyze the first seven steps of aging test data and dynamically adjust the rapid temperature cycle test parameters. First, collect all the data recorded during the first seven steps of the aging test, including the electrical parameter change curve, temperature response characteristics, humidity sensitivity data, voltage stress response, vibration characteristic data, power cycle performance, and functional load test results. Organize these data in a time series and input them into the pre-trained circuit life prediction model. This model is based on deep learning time series analysis technology and combines a multi-layer time series attention mechanism and a recurrent neural network to analyze the aging parameter change trend and identify key aging features. The model outputs include the predicted remaining life of the circuit board, the future change trend of key electrical parameters, and the temperature cycle sensitivity assessment. Based on the model analysis results, dynamically adjust the rapid temperature cycle test parameters, including setting the temperature change range from -55°C to +125°C, the holding time at the temperature extreme value to be 15 minutes, the temperature conversion time to be controlled within 10 seconds, and the total number of cycles to be 200 times. The temperature conversion rate should reach more than 15°C per minute to ensure sufficient thermal shock effect. Check the circuit board status every 50 cycles during the test and record the changes in key electrical parameters. This step is based on the principles of artificial intelligence prediction and thermal stress analysis. Through comprehensive analysis of aging data by a deep learning model, it realizes the accurate identification of the weakest link of the circuit board and designs the final temperature cycle test parameters specifically to ensure the effectiveness and comprehensiveness of the aging test.

[0040] The specific implementation of step S09 is to detect the change rate of key electrical parameters before and after the aging of the circuit board and conduct a final evaluation. First, determine the key electrical parameters to be detected, including power supply part parameters (input impedance, output voltage stability, ripple coefficient, power efficiency), signal part parameters (signal rise time, fall time, signal integrity, delay time), function part parameters (data processing ability, control response time, function integrity), etc. Use high-precision measurement equipment to accurately measure the parameters before and after aging, and the measurement accuracy should reach ±0.1% of the parameter nominal value. Calculate the change rate of each parameter, and the change rate calculation formula is: change rate = |value after aging - value before aging| / value before aging × 100%. Compare the calculated change rate with the set threshold of 5%. If the change rate of any key parameter exceeds 5%, it is determined that the circuit board is unqualified. Different weights can be set for different parameters. The threshold for important parameters can be set to 3%, and the threshold for secondary parameters can be relaxed to 8%. For unqualified circuit boards, further analyze the failure reasons, including component aging, solder joint failure, substrate material deterioration, etc. Establish a complete database of performance indicators after aging for all tested circuit boards, recording the initial values, values after aging, change rates, and qualified judgment results of each parameter. This step is based on the theory of electronic component failure analysis and the principle of quality control. By comparing and analyzing the changes in electrical parameters before and after aging, it quantitatively evaluates the aging test effect, providing data basis and technical support for circuit board quality control and reliability improvement.

[0041] Furthermore, the specific structure of the pre-trained circuit life prediction model adopts a deep learning architecture that combines a multi-layer temporal attention mechanism with a recurrent neural network. The model consists of six main parts: The input layer is responsible for receiving multi-dimensional electrical parameter time series data, supporting the synchronous input of various aging parameters such as voltage volatility, current stability, signal integrity, power fluctuation, temperature distribution, and electromagnetic radiation intensity. The feature extraction layer adopts a one-dimensional convolutional neural network structure with convolutional kernel sizes of 3, 5, and 7 respectively, and each size contains 64 convolutional kernels. Local fluctuation features of electrical parameters are extracted through multi-scale convolution to effectively capture mutation points and gradual change trends. The temporal analysis layer is composed of 3 layers of bidirectional long short-term memory networks with a hidden layer dimension set to 256. By analyzing the aging parameter time series simultaneously in the forward and backward directions, long-term dependence relationships are effectively captured. The attention layer adopts an 8-head self-attention mechanism with each attention head dimension of 32, assigning dynamic weights to different stages and different parameters during the circuit board aging process to enhance the model's ability to identify key aging features. The fully connected layer consists of 3 layers of neural networks with the number of neurons in each layer being 512, 256, and 128 respectively. Multidimensional features are fused into a unified representation through the non-linear activation function ReLU. The output layer uses a multi-task learning framework to simultaneously predict the remaining service life of the circuit board and the future change trends of various electrical parameters. The activation functions of the output layer adopt a linear function and a Sigmoid function for different tasks respectively. The number of attention mechanism heads in this structure is adaptively adjusted according to the circuit board complexity, generally between 4 and 16, and the hidden layer dimension is proportional to the number of circuit board aging test items, usually 4 to 8 times the number of test items.

[0042] Furthermore, for the establishment steps of the pre-trained circuit life prediction model training dataset, comprehensive data collection is first carried out. The operation data of the complete life cycle of circuit boards of different models are collected to ensure that the dataset contains at least 500 different types of circuit boards, with 10 to 30 samples for each type. For each circuit board, the whole process monitoring from the initial state to complete failure is set up, and the monitoring period covers 1.5 times the designed life of the circuit board, with a monitoring frequency of once per hour. Record the change curves of key parameters such as voltage volatility (allowable range ±3%), current stability (fluctuation threshold ±5%), signal integrity (deterioration rate 0 to 30%), power fluctuation (change range ±10%), temperature distribution (the difference between the highest point and the average temperature ≤15°C), and electromagnetic radiation intensity (change range 0 to 20 dB) of the circuit board at different aging stages. At the same time, record the corresponding relationship between the performance of each circuit board in accelerated aging tests such as temperature cycling, damp heat, high voltage stress, mechanical vibration, power supply cycling, electromagnetic interference, and temperature shock and its actual life. Eliminate noise and outliers through data preprocessing, use moving average filtering and median filtering to remove high-frequency noise, and use the 3σ rule to identify and process outliers. Perform Z-score standardization on time series data to make the data distribution have a mean of 0 and a standard deviation of 1. Adopt the sliding window method to construct input feature and target label pairs, with the window size set to 48 hours of data points and the step size to 12 hours. The prediction target is the parameter change and remaining life estimation within the next 168 hours. Finally, form a pre-trained dataset of heterogeneous circuit boards containing more than 50,000 samples, and divide the dataset into a training set, a validation set, and a test set according to the ratio of 8∶1∶1.

[0043] Furthermore, for the pre-training steps of the pre-trained circuit life prediction model, large-scale self-supervised pre-training is first carried out to enable the model to learn the common features and laws in the aging processes of different circuit boards. In the pre-training stage, a masked auto-encoding task is adopted, randomly masking 15% to 30% of the data points in the input sequence, and training the model to recover these masked values, prompting the model to understand the internal correlations of aging parameters. Adam optimizer is used for pre-training, the learning rate is set to 0.001, a cosine annealing scheduling strategy is adopted, the batch size is 64, and the number of pre-training epochs is 100. Subsequently, supervised fine-tuning training is carried out for different types of circuit boards. In the fine-tuning process, a domain adaptation layer is introduced, and batch normalization technology is used to handle the differences in parameter distributions of different circuit boards. An early stopping strategy is adopted during the training process, and the training is stopped when the validation set loss has not improved for 10 consecutive epochs to avoid overfitting. The L2 regularization method with a weight decay coefficient of 0.0001 is used to improve the generalization ability of the model. The problem of training instability is solved by using the gradient clipping technique that limits the gradient value within the range of [-1, 1]. At the same time, a multi-task learning mechanism is introduced to predict multiple aging-related indicators simultaneously, and the task weights are dynamically adjusted according to the importance of the indicators. After evaluation on the validation set, the model parameters with the minimum mean absolute error on the validation set are selected as the final state. Finally, the performance of the model is verified on an independent real circuit board aging test data set to ensure excellent performance in predicting the aging processes of different types of circuit boards, and the life prediction accuracy should reach more than 90%, and the R² coefficient of the predicted change trend of key parameters should not be less than 0.85.

[0044] The following details the mathematical models or calculation processes involved in the present invention.

[0045] The aging parameter optimization equation set includes five main equations, namely the load intensity equation, the aging time equation, the aging efficiency equation, the aging quality equation, and the aging cost equation. These equations combine to form a complete optimization system for determining the optimal parameters for the circuit board functional load test.

[0046] The load intensity equation is used to determine the optimal load intensity percentage in the circuit board functional load test method, and is specifically expressed as follows: ; In the formula, is the optimized load intensity percentage; is the solder joint reliability coefficient after the circuit board thermal stress test in step S01; is the designed life time (hours) of the circuit board; is the rated power value (watts) of the circuit board; is the heat dissipation coefficient (watts / degree Celsius) of the circuit board; is the material thermal stress sensitivity parameter; is the thermal cycle failure rate coefficient; is the damp heat aging parameter obtained in step S02; is the weight coefficient; is the error term, with a range of 0.02 - 0.05.

[0047] The parameter acquisition method is as follows: Obtained by measuring the ratio of the solder joint strength to the initial strength after thermal stress testing, usually in the range of 0.7 - 0.95; Obtained from the circuit board design specifications, usually 10000 - 50000 hours; Obtained from the circuit board specification sheet; Measure the temperature rise of the circuit board at different powers through an infrared thermal imager and calculate it , where is the power, is the surface temperature of the circuit board, is the ambient temperature; Obtained through the coefficient of thermal expansion test of the material, and the calculation formula is , where is the material weight, is the material coefficient of thermal expansion; Calculated by the ratio of the number of failed samples to the total number of samples in the thermal cycle test; Obtained by calculating the change rate of insulation resistance after damp heat testing, and the calculation formula is , where is the insulation resistance before testing, is the insulation resistance after testing; weight coefficient to Determined by regression analysis of historical data, satisfying .

[0048] The aging time equation is used to calculate the shortest test time required to achieve the expected aging effect, and is specifically expressed as follows: ; In the formula, is the optimal aging duration (hours); is the percentage of the optimized load strength; is the circuit board design operating temperature (degrees Celsius); is the actual test temperature (degrees Celsius) in step S01; is the vibration response value obtained in step S04; is the electromagnetic interference tolerance strength obtained in step S06; is the main resonance frequency of the circuit board (Hertz); is the weight coefficient; is the error term, with a range of 3 - 8 hours.

[0049] The parameter acquisition method is as follows: Calculated from the load strength equation; Obtained from the circuit board design specifications; Recorded in the test of step S01; Obtained by measuring with an acceleration sensor in the vibration test, and the calculation formula is , where is the vibration response acceleration at the frequency point , is the applied vibration acceleration, is the number of measured frequency points; Obtained through the electromagnetic interference test, and the calculation formula is , where is the interference tolerance strength at the frequency point , is the standard interference strength, is the number of measured frequency points; Identify the main resonance frequency points of the circuit board through the vibration sweep test; The weight coefficients to are determined through historical data regression analysis and satisfy .

[0050] The aging efficiency equation is used to evaluate the overall efficiency of the aging test plan, and is specifically expressed as follows: ; In the formula, is the aging efficiency score; is the percentage of the optimized load strength; is the optimal aging duration; is the thermal expansion coefficient of the circuit board material; is the expected failure rate of the circuit board aging; is the power cycle aging parameter obtained in step S05; is the weight coefficient; is the error term, and the range is 0.03 to 0.07.

[0051] The parameter acquisition method is as follows: Calculated from the load strength equation; Calculated from the aging time equation; Obtained through the thermal expansion coefficient test. For a multi-layer circuit board, the calculation formula is , where is the thickness of layer , is the thermal expansion coefficient of layer , is the number of layers of the circuit board; Determined according to historical data and design requirements, usually 0.001 - 0.01; Obtained through power cycle testing, and the calculation formula is , where is the initial start-up current, is the start-up current after cycle testing; The weight coefficient to is determined through regression analysis of historical data and satisfies .

[0052] The aging quality equation is used to evaluate the quality level of the aging test plan, and is specifically expressed as follows: ; In the formula, is the aging quality score; is the aging efficiency score; is the circuit board operating frequency parameter; is the maximum operating frequency of the circuit board; is the circuit board quality grade standard coefficient; is the aging test coverage rate; is the voltage aging test voltage value obtained in step S03; is the rated operating voltage of the circuit board; is the weight coefficient; is the error term, with a range of 0.02 - 0.06.

[0053] The parameter acquisition method is: Calculated from the aging efficiency equation; Obtained through circuit board frequency testing. For a circuit board with multi-frequency operation, the calculation formula is , where is the weight of the frequency , is the number of frequency points; Obtained from the circuit board design specifications; Determined according to the circuit board quality grade, usually divided into 5 grades, with corresponding values of 1.0, 0.9, 0.8, 0.7, 0.6; Obtained by calculating the proportion of the actually executed aging test items in all potential failure mode corresponding test items of the circuit board. The calculation formula is , where is the number of actually executed test items, is the total number of theoretically required test items; Recorded in step S03; Obtained from the circuit board specification book; The weight coefficient to is determined through regression analysis of historical data and satisfies 。

[0054] The aging cost equation is used to calculate the economic indicators of the aging test plan, and is specifically expressed as follows: ; In the formula, is the unit aging cost index; is the optimal aging duration; is the energy consumption coefficient; is the depreciation cost of the aging equipment; is the labor cost coefficient; is the aging quality score; is the weight coefficient; is the error term, with a range of 0.05 to 0.1.

[0055] The parameter acquisition methods are as follows: Calculated from the aging time equation; Obtained by measuring the equipment energy consumption during the aging test, and the calculation formula is , where is the power at time , is the total test time; Calculated according to the equipment value and service life, and the calculation formula is , where is the equipment value, is the service life of the equipment; Calculated according to the labor cost and time, and the calculation formula is , where is the labor cost per unit time, is the labor participation time; Calculated from the aging quality equation; The weight coefficient to is determined through historical data regression analysis and satisfies .

[0056] These equations are constructed by considering the influences of various physical and economic factors. The load intensity equation adopts a weighted linear combination method, comprehensively considering factors such as temperature, power, heat dissipation, and material properties. Power relationships and reciprocal relationships are used to represent non-linear influences. For example, the material thermal stress sensitivity parameter is represented in a reciprocal form, indicating that the higher the sensitivity (the smaller the value), the corresponding reduction in load intensity. In the aging time equation, the square term represents the non-linear influence of load intensity on aging time, and the logarithmic function is used to represent the gradual effect of resonance frequency influence. In the aging efficiency equation, the exponential term is used to represent the saturation effect of the material thermal expansion coefficient on aging efficiency, that is, after exceeding a certain value, further increase has limited effect on efficiency improvement. The aging quality equation adopts a linear combination method, integrating various quality-related factors. The aging cost equation adopts a fractional form, reflecting the trade-off between cost and quality. The numerator represents the cost factor, and the denominator represents the quality factor, which conforms to the principle of cost-benefit analysis.

[0057] The advantage of these equation systems is that they integrate the physical phenomena, material properties, electrical properties, mechanical properties, and economic factors in the circuit board aging process into a mathematical model, which can adaptively adjust the test parameters according to the specific circuit board characteristics, improve the efficiency and accuracy of aging tests, and at the same time balance the test cost and quality.

[0058] Specifically, the principle of the present invention is: The core principle of the present invention to solve the problem of optimizing circuit board aging test parameters lies in establishing a parameter optimization equation system based on multi-dimensional data analysis. This system transforms the physical and chemical change laws in the circuit board aging process into a mathematical model, realizing the precise calculation and dynamic adjustment of test parameters.

[0059] From the theoretical basis, the present invention comprehensively applies materials science, reliability engineering, and machine learning theories to construct a complete parameter optimization framework. The load intensity equation correlates the temperature aging and damp heat aging test data with the circuit board physical characteristic parameters to calculate the optimal load percentage; the aging time equation is based on the Arrhenius acceleration model and cumulative damage theory, comprehensively considering multi-dimensional stress factors such as vibration, temperature, and electromagnetic interference, and scientifically determines the shortest effective test time; the aging efficiency, quality, and cost equations quantitatively evaluate the performance of the test scheme from different dimensions, realizing multi-objective parameter optimization.

[0060] The pre-trained circuit life prediction model introduced in the present invention is the key innovation of parameter optimization. This model adopts a multi-layer temporal attention mechanism and a recurrent neural network structure, which can identify the potential laws and abnormal patterns in the circuit board aging process. The model is pre-trained with a large amount of historical data to establish the mapping relationship between aging parameters and actual life, and can dynamically predict the performance degradation trend of the circuit board according to the previous test data, and then adaptively adjust the subsequent test parameters.

[0061] From a methodological perspective, the present invention realizes a closed-loop parameter optimization of "measurement - analysis - optimization - verification". A data-driven correlation mechanism is formed among various test links, avoiding the independence and randomness of parameter settings in each test link of traditional methods. In addition, the present invention simultaneously considers test effectiveness and resource costs during the parameter optimization process, achieving comprehensive optimization of aging test parameters and fundamentally solving the problem that the parameter settings of traditional aging tests lack a scientific basis.

[0062] A specific Embodiment 1 of the present invention is provided below. The specific implementation of each step in this Embodiment 1 is described in detail as follows.

[0063] The specific implementation of step S01 is to use a temperature cycle test device to conduct thermal stress aging tests on the circuit board. First, fix the circuit board on the test rack to ensure that all parts of the circuit board can fully contact the ambient temperature. Then set the temperature cycle parameters, including a minimum temperature of -40°C and a maximum temperature of +85°C, a heating rate of 2°C to 5°C per minute, and a cooling rate of 1°C to 3°C per minute. The holding time at each temperature extreme point is set to 30 minutes to allow the internal temperature of the circuit board to fully equalize. The number of temperature cycles is determined according to the design life of the circuit board, usually 100 to 200 times. The temperature cycle adopts a trapezoidal wave mode, that is, a cycle process of slow heating, high-temperature holding, slow cooling, and low-temperature holding. During the entire test process, monitor the surface temperature distribution of the circuit board through thermocouples to ensure temperature uniformity, and control the temperature deviation within ±2°C. This test is based on the principle of thermal expansion coefficient difference, simulating the temperature stress faced by the circuit board in actual use, and can effectively detect the solder joint reliability, material interface bonding strength, and component thermal stability. The temperature change curve during the test can be expressed as: ; where is the temperature value at time ; is the average temperature value, that is, °C; is the temperature amplitude, that is, °C; is a periodic function describing the variation law of temperature with time. Through this test, thermal stress aging test data of the circuit board can be obtained for the calculation of the load strength equation in the subsequent steps.

[0064] The specific implementation of step S02 is to conduct a damp heat aging test on the circuit board through a high humidity environmental chamber. Place the circuit board in the damp heat test chamber, adjust the relative humidity to 85% ± 3%, set the temperature to 60°C ± 2°C, and the duration to 96 hours. To ensure the test effect, pre-treat the circuit board first, including cleaning and dehumidification, to ensure the consistency of the initial state. During the test, check the surface condensate of the circuit board every 12 hours and wipe it gently if necessary to avoid short circuits caused by water droplet accumulation. Continuously record the temperature and humidity parameters during the test, and control the temperature and humidity fluctuation range within ± 3%. After the test, place the circuit board under standard environmental conditions (25°C, 50% relative humidity) and restore it for 24 hours before conducting a function test. This test is based on the principle of accelerating water penetration, using a high temperature and high humidity environment to promote the diffusion and absorption of water in the circuit board materials, and to test the insulation performance, corrosion resistance, and moisture-proof design effectiveness of the circuit board in a humid environment. The threshold is usually that the insulation resistance reduction does not exceed 20% of the initial value. During the test, obtain the damp heat aging parameters , and the calculation formula is ; in the formula, is the insulation resistance before the test, is the insulation resistance after the test. This parameter will be used as the input of the load strength equation to calculate the optimal load strength percentage.

[0065] The specific implementation of step S03 is the same as the foregoing, and only supplement here: the voltage aging test data obtained during the test will be used for the calculation of the aging quality equation, and the ratio with the rated working voltage reflects the voltage aging degree of the circuit board.

[0066] The specific implementation of step S04 is the same as the foregoing, and only supplement here: the vibration response value obtained during the test , and the calculation formula is ; in the formula, is the vibration response acceleration at the frequency point , is the applied vibration acceleration, is the number of measurement frequency points. This parameter will be used as the input of the aging time equation to calculate the optimal aging duration.

[0067] The specific implementation of step S05 is the same as the foregoing, and only supplement here: the power cycle aging parameter obtained during the test , and the calculation formula is ; in the formula, is the initial starting current, ​is the starting current after the cyclic test. This parameter will be used as the input to the aging efficiency equation to evaluate the overall efficiency of the aging test plan.

[0068] The specific implementation of step S06 is the same as described above. Only to add: obtain the electromagnetic interference tolerance intensity during the test , and the calculation formula is ; in the formula, is the interference tolerance intensity at the frequency point , is the standard interference intensity, is the number of measurement frequency points. This parameter will be used as the input to the aging time equation to calculate the optimal aging duration.

[0069] The specific implementation of step S07 is to use the aging parameter optimization equations to determine the best parameter combination of the functional load test method. First, calculate the optimal load intensity percentage through the load intensity equation, and its formula is: ; in the formula, is the optimized load intensity percentage; is the solder joint reliability coefficient after the circuit board thermal stress test in step S01; is the designed life time (hours) of the circuit board; is the rated power value (watts) of the circuit board; is the heat dissipation coefficient (watts / °C) of the circuit board; is the material thermal stress sensitivity parameter; is the thermal cycle failure rate coefficient; is the damp heat aging parameter obtained in step S02; is the weight coefficient; is the error term, and the range is 0.02 - 0.05. Then calculate the optimal aging duration using the aging time equation, and its formula is: ; in the formula, is the optimal aging duration (hours); is the optimized load intensity percentage; is the designed operating temperature (°C) of the circuit board; is the actual test temperature (°C) in step S01; is the vibration response value obtained in step S04; is the electromagnetic interference tolerance intensity obtained in step S06; is the main resonance frequency (Hz) of the circuit board; is the weight coefficient; is the error term, and the range is 3 - 8 hours. Then calculate the aging efficiency score, and its formula is: ; in the formula, is the aging efficiency score; is the optimized load strength percentage; is the optimal aging duration; is the coefficient of thermal expansion of the circuit board material; is the expected failure rate of circuit board aging; is the power cycle aging parameter obtained in step S05; is the weight coefficient; is the error term, with a range of 0.03 - 0.07. Then calculate the aging quality score, and its formula is: ; where is the aging quality score; is the aging efficiency score; is the circuit board operating frequency parameter; is the maximum operating frequency of the circuit board; is the circuit board quality grade standard coefficient; is the aging test coverage rate; is the voltage aging test voltage value obtained in step S03; is the rated operating voltage of the circuit board; is the weight coefficient; is the error term, with a range of 0.02 - 0.06. Finally, calculate the unit aging cost index, and its formula is: ; where is the unit aging cost index; is the optimal aging duration; is the energy consumption coefficient; is the depreciation cost of the aging equipment; is the labor cost coefficient; is the aging quality score; is the weight coefficient; is the error term, with a range of 0.05 - 0.1. Through this series of calculations, obtain the optimal load strength percentage and the optimal aging duration , which are used to determine the best parameter combination of the functional load test method. Then, under the condition of the high - voltage stress test voltage value obtained in step S03, make the circuit board run the functional load test according to this best parameter combination, that is, apply the calculated load strength while the circuit board executes its designed function, and continuously run for the calculated optimal duration . This method is based on the accelerated aging theory and computer parameter optimization algorithm, and finds the most efficient aging parameter combination through mathematical modeling to achieve the balance between maximizing the accelerated aging effect of the circuit board and minimizing the test time.

[0070] The specific implementation of step S08 is the same as the foregoing, and will not be elaborated here.

[0071] The specific implementation of step S09 is to detect the change rate of key electrical parameters before and after the aging of the circuit board and make a final judgment. First, determine the key electrical parameters to be detected, including power supply part parameters (input impedance, output voltage stability, ripple coefficient, power efficiency), signal part parameters (signal rise time, fall time, signal integrity, delay time), function part parameters (data processing ability, control response time, function integrity), etc. Use high-precision measurement equipment to accurately measure the parameters before and after aging, and the measurement accuracy should reach ±0.1% of the parameter nominal value. Calculate the change rate of each parameter, and the change rate calculation formula is: ; In the formula, is the parameter change rate; is the parameter value before aging; is the parameter value after aging. Compare the calculated change rate with the set threshold of 5%. If the change rate of any key parameter exceeds 5%, the circuit board is judged to be unqualified. Different weights can be set for different parameters. The threshold for important parameters can be set to 3%, and the threshold for secondary parameters can be relaxed to 8%. For unqualified circuit boards, further analyze the failure causes, including component aging, solder joint failure, substrate material deterioration, etc. Establish a complete performance index database after aging for all tested circuit boards, recording the initial values, post-aging values, change rates, and qualified judgment results of each parameter. This step is based on the theory of electronic component failure analysis and the principle of quality control. By comparing and analyzing the changes in electrical parameters before and after aging, it quantitatively evaluates the aging test effect and provides data basis and technical support for circuit board quality control and reliability improvement.

[0072] The training data set establishment step of the pre-trained circuit life prediction model first conducts comprehensive data collection. Collect the operation data of the complete life cycle of different types of circuit boards to ensure that the data set contains at least 500 different types of circuit boards, with each type containing 10 to 30 samples. Set up full-process monitoring for each circuit board from the initial state to complete failure, with the monitoring period covering 1.5 times the design life of the circuit board and the monitoring frequency being once per hour. Record the change curves of key parameters such as voltage volatility (allowable range ±3%), current stability (fluctuation threshold ±5%), signal integrity (deterioration rate 0 to 30%), power fluctuation (change range ±10%), temperature distribution (the difference between the highest point and the average temperature ≤15°C), and electromagnetic radiation intensity (change range 0 to 20 dB) of the circuit board at different aging stages. At the same time, record the corresponding relationship between the performance of each circuit board in accelerated aging tests such as temperature cycling, damp heat, high voltage stress, mechanical vibration, power cycling, electromagnetic interference, and temperature shock and its actual life. Eliminate noise and outliers through data preprocessing. Use moving average filtering and median filtering to remove high-frequency noise, and use the 3σ rule to identify and process outliers. Perform Z-score standardization processing on time series data, and the calculation formula is: ; In the formula, is the standardized value; is the original value; is the mean value; is the standard deviation. The sliding window method is adopted to construct the input feature and target label pairs. The window size is set to 48-hour data points, the step size is 12 hours, and the prediction targets are the parameter changes and remaining life estimation within the next 168 hours. Finally, a pre-training dataset for heterogeneous circuit boards containing more than 50,000 samples is formed, and the dataset is divided into a training set, a validation set, and a test set according to the ratio of 8:1:1.

[0073] To better understand and implement the present invention, Example 2 of a specific application scenario of the present invention is provided below: This example conducts an aging test on a waterproof circuit board for ocean data collection. The circuit board is designed for an ocean buoy system and needs to work stably for a long time in an environment with high salt fog, high humidity, wide temperature range, and strong vibration. The main functions of the circuit board include data collection, signal processing, data storage, and wireless transmission, and the designed life is 5 years (43,800 hours). Considering the particularity of the ocean environment, the researchers adjusted the standard aging method adaptively, improving the test intensity and evaluation criteria.

[0074] First, the researchers conducted a temperature cycle test. The ocean data collection circuit board was fixed on a customized test rack, the temperature cycle range was set from -40°C to +85°C, the heating rate was 3°C per minute, and the cooling rate was 2°C per minute. The holding time at each temperature extreme point was 30 minutes to ensure sufficient internal temperature equilibrium of the circuit board. Considering the temperature change characteristics of the ocean environment, the temperature cycle adopted a modified trapezoidal wave mode, and the holding time in the low-temperature section was extended to 45 minutes. The total number of cycles was set to 150 times, which is equivalent to simulating the seasonal temperature changes in the ocean environment within 5 years. During the test, the temperature distribution in different areas of the circuit board was monitored through 6 thermocouples, and the temperature deviation was controlled within ±1.8°C. After the test, the thermal stress aging test data of the circuit board was obtained, and the solder joint reliability coefficient was 0.92.

[0075] Secondly, a damp heat aging test was conducted. The circuit board was placed in a high-humidity environmental chamber simulating the ocean environment, and the relative humidity was adjusted to 90% (higher than 85% of the standard test) to better simulate the characteristics of the ocean environment. The temperature was set to 60°C, and the duration was extended to 120 hours (higher than 96 hours of the standard). The integrity of the waterproof coating on the circuit board was checked before the test to ensure the same initial state. The surface condensation water condition of the circuit board was checked every 8 hours during the test, and at the same time, 3% concentration of salt mist was sprayed into the test chamber to simulate the ocean salt environment. The temperature and humidity parameters were continuously recorded during the test, and the fluctuation range was controlled within ±2%. After the test, the damp heat aging parameter was calculated to be 0.18, indicating that the circuit board has a certain attenuation of insulation performance in a high-humidity salt fog environment.

[0076] Then, a voltage aging test was carried out. The upper limit of the operating voltage of the circuit board was determined to be 24V, and the voltage value for the high-voltage stress test was calculated to be 28.8V (1.2 times of 24V). Considering the possible power fluctuations in the marine environment, the researchers additionally added a voltage fluctuation test, superimposing a random fluctuation of ±10% on the base voltage, with a frequency ranging from 10Hz to 100Hz. The high voltage was continuously applied for 72 hours (longer than the standard 48 hours), and the voltage values, current values, and temperature at key points on the circuit board were recorded every 4 hours during this period. The change in the insulation performance at the waterproof interface of the circuit board was monitored emphatically during the test. After the test, the voltage aging test data showed that the insulation resistance of the main power line of the circuit board decreased by 8%, which was still within the acceptable range.

[0077] Then, a mechanical vibration aging test was carried out. The circuit board was fixed on the vibration table in the way it was actually installed in the buoy system. The vibration frequency scanning range was set from 5Hz to 2000Hz (the low-frequency band was extended to 5Hz to simulate the sea wave frequency), and the acceleration was 6G (higher than the standard 5G). The test was carried out along the three axes of X, Y, and Z respectively, and the test time for each axis was extended to 45 minutes. The test adopted a combination of random vibration and sine sweep frequency to better simulate the complex vibration conditions in the marine environment. During the test, obvious resonance points were found at 72Hz and 436Hz on the circuit board, and a 60-second fixed-frequency vibration test was additionally carried out at these two frequency points. After the test, the solder joints of the components on the circuit board were inspected by a digital microscope, and the solder joint cracking rate was 0.3%, which was within the acceptable range. The vibration response value was calculated to be 1.35.

[0078] Subsequently, a power cycle aging test was carried out. The power switch cycle was set to be turned on for 30 seconds and turned off for 1 minute, and the total number of cycles was increased to 1500 times (higher than the standard 1000 times). The initial start-up current of the circuit board was recorded as 0.86A and the steady-state current was 0.32A before the test. During the test, the change trend of the start-up current was monitored every 100 cycles, and the temperature rise at the key areas of the circuit board was recorded. At the same time, the power voltage fluctuation was simulated, and a random fluctuation of ±5% was introduced during the turn-on stage. After the test, the start-up current of the circuit board increased to 0.93A, and the power cycle aging parameter was calculated to be -0.081 (the negative value indicates an increase in current). The function test showed that the data acquisition and transmission functions of the circuit board were normal, but the storage write speed decreased by 4.2%.

[0079] Next, perform the electromagnetic interference aging test. According to the electromagnetic interference characteristics that may be generated by the marine environment and nearby ship radars, set the parameters of the electromagnetic interference simulator. The conduction interference frequency range is from 150 kHz to 30 MHz, and the voltage amplitude is 8 V; the radiation interference frequency range is from 30 MHz to 2 GHz (higher than the standard 1 GHz), and the field strength is 8 V / m. The duration of the applied interference signal is 36 hours (higher than the standard 24 hours). During this period, conduct a complete function test on the circuit board every 2 hours, and record key parameters such as data acquisition accuracy, transmission error rate, and system response time. Pay special attention to the anti-interference ability and data integrity of the communication module during the test. The results show that in a strong electromagnetic interference environment, the transmission error rate of data increases to a maximum of 3.8 times the normal value, still within the design allowable range. The calculated electromagnetic interference tolerance strength is 1.42.

[0080] The test results are shown in Table 1: Table 1 Basic Aging Test Results of Marine Data Acquisition Circuit Board

[0081] Based on the above test data, the researchers used the aging parameter optimization equation set to calculate the optimal parameter combination for the functional load test. First, calculate the optimal load intensity percentage through the load intensity equation: The input parameters include: solder joint reliability coefficient 0.92, circuit board design life 43800 hours, rated power value 10.5 watts, heat dissipation coefficient 0.42 watts / °C, and damp heat aging parameter 0.18. According to the equation calculation, the optimized load intensity percentage is 78.3%.

[0082] Then use the aging time equation to calculate the optimal aging duration: The input parameters include: optimized load intensity percentage 78.3%, vibration response value 1.35, circuit board design working temperature 40°C, maximum actual test temperature 85°C, and electromagnetic interference tolerance strength 1.42. The calculated optimal aging duration is 165.4 hours.

[0083] Next, calculate the aging efficiency score: The input parameters include: load intensity percentage 78.3%, optimal aging duration 165.4 hours, thermal expansion coefficient of the circuit board material 18 ppm / °C, expected failure rate 0.05%, and power cycle aging parameter -0.081. The calculated aging efficiency score is 0.82.

[0084] Then calculate the aging quality score: The input parameters include: aging efficiency score of 0.82, circuit board operating frequency of 80 MHz, maximum circuit board operating frequency of 120 MHz, circuit board quality grade standard coefficient of 0.9 (marine application level), aging test coverage rate of 0.85, voltage value of 28.8 V for voltage aging test, and rated operating voltage of 24 V. The calculated aging quality score is 0.87.

[0085] Finally, calculate the unit aging cost index: The input parameters include: optimal aging duration of 165.4 hours, energy consumption coefficient of 0.18, depreciation cost of aging equipment of 45 yuan per hour, labor cost coefficient of 0.25, and aging quality score of 0.87. The calculated unit aging cost index is 86.3.

[0086] The optimization results of aging parameters are shown in Table 2: Table 2 Optimization Results of Aging Parameters for Marine Data Acquisition Circuit Boards

[0087] According to the optimization results, the researchers set the functional load test parameters as load intensity of 78.3% and duration of 166 hours (rounded). Under the condition of 28.8 V voltage, let the circuit board execute data acquisition, processing, and transmission functions, and at the same time apply 78.3% of the designed maximum load. Specifically, it includes: collecting sensor data at 2 - second intervals (1 - second interval at the designed maximum frequency), while processing 78.3% of the maximum processing capacity of the data volume, and the data transmission rate is 78.3% of the maximum transmission rate. During the test process, continuously monitor key parameters such as the circuit board temperature, current stability, and functional response time.

[0088] After the functional load test is completed, the researchers input all the test data into a pre - trained circuit life prediction model. This model is based on a multi - layer temporal attention mechanism and a recurrent neural network structure, using an 8 - head attention mechanism and a 256 - dimensional hidden layer. Model analysis shows that the predicted remaining life of the circuit board after the functional load test is 92.4% of the designed life, and the decay trend of key electrical parameters within the future usage cycle is within an acceptable range.

[0089] The model analysis results are shown in Table 3: Table 3 Analysis Results of the Pre - trained Circuit Life Prediction Model

[0090] Based on the above analysis results, the researchers dynamically adjusted the parameters of the rapid temperature shock test: the temperature change range was set from -55°C to +125°C, the holding time at the extreme temperature was 15 minutes, the temperature conversion time was 8 seconds (better than the standard requirement of 10 seconds), and the total number of cycles was reduced to 180 times (lower than the standard of 200 times). This adjustment was based on the analysis of the pre-trained model. This circuit board was more sensitive to the temperature conversion rate and relatively insensitive to the number of cycles. During the test, the circuit board status was checked every 30 cycles, with a focus on monitoring the waterproof interface and the solder joints around large components.

[0091] After the rapid temperature shock test was completed, the researchers detected the change rates of the key electrical parameters of the circuit board before and after aging. The measurement results are shown in Table 4: Table 4 Change Rates of Key Electrical Parameters of the Marine Data Acquisition Circuit Board

[0092] The change rates of all key electrical parameters did not exceed the set threshold of 5%, so it was determined that the circuit board aging test was qualified. In particular, the change rates of the key indicators of the circuit board such as waterproof performance and isolation voltage in the marine environment were within the acceptable range, indicating that this circuit board could work stably in the marine environment for a long time.

[0093] Traditional aging test methods for marine electronic devices mainly rely on the combination of single test items, and the test parameters completely depend on the experience of engineers to set. The common practice is to directly follow the test standards for general electronic devices, only slightly increasing the humidity requirement in the damp heat test, and unable to truly simulate the particularity of the marine environment. The test parameters are not optimized according to the specific characteristics of the circuit board, and the test intensity is often too high or too low, resulting in low test efficiency or inaccurate reliability assessment. Each test item is independent of each other, lacking data correlation analysis, and unable to comprehensively evaluate the performance of the circuit board in the actual marine environment.

[0094] Compared with the traditional method, the present invention provides a systematic and intelligent circuit board aging method. Through the aging parameter optimization equation set, parameter optimization based on the previous test data is realized, making the functional load test parameters more accurate. By introducing a pre-trained circuit life prediction model, it can comprehensively analyze multi-dimensional aging data, realize scientific prediction of future performance changes, and guide the dynamic adjustment of the rapid temperature shock test parameters. The entire test process forms a closed-loop optimization system, significantly improving the test efficiency and accuracy. For marine environment applications, this method can more accurately simulate the actual use environment, improve the test pertinence, shorten the test cycle by about 25%, and at the same time improve the reliability prediction accuracy by about 30%. This method provides a scientific basis for the reliability assessment of the circuit board of marine data acquisition equipment and is of great significance for improving the long-term working reliability of marine electronic devices.

[0095] It should be noted that the detailed explanations of the variables involved in the present invention are shown in Tables 5 and 6 below.

[0096] Table 5 Variable Explanation Table (First Part)

[0097] Table 6 Variable Explanation Table (Second Part)

[0098] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention.

Claims

1. A circuit board product detection method, characterized in that: include: Obtain basic aging data; An aging parameter optimization equation group is used to determine the best combination of load intensity percentage and optimal aging duration in a functional load test method. The aging parameter optimization equation group includes a load intensity equation, an aging time equation, an aging efficiency equation, an aging quality equation, and an aging cost equation. The input of the load intensity equation includes circuit board thermal stress aging test data, circuit board rated power value, circuit board design life, circuit board heat dissipation coefficient, and circuit board wet heat aging test data, and the output is the optimized load intensity percentage; a pre-trained circuit life prediction model is used to analyze a variety of aging test data, and rapid temperature shock test parameters are dynamically adjusted; and whether a circuit board is qualified is determined by detecting the change rate of key electrical parameters before and after aging of the circuit board.

2. The method according to claim 1, characterized in that The aging time equation is used to calculate the shortest test time required to achieve the expected aging effect. The input includes the optimized load intensity percentage, mechanical vibration aging test data, circuit board design operating temperature, actual test temperature, and electromagnetic interference aging test data. The output is the optimal aging duration used to determine the duration of the functional load test method.

3. The method according to claim 2, characterized in that The aging efficiency equation is used to evaluate the overall efficiency of the aging test program. The input includes the optimized load intensity percentage, the optimal aging duration, the thermal expansion coefficient of the circuit board material, the expected failure rate of the circuit board aging, and the power cycle aging test data. The output is the aging efficiency score for the calculation of the aging quality equation.

4. The method according to claim 3, characterized in that The aging quality equation is used to evaluate the quality level of the aging test program. The input includes the aging efficiency score, circuit board operating frequency parameters, circuit board quality grade standards, aging test coverage, and voltage aging test data. The output is the aging quality score used for aging cost equation calculation and pre-trained circuit life prediction model parameter adjustment.

5. The method according to claim 4, characterized in that The aging cost equation is used to calculate the economic index of the aging test plan. The input includes the optimal aging duration, energy consumption coefficient, aging equipment depreciation, labor cost coefficient, and aging quality score. The output is the unit aging cost index used to determine the best combination of functional load testing methods.

6. The method according to claim 5, characterized in that The specific structure of the pre-trained circuit life prediction model is a deep learning model based on the combination of a multi-layer timing attention mechanism and a recurrent neural network, which includes six main parts: an input layer, a feature extraction layer, a timing analysis layer, an attention layer, a fully connected layer, and an output layer.

7. The method according to claim 6, characterized in that In the pre-trained circuit life prediction model, the input layer receives the multi-dimensional electrical parameter time series data collected during the aging process, the feature extraction layer extracts the electrical parameter fluctuation characteristics through a convolutional neural network, the timing analysis layer uses a bidirectional long short-term memory network to capture the time-varying trend of the aging parameters, the attention layer uses a multi-head self-attention mechanism to assign different weights to different aging stages, the fully connected layer fuses multi-dimensional features to form a unified representation, and the output layer predicts the remaining service life of the circuit board and the future changing trends of various electrical parameters.

8. The method according to claim 7, characterized in that The basic aging data is obtained by performing various aging tests on the circuit board using temperature cycle test method, high humidity environment chamber, high voltage stress test, mechanical vibration aging test, power cycle aging test, and electromagnetic interference simulator.

9. The method according to claim 8, characterized in that The specific steps of dynamically adjusting the rapid temperature shock test parameters are: the temperature change range is minus 55 degrees Celsius to plus 125 degrees Celsius, the holding time is 15 minutes, the conversion time is less than 10 seconds, and the number of cycles is 200 times.

10. The method according to claim 9, characterized in that The specific steps of determining whether a circuit board is qualified by detecting the change rate of key electrical parameters before and after aging of the circuit board are: if it exceeds the set threshold of 5%, the circuit board is determined to be unqualified, and the performance indicator data after aging is recorded.

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