Memory device and memory system for performing swap operation

Abstract

A memory device and a memory system for performing a swap operation are disclosed. The memory device includes a memory module including a normal memory region and a swap memory region, and a memory processing unit. The swap memory region is configured to store swap-out data. The memory processing unit is configured to provide physical address information corresponding to a normal memory region and an additional memory region determined based on a size of swap-out data to a host.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2023-0168632, filed with the Korean Intellectual Property Office on November 28, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] Embodiments of the present disclosure relate to a memory device and a memory system for performing a swap operation. Background Art

[0003] The swap operation is a memory management technique in which, when the main memory area to be allocated to an application program in a system is insufficient, a part of the memory allocated to the application program is moved to an auxiliary storage device having a relatively large capacity (e.g., a solid state drive (SSD) or a hard disk drive (HDD)) to solve the memory shortage.

[0004] When the main memory area in the system is insufficient, the operating system can ensure the main memory space by moving the data in the memory area already allocated to the application program (e.g., pages in a LINUX system using virtual memory) to the swap area of the non-volatile memory used as the auxiliary storage device, thereby alleviating the memory shortage.

[0005] The cost of moving data (e.g., pages) to the auxiliary storage device may be quite large. For example, compared to the main memory, the data will be transferred through a relatively slow system bus, and if necessary, the stored data may need to be retrieved into the main memory. In this case, the performance of the application program may deteriorate. Summary of the Invention

[0006] According to an embodiment of the present disclosure, a memory device includes a memory module and a memory processing unit. The memory module includes a normal memory area and a swap memory area. The swap memory area is configured to store swapped-out data. The memory processing unit is configured to provide physical address information corresponding to the normal memory area and an additional memory area determined based on the size of the swapped-out data to a host.

[0007] In one embodiment, the physical address information is a physical address corresponding to a range obtained by increasing the default size of the memory module by the difference between the original size of the swapped-out data and the size of the swap memory area.

[0008] In one embodiment, the address of the additional memory area corresponds to the swap memory area of the memory module, and the size of the additional memory area is larger than the size of the swap memory area.

[0009] In one embodiment, the memory module is configured to store page data that is allocated for executing an application in an operating system.

[0010] In one embodiment, the memory processing unit is configured to detect cold data from the data stored in the memory module based on at least one of an access count or an access time of the data recorded in a normal memory area.

[0011] In one embodiment, the memory processing unit is further configured to determine as cold data the data having at least one of “an access count lower than the access counts of other data recorded in the normal memory area or an access time before the access times of other data”.

[0012] In one embodiment, the memory processing unit is further configured to, in response to a memory access request received from a host, update the access count of the page corresponding to the memory access request and process the memory access request after updating the access count.

[0013] In one embodiment, the memory processing unit is further configured to swap out the data at a first address determined to correspond to cold data to a second address and update the mapping information in the data access information by mapping the first address on the host side to the second address.

[0014] In one embodiment, the memory processing unit is further configured to, when an access request for the first address is received from the host, provide an access to the second address to the host.

[0015] In one embodiment, the memory processing unit is further configured to, when the size of the data at the second address decreases, temporarily store the data recovered from the decreased data in a buffer and delete the data from the buffer after sending the data temporarily stored in the buffer to the host.

[0016] In one embodiment, the memory processing unit is further configured to, in response to the access count of the data regarding the second address exceeding a threshold, store the data recovered from the decreased data at the second address in a fourth address in the normal memory area and provide the recovered data stored at the fourth address to the host.

[0017] In one embodiment, the first address is an address belonging to the normal memory area on the memory side, and the second address is an address belonging to the swap memory area on the memory side.

[0018] In one embodiment, the memory processing unit is further configured to update the mapping information in the data access information by mapping a third address on the host side to the first address on the memory side.

[0019] In one embodiment, the memory processing unit is further configured to: when receiving an access request for a third address from a host, provide an access to a first address to the host.

[0020] In one embodiment, the size of the additional memory area varies according to the compression ratio of the swapped-out data.

[0021] In one embodiment, the memory processing unit is further configured to: send the swapped-out data to an external device including at least one of a memory or a storage device, and manage mapping information between the physical address of the swapped-out data and the physical address provided to the host side.

[0022] In one embodiment, the memory processing unit is further configured to: perform a detection operation and a swap-out operation on cold data periodically without a swap-out request from the host.

[0023] According to an embodiment of the present invention, a method of operating a memory device includes: storing swapped-out data in a swap memory area, where the memory device includes a swap memory area and a normal memory area, and providing physical address information corresponding to the normal memory area and an additional memory area determined based on the size of the swapped-out data to the host.

[0024] According to an embodiment of the present disclosure, a memory system includes: a memory device configured to provide physical address information of an address range corresponding to a memory size greater than a default size to a host, and a host configured to manage physical addresses accessible by an operating system based on the physical address information.

[0025] In one embodiment, the host is further configured to: update the physical addresses provided by the memory device in the system memory pool of the operating system by performing a hot plug operation based on the physical address information. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other features of the present disclosure will become more apparent by describing embodiments of the present disclosure in detail with reference to the accompanying drawings.

[0027] Figure 1A and Figure 1B show a memory system according to an embodiment.

[0028] Figure 2 show a memory device according to an embodiment.

[0029] Figure 3 is a flowchart showing a method of operating a memory device according to an embodiment.

[0030] Figure 4 show an example of monitoring memory access according to an embodiment.

[0031] Figure 5 Illustrates an example of detecting cold data according to an embodiment.

[0032] Figure 6 Illustrates an example of an eviction operation according to an embodiment.

[0033] Figure 7 Illustrates an example of changing address mapping due to an eviction operation according to an embodiment.

[0034] Figure 8 Illustrates an example of a fetch operation according to an embodiment.

[0035] Figure 9 Illustrates an example of changing address mapping due to a fetch operation according to an embodiment.

[0036] Figure 10 Illustrates an example of improved memory access in a memory device and / or memory system according to an embodiment. Detailed Description

[0037] Hereinafter, embodiments of the present disclosure will be described more fully with reference to the accompanying drawings. Throughout the drawings, the same reference numerals may denote the same elements.

[0038] The following detailed structural or functional descriptions are provided only as examples, and various changes and modifications may be made to the examples. Here, the examples are not to be construed as limited to the disclosure, but should be understood to include all changes, equivalents, and alternatives within the spirit and scope of the disclosure.

[0039] It will be understood that the terms "first", "second", "third", etc. are used herein to distinguish one element from another, and the elements are not limited by these terms. Thus, a "first" element in one embodiment may be described as a "second" element in another embodiment.

[0040] It will be understood that when a component is referred to as being "on", "connected to", "coupled to", or "adjacent to" another component, it may be directly on, directly connected to, coupled to, or adjacent to the other component, or intervening components may be present. It will also be understood that when a component is referred to as being "between" two components, it may be the only component between the two components, or one or more intervening components may also be present. Other words used to describe the relationship between components should be interpreted in a similar manner.

[0041] Unless the context clearly indicates otherwise, the singular forms "a," "an," and "the" are also intended to include the plural forms. It will also be understood that the terms "comprises" and / or "comprising," when used herein, specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0042] As used herein, each of the terms "A or B," "at least one of A and B," "at least one of A or B," "A, B, or C," "at least one of A, B, and C," and "at least one of A, B, or C" may include any one of the items listed together in the corresponding phrase in the phrase or all possible combinations thereof.

[0043] Figure 1A and Figure 1B Shows a memory system according to an embodiment.

[0044] Referring to Figure 1A and Figure 1B , the memory system 100a or 100b according to an embodiment may provide offloading of operations (e.g., a swap operation). For example, the memory system 100a or 100b may provide offloading of operations between a host device and a peripheral device. The offloading may allow a peripheral device (e.g., the peripheral memory device 110) to perform a part of the operation instead of the host 150 (e.g., the host central processing unit (CPU)) in the memory system 100a or 100b. For example, a part of the operation may be offloaded (e.g., distributed) to the peripheral memory device 110 in the memory system 100a or 100b. For example, according to an embodiment, a swap operation (e.g., a swap-out operation and a swap-in operation) may be offloaded to the memory device 110.

[0045] According to an embodiment, the memory system 100a or 100b may include a host 150 and a memory device 110.

[0046] The host 150 may be a main management entity of a computer system (e.g., an electronic device) and may be implemented as, for example, a host processor or a server. The host processor may include, for example, a host CPU. For example, the host processor may include a processor core 151 and a memory controller 155. The memory controller 155 may control the peripheral memory device 110. The memory controller 155 may send instructions to the memory device 110. In addition, the host processor may process data received from the memory device 110 using the processor core 151.

[0047] In one embodiment, the memory device 110 may process data in the memory regions described below in cooperation with a host processor. For example, the memory device 110 may process data based on instructions received from the host processor. The memory device 110 may control the memory regions in response to instructions from the host processor. The memory device 110 may be separate from the host processor. For example, the memory device 110 and the host processor may be different devices physically separated from each other. The peripheral memory device 110 may be, for example, a memory device connected to and disposed adjacent to the host 150. For example, the memory device 110 may include a memory processing unit 111 and a memory module 113. The memory processing unit 111 may also be referred to as a memory processor or memory processing circuit, and the memory module 113 may also be referred to as a memory or memory circuit.

[0048] The memory module 113 may store data. The memory module 113 may include a plurality of memory blocks that form a memory region. The memory region may be a region in which data is stored and may represent a region (e.g., a physical region) in a memory chip of the physical memory device 110 where reading data and / or writing data is implemented. The memory region may be provided in a memory die (or core die (such as, for example, the processor core 151)) of the memory device 110. As described below with reference to Figure 2 The memory region of the memory module 113 may be divided into a normal memory region and a swap memory region. The swap memory region may be configured to store swapped-out data. The plurality of memory blocks may be generated by using a part or all of the memory chips of the memory device 110. Each memory block may correspond to a memory bank, and the plurality of memory blocks may be grouped by memory column and / or memory channel. For example, a memory column may be a group of memory chips (e.g., dynamic random access memory (DRAM) chips) connected to the same chip select so that they can be accessed simultaneously. A memory channel may be a group of memory chips that can be accessed via the same channel (e.g., a memory channel).

[0049] According to an embodiment, the memory processing unit 111 can access a neighboring memory (e.g., a memory block) and can perform operations (e.g., a processing near memory (PNM) operation or a processing in memory (PIM) operation) using the values recorded in the accessed memory block. The memory processing unit 111 can be a processing near memory unit or a processing in memory unit. Here, an example of the memory processing unit 111 as a PNM unit is mainly described. However, the embodiment is not limited thereto. For example, unless otherwise described, this description can also be applied to a PIM unit. The memory processing unit 111 can also be referred to as an accelerator. The memory processing unit 111 can be a set of logic elements (e.g., a logic circuit) manufactured and / or implemented to include logic for specifying operations. The memory processing unit 111 can be provided with a layer (e.g., a memory layer) close to the host 150. A peripheral device including the memory processing unit 111 can also be referred to as a PNM device. A memory device 110 having a PNM unit can also be referred to as a PNM memory device. The PNM memory device can include, for example, an accelerated dual in-line memory module (AXDIMM), a Compute Express Link - AXDIMM (CXL - AXDIMM), and a CXL - decomposed memory pool (MDP). The memory processing unit 111 can be configured to provide the host 150 with physical address information corresponding to a normal memory area and an additional memory area determined based on the size of the swapped - out data stored in the swap memory area. The physical address information can be a physical address corresponding to a range obtained by increasing the default size of the memory module 113 by "the difference between the original size of the swapped - out data and the size of the swap memory area".

[0050] The memory device 110 or the auxiliary device 120 (e.g., an auxiliary memory device) can process offloaded operations (e.g., a swap - out operation and a swap - in operation) through the memory processing unit 111. A memory system 100a or 100b that supports offloading can have a hardware structure that minimizes the communication involved in offloading or reduces the communication involved in offloading. Since the operations to be performed by the host 150 are partially allocated to peripheral devices, the host 150 can process more tasks more efficiently. Therefore, the performance of the host 150 can be improved.

[0051] According to an embodiment, the operation of unloading to the memory device 110 may be a memory swap operation (or a swap operation). For example, when the host processor boots all operations, the memory device 110 may perform an operation accelerated separately from the host (e.g., a swap operation as a PNM operation). For example, in the absence of a swap request from the operating system executed by the host 150, the memory device 110 may perform the swap operation asynchronously and autonomously. When the normal memory area of the memory module 113 in the memory system 100a or 100b is insufficient, the memory device 110 may move the data in the memory area allocated to the application to another area (e.g., a swap memory area, an auxiliary memory area, or an auxiliary storage area in the memory module). Referring to Figure 1A and Figure 1B , the normal memory area may be a partial area in the memory module 113 of the memory device 110. The swap memory area may be an area reserved in the memory module 113 for swapping out. The auxiliary memory area may be an area in the memory module 165 of the auxiliary device 120. The auxiliary memory area may be an area in the storage device 160 of the auxiliary device 120. The auxiliary memory area may be provided by the auxiliary device 120 including, for example, a non-volatile memory. For example, the data allocated to the application may be page data in the LINUX system. The memory space of the memory module 113 may be ensured through the above memory swap operation.

[0052] The swap operation may include a swap-out operation and a swap-in operation. In the absence of a request from the host, the memory device 110 may perform the swap-out operation and / or the swap-in operation. When the normal memory area in the memory module 113 is insufficient, the swap-out operation may be an operation of moving the data in the normal memory area to another area. The swap-out operation may include an operation of compressing the data to be moved to another area (e.g., the swap memory area). The swap-in operation may be an operation of restoring the data moved to another area to the normal memory area. The swap-in operation may include an operation of decompressing the data to be used for performing an operation (e.g., the data to be used by the host 150). In the swap operation, since the size of the data swapped out to the swap memory area is reduced, the memory space usage may be reduced.

[0053] In one embodiment, the memory processing unit 111 may execute operations and / or calculations involved in the above-mentioned memory swapping (e.g., swap-out operation and swap-in operation). The memory processing unit 111 may process compression, decompression, and transfer of data (e.g., page data) in response to the swapping operation. The memory module 113 may store page data allocated for executing an application in the operating system. The memory processing unit 111 may include a set of logic elements (e.g., logic circuits) that implement at least one of, for example, decoding logic, decompression logic, encoding logic, and compression logic. The logic circuits included in the memory processing unit 111 may be integrated and implemented in a buffer unit (e.g., buffer chip) of the memory device 110. Thus, the resource consumption of the host 150 for swap-in and swap-out operations may be reduced. Without intervention from the host 150, the memory system 100a or 100b may increase the system performance and utilization of the host 150 by executing the swapping operation. For ease of explanation, an example in which the memory processing unit 111 is installed in the memory device 110 is mainly described herein. However, the embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the memory processing unit 111 may be integrated and implemented in a host processor (e.g., the host 150), the memory device 110, or the auxiliary device 120. Refer to Figure 2 describe the structure of the memory processing unit 111, and refer to Figure 3 describe the operation of the memory processing unit 111.

[0054] For ease of explanation, the memory device 110 is mainly described herein as an example of a peripheral device. However, the embodiments are not limited thereto. For example, unless otherwise described, the structures and / or operations described below may also be applied to various types of peripheral devices including the memory module 113 and the memory processing unit 111. The memory processing unit 111 may also be implemented to be integrated into, for example, a CXL switch, a memory controller (MC) 155, and an interface unit.

[0055] In addition, although Figure 1A only the peripheral memory device 110 connected to the host 150 is shown, the embodiments of the present disclosure are not limited thereto. For example, refer to Figure 1B , in one embodiment, the auxiliary device 120 may be connected to the memory device 110. In one embodiment, the auxiliary device 120 may be connected to the host 150. When the auxiliary device 120 includes a memory module, the auxiliary device 120 may be referred to as an auxiliary memory device. When the auxiliary device 120 includes a storage device, the auxiliary device 120 may be referred to as an auxiliary storage device.

[0056] According to an embodiment, the memory device 110 may process a page reclamation operation implemented in an operating system through the memory processing unit 111 described above. Reclamation may be an operation of reducing the size of cold data (e.g., cold pages) occupied in the memory, and may include, for example, a compression operation, a page deduplication operation of reducing the same pages to a single page, and an operation of reducing a page consisting of a single value to 1 byte. The swapped-out data may be compressed and stored in a partial space of the main memory, or may be stored in a swap area of the auxiliary device 120 (e.g., an auxiliary memory device). The memory device 110 may record corresponding information (e.g., the physical address of the cold data from the host 150 side and the physical address of the cold data from the memory side) in an entry of the data access information (e.g., a page access table).

[0057] Data of an application program executed in any operating system may be stored in a memory (e.g., a main memory) in a predetermined unit. For example, in LINUX, the data of an application program may be stored in the main memory as a page unit (e.g., 4 kilobytes (KB)). The main memory may be, for example, the memory closest to the host 150 in the memory hierarchy. When the free memory space is insufficient, the memory device 110 may ensure free memory space in response to a memory allocation request of an application program. A compressed memory method may be used to ensure free memory space. The compressed memory method may be a method of compressing a part of the allocated page and storing the compressed page in the main memory or a partial space of another memory (e.g., a storage pool (zpool)).

[0058] According to an embodiment, since the data communication between the host 150 and the memory device 110 is reduced, free memory space may be ensured quickly. The memory device 110 may manage a memory area to be allocated to an application program that utilizes a large memory. In addition, the memory device 110 may be applied to various computing systems (such as, by way of example, mobile devices and servers). The memory device 110 may reduce page reclamation latency by processing page reclamation through the memory processing unit 111 near the memory module 113 that stores pages. Therefore, the memory device 110 may improve system performance by quickly responding to a page reclamation request of the host 150 and / or eliminating the need for the host 150 to request page reclamation.

[0059] The memory device 110 in one embodiment may autonomously perform a swap operation in the internal memory module 113 without moving data (e.g., page data) to an auxiliary memory device. The memory device 110 may perform a fast swap operation through an internal memory bandwidth that is relatively large compared to an external system bus. Since the data to be swapped is compressed, memory space may be additionally ensured.

[0060] Figure 2Shows a memory device according to an embodiment.

[0061] The memory device 200 in one embodiment may include a memory processing unit 210, a memory module 230, and a memory controller 250.

[0062] The memory module 230 may include a normal memory area 231 and a swap memory area 239. The normal memory area 231 may store, for example, uncompressed data. The swap memory area 239 may be an area reserved for storing swapped-out data from the normal memory area 231. The swapped-out data may be reclaimed data, and may be, for example, reclaimed page data. Due to reclaiming (e.g., compressing), the size of the swapped-out data may be reduced compared to the original size. The memory module 230 may store page data allocated for executing an application in an operating system. Although an example in which the data swapped out and / or swapped in by the memory processing unit 210 is page data is mainly described herein, embodiments of the present disclosure are not limited thereto.

[0063] The memory controller 250 may control the memory module 230 based on a memory access request. For example, the memory controller 250 may transmit an address value requested to be read by the memory processing unit 210 to the memory processing unit 210, or may transmit a value requested to be written to any address to the memory module 230.

[0064] The memory processing unit 210 may provide physical address information corresponding to the normal memory area 231 and an additional memory area determined based on the size of the swapped-out data to the host. The address of the additional memory area may correspond to the swap memory area 239 of the memory module 230, and the size of the additional memory area may be larger than the size of the swap memory area 239. The memory processing unit 210 may include a data access counter 211, a cold data detector 213, a data reclaimer 215, and an address converter 217. The data access counter 211, the cold data detector 213, the data reclaimer 215, and the address converter 217 may be logic circuits configured to perform corresponding operations and / or functions. However, for ease of description, the operations and / or functions of the memory processing unit 210 are divided into the data access counter 211, the cold data detector 213, the data reclaimer 215, and the address converter 217 in the description. However, embodiments of the present disclosure are not limited thereto, and some or all of the modules may be integrated.

[0065] The data access counter 211 can measure and record data access information. The data access information can represent information regarding accesses to the memory module 230 by data address. For example, the data access information can include an access count by address and access times in terms of page units. The data access information managed by pages can also be referred to as data access information. The access count for any address (or page) can be separately recorded as an access count for writing and an access count for reading. However, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the access count can be recorded regardless of the access type with respect to the corresponding address (or page). The access time can be a timestamp indicating the time of accessing the corresponding address (or page). The following will refer to Figure 4 Describe the data access count in further detail.

[0066] The cold data detector 213 can detect cold data (e.g., cold pages) among a plurality of data (e.g., page data). The cold data can be data stored in the memory module 230 that is less likely to be accessed by the host. For example, the cold data can be the least frequently accessed data or the oldest accessed data among the plurality of data. In one embodiment, the cold data can be the least frequently accessed data within a specified time period, or the oldest accessed data within a specified time period. The cold data detector 213 can detect cold data from the data stored in the memory module 230 based on at least one of the access count and the access time of the data recorded in the normal memory area. The cold data detector 213 can determine data having at least one of an access count lower than the access counts of other data recorded in the normal memory area and an access time prior to the access times of other data recorded in the normal memory area as cold data. The cold data detector 213 can detect cold pages based on at least one of the access count and the access time of each page data. By reference, the access count can be a metric for indicating the access frequency. The following will refer to Figure 5 Describe the detection of cold pages in further detail.

[0067] The data recycler 215 can ensure free memory space by recycling cold data. For example, the data recycler 215 can increase the free memory space by compressing cold pages and moving the compressed pages to a partial space (e.g., the swap memory area 239) of the memory module 230.

[0068] The address converter 217 can convert a physical memory address (e.g., a physical address) requested by the host into an internal physical memory address of the memory device 200. As described below, the physical address shown to the operating system of the host can be partially different from the internal physical memory address of the memory device 200. Here, the physical address of the memory device 200 shown to the host and / or information including the range of the physical address can be referred to as physical address information. The following will refer toFigure 4 Describe the physical address information in further detail. Refer to the following Figure 6 Describe the update of the mapping information used by the address converter 217 in further detail. For reference, here, the physical address shown to the host may be referred to as the host physical address (HPA), and the internal physical address of the memory device may be referred to as the device physical address (DPA).

[0069] In one embodiment, the memory processing unit 210 may store the compressed data of the cold data from the first address in the memory module 230 at the second address in the memory module 230 by using the address converter 217. The first address may be an address value indicating a memory location in the address range corresponding to the normal memory area 231, and the second address may be an address value indicating a memory location in the address range corresponding to the swap memory area 239. The address converter 217 may update the mapping information of the data access information by mapping the first address of the physical address information from the host side to the second address of the physical address from the memory side. The address converter 217 may process the memory access request of the host based on the updated mapping information of the data access information. For example, the address converter 217 may convert the first address in the memory access request received from the host into the second address in the memory module 230. The memory device 200 may provide the value corresponding to the second address (e.g., the decompressed value from the data recorded at the second address) to the host requesting the memory access (e.g., read request) based on the first address.

[0070] Figure 3 is a flowchart showing an operation method of a memory device according to an embodiment.

[0071] Refer to Figure 3 The described memory device may be a memory device according to an embodiment of the present application described herein (such as, by way of example, the memory device described with reference to Figures 1A to 1B , Figure 2 , Figures 4 to 10 described memory device).

[0072] In operation 310, the memory device may store the swapped-out data in the swap memory area. For example, the memory device may select cold data from the data in the normal memory area. The memory device may compress the selected cold data. In addition, the memory device may encrypt the selected cold data. The memory device may store the compressed cold data (e.g., the swapped-out data) in the swap memory area. The memory processing unit may update the address mapping information by mapping the original address of the cold data to the address of the compressed data in the swap memory area. The address mapping information may be included in the data access information. The memory processing unit may process the memory access request received from the host based on the address mapping information. Refer to the followingFigure 7 and Figure 9 Further details are described regarding address mapping and processing of memory access requests.

[0073] In operation 320, the memory device may provide physical address information corresponding to a normal memory area of the memory device and an additional memory area determined based on the size of the swapped-out data to the host. For example, the memory device may provide physical address information in an address range corresponding to a memory size greater than a default size to the host. The default size may represent the maximum physical memory size provided by the memory modules of the memory device.

[0074] The additional memory area may represent an additional area shown as a physical memory area for the host. Since the swapped-out data has a smaller size due to compression, the available space (e.g., empty space) in the normal memory area may increase by the size of the compression. As described below, in addition to the normal memory area, the memory device may also provide an additional memory area having a size corresponding to the increased empty space due to compression to the host. The memory device may provide not only the address indicating the normal memory area to the host, but also the address indicating the additional memory area as a physical address to the host. The address indicating the additional memory area provided to the host may be different from the address indicating the normal memory area.

[0075] The host in one embodiment may manage the physical addresses accessible by the operating system based on the physical address information. For example, the host may update the physical addresses provided by the memory device in the system memory pool of the operating system by performing a hot plug operation based on the physical address information. The physical addresses of the system memory pool may be the host physical memory addresses (e.g., HPA) recognized by the host for the memory device. The host physical memory address may be owned by the memory modules of the memory device connected to the host and may be an address recognized by the host and / or the operating system of the host. Based on the physical address information, the host may identify and manage the physical addresses to be used when sending requests to the memory device for access. As described above, the physical address information may include the physical addresses of the memory device and / or the range of physical addresses provided from the memory device to the host. The host may utilize the physical address information to manage and / or update the host physical memory addresses (e.g., HPA) of the system memory pool. Thus, the host may synchronize the physical addresses accessible by the operating system with the physical addresses indicated by the physical address information provided by the memory device. By reference, the above-described host physical memory addresses and physical address information may be logical memory addresses from the perspective of the memory device, but may be considered physical memory addresses from the perspective of the host.

[0076] Figure 4 An example of monitoring memory access according to an embodiment is shown.

[0077] Referring to Figure 4 , the memory device 400 may include a memory processing unit 410, a memory controller 420, and a memory module 430. The memory processing unit 410 may include a data access counter 411.

[0078] In one embodiment, the memory processing unit 410 may update data access information 490 based on a memory access request received from the host 450.

[0079] In operation 401, the host 450 may request a memory access based on any physical address (e.g., HPA) by sending a memory access request to the memory device 400. The memory access request may be a read request and / or a write request for a corresponding physical address, and may include the physical memory address to be accessed (e.g., the physical address). The host 450 may generate a memory access request including a physical address determined based on physical address information (or the system memory pool). The host 450 may transmit the generated memory access request to the memory device 400. As described below, the physical address information presented to the host 450 may be partially different from the physical address owned by the memory device 400.

[0080] In operation 402, in response to the memory access request received from the host 450, the memory processing unit 410 (e.g., the data access counter 411 of the memory processing unit 410) may update the access count of the page (e.g., page data) corresponding to the memory access request. The data access counter 411 may check whether the data access information 490 (e.g., the page access table) includes a page containing the corresponding physical address. In Figure 4 the example shown, each entry of the page access table may include, for example, a page offset, a write count, a read count, and a timestamp. The page offset may indicate the value that identifies the physical address as a page unit. The page offset may include some bits of the bit sequence that constitutes the requested address value. For example, the hexadecimal representation of any 64-bit bit sequence may be "0xXXXX...XX". The page offset may be some bits (e.g., the higher bits), and may be, for example, "0xXXXX". The page offset may be determined by, for example, the page unit (e.g., 4KB), the number of pages, and the number of frames. In the data access information 490, Figure 4 the entry shown in

[0081] When the data access counter 411 finds an entry corresponding to the physical address of the memory access request from the data access information 490, the data access counter 411 can determine the type of the memory access request. For example, the data access counter 411 can determine whether the memory access request is of a read type or a write type. For example, the data access counter 411 can retrieve an entry corresponding to the page offset that matches the physical address of the memory access request from the data access information 490. The data access counter 411 can increment the access count value in the retrieved entry for the physical address and can update the incremented access count value. The data access counter 411 can record a timestamp when updating the access count for the physical address in the data access information 490. The timestamp counter (TSC) value in the memory device 400 can be used to determine the timestamp.

[0082] When the data access information 490 does not include the requested address (e.g., physical address), the data access counter 411 can allocate a new entry from the data access information 490. The data access counter 411 can record the page offset corresponding to the requested address in the new entry. The data access counter 411 can update the access count (e.g., read count or write count) value and the timestamp value in the new entry.

[0083] In operation 403, the memory device 400 can process the memory access request after updating the access count. For example, the memory device 400 can attempt a normal memory access to the memory module 430 by transmitting the above-described memory access request to the memory controller 420. The memory device 400 can read the value indicated by the physical address (e.g., HPA) from the host side included in the memory access request, or can write a value in the corresponding portion.

[0084] Figure 5 An example of detecting cold data according to an embodiment is shown.

[0085] Referring to Figure 5 , the memory device 500 can include a memory processing unit 510, a memory controller 520, and a memory module 530. The memory processing unit 510 can include a cold data detector 513.

[0086] In one embodiment, a memory processing unit 510 (e.g., the cold data detector 513 of the memory processing unit 510) may detect cold data 591 from the data stored in the memory module 530 based on at least one of an access count and an access time among the data recorded in a normal memory area. The cold data detector 513 may detect the cold data 591 based on the access information of each entry recorded in the data access information 590. The access information may include an access count and an access time. For example, the memory processing unit 510 may determine as cold data 591 data having at least one of "an access count smaller than that of other data in the data recorded in the normal memory area" and "an access time before the access time of other data".

[0087] For example, the cold data detector 513 may determine page data having the lowest access count as a cold page. The page data having the lowest access count may be the least frequently used (LFU) page data. Among the page data recorded in the data access information 590, the cold data detector 513 may detect cold pages in the order from the page data having the lowest access count to the page data having the highest access count.

[0088] In addition, the cold data detector 513 may determine page data having the oldest access time as a cold page. The page data having the oldest access time may be the least recently used (LRU) page data. Among the pages recorded in the data access information 590, the cold data detector 513 may detect cold pages in the order of page data having the oldest access time to the newest access time from the time of the detection attempt (e.g., the current time point).

[0089] However, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the cold data detector 513 may sort and detect cold pages by using both an access count and an access time. For example, the cold data detector 513 may first select and / or sort page data from the oldest access time to the newest access time, and among the page data selected and / or sorted for the first time, the cold data detector 513 may secondarily select and / or sort page data from the page data having the lowest access count to the page data having the highest access count. In addition, the cold data detector 513 may detect cold pages by using various metrics calculated based on at least one of the above-mentioned access count and access time. The cold data detector 513 may calculate a metric for indicating or determining the order and / or priority of pages to be swapped out. When determining cold pages based only on access time, pages having a high access count and accessed at a relatively long period may be classified as cold pages. Since swapping out the corresponding pages as cold pages may be rather inefficient, the memory device 500 may also consider access time and access count.

[0090] Among the pages classified based on the above various metrics, the cold data detector 513 may determine a predetermined number of pages and / or pages corresponding to a predetermined memory size as cold pages. The cold data detector 513 may set the cold page bit value (e.g., "1") in the data access information 590 to the pages detected as cold pages.

[0091] The memory processing unit 510 may record a value indicating that the entry determined to be a cold page among the entries indicating the data access information 590 is a cold page (e.g., record a value indicating that the page data is a cold page in the entry for determining a cold page among the entries of the data access information 590). For example, the cold data detector 513 may write a value indicating Y (e.g., "1") in the cold page (CP) field. In the cold page (CP) field, Y indicates "yes", and N indicates "no".

[0092] Figure 6 An example of a swap-out operation according to an embodiment is shown.

[0093] Refer to Figure 6 , the memory device 600 may include a memory processing unit 610, a memory controller 620, and a memory module 630. The memory processing unit 610 may include a data recycler 615.

[0094] In operation 601, the memory processing unit 610 of the memory device 600 (e.g., the data recycler 615 of the memory processing unit 610) may identify data classified as cold data. The data recycler 615 (or page recycler) may check the entry in the data access information 640 where the bit value (e.g., "1" indicates Y) indicates that the data is a CP in the data access information. In the cold page (CP) field in the data access information 640, Y indicates "yes", and N indicates "no".

[0095] In operation 602, the data recycler 615 may perform a swap-out operation on the cold data. In Figure 6 the example shown, the data recycler 615 may include a compressor 615-1 and a decompressor 615-2. The data recycler 615 may send the physical address of the page data corresponding to the entry where CP (e.g., cold page) is set in the data access information (e.g., the internal physical address from the memory side) to the compressor 615-1. The compressor 615-1 may compress the corresponding page data.

[0096] In operation 603, the memory processing unit 610 may move the compressed data to the swap memory area 639 (e.g., zpool area). Since the compressed data is saved in the swap memory area 639, the memory processing unit 610 may reset the value of the memory location corresponding to the original data in the normal memory area to "0".

[0097] In operation 604, the memory processing unit 610 may update data access information based on the swap-out. The memory processing unit 610 may record, in the ZP_A field of the corresponding entry in the data access information, an address indicating the memory location where the compressed data is stored in the swap memory area 639, and may record the compressed size in the size field. The memory processing unit 610 may set the bit value of the recycle (R) field of the corresponding entry in the data access information to a value indicating Y (e.g., "1").

[0098] According to an embodiment, in the absence of a host swap-out request, the memory processing unit 610 may periodically or perform a detection operation and a swap-out operation on cold data according to the free memory space. For example, in one embodiment, the data recycler 615 may perform a swap-out operation based on the above operations 601 to 604 in response to the ratio of the used memory area 632 to the remaining free memory space in the normal memory area reaching a threshold ratio. For example, in one embodiment, the data recycler 615 may perform a swap-out operation at a predetermined period.

[0099] Since the size of the cold data is reduced by the swap-out operation, the used memory area 632 may be reduced in the normal memory area in the memory module 630. Since the compressed data is generated, the swap memory area 639 may increase. Since the unused space (or free space) increases as the used memory area 632 decreases, the size of the additional available memory area from the host side may increase. The size of the additional memory area may depend on the size of the reduction of the used memory area 632 due to the compression of the cold data. Therefore, the size of the additional memory area may vary according to the compression ratio of the swapped-out data.

[0100] Figure 7 An example of changing the address mapping due to the swap-out operation according to an embodiment is shown.

[0101] According to an embodiment, due to the swap operation, a partial mismatch may occur between the physical address recognized by the host (e.g., HPA 750) and the internal physical address of the memory device (e.g., DPA 710). As described above, this is because in the used memory area 752 from the host side, it can be recognized that the cold data 752-1 still exists in the first address, however, the first address is the free space 715 in the used memory area 712 from the memory side. Figure 7 An example of mapping the memory area (e.g., free space 715) ensured by data recycling (e.g., page recycling) to the physical memory area (e.g., additional memory area 759) managed by the operating system is shown.

[0102] For example, the memory processing unit may evict the data at the first address determined to be cold data 752-1 to a second address. As described above, the first address may be an address belonging to the normal memory area from the memory side. The second address may be an address belonging to the swap memory area 719 from the memory side. As referred to Figures 4 to 6 as described, the memory processing unit may detect cold data 752-1 in the used memory area 752. The memory processing unit may perform a reclaim operation 705 on the detected cold data 712-1. The memory processing unit may store the compressed data in the swap memory area 719 by means of the reclaim operation 705. The cold page may be compressed and stored in the swap memory area 719 corresponding to the last address of the physical memory address of the memory device. The memory processing unit (e.g., the address converter 770) may update the mapping information in the data access information 790 by mapping the first address in the memory access request received from the host side to the second address from the memory side. Although the mapping information is updated in the memory device, the memory location of the cold data 752-1 in the physical address information provided to the outside of the memory device may still be the first address. The host may recognize that the cold data 752-1 is still at the first address.

[0103] In one embodiment, the memory processing unit may update the mapping information in the data access information 790 by mapping a third address from the host side to the first address from the memory side. By means of the above-described swap operation, the memory location in the memory device whose internal physical address is the first address may be the free space 715. The memory processing unit may determine an additional memory area 759 based on the free space 715 triggered by the eviction operation. The memory processing unit may generate the additional memory area 759 and / or increase the size of the evicted data (e.g., the uncompressed size) of the additional memory area 759. For example, the address converter 770 may map the physical address belonging to the additional memory area 759 (e.g., the physical address from the host side) to the physical address belonging to the normal memory area of the memory module (e.g., the physical address from the memory side).

[0104] According to an embodiment, the physical address information (or HPA) provided to the host side may include an address range corresponding to a normal memory area and an address range corresponding to an additional memory area 759. The physical addresses belonging to the additional memory area 759 may belong to an address range "different from the address range corresponding to the normal memory area of the storage module". The address range corresponding to the normal memory area and the address range corresponding to the additional memory area 759 may be continuous. For example, the additional memory area 759 may include an address corresponding to the swap memory area 719 of the memory module. The address converter 770 may assign the address range corresponding to the swap memory area 719 in the physical address information provided to the host side to the additional memory area 759, so that the addresses of the normal memory area and the additional memory area 759 may be continuous. In Figure 7 the example of, the normal memory area of the memory module may correspond to an address range from "0x00000000" to "0x0FFFFFFE". The swap memory area 719 of the memory module may correspond to the address range of "0x0FFFFFFF". The additional memory area 759 may correspond to an address range from "0x0FFFFFFF" to "0x0FFFFFFF+@" (for example, "0x1XXXXXXX"). The cold pages reclaimed by the memory device may be sparsely distributed. However, the memory device may map the memory locations of the cold pages from the mapping information (for example, mapping table) in the data access information 790 to a memory area that is continuous from the perspective of the operating system.

[0105] In addition, the physical address information may include a physical address corresponding to a size 739 (instead of the default size of the memory module) that increases the "difference between the original size of the swapped-out data and the size of the swap memory area 719". For reference, the additional memory area 759 may be larger than the swap memory area 719. This is because the size of the additional memory area 759 is determined based on the uncompressed size of the swapped-out data, while the size of the swap memory area 719 is determined based on the compressed size of the swapped-out data. Therefore, the memory device may provide the physical address information corresponding to the memory size increased from the default size to the host as a continuous address range. Since the swap operation and the mapping update are performed in the memory device, the host can use the memory device with the added memory size without additional operations. The host can use features supported by the operating system (e.g., the memory hotplug feature) to update the system memory pool using the physical memory information provided by the memory device. Therefore, the free memory space ensured by page compression can be dynamically added to the physical memory area of the operating system. The memory processing unit may update the size of the secure free memory space (e.g., the additional memory area 759) to the register of the memory device. The physical memory information provided to the above operating system may include not only the address ranges of the normal memory area and the additional memory area 759, but also the default size, the secure memory size, and the total physical memory size.

[0106] In one embodiment, the memory processing unit may use the data access information 790 with the updated mapping information to process the memory access request of the host. For example, the memory processing unit may use the address converter 770 to convert the physical address (e.g., the physical address from the host side) included in the memory access request received from the host into a physical address in the memory module. The mapping information of the data access information 790 may include the mapping between the physical address (e.g., HPA 750) managed by the host and the internal physical address (e.g., DPA 710) on the memory side. The address converter 770 may use the mapping information to convert the HPA 750 into the DPA 710.

[0107] For example, when the memory processing unit receives an access request to the first address from the host, the memory processing unit may provide the access to the second address to the host. As described above, the host can recognize that the cold data 752-1 is still at the first address. When the access request to the first address is a read request, the memory processing unit may send the value recorded at the second address in the memory module to the host. When the access request to the first address is a write request with any value, the memory processing unit may write the value corresponding to the second address in the memory module. The processing operation of the access to the second address belonging to the swap memory area 719 may be accompanied by decompression. Refer to the following Figure 9Describe the access processing operation accompanying decompression in further detail.

[0108] When the memory processing unit receives an access request for a third address from the host, the memory processing unit may provide an access to the first address to the host. When the access request for the third address is a read request, the memory processing unit may send the value recorded in the first address of the memory module to the host. When the access request for the third address is a write request of any value, the memory processing unit may write the value corresponding to the first address of the memory module.

[0109] Figure 8 Show an example of a swap-in operation according to an embodiment.

[0110] In operation 801, a memory device 800 including a memory processing unit 807, a memory controller 808, and a memory module 830 may receive a memory access request from a host 850. The memory access request may be a read and / or write request for any physical address.

[0111] In operation 802, the memory processing unit 807 may check whether the memory access request received from the data access information 890 indicates cold data. For example, the memory processing unit 807 may retrieve an entry having a page offset corresponding to the physical address of the memory access request. The memory processing unit 807 may check whether the bit value of the recycle (R) field in the retrieved entry is set to indicate a value of Y. In the data access information 890, Y indicates "yes" and N indicates "no".

[0112] In operation 803, the memory processing unit 807 may provide compression information to the data recycler 815. When the retrieved entry is recycled, the memory processing unit 807 may read the address (e.g., the address value of the ZP_A field) indicating the memory location of the corresponding cold data in the swap memory area 839 and the compression size (e.g., the value of the size field). The memory processing unit 807 may provide the read compression information (e.g., the memory location storing the compressed data and the compression size) to the data recycler 815. The data recycler 815 may include a compressor 815-1 and a decompressor 815-2.

[0113] In operation 804, the decompressor 815-2 may decompress the compressed data. For example, the decompressor 815-2 may load the data indicated by the compression information and may decompress the loaded data.

[0114] In operation 805, the decompressor 815-2 may move the decompressed data. For example, the decompressor 815-2 may store the decompressed data at a new address in the normal memory area.

[0115] In subsequent operations, the memory processing unit may return the decompressed page data to the host 850.

[0116] According to an embodiment, by the above-described swap-in operation, in the memory module 830, the used memory area 832 may increase, and the swap memory area 839 may decrease. However, the swap-in operation is not limited to the operation described with reference to Figure 8 and additional operations that can be executed are described below with reference to Figure 9 Figure 7.

[0117] Figure 9 FIG. 8 shows an example of a changed address mapping due to a swap-in operation according to an embodiment.

[0118] When the size of the data at the second address decreases, the memory processing unit in one embodiment may temporarily store the restored data from the decreased data in a buffer. After the memory processing unit sends the data temporarily stored in the buffer to the host, the memory processing unit may delete the data. The memory processing unit may maintain cold data in a compressed state in the swap memory area. Since the decompressed data is not maintained and is deleted, the sizes of the used memory area 912 and the swap memory area 919 may not change. However, the exemplary embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the memory processing unit may differently process the decompressed data according to the access count of the cold data.

[0119] For example, when the access count of the cold data is small, the memory processing unit may only temporarily decompress the corresponding data. As described above, in response to the access count of the data at the second address being less than a threshold, the memory processing unit may temporarily store the decompressed data in at least one of a buffer, a memory, and a storage device, and may delete the decompressed data.

[0120] In one example, when the access count for cold data (e.g., swapped-in data 952-1 and 917-1) is high, the memory processing unit may perform a swap-in operation 905. In response to the access count for data at a second address exceeding a threshold, the memory processing unit may store the restored data of the reduced data from the second address in a fourth address in the normal memory area. The memory processing unit may determine the address indicating an empty slot belonging to the free space 917 as the fourth address. The free space 917 may include a plurality of empty slots in units of pages, and the memory processing unit may select one from the plurality of empty slots. An empty slot may be an unused area between used memories in the normal memory area and may be an area in units of pages. The memory processing unit may provide the restored data stored in the fourth address to the host. Accordingly, in response to a memory access request 901 based on a first address, the memory processing unit may provide access to the swapped-in data 917-1 at the fourth address to the host.

[0121] Referring to Figure 9 , the size of the additional memory area 959 may be reduced due to a change in the mapping between the HPA 950 and the DPA 910. A portion 959-1 corresponding to the swapped-in data 952-1 in the additional memory area 959 may be removed. The address converter 970 may save the mapping 903 between the maintenance portion of the additional memory area 959 and the corresponding portion 915 in the used memory area 912 in the data access information. The address converter 970 may delete the mapping 904 between "the removed portion 959-1 from the additional memory area 959 and the swapped-in data 917-1 from the data access information". The address converter 970 may change the mapping 902 between the physical address in the used memory area 952 on the host side where the swapped-in data 952-1 is located and the physical address in the swap memory area 919 where the compressed data 919-1 is located. The address converter 970 may map the first address corresponding to the swapped-in data 952-1 and the fourth address corresponding to the swapped-in data 917-1.

[0122] Although Figures 2 to 9 an example in which the memory device performs a memory swap operation internally has been mainly described, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the memory processing unit of the memory device may swap out cold data to an external device and a memory module in the memory device. For example, the memory processing unit may transmit the swapped-out data to an external device having at least one of a memory and a storage device. The external device may be, for example Figure 1B auxiliary device 120. The memory processing unit may manage mapping information between the physical address of the swapped-out data (e.g., the physical address of the auxiliary device 120) and the physical address provided to the host side.

[0123] Figure 10 An example of improved memory access in a memory device and / or memory system according to an embodiment is shown.

[0124] In one embodiment, a memory device can ensure free memory space by asynchronously and / or periodically performing swap operations (e.g., page reclamation) without the intervention of the host's operating system. In the case where no swap operation needs to be performed or requested, the host's operating system can perform memory allocation requested by an application. For example, the memory device can decompress a compressed page and store it in a new page without executing the page fault handler 1010 of the operating system, thereby allowing the application to access the new page. Since the memory device asynchronously performs the above-mentioned swap-out operation with the host, the memory device in one embodiment may not need to call the page fault handler 1010. The page fault handler 1010 may utilize a time 1080 between approximately 100 μs and approximately 1 ms. The page reclamation operation can be performed in the hardware of the memory device and can seamlessly perform a memory swap invisible to the host. The host can only perform normal memory access 1020. Therefore, the performance of the memory system and the memory access latency can be significantly improved to between approximately 80 ns and approximately 250 ns. In addition, when the host requests to swap out data, the memory device itself can perform a swap-in operation using a memory processing unit. The memory device can effectively process memory access operations and computing operations for page reclamation in a dedicated accelerator (e.g., a memory processing unit) provided in or adjacent to the memory.

[0125] Since the memory device asynchronously and independently of the host performs the above-mentioned page reclamation, the performance degradation of the computing system caused by the communication bottleneck between the host and the memory device can be reduced and / or minimized. The memory device can effectively ensure free memory space by compressing less frequently accessed cold pages. The memory device can quickly access the compressed page without going through the page fault handler 1010 of the operating system and can provide the value of the compressed page to the host.

[0126] Since the above operations are performed inside the memory device, the external bus traffic between the host and the memory device can be reduced. The memory device can quickly process compression and / or decompression operations of cold data using internal bandwidth. In addition, the intervention in the operations of the application executed by the host can be reduced and / or minimized.

[0127] The units described herein can be implemented using hardware components, software components, and / or combinations thereof. A processing device can be implemented using one or more general-purpose or special-purpose computers, such as, by way of example, a processor, a controller, and an arithmetic logic unit (ALU), a digital signal processor (DSP), a microcomputer, a field programmable gate array (FPGA), a programmable logic unit (PLU), a microprocessor, or any other device capable of responding to and executing instructions in a defined manner. The processing device can run an operating system (OS) and one or more software applications running on the OS. The processing device can also access, store, manipulate, process, and create data in response to the execution of the software. For simplicity, the description of the processing device is used in the singular form; however, those skilled in the art will understand that the processing device can include multiple processing elements and multiple types of processing elements. For example, the processing device can include multiple processors, or a single processor and a single controller. Additionally, different processing configurations are possible (such as, parallel processors).

[0128] The software can include a computer program, a code segment, an instruction, or some combination thereof, to individually or jointly direct or configure the processing device to operate as desired. The software and data can be stored in any type of machine, component, physical or virtual device, or computer storage medium or device capable of providing the instructions or data to, or being interpreted by, the processing device. The software can also be distributed over networked computer systems such that the software is stored and executed in a distributed manner. The software and data can be stored by one or more non-transitory computer-readable recording media.

[0129] The method according to the above example can be recorded on a non-transitory computer-readable medium including program instructions for implementing the various operations of the above example. The medium can also separately include data files, data structures, etc., or include data files, data structures, etc. in combination with the program instructions. The program instructions recorded on the medium can be program instructions specially designed and constructed for the purposes of the example, or they can be of the type well-known and available to those skilled in the computer software art. Examples of non-transitory computer-readable media include: magnetic media (such as, hard disks, floppy disks, and magnetic tapes); optical media (such as, compact disc read-only memory (CD-ROM) discs, digital versatile discs (DVDs), and / or Blu-ray discs); magneto-optical media (such as, optical discs); and hardware devices specially configured to store and execute program instructions (such as, read-only memory (ROM), random access memory (RAM), flash memory (e.g., universal serial bus (USB) flash drives, memory cards, memory sticks, etc.)). Examples of program instructions include both machine code such as produced by a compiler and files including higher-level code that can be executed by a computer using an interpreter.

[0130] As is conventional in the field of the present disclosure, embodiments are described and illustrated in the drawings in terms of functional blocks, units, and / or modules. Those skilled in the art will appreciate that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc., which may be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where the blocks, units, and / or modules are implemented by a microprocessor or the like, they may be programmed using software (e.g., microcode) to perform the various functions discussed herein and can optionally be driven by firmware and / or software. Alternatively, each block, unit, and / or module may be implemented by dedicated hardware or may be implemented as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) for performing other functions.

[0131] The above-described apparatus may be configured to act as one or more software modules to perform the operations of the above examples, and vice versa.

[0132] As described above, although examples have been described with reference to the drawings, those skilled in the art may apply various technical modifications and technical variations based on them. For example, suitable results may be obtained if the described techniques are performed in a different order and / or if the components in the described system, architecture, apparatus, or circuit are combined in a different manner and / or replaced or supplemented by other components or their equivalents.

[0133] Accordingly, while the present disclosure has been specifically shown and described with reference to embodiments thereof, those of ordinary skill in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims.

Claims

1. A memory device, comprising: Memory module, including normal memory area and swap memory area, wherein the swap memory area is configured to store swap-out data; and The memory processing unit is configured to provide physical address information corresponding to the normal memory area and the additional memory area determined based on the size of the swapped-out data to the host.

2. The memory device according to claim 1, wherein: The physical address information is a physical address corresponding to a physical address range whose size is increased by a difference between an original size of the swapped-out data and a size of the swap memory area from a default size of the memory module.

3. The memory device according to claim 1, wherein: An address of the additional memory area corresponds to a swap memory area of ​​the memory module, and a size of the additional memory area is larger than a size of the swap memory area.

4. The memory device according to claim 1, wherein: The memory module is configured to store page data allocated for executing an application program in an operating system.

5. The memory device according to claim 1, wherein: The memory processing unit is configured to detect cold data from data stored in the memory module based on at least one of an access count and an access time of data recorded in the normal memory area.

6. The memory device according to claim 5, wherein: The memory processing unit is further configured to determine data having at least one of an access count lower than that of other data recorded in the normal memory area and an access time earlier than that of the other data in the normal memory area as cold data.

7. The memory device according to claim 1, wherein: The memory processing unit is further configured to: In response to a memory access request received from a host, updating an access count of a page corresponding to the memory access request, and The memory access request is processed after the access count is updated.

8. The memory device according to claim 1, wherein: The memory processing unit is further configured to: swapping out the data at the first address determined to correspond to the cold data to the second address, and The mapping information in the data access information is updated by mapping a first address in a memory access request received from the host side to a second address.

9. The memory device according to claim 8, wherein: The memory processing unit is further configured to provide access to the second address to the host when an access request to the first address is received from the host.

10. The memory device according to claim 9, wherein: The memory processing unit is further configured to: When the size of the data of the second address is reduced, data restored from the reduced data is temporarily stored in the buffer, and After the data temporarily stored in the buffer is transmitted to the host, the temporarily stored data is deleted from the buffer.

11. The memory device according to claim 9, wherein: The memory processing unit is further configured to: In response to the access count of the data with respect to the second address exceeding a threshold value, storing the data restored from the reduced data of the second address in a fourth address in the normal memory area, and The recovered data stored in the fourth address is provided to the host.

12. The memory device according to claim 8, wherein: The first address is an address belonging to a normal memory area on the memory side, and The second address is an address of a swap memory area belonging to the memory side.

13. The memory device according to claim 8, wherein: The memory processing unit is further configured to update mapping information in the data access information by mapping the third address on the host side to the first address on the memory side.

14. The memory device according to claim 13, wherein: The memory processing unit is further configured to provide access to the first address to the host when an access request to the third address is received from the host.

15. The memory device according to claim 1, wherein: The size of the additional memory area varies depending on the compression rate of the swapped-out data.

16. The memory device of claim 1, wherein: The memory processing unit is further configured to: sending the swapped-out data to an external device including at least one of a memory and a storage device, and Manages the mapping information between the physical address of swapped-out data and the physical address provided to the host side.

17. The memory device according to any one of claims 1 to 16, wherein: The memory processing unit is further configured to: periodically perform a detection operation and a swap-out operation on the cold data in the absence of a swap-out request from the host.

18. The memory device according to any one of claims 1 to 16, wherein: When the size of the normal memory area is insufficient, the memory device performs a swap-out operation without a request from the host.

19. The memory device of claim 18, wherein: The swap-out operation includes compressing the swap-out data in the normal memory area and storing the compressed swap-out data in the swap memory area.

20. A method of operating a memory device, the method comprising: Store swapped-out data in the swap memory area, wherein the memory device comprises a swap memory area and a normal memory area; and Physical address information corresponding to the normal memory area and the additional memory area determined based on the size of the swapped-out data is provided to the host.

21. A memory system comprising: a memory device configured to provide physical address information of an address range corresponding to a memory size greater than a default size to a host; as well as The host is configured to manage physical addresses accessible by the operating system based on the physical address information.

22. The memory system of claim 21, wherein: The host is further configured to update a physical address provided by the memory device in a system memory pool of the operating system by performing a hot-plug operation based on the physical address information.

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