Master-slave data interaction method, system and medium based on double buffer

Abstract

The present invention discloses a master-slave data interaction method, system, and medium based on a dual buffer. This application relates to the field of data interaction technology. The method includes: after the slave is powered on, initializing a first buffer, a second buffer, and a DMA controller, and generating an acquisition cycle based on the master's read cycle startup cycle adjustment algorithm; the slave writes the collected data into the first buffer during the acquisition cycle; after the master is powered on, it sends a read instruction to the slave according to the read cycle; if the slave does not receive the read instruction, it controls the buffer switching via the DMA controller to write the data in the first buffer into the second buffer; if the slave receives the read instruction, it locks the current write position of the first buffer via the DMA controller and returns the data in the second buffer as request data to the master. The embodiments of the present application not only avoid data loss but also improve the real-time performance of data transmission.

Description

Technical Field

[0001] The present invention relates to the technical field of data interaction, and in particular to a master-slave data interaction method, system and medium based on a double buffer. Background Art

[0002] The existing master-slave data interaction has the following main problems: (1) The master-slave interaction requires the slave to wait for the master request to arrive before it starts to collect data, resulting in a high delay in the response time of the reading instruction; (2) Frequent locking is required when alternating between data reading and writing, resulting in a waste of time. Its real-time performance is insufficient and cannot meet the requirements of high real-time scenarios; (3) When the frequency of the host sending the reading instruction changes, it is easy to cause buffer overflow or data staleness. When the host sends the reading instruction intensively, the slave is prone to data loss or protocol stack crash due to resource competition, and the burst request processing capability is poor; (4) The host reading cycle and the slave collection cycle are not decoupled, which can easily lead to data window misalignment. For example, when the host sends the reading instruction to request data, the slave has not completed data collection, and there is a risk of timing mismatch. Summary of the Invention

[0003] The embodiments of the present invention provide a master-slave data interaction method, system and medium based on a double buffer, aiming to solve the problems of low real-time data transmission and easy data loss during existing master-slave data interaction.

[0004] In a first aspect, an embodiment of the present invention provides a master-slave data interaction method based on a double buffer, which includes:

[0005] After the slave is powered on, it initializes the first buffer, the second buffer and the DMA controller, and generates the acquisition cycle based on the host's reading cycle start-up cycle adjustment algorithm;

[0006] The slave writes the collected data into the first buffer during the collection period;

[0007] After the host is powered on, it sends a reading instruction to the slave according to the reading cycle;

[0008] If the slave does not receive the reading instruction, the DMA controller controls the buffer to switch, so as to write the data of the first buffer into the second buffer;

[0009] If the slave receives the read instruction, it locks the current write position of the first buffer through the DMA controller and returns the data in the second buffer as request data to the host.

[0010] In a second aspect, an embodiment of the present invention further provides a master-slave data interaction system based on a double buffer, which comprises: a generation unit, a writing unit, a switching unit and a return unit configured in the slave, and a sending unit configured in the host, wherein:

[0011] The generating unit is used to initialize the first buffer, the second buffer and the DMA controller after the slave is powered on, and to generate an acquisition cycle based on the host's reading cycle startup cycle adjustment algorithm;

[0012] The writing unit is used for the slave to write the collected data into the first buffer during the collection cycle;

[0013] The sending unit is used to send a reading instruction to the slave according to the reading cycle after the host is powered on;

[0014] The switching unit is used for controlling the buffer to switch through the DMA controller if the slave does not receive the reading instruction, so as to write the data in the first buffer into the second buffer;

[0015] The returning unit is used for the slave to lock the current writing position of the first buffer through the DMA controller if the slave receives the reading instruction, and return the data in the second buffer as requested data to the host.

[0016] In the third aspect, an embodiment of the present invention also provides a master-slave data interaction system based on a double buffer, which includes a host and a slave, and the host and the slave both include a memory and a processor, and a computer program is stored on the memory. The processors of the host and the slave jointly implement the above method when executing their respective computer programs.

[0017] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a computer program, and the computer program can implement the above method when executed by multiple processors.

[0018] Embodiments of the present invention provide a master-slave data interaction method, system, and medium based on a dual buffer. The method includes: upon powering up the slave, initializing a first buffer, a second buffer, and a DMA controller, and generating an acquisition cycle based on a master's read cycle startup cycle adjustment algorithm; the slave writes the acquired data into the first buffer during the acquisition cycle; upon powering up the master, sending a read instruction to the slave according to the read cycle; if the slave does not receive the read instruction, controlling the buffer switching via the DMA controller to write the data in the first buffer into the second buffer; and if the slave receives the read instruction, locking the current write position of the first buffer via the DMA controller and returning the data in the second buffer to the master as request data. In the technical solution of the embodiment of the present invention, the slave starts a cycle adjustment algorithm based on the reading cycle of the host to generate an acquisition cycle, thereby realizing dynamic adjustment of the acquisition cycle and solving the problem of data loss easily caused by buffer overflow when the reading cycle changes; by setting a double buffer (a first buffer and a second buffer) in the slave, data acquisition and data return are decoupled, which greatly shortens the response time of the reading instruction, improves the real-time performance of data transmission, and further improves the efficiency of data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A schematic diagram of a master-slave data interaction system based on a double buffer provided by an embodiment of the present invention;

[0021] Figure 2 A schematic flow chart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention;

[0022] Figure 3 A schematic diagram of a sub-flow diagram of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention;

[0023] Figure 4 A schematic diagram of another sub-flow of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention;

[0024] Figure 5 Another flowchart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention;

[0025] Figure 6 A schematic block diagram of a master-slave data interaction system based on a double buffer provided by an embodiment of the present invention;

[0026] Figure 7 A schematic block diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0028] It will be understood that when used in this specification and the appended claims, the terms “comprises” and “comprising” indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0029] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the present invention. As used in the specification and appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise.

[0030] It should be further understood that the term "and / or" used in the present description and appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

[0031] As used in this specification and the appended claims, the term “if” can be interpreted as “when” or “upon” or “in response to determining” or “in response to detecting,” depending on the context. Similarly, the phrase “if it is determined” or “if [described condition or event] is detected” can be interpreted as meaning “upon determination” or “in response to determining” or “upon detection of [described condition or event]” or “in response to detecting [described condition or event],” depending on the context.

[0032] See also Figure 1 , Figure 1It is a schematic diagram of a master-slave data interaction system based on a dual buffer provided by an embodiment of the present invention. The master-slave data interaction system based on a dual buffer includes a master and a slave, and the master and the slave communicate with each other. It should be noted that in this embodiment, the slave includes a first buffer, a second buffer, and a DMA (Direct Memory Access) controller, and the DMA controller controls the switching between the first buffer and the second buffer. It should also be noted that in this embodiment, the DMA controller is a core module for implementing data transmission without the participation of the CPU, and is particularly crucial in scenarios such as real-time data acquisition and high-speed peripheral communication.

[0033] Figure 2 It is a schematic flowchart of a master-slave data interaction method based on a dual buffer provided by an embodiment of the present invention. As Figure 2 shown, the method includes the following steps S110-S150.

[0034] S110. After the slave is powered on, initialize the first buffer, the second buffer, and the DMA controller, and start a cycle adjustment algorithm based on the reading cycle of the master to generate an acquisition cycle.

[0035] In an embodiment of the present invention, after the slave is powered on, initialize the first buffer, the second buffer, and the DMA controller. After the initialization is completed, start a cycle adjustment algorithm based on the reading cycle of the master to generate an acquisition cycle. It should be noted that in this embodiment, assume that the acquisition cycle of the slave is T1 and the reading cycle of the master is T2. The cycle adjustment algorithm dynamically adjusts the acquisition cycle T1 of the slave by analyzing the historical request pattern of the master in real time, that is, analyzing the historical request pattern of the master sending the reading instruction in real time, to ensure that T1<T2 and T2 = N×T1 are always satisfied, where N≥2, achieving the optimal balance between efficiency and resources. It should also be noted that in this embodiment, the reading cycle is the time interval between two consecutive times the master sends a reading instruction, and the reading instruction is a command for the master to send a request to read data to the slave.

[0036] In some embodiments, such as this embodiment, as Figure 3 shown, the step S110 may include steps S111-S114.

[0037] S111. Obtain the time of sending the reading instruction in the most recent preset number of times according to the reading cycle, and calculate the current average cycle of the master through a sliding window statistical formula based on the time of sending the reading instruction in the most recent preset number of times;

[0038] S112, obtaining the last estimated smoothing period value, and calculating the current estimated smoothing period value of the host according to the current average period and the last estimated smoothing period value;

[0039] S113, calculating the initial acquisition period by a PID control algorithm according to the current smoothing period estimate and the acquired actual period of the slave;

[0040] S114: Adjust the initial acquisition period to obtain a target acquisition period, and use the target acquisition period as the acquisition period.

[0041] In the embodiment of the present invention, the preset number of times is K times, wherein: , the sliding window statistical formula is shown in formula (1). In formula (1), is the time when the host sends the reading instruction for the i-th time, The time when the host sends the reading instruction for the i-1th time, The current average period of the most recent K host-sent reading instructions;

[0042] (1);

[0043] In obtaining the current average period Afterwards, get the last smoothing period estimate ,according to and The current smoothing period estimate of the host is calculated by formula (2): ,in, is the smoothing factor, controlling and The weight ratio of Assign decay weights to quickly respond to trend changes. It should also be noted that in this embodiment, =0.3, The weight is 30%, The weight is 70%. Understandably, in other embodiments, It can be set according to actual needs and is not specifically limited here;

[0044] (2);

[0045] Obtaining the current smoothing period estimate Afterwards, obtain the actual cycle of the slave ,according to and The initial acquisition cycle is calculated by the PID control algorithm. Specifically, the target cycle of the slave is calculated based on the current smoothing cycle estimate and the preset safety weight value, and the target cycle is used as the initial acquisition cycle. During the calculation of the target cycle, the actual cycle of the slave is obtained, and the difference between the target cycle and the actual cycle is calculated to obtain the acquisition cycle deviation. The error feedback value is calculated by the PID control algorithm based on the acquisition cycle deviation, and a closed-loop control is formed based on the error feedback value, wherein the preset safety weight value is , in this embodiment, =0.8, leaving a 20% safety margin to prevent the acquisition cycle Too close to the copy-read cycle , understandably, in other embodiments, It can also be set to other values, such as 0.7, according to the actual situation. It should be noted that, in this embodiment, the actual acquisition period is , the target period is , target cycle , the acquisition cycle deviation is , , the PID control algorithm is shown in formula (3). In formula (3), is the error feedback value, K p is the proportional gain, K i is the integral gain, K d is the differential gain;

[0046] (3);

[0047] In some embodiments, such as the present embodiment, Figure 4 As shown, the step S114 may include steps S1141-S1143.

[0048] S1141, detecting whether the initial acquisition period meets a preset period constraint condition;

[0049] S1142: If the initial acquisition period meets the preset period constraint, use the initial acquisition period as the target acquisition period;

[0050] S1143: If the initial acquisition period does not meet the preset period constraint condition, calculate a period adjustment amplitude value according to a preset amplitude modulation percentage and the initial acquisition period, and adjust the initial acquisition period according to the period adjustment amplitude value to obtain the target acquisition period.

[0051] In an embodiment of the present invention, the detection of whether the initial acquisition period satisfies the preset period constraint condition specifically includes: determining whether the initial acquisition period is less than the preset acquisition period; if the initial acquisition period is less than the preset acquisition period lower limit, determining that the initial acquisition period does not satisfy the preset period constraint condition; if the initial acquisition period is not less than the preset acquisition period lower limit, continuing to determine whether the initial acquisition period is greater than the preset acquisition period upper limit; if the initial acquisition period is greater than the preset acquisition period upper limit, determining that the initial acquisition period does not satisfy the preset period constraint condition; if the initial acquisition period is not greater than the preset acquisition period upper limit, determining that the initial acquisition period satisfies the preset period constraint condition. It can be understood that if the initial acquisition period is not less than the preset acquisition period lower limit and not greater than the preset acquisition period upper limit, determining that the initial acquisition period satisfies the preset period constraint condition; if the initial acquisition period is less than the preset acquisition period lower limit or greater than the preset acquisition period upper limit, determining that the initial acquisition period does not satisfy the preset period constraint condition. It should be noted that in this embodiment, if it is assumed that the preset acquisition period lower limit is The preset upper limit of the acquisition period is ,when ≤The initial collection period≤ When the initial acquisition period meets the preset period constraint condition, on the contrary, when the initial acquisition period < or the initial acquisition period> , it is determined that the initial acquisition period does not meet the preset period constraint. It should also be noted that in this embodiment, the preset amplitude modulation percentage is set to 20%, and the period adjustment amplitude value is equal to the initial acquisition period × 20%. When the initial acquisition period does not meet the preset period constraint, the target acquisition period = initial acquisition period ± the initial acquisition period × 20% to prevent severe oscillation.

[0052] S120: The slave device writes the collected data into the first buffer during the collection period.

[0053] In this embodiment of the present invention, the slave device writes the collected data into the first buffer via the DMA controller during the collection cycle. Understandably, at this time, the first buffer is the active buffer, and the second buffer is the inactive buffer. The active buffer performs real-time data collection, while the inactive buffer is locked and ready to respond to host requests. It should be noted that in this embodiment, when the slave device writes the collected data into the active buffer, it also adds a timestamp of the collection time.

[0054] S130 , after the host is powered on, sends a reading instruction to the slave according to the reading cycle.

[0055] In the embodiment of the present invention, after the host is powered on, a communication connection is established with the slave. The host sends a reading instruction to the slave according to the reading cycle to obtain data from the slave.

[0056] S140: If the slave device does not receive the read instruction, it controls the buffer to switch through the DMA controller to write the data in the first buffer into the second buffer.

[0057] In the embodiment of the present invention, if the slave does not receive the read instruction sent by the host, the DMA controller controls the buffer to switch, so as to write the data of the first buffer into the second buffer. It should be noted that in this embodiment, when the data of the first buffer is written into the second buffer, the old data is overwritten to avoid memory overflow.

[0058] S150: If the slave receives the read instruction, it locks the current write position of the first buffer through the DMA controller and returns the data in the second buffer as requested data to the host.

[0059] In this embodiment of the present invention, if the slave receives the read instruction sent by the host, it locks the current write position of the first buffer via the DMA controller and returns the data in the second buffer to the host as request data. Understandably, at this point, the first buffer is an inactive buffer, and the second buffer is an active buffer. It should be noted that in this embodiment, the active and inactive buffers are switched in a process: the first buffer performs real-time data acquisition, while the second buffer is locked and ready to respond to the host's request, i.e., the read instruction. The DMA controller interrupt triggers the switch between the first and second buffers, and the data in the second buffer is encapsulated according to the interactive protocol and returned to the host.

[0060] Figure 5 Another flow chart of a master-slave data interaction method based on a double buffer provided by an embodiment of the present invention is as follows: Figure 5 As shown, in this embodiment, the master-slave data interaction method based on the double buffer of this embodiment includes steps S210-S260. Steps S210-S250 are similar to steps S110-S150 in the above embodiment and are not repeated here. The following details the added step S260 in this embodiment.

[0061] S260: The host performs data validity verification on the received request data according to the reading cycle to generate a verification result.

[0062] In an embodiment of the present invention, the host performs data validity verification on the received request data according to the reading cycle to generate a verification result, including: the host obtains the time when the slave returns the request data and the acquisition time corresponding to the request data; calculates the difference between the acquisition time and the time when the slave returns the request data to obtain an acquisition return time difference; if the acquisition return time difference is not greater than a preset multiple of the reading cycle, setting the verification result as the request data valid;

[0063] If the acquisition return time difference is greater than a preset multiple of the reading cycle, the verification result is set to invalidate the request data. It should be noted that in this embodiment, if the verification result is that the request data is invalid, the reading cycle is adjusted to make the acquired request data valid.

[0064] In summary, the slave starts the cycle adjustment algorithm based on the reading cycle of the host to generate the acquisition cycle, which realizes the dynamic adjustment of the acquisition cycle and solves the problem of data loss caused by buffer overflow when the reading cycle changes. By setting up a double buffer (the first buffer and the second buffer) in the slave, data acquisition and data return are decoupled, which greatly shortens the response time of the reading instruction, improves the real-time performance of data transmission, and further improves the efficiency of data transmission.

[0065] Figure 6 FIG is a schematic block diagram of a master-slave data interaction system 70 based on a double buffer provided by an embodiment of the present invention. Figure 6 As shown, it corresponds to the master-slave data interaction method based on double buffer applied to the master and slave. The master-slave data interaction system 70 based on double buffer includes a unit for executing the master-slave data interaction method based on double buffer. Figure 5 The master-slave data interaction system 70 based on double buffer includes a generating unit 101, a writing unit 102, a switching unit 103 and a returning unit 104 configured in the slave 10, and a sending unit 201 configured in the host 20.

[0066] Among them, the generating unit 101 is used to initialize the first buffer, the second buffer and the DMA controller after the slave is powered on, and to generate an acquisition cycle based on the host's read cycle startup cycle adjustment algorithm; the writing unit 102 is used for the slave to write the collected data into the first buffer during the acquisition cycle; the sending unit 201 is used to send a read instruction to the slave according to the read cycle after the host is powered on; the switching unit 103 is used to control the buffer switching through the DMA controller to write the data in the first buffer into the second buffer if the slave does not receive the read instruction; the returning unit 104 is used to lock the current write position of the first buffer through the DMA controller if the slave receives the read instruction, and return the data in the second buffer as request data to the host.

[0067] In some embodiments, such as this embodiment, the generating unit 101 includes a first calculating unit, a second calculating unit, a third calculating unit, and an adjusting unit.

[0068] Among them, the first calculation unit is used to obtain the time when the reading instruction was sent the most recently preset number of times according to the reading cycle, and calculate the current average cycle of the host through a sliding window statistical formula based on the time when the reading instruction was sent the most recently preset number of times; the second calculation unit is used to obtain the last estimated value of the smoothing cycle, and calculate the current estimated value of the smoothing cycle of the host according to the current average cycle and the last estimated value of the smoothing cycle; the third calculation unit is used to calculate the initial acquisition cycle through a PID control algorithm according to the current estimated value of the smoothing cycle and the actual cycle of the slave obtained; the adjustment unit is used to adjust the initial acquisition cycle to obtain a target acquisition cycle, and use the target acquisition cycle as the acquisition cycle.

[0069] In some embodiments, such as this embodiment, the third computing unit includes a fourth computing unit.

[0070] Among them, the fourth calculation unit is used to calculate the target period of the slave machine based on the current smoothing period estimate value and the preset safety weight value, and use the target period as the initial acquisition period. During the calculation of the target period, the actual period of the slave machine is obtained, and the difference between the target period and the actual period is calculated to obtain the acquisition period deviation. The error feedback value is calculated by the PID control algorithm according to the acquisition period deviation, and closed-loop control is formed according to the error feedback value.

[0071] In some embodiments, such as this embodiment, the adjustment unit includes a detection unit, a serving unit, and an adjustment sub-unit.

[0072] Among them, the detection unit is used to detect whether the initial acquisition period meets the preset period constraint condition; the acting unit is used to use the initial acquisition period as the target acquisition period if the initial acquisition period meets the preset period constraint condition; the adjustment subunit is used to calculate the period adjustment amplitude value according to the preset amplitude modulation percentage and the initial acquisition period if the initial acquisition period does not meet the preset period constraint condition, and adjust the initial acquisition period according to the period adjustment amplitude value to obtain the target acquisition period.

[0073] In some embodiments, such as this embodiment, the detection unit includes a first determination unit and a second determination unit.

[0074] Wherein, the first determination unit is used to determine that the initial acquisition period meets the preset period constraint condition if the initial acquisition period is not less than the preset acquisition period lower limit value and not greater than the preset acquisition period upper limit value; the second determination unit is used to determine that the initial acquisition period does not meet the preset period constraint condition if the initial acquisition period is less than the preset acquisition period lower limit value or greater than the preset acquisition period upper limit value.

[0075] In some embodiments, such as another embodiment, the master-slave data interaction system 70 based on double buffers further includes a verification unit configured in the host 20 .

[0076] The verification unit is used by the host to perform data validity verification on the received request data according to the reading cycle to generate a verification result.

[0077] In some embodiments, such as this embodiment, the verification unit includes an acquisition unit, a fifth calculation unit, a first setting unit, and a second setting unit.

[0078] The acquisition unit is used by the host to obtain the time when the slave returns the request data and the acquisition time corresponding to the request data; the fifth calculation unit is used to calculate the difference between the acquisition time and the time when the slave returns the request data to obtain the acquisition return time difference; the first setting unit is used to set the verification result as the request data being valid if the acquisition return time difference is not greater than a preset multiple of the reading cycle; the second setting unit is used to set the verification result as the request data being invalid if the acquisition return time difference is greater than a preset multiple of the reading cycle.

[0079] The above-mentioned master-slave data interaction system based on double buffer can be implemented in the form of a computer program. The computer program can be used in Figure 7 Runs on the computer equipment shown.

[0080] See also Figure 7 , Figure 7 1 is a schematic block diagram of a computer device provided in an embodiment of the present application. The computer device 900 can be the above-mentioned host and slave.

[0081] See Figure 7 The computer device 900 includes a processor 902 , a memory, and an interface 905 connected via a system bus 901 , wherein the memory may include a non-volatile storage medium 903 and an internal memory 904 .

[0082] The non-volatile storage medium 903 can store an operating system 9031 and a computer program 9032. When the computer program 9032 is executed, the processor 902 can execute a master-slave data interaction method based on a double buffer.

[0083] The processor 902 is used to provide computing and control capabilities to support the operation of the entire computer device 900.

[0084] The internal memory 904 provides an environment for executing the computer program 9032 stored in the non-volatile storage medium 903 .

[0085] The interface 905 is used to communicate with other devices. Those skilled in the art will appreciate that Figure 7 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present application, and does not constitute a limitation on the computer device 900 to which the solution of the present application is applied. The specific computer device 900 may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0086] The processors 902 in each of the master and slave are configured to run computer programs 9032 stored in their respective memories. When the computer program 9032 is executed, the processors 902 can execute a master-slave data interaction method based on a double buffer.

[0087] It should be understood that in the embodiment of the present application, the processor 902 may be a central processing unit (CPU), and the processor 902 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0088] Those skilled in the art will appreciate that all or part of the steps in the method of the above-described embodiment can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. The computer program is executed by at least one processor in the computer system to implement the steps in the method of the above-described embodiment.

[0089] Therefore, the present invention further provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program. When executed by a processor, the computer program causes the processor to execute any embodiment of the master-slave data interaction method based on a double buffer.

[0090] The storage medium may be any computer-readable storage medium that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disk.

[0091] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0092] In the several embodiments provided herein, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the various units is merely a logical functional division, and actual implementation may employ other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be omitted or not implemented.

[0093] The steps in the methods of the embodiments of the present invention may be adjusted in order, combined, or deleted as needed. The units in the devices of the embodiments of the present invention may be combined, divided, or deleted as needed. Furthermore, the functional units in the various embodiments of the present invention may be integrated into a single processing unit, each unit may exist physically separately, or two or more units may be integrated into a single unit.

[0094] If this integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present invention, or the portion that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product, stored in a storage medium, includes instructions for enabling a computer device (such as a personal computer, terminal, or network device) to execute all or part of the steps of the method described in various embodiments of the present invention.

[0095] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0096] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, to the extent such changes and modifications fall within the scope of the claims and their equivalents, the present invention is intended to encompass such changes and modifications.

[0097] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and such modifications or substitutions are intended to be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A master-slave data interaction method based on double buffer, characterized in that: include: After the slave is powered on, it initializes the first buffer, the second buffer and the DMA controller, and generates the acquisition cycle based on the host's reading cycle start-up cycle adjustment algorithm; The slave writes the collected data into the first buffer during the collection period; After the host is powered on, it sends a reading instruction to the slave according to the reading cycle; If the slave does not receive the reading instruction, the DMA controller controls the buffer to switch, so as to write the data of the first buffer into the second buffer; If the slave receives the read instruction, it locks the current write position of the first buffer through the DMA controller and returns the data in the second buffer as request data to the host; The host-based reading cycle-based start-up cycle adjustment algorithm generates a collection cycle, including: According to the reading cycle, the time of sending the reading instruction for the latest preset number of times is obtained, and the current average cycle of the host is calculated by a sliding window statistical formula according to the time of sending the reading instruction for the latest preset number of times; Obtaining the last estimated value of the smoothing period, and calculating the current estimated value of the smoothing period of the host according to the current average period and the last estimated value of the smoothing period; Calculating an initial acquisition period using a PID control algorithm according to the current smoothing period estimate and the acquired actual period of the slave; The initial acquisition period is adjusted to obtain a target acquisition period, and the target acquisition period is used as the acquisition period.

2. The master-slave data interaction method based on double buffer according to claim 1, characterized in that: The calculating the initial acquisition period by a PID control algorithm according to the current smoothing period estimate and the acquired actual period of the slave includes: The target cycle of the slave is calculated according to the current smoothing cycle estimate and the preset safety weight value, and the target cycle is used as the initial acquisition cycle. During the calculation of the target cycle, the actual cycle of the slave is obtained, and the difference between the target cycle and the actual cycle is calculated to obtain the acquisition cycle deviation. The error feedback value is calculated by the PID control algorithm according to the acquisition cycle deviation, and closed-loop control is formed according to the error feedback value.

3. The method according to claim 1, characterized in that The adjusting the initial acquisition period to obtain a target acquisition period includes: Detecting whether the initial acquisition period meets a preset period constraint condition; If the initial acquisition period meets the preset period constraint condition, the initial acquisition period is used as the target acquisition period; If the initial acquisition period does not meet the preset period constraint condition, a period adjustment amplitude value is calculated according to a preset amplitude modulation percentage and the initial acquisition period, and the initial acquisition period is adjusted according to the period adjustment amplitude value to obtain the target acquisition period.

4. The method according to claim 3, characterized in that The detecting whether the initial acquisition period satisfies a preset period constraint condition includes: If the initial acquisition period is not less than the preset acquisition period lower limit and not greater than the preset acquisition period upper limit, it is determined that the initial acquisition period meets the preset period constraint condition; If the initial acquisition period is less than the preset acquisition period lower limit or greater than the preset acquisition period upper limit, it is determined that the initial acquisition period does not meet the preset period constraint condition.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The host performs data validity verification on the received request data according to the reading cycle to generate a verification result.

6. The method according to claim 5, characterized in that The host performs data validity verification on the received request data according to the reading cycle to generate a verification result, including: The host obtains the time when the slave returns the requested data and the acquisition time corresponding to the requested data; Calculating the difference between the acquisition time and the time when the slave returns the requested data to obtain an acquisition return time difference; If the acquisition return time difference is not greater than a preset multiple of the copy reading cycle, the verification result is set as the requested data is valid; If the acquisition return time difference is greater than a preset multiple of the copy reading cycle, the verification result is set as the request data invalid.

7. A master-slave data interaction system based on double buffer, characterized in that: include: The generating unit, writing unit, switching unit and returning unit are configured in the slave, and the sending unit is configured in the host, wherein, The generating unit is used to initialize the first buffer, the second buffer and the DMA controller after the slave is powered on, and to generate an acquisition cycle based on the host's reading cycle startup cycle adjustment algorithm; The writing unit is used for the slave to write the collected data into the first buffer during the collection cycle; The sending unit is used to send a reading instruction to the slave according to the reading cycle after the host is powered on; The switching unit is used for controlling the buffer to switch through the DMA controller if the slave does not receive the reading instruction, so as to write the data in the first buffer into the second buffer; The return unit is used for the slave to lock the current write position of the first buffer through the DMA controller if the slave receives the read instruction, and return the data in the second buffer as request data to the host; Wherein, the generating unit includes: A first calculation unit is configured to obtain the time of sending the reading instruction for the latest preset number of times according to the reading cycle, and calculate the current average cycle of the host by a sliding window statistical formula based on the time of sending the reading instruction for the latest preset number of times; a second calculation unit, configured to obtain a previous estimated smoothing period value, and calculate a current estimated smoothing period value of the host according to the current average period and the previous estimated smoothing period value; a third calculation unit, configured to calculate an initial acquisition period by a PID control algorithm according to the current smoothing period estimate and the acquired actual period of the slave; An adjusting unit is configured to adjust the initial acquisition period to obtain a target acquisition period, and use the target acquisition period as the acquisition period.

8. A master-slave data interaction system based on double buffer, characterized in that: The method comprises a host and a slave, wherein the host and the slave both comprise a memory and a processor, wherein a computer program is stored in the memory, and when the processors of the host and the slave execute their respective computer programs, they jointly implement the method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that The storage medium stores a computer program, which, when executed by a plurality of processors, can implement the method according to any one of claims 1 to 6.

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