Field effect transistor switching loss evaluation method based on grid charge analysis
By collecting the voltage and charge curves on the gate side of the MOSFET, extracting feature vectors and establishing an identification model, identifying and adapting different load characteristics, the problem of difficult to balance recognition accuracy and real-time in traditional technology is solved, and efficient load dynamic adaptation and energy efficiency control are achieved.
Patent Information
- Application Number
- CN202510529036.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-25
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2045-04-25
AI Technical Summary
Traditional technologies have problems that both recognition accuracy and real-time are difficult to take into account when identifying and adapting different load characteristics, and the control strategy cannot adapt to load changes and is difficult to quantitative feedback and tuning.
By collecting the voltage curve and charge accumulation curve on the gate side of the MOSFET, the original parameter data set is constructed, and the characteristic vector reflecting the changes in load attributes is extracted, the charge behavior recognition model is established, the load type identification and switching loss estimation calculation are performed, the comprehensive state evaluation index is generated, and the driving control strategy is dynamically adjusted.
It realizes rapid identification and dynamic adaptation of different loads, improves the sensitivity and robustness of control strategies, and significantly improves the system's dynamic adaptation capabilities and energy efficiency control capabilities under different loads and operating conditions.
Smart Images

Figure CN120067770A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of charge analysis, and specifically to a method for evaluating the switching loss of a field effect transistor based on gate charge analysis. Background Art
[0002] In the macroscopic system of power electronics technology, power conversion has always been one of the core tasks, covering the efficient conversion of energy forms and voltage levels from the power grid to terminal devices. Especially in current new energy, high-efficiency power distribution, smart grid and other systems, power conversion not only occurs between traditional alternating current and alternating current (AC-AC), but also widely exists in the bidirectional, continuous, and high-speed regulation processes between alternating current and direct current (AC-DC) and between direct current and direct current (DC-DC). In order to achieve high-efficiency conversion in these complex energy transmission paths, power semiconductor devices (such as MOSFETs, IGBTs, GaN, etc.) have become the key switching components for realizing energy control and scheduling.
[0003] The types of loads driven by field effect transistors are usually not the same. For example, inductive loads are mainly in motor systems, resistive loads are mainly in lighting systems, and capacitive characteristics are more prominent in energy storage systems. Under different types of loads, there are significant differences in the voltage and current waveform characteristics during the FET switching period, and these differences in turn will affect its switching loss, oscillation behavior, and EMI generation mechanism. Traditional technologies mainly rely on real-time sampling of current and voltage waveforms to judge the load attributes and adjust the driving strategy. However, this method is restricted by the sampling response speed on the one hand and is vulnerable to high-frequency noise interference on the other hand, making it difficult to balance the recognition accuracy and real-time performance. In addition, the waveform differences between different load characteristics often require complex filtering and judgment logic to draw conclusions, and the overall recognition and control process has a response delay and is difficult to quickly adapt to dynamically changing loads. Summary of the Invention
[0004] Aiming at the deficiencies of the prior art, the present invention provides a method for evaluating the switching loss of a field effect transistor based on gate charge analysis, which solves the problems mentioned in the background art.
[0005] To achieve the above objectives, the present invention is realized through the following technical solutions: A method for evaluating the switching loss of a field effect transistor based on gate charge analysis, including the following steps:
[0006] S1. Collect the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) that change with time during the switching operation from the gate drive channel of the MOSFET, calculate the charge response parameters, and then form the original parameter data set RPS together with the charge response change amount Zeta obtained within the perturbation range at the gate conduction critical point.
[0007] S2. Based on the original parameter dataset RPS, extract a set of feature vectors reflecting the changes in different load attributes to form a structured feature set FV;
[0008] S3. Based on the structured feature set FV, establish a charge behavior recognition model to identify the load type, output the load label LT under the task, and calculate the instantaneous switching loss estimation value LE through a multi-factor function;
[0009] S4. Perform a fusion process on the switching loss estimation value LE and the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE;
[0010] S5. Compare the comprehensive state evaluation index SSE with a preset state evaluation threshold TE, and make a judgment based on the comparison result to enter the drive control strategy adjustment process, generating a drive strategy adjustment instruction set DCS;
[0011] S6. Apply the generated drive strategy adjustment instruction set DCS, re-collect the gate charge behavior data to form a new parameter set RPSN, extract a new feature vector FVN, obtain a differential feature vector DV, and then perform iterative optimization based on the differential feature vector DV.
[0012] Preferably, the S1 includes S11;
[0013] S11. During the normal working cycle of the metal-oxide-semiconductor field-effect transistor (MOSFET), collect the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) that change with time during the switching operation from the gate drive channel of the MOSFET, and record the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) as a structured time series vector to form a gate signal time series GSTS, and synchronously store the gate signal time series GSTS as stored historical data;
[0014] The gate signal time series GSTS is specifically GSTS = {(t, VG(t), Qg(t))|t ∈ [tstart, tend]}, where t represents the sampling moment, and tstart and tend respectively represent the sampling start moment and the sampling end moment.
[0015] Preferably, the S1 includes S12. Process the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) to extract influence parameters reflecting the dynamic characteristics of the switching behavior. The influence parameters include the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg of the gate charge in the effective drive interval, and the charge response change amount Zeta at the perturbation point near the gate conduction threshold;
[0016] Integrate the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg, and the charge response change amount Zeta to obtain the original parameter data set RPS, and store it as historical data.
[0017] Preferably, S2 includes S21;
[0018] S21. Based on the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg, and the charge response change amount Zeta in the original parameter data set RPS, obtain the original parameter data set RPS, perform mapping processing, and construct response factors, where the response factors include the average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3;
[0019] The average charge response rate factor Alpha1 is used to reflect the average change rate of the gate charge over time when the gate voltage is in the effective rising region. When constructing the average charge response rate factor Alpha1, determine the boundary points of the rising section of the gate voltage, and extract the change amount of the charge value and the time used within this interval to form the acquisition of the average charge response rate parameter;
[0020] The charge perturbation response magnification factor Alpha2 is used to measure the ability of the system to respond to the charge change rate of a small voltage perturbation when the gate voltage is close to the conduction threshold. When constructing the average charge response rate factor Alpha1, extract the change trends of the gate charge in two adjacent regions near the conduction threshold voltage, and calculate the difference between the two to obtain;
[0021] The charge response stability factor Alpha3 is used to measure the stability of the gate charge response process within the effective working range. Extract the gate charge curve within the entire range from the start of the gate voltage rise to the saturation stage, and calculate the ratio of the fluctuation degree of the charge change to the average trend in this section of the curve to obtain.
[0022] Preferably, S2 includes S22. Based on the obtained average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3, reflect the characteristic vectors of different load attribute changes, and form a structured feature set FV by integrating the average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3;
[0023] The specific structured feature set FV is FV = {Alpha1, Alpha2, Alpha3}.
[0024] Preferably, S3 includes S31;
[0025] S31. Based on the structured feature set FV, input it into a pre-established charge behavior recognition model for recognition and inference. The charge behavior recognition model is a set of feature judgment logics constructed based on a preset load sample library, used to reflect the distribution laws of different types of loads on the three features in the structured feature set FV, record the similarity between the load samples and each feature in the structured feature set FV, and then determine the load type recognition result of the current cycle according to the similarity and mark it as the load label LT;
[0026] Among them, during the process of recognition and inference in the charge behavior recognition model, according to each feature in the structured feature set FV, determine the load type to which each feature in the structured feature set FV belongs according to the feature space distribution obtained from the classification boundary predefined in the charge behavior recognition model;
[0027] The different types of loads include inductive loads, capacitive loads, and resistive loads;
[0028] The load label LT includes the resistive type Resistive, the inductive type Inductive, and the capacitive type Capacitive.
[0029] Preferably, S3 includes S32. Based on the obtained load label LT and the structured feature set FV, call the built-in energy consumption evaluation model. The energy consumption evaluation model is a set of energy consumption estimation algorithms constructed based on empirical data and switching behavior rules, used to judge the typical conduction and turn-off loss levels of field effect transistors under specific load characteristic conditions;
[0030] The energy consumption evaluation model is provided with two input interfaces, and the input interfaces include a feature vector interface and a load label interface;
[0031] The feature vector interface is used to receive the structured feature set FV, representing the response features of the gate control behavior in the current cycle;
[0032] The load label interface is used to receive the load label LT as the basis for selecting the loss function path;
[0033] When the input interface receives data, the energy consumption evaluation model executes a pre-constructed multi-factor loss estimation function, performs weight combination and behavior fitting on each parameter factor input into the feature vector interface, and outputs the loss evaluation value in the current working cycle, marked as the instantaneous switching loss estimation LE.
[0034] Preferably, the S4 includes S41;
[0035] S41. Fuse and process the switch loss estimation value LE and the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE;
[0036] The fusion process calculates by using the maximum recognition confidence value CM as the correction weight of the switch loss estimation value L to obtain the corrected switch loss estimation value L, marked as the comprehensive state evaluation index SSE;
[0037] Among them, the maximum recognition confidence value CM is obtained based on the maximum value output by the charge behavior recognition model in the different types of loads.
[0038] Preferably, the S5 includes S51;
[0039] S51. Compare the comprehensive state evaluation index SSE with the preset state evaluation threshold TE, and judge and enter the drive control strategy adjustment process according to the comparison result to generate a drive strategy adjustment instruction set DCS;
[0040] The drive control strategy adjustment process is judged to enter through the following comparison results:
[0041] When the comprehensive state evaluation index SSE < the state evaluation threshold TE, it is obtained that the current control state is normal, and the original drive control strategy adjustment process is not adjusted;
[0042] When the comprehensive state evaluation index SSE ≥ the state evaluation threshold TE, it is obtained that the current control state is abnormal, indicating that there are problems with the loss and recognition credibility of the current drive control strategy, and the original drive control strategy adjustment process is adjusted. The adjustment includes the gate drive voltage correction value, the PWM drive signal rise and fall edge timing adjustment parameter, the PWM duty cycle and frequency fine-tuning amount, the soft start delay adjustment amount, and the control pulse edge filtering strategy switching flag.
[0043] Preferably, the S6 includes S61;
[0044] S61. Apply the generated drive strategy adjustment instruction set DCS, re-collect the gate charge behavior data to form a new parameter set RPSN, extract a new feature vector FVN, obtain a differential feature vector DV by comparing the difference between the structured feature set FV and the feature vector FVN, and then perform iterative optimization according to the differential feature vector DV;
[0045] When the differential feature vector DV shows a positive trend, it indicates that the drive strategy adjustment instruction set DCS is effective, and the drive strategy adjustment instruction set DCS is recorded as an effective parameter configuration;
[0046] When the differential feature vector DV shows a negative trend, it indicates that the drive strategy adjustment instruction set DCS is ineffective, and the drive strategy adjustment instruction set DCS is not recorded as an effective parameter configuration, and S1 to S5 are continued to be executed for iterative optimization.
[0047] The present invention provides a method for evaluating the switching loss of a field effect transistor based on gate charge analysis, which has the following beneficial effects:
[0048] (1) By collecting the voltage curve Vg(t) and the charge accumulation curve Qg(t) on the gate side of the field effect transistor, an original parameter data set RPS is constructed, and on this basis, a structured feature set FV that can reflect the change characteristics of different load attributes is extracted, thus avoiding the identification interference problem caused by the output side fluctuation. In addition, by constructing a charge behavior recognition model, the load label LT can be quickly determined, and combined with the maximum recognition confidence value CM and the switching loss estimation value LE output by the model, a comprehensive state evaluation index SSE is generated. The synergistic relationship between the recognition credibility and the actual energy consumption can be dynamically sensed before the strategy is executed, improving the sensitivity and robustness of the strategy decision-making. When the comprehensive state evaluation index SSE exceeds the preset state evaluation threshold TE, the system can trigger the drive strategy adjustment instruction set DCS, and after execution, the gate response is collected again to generate a new parameter set RPSN and a new feature vector FVN. By constructing a differential feature vector DV, the quantitative evaluation and iterative optimization of the strategy effect are realized, effectively solving the problems that the control strategy in the traditional method cannot adapt to the load change and is difficult to quantitatively feedback and optimize, realizing an information-driven control mechanism based on gate charge analysis, and establishing a strategy optimization decision-making process based on the feature vector difference, significantly improving the dynamic adaptation ability and energy efficiency management ability of the system under different loads and different working conditions, and having the comprehensive technical advantages of high real-time performance, high recognition performance and high stability.
[0049] (2)By collecting the gate voltage curve Vg(t) and the charge accumulation curve Qg(t), a gate signal time series GSTS is constructed, enabling the system to record the entire process of control behavior in a unified structured timing format, with time-domain continuity and historical traceability. This time series is not only used for current evaluation but also for multi-cycle behavior trend comparison and modeling analysis. On this basis, by extracting key influencing parameters including the rise time Trise, fall time Tfall, average charge change rate davg of the gate voltage, and the charge response change amount Zeta under the threshold perturbation interval, and integrating them into the original parameter dataset RPS, it is possible to reflect the true response state of the MOSFET to the drive signal only through the gate terminal signal behavior of the MOSFET without opening an external sampling probe or modifying the hardware structure, realizing a low-intrusion, high-resolution, behavior-modeling-oriented control state construction mechanism, which is particularly suitable for working scenarios where the device response ability degrades, the load changes frequently, or the control lag risk is high during actual operation. Therefore, it not only realizes the in-situ acquisition and structural reconstruction of the MOSFET switching behavior but also lays the key data foundation for subsequent processes such as feature extraction, load discrimination, and strategy adaptation of the system, and is particularly suitable for applications in embedded, space-constrained, or high-real-time-requirement power electronic control systems.
[0050] (3)By performing targeted mapping processing on the key dynamic behavior parameters in the original parameter dataset RPS, a three-factor feature set including the average charge response rate factor Alpha1, charge perturbation response magnification factor Alpha2, and charge response stability factor Alpha3 is constructed, enabling the expression of load behavior differences in a more discriminative structural manner. Compared with the traditional method of using a single time or voltage boundary parameter as the discrimination basis, the constructed factor system has stronger dynamic information dimension analysis ability and physical behavior interpretability, can reflect the essential response characteristics closely related to load coupling in the MOSFET drive behavior, realizes the ordered compressed expression of the original response characteristics, and also enables the subsequent recognition model to more accurately distinguish different load types in the high-dimensional feature space, especially suitable for multi-source response recognition in complex load mixing scenarios, providing a more reliable basic input for subsequent recognition accuracy, loss calculation accuracy, and control strategy adaptability.
[0051] (4) By constructing a comprehensive state evaluation index SSE based on the fusion of energy consumption estimation and recognition confidence, and using the comparison result between the comprehensive state evaluation index SSE and the preset state evaluation threshold TE as the basis for policy decision-making, the system is equipped with dynamic state perception and quantitative judgment capabilities during the control strategy adaptation process. The comprehensive state evaluation index SSE formed by fusing the switch loss estimation LE and the maximum recognition confidence value CM output by the charge behavior recognition model can not only reflect the current energy efficiency level of the device but also quantify the credibility of the recognition result, ensuring that the subsequent control strategy judgment is not only based on energy consumption performance but also fully considers the stability of the decision-making basis. Brief Description of the Drawings
[0052] Figure 1 It is a schematic diagram of the steps of the field effect transistor switch loss evaluation method based on gate charge analysis of the present invention;
[0053] Figure 2 It is a schematic diagram of the comparison of three-factor eigenvalue under different load types;
[0054] Figure 3 It is a schematic diagram of the change trend of each dimension of the differential feature vector DV during the policy iteration process. Detailed Embodiment
[0055] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0056] Embodiment 1
[0057] The present invention provides a field effect transistor switch loss evaluation method based on gate charge analysis. Please refer to Figure 1 , including the following steps:
[0058] S1. Collect the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) that change with time during the switch operation from the gate drive channel of the MOSFET, calculate the charge response parameters, and then form the original parameter data set RPS together with the charge response change amount Zeta obtained within the perturbation range of the gate conduction critical point;
[0059] S2. Based on the original parameter data set RPS, extract the feature vector set reflecting different load attribute changes to form the structured feature set FV;
[0060] S3. Based on the structured feature set FV, establish a charge behavior recognition model to identify the load type, output the load tag LT under the task, and calculate the instantaneous switching loss estimate LE through a multi-factor function;
[0061] S4. Fuse the switching loss estimate LE and the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE;
[0062] S5. Compare the comprehensive state evaluation index SSE with a preset state evaluation threshold TE, and make a judgment according to the comparison result to enter the drive control strategy adjustment process, and generate a drive strategy adjustment instruction set DCS;
[0063] S6. Apply the generated drive strategy adjustment instruction set DCS, re-collect the gate charge behavior data, form a new parameter set RPSN, extract a new feature vector FVN, obtain a differential feature vector DV, and then perform iterative optimization according to the differential feature vector DV.
[0064] In this embodiment, by collecting the voltage curve Vg(t) and the charge accumulation curve Qg(t) on the gate side of the field effect transistor, an original parameter data set RPS is constructed, and on this basis, a structured feature set FV that can reflect the change characteristics of different load attributes is extracted, thus avoiding the recognition interference problem caused by output side fluctuations. In addition, by constructing a charge behavior recognition model, the rapid determination of the load tag LT is realized, and combined with the maximum recognition confidence value CM and the switching loss estimate LE output by the model, a comprehensive state evaluation index SSE is generated, and the synergistic relationship between the recognition credibility and the actual energy consumption can be dynamically sensed before the strategy is executed, improving the sensitivity and robustness of the strategy decision-making. When the comprehensive state evaluation index SSE exceeds the preset state evaluation threshold TE, the system can trigger the drive strategy adjustment instruction set DCS, and re-collect the gate response after execution to generate a new parameter set RPSN and a new feature vector FVN, and realize the quantitative evaluation and iterative optimization of the strategy effect by constructing a differential feature vector DV, effectively solving the problems that the control strategy in the traditional method cannot adapt to load changes and is difficult to quantitatively feedback and optimize.
[0065] Therefore, not only an information-driven control mechanism based on gate charge analysis is realized, but also a strategy optimization determination process based on the difference of feature vectors is established, significantly improving the dynamic adaptation ability and energy efficiency management and control ability of the system under different loads and different working conditions, and having comprehensive technical advantages of high real-time performance, high recognition performance and high stability.
[0066] Embodiment 2
[0067] This embodiment is an explanatory description based on Embodiment 1. Please refer to Figure 1, specifically: S1 includes S11;
[0068] S11. During the normal operating cycle of the MOSFET, by collecting the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) that change with time during the switching operation from the gate drive channel of the MOSFET, and recording the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) as a structured timing vector to form a gate signal time series GSTS, and synchronously storing the gate signal time series GSTS as stored historical data;
[0069] The gate signal time series GSTS is specifically GSTS = {(t, VG(t), Qg(t))|t ∈ [tstart, tend]}, where t represents the sampling time, and tstart and tend represent the sampling start time and the sampling end time respectively.
[0070] S1 includes S12. Processing the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) to extract influence parameters reflecting the dynamic characteristics of the switching behavior. The influence parameters include the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg of the gate charge in the effective drive interval, and the charge response change amount Zeta at the perturbation point near the gate conduction threshold;
[0071] Integrating the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg, and the charge response change amount Zeta to obtain an original parameter data set RPS and storing it as historical data;
[0072] Among them, the rise time Trise of the gate voltage reflects the gate drive speed during the turn-on process of the MOSFET. The shorter the time, the faster the response;
[0073] The fall time Tfall of the gate voltage reflects the voltage fall edge during the turn-off process of the MOSFET. The shorter the time, the faster the response;
[0074] The average change rate davg reflects the average growth rate of the gate charge in the effective charging interval and indirectly reflects the response ability of the gate to the drive;
[0075] The charge response change amount Zeta reflects the sensitive response ability to the gate charging rate near the threshold and is used to evaluate the dynamic response factor of the load type difference.
[0076] In this embodiment, by collecting the gate voltage curve Vg(t) and the charge accumulation curve Qg(t), a gate signal time series GSTS is constructed, enabling the system to record the entire process of control behavior in a unified structured timing format, with time-domain continuity and historical traceability. This time series is not only used for current evaluation but also for multi-cycle behavior trend comparison and modeling analysis. On this basis, by extracting key influencing parameters including the rise time Trise, fall time Tfall, average charge change rate davg of the gate voltage, and the charge response change amount Zeta under the threshold perturbation interval, and integrating them into the original parameter dataset RPS, it is possible to reflect the true response state of the MOSFET to the drive signal only through the gate terminal signal behavior of the MOSFET without opening an external sampling probe or modifying the hardware structure, realizing a low-intrusion, high-resolution, behavior-modeling-oriented control state construction mechanism, which is particularly suitable for working scenarios with device response ability degradation, frequent load changes, or high control lag risk during actual operation. Therefore, it not only realizes in-situ acquisition and structural reconstruction of the MOSFET switching behavior but also lays the key data foundation for subsequent processes such as feature extraction, load discrimination, and strategy adaptation of the system, and is particularly suitable for applications in power electronic control systems with embedded, space-constrained, or high real-time requirements.
[0077] Embodiment 3
[0078] This embodiment is an explanatory description based on Embodiment 1. Please refer to Figure 1 and Figure 2 , specifically: S2 includes S21;
[0079] S21. Based on the rise time Trise, fall time Tfall, average change rate davg, and charge response change amount Zeta of the gate voltage in the original parameter dataset RPS, the original parameter dataset RPS is obtained, and after mapping processing, a response factor is constructed. The response factor includes an average charge response rate factor Alpha1, a charge perturbation response magnification factor Alpha2, and a charge response stability factor Alpha3;
[0080] The average charge response rate factor Alpha1 is used to reflect the average change rate of the gate charge over time when the gate voltage is in the effective rising region. When constructing the average charge response rate factor Alpha1, the boundary points of the rising section of the gate voltage are determined, and the change amount of the charge value and the time used are extracted within this interval to form the acquisition of the average charge response rate parameter. The larger this parameter is, the faster the device's turn-on response, and the smaller the inertia of the load to the drive response. It is usually used to identify resistive or low-inductance loads;
[0081] The charge perturbation response magnification factor Alpha2 is used to measure the response ability of the system to the charge change rate of a small voltage perturbation when the gate voltage is close to the turn-on threshold. When constructing the average charge response rate factor Alpha1, the change trends of the gate charge are extracted in two adjacent regions near the turn-on threshold voltage (one preset perturbation amount higher and lower than the threshold respectively), and the difference between the two is calculated to obtain it. The larger this value is, the more non-linear amplification characteristics the device exhibits near the threshold point, which is often associated with inductive loads, energy storage devices, or high-voltage feedback paths;
[0082] The charge response stability factor Alpha3 is used to measure the stability of the gate charge response process within the effective working range. In the entire range from the start to the saturation stage of the gate voltage, the gate charge curve is extracted, and the ratio between the fluctuation degree of the charge change and the average trend in this section of the curve is calculated to obtain it. If the value of this factor is large, it indicates that there are jitters, oscillations, or unstable characteristics caused by load feedback during the response process, which are common in capacitive loads or composite loads with stray coupling.
[0083] The S2 includes S22, a feature vector that reflects the changes in different load attributes based on the obtained average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3, and forms a structured feature set FV by integrating the average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3;
[0084] The structured feature set FV is specifically FV = {Alpha1, Alpha2, Alpha3}.
[0085] In this embodiment, by performing targeted mapping processing on the key dynamic behavior parameters in the original parameter dataset RPS, a three-factor feature set including the average charge response rate factor Alpha1, the charge perturbation response magnification factor Alpha2, and the charge response stability factor Alpha3 is constructed, enabling the expression of load behavior differences in a more discriminative structural manner. Compared with the traditional method that uses a single time or voltage boundary parameter as the discrimination basis, the constructed factor system has stronger dynamic information dimension analysis ability and physical behavior interpretability, and can reflect the essential response characteristics closely related to load coupling in the MOSFET driving behavior. Among them, the average charge response rate factor Alpha1 can quantitatively measure the charge driving rate during conduction, the charge perturbation response magnification factor Alpha2 can reveal the non-linear gain characteristics of the device in the threshold perturbation region, and the charge response stability factor Alpha3 is used to reflect the consistency and stability during the charge charging and discharging process. By integrating these three factors to form a structured feature set FV, not only the orderly compression expression of the original response characteristics is realized, but also the subsequent recognition model can more accurately distinguish different load types in the high-dimensional feature space, especially suitable for multi-source response recognition in complex load mixing scenarios, providing a more reliable basic input for subsequent recognition accuracy, loss calculation accuracy, and control strategy adaptability.
[0086] Embodiment 4
[0087] This embodiment is an explanatory description carried out in Embodiment 3. Please refer to Figure 1 , specifically: S3 includes S31;
[0088] S31. Based on the structured feature set FV, input it into the pre-established charge behavior recognition model for recognition and inference. The charge behavior recognition model is a feature judgment logic based on a preset load sample library, used to reflect the distribution laws of different types of loads on the three features in the structured feature set FV, record the similarity between the load samples and each feature in the structured feature set FV, and then determine the load type recognition result of the current cycle according to the similarity and mark it as the load label LT;
[0089] Among them, during the process of recognition and inference in the charge behavior recognition model, according to each feature in the structured feature set FV, determine the load type to which each feature in the structured feature set FV belongs according to the feature space distribution obtained from the predefined classification boundary in the charge behavior recognition model;
[0090] The different types of loads include inductive loads, capacitive loads, and resistive loads;
[0091] The load tag LT includes a resistive type Resistive, an inductive type Inductive, and a capacitive type Capacitive.
[0092] S3 includes S32, which calls a built-in energy consumption evaluation model based on the obtained load tag LT and the structured feature set FV. The energy consumption evaluation model is a set of energy consumption estimation algorithms constructed based on empirical data and switching behavior rules, and is used to judge the typical on and off loss levels of the field effect transistor under specific load characteristic conditions;
[0093] The energy consumption evaluation model is provided with two input interfaces, and the input interfaces include a feature vector interface and a load tag interface;
[0094] The feature vector interface is used to receive the structured feature set FV, representing the response features of the gate control behavior in the current cycle;
[0095] The load tag interface is used to receive the load tag LT as the basis for selecting the loss function path;
[0096] After the input interface receives the data, the energy consumption evaluation model executes a pre-constructed multi-factor loss estimation function, performs weight combination and behavior fitting on each parameter factor input into the feature vector interface, and outputs the loss evaluation value in the current working cycle, marked as the instantaneous switching loss estimate LE.
[0097] In this embodiment, by inputting the structured feature set FV into a pre-established charge behavior recognition model for recognition and inference, the system can complete the automatic classification and judgment of the actual load attributes in the current cycle based on the statistical distribution characteristics of different types of loads in the three-dimensional feature space in the load sample library. Compared with the traditional load recognition method that uses current waveforms or voltage gradients for threshold judgment, this step realizes a non-linear recognition mechanism based on the distribution law of the feature space by calculating the similarity between each feature parameter in the structured feature set FV and the load sample set, effectively improving the ability to distinguish the subtle behavior differences between inductive loads, capacitive loads, and resistive loads. Further, by combining the recognized load label LT with the structured feature set FV and invoking the built-in energy consumption evaluation model, it is possible to execute a multi-factor loss estimation function based on the coupling relationship between specific load attributes and behavior characteristics, and output the instantaneous switching loss estimate LE of the current working cycle. This evaluation mechanism not only considers the self-response characteristics of the control behavior but also integrates the recognized load feature path, realizing an energy loss evaluation method that models by type branches, thus significantly improving the adaptability and accuracy of loss prediction. Through the series application of this double-layer model structure, while achieving high-accuracy load recognition, it is possible to construct a dynamic perception ability of the actual loss level under the current control conditions, providing a directly quantifiable input data basis for subsequent state evaluation and strategy matching.
[0098] Embodiment 5
[0099] This embodiment is an explanatory description based on Embodiment 4. Please refer to Figure 1 and Figure 3 , specifically: S4 includes S41;
[0100] S41. Perform fusion processing on the switching loss estimate LE and the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE;
[0101] The fusion processing is calculated by using the maximum recognition confidence value CM as the correction weight of the switching loss estimate L to obtain the corrected switching loss estimate L, denoted as the comprehensive state evaluation index SSE;
[0102] Among them, the maximum recognition confidence value CM is obtained based on the maximum value among the outputs of different types of loads by the charge behavior recognition model.
[0103] S5 includes S51;
[0104] S51. Compare the comprehensive state evaluation index SSE with a preset state evaluation threshold TE, and make a judgment according to the comparison result to enter the drive control strategy adjustment process, and generate a drive strategy adjustment instruction set DCS;
[0105] The driving control strategy adjustment process is judged to enter through the following comparison results:
[0106] When the comprehensive state evaluation index SSE < the state evaluation threshold TE, it is obtained that the current control state is normal, and the original driving control strategy adjustment process is not adjusted;
[0107] When the comprehensive state evaluation index SSE ≥ the state evaluation threshold TE, it is obtained that the current control state is abnormal, indicating that there are losses in the current driving control strategy and problems with the recognition credibility. The original driving control strategy adjustment process is adjusted. The adjustments include the correction value of the gate driving voltage, the rising and falling edge timing adjustment parameters of the PWM driving signal, the fine-tuning amounts of the PWM duty cycle and frequency, the soft start delay adjustment amount, and the control pulse edge filtering strategy switching flag.
[0108] The S6 includes S61;
[0109] S61. Apply the generated driving strategy adjustment instruction set DCS, and re-collect the gate charge behavior data to form a new parameter set RPSN, extract a new feature vector FVN. By comparing the difference between the structured feature set FV and the feature vector FVN, obtain the differential feature vector DV, and then perform iterative optimization according to the differential feature vector DV;
[0110] When the differential feature vector DV is in a positive trend, it indicates that the driving strategy adjustment instruction set DCS is effective, and record the driving strategy adjustment instruction set DCS as the effective parameter configuration;
[0111] When the differential feature vector DV is in a negative trend, it indicates that the driving strategy adjustment instruction set DCS is invalid, and do not record the driving strategy adjustment instruction set DCS as the effective parameter configuration, and continue to execute S1 to S5 for iterative optimization.
[0112] In this embodiment, by constructing a comprehensive state evaluation index SSE based on the fusion of energy consumption estimation and recognition confidence, and using the comparison result of the comprehensive state evaluation index SSE and the preset state evaluation threshold TE as the policy decision basis, the system has the ability of dynamic state perception and quantitative judgment in the process of control strategy adaptation. The comprehensive state evaluation index SSE formed by fusing the switch loss estimation LE and the maximum recognition confidence value CM output by the charge behavior recognition model can not only reflect the current energy efficiency level of the device, but also quantify the credibility of the recognition result, ensuring that the subsequent control strategy judgment is not only based on the energy consumption performance, but also fully considers the stability of the decision-making basis.
[0113] When the comprehensive state evaluation index SSE is higher than the state evaluation threshold TE, a drive policy adjustment instruction set DCS is generated according to the set policy adjustment process, covering key drive control parameters such as the correction value of the gate drive voltage, the adjustment parameters of the rising and falling edge timings of the PWM drive signal, the fine-tuning amounts of the PWM duty cycle and frequency, the adjustment amount of the soft start delay, and the switching flag of the control pulse edge filtering strategy, etc., to achieve multi-dimensional linkage correction of the control behavior. By re-collecting the charge behavior data after the control policy adjustment, the feature vector FVN is extracted, and the differential feature vector DV is constructed with the historical feature set FV. According to the trend of DV, it is judged whether the current policy achieves the optimization goal, so as to realize the self-feedback verification of the effectiveness of the control policy. This mechanism not only endows the system with the ability of self-evaluation and policy screening after the policy execution, but also enables the control policy to automatically adapt to different load environments and dynamically iterate and update during long-term operation, significantly enhancing the stability, self-recovery and adjustment flexibility of the control system in multi-state disturbance scenarios.
[0114] Although the embodiments of the present invention have been shown and described, those of ordinary skill in the art can understand that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principles and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. A method for evaluating switching loss of a field effect tube based on gate charge analysis, characterized in that: The following steps are involved: S1. Collect the gate voltage curve Vg(t) and charge accumulation curve Qg(t) that change with time during the switching operation from the gate drive channel of the MOSFET, calculate the charge response parameter, and then obtain the charge response change Zeta within the gate turn-on critical point disturbance range to form the original parameter data set RPS; S2. Based on the original parameter data set RPS, extract a set of feature vectors reflecting changes in different load attributes to form a structured feature set FV; S3. Based on the structured feature set FV, a charge behavior recognition model is established to identify the load type, output the load label LT under the task, and calculate the instantaneous switching loss estimate LE through a multi-factor function; S4, fusing the switch loss estimate LE with the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE; S5, comparing the comprehensive state evaluation index SSE with the preset state evaluation threshold TE, and judging according to the comparison result to enter the drive control strategy adjustment process, and generating a drive strategy adjustment instruction set DCS; S6. Apply the generated drive strategy adjustment instruction set DCS, re-collect gate charge behavior data, form a new parameter set RPSN, extract a new feature vector FVN, obtain a differential feature vector DV, and then perform iterative optimization based on the differential feature vector DV.
2. The method for evaluating switching loss of a field effect tube based on gate charge analysis according to claim 1, characterized in that: Said S1 includes S11; S11, during the normal working cycle of the field effect transistor MOSFET, by collecting the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) that change with time during the switching operation from the gate drive channel of the field effect transistor MOSFET, and recording the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) in a structured timing vector to form a gate signal time series GSTS, and synchronously storing the gate signal time series GSTS as stored historical data; The gate signal time series GSTS is specifically GSTS={(t, VG(t), Qg(t))|t∈[tstart, tend]}, wherein t represents the sampling time, tstart and tend represent the sampling start time and the sampling end time respectively.
3. The method for evaluating switching loss of a field effect tube based on gate charge analysis according to claim 2, characterized in that: Said S1 includes S12; S12, processing the gate voltage curve Vg(t) and the charge accumulation curve Qg(t) to extract influencing parameters reflecting the dynamic characteristics of the switching behavior, wherein the influencing parameters include the rising time Trise of the gate voltage, the falling time Tfall of the gate voltage, the average change rate davg of the gate charge in the effective driving interval, and the charge response change Zeta at the disturbance point near the gate conduction threshold; The rising time Trise of the gate voltage, the falling time Tfall of the gate voltage, the average change rate davg and the charge response change Zeta are integrated to obtain an original parameter data set RPS, and store it as historical data.
4. The method for evaluating switching loss of a field effect tube based on gate charge analysis according to claim 3, characterized in that: Said S2 includes S21; S21, based on the rise time Trise of the gate voltage, the fall time Tfall of the gate voltage, the average change rate davg and the charge response change Zeta in the original parameter data set RPS, the original parameter data set RPS is obtained, and a response factor is constructed after mapping processing, wherein the response factor includes an average charge response rate factor Alpha1, a charge disturbance response amplification factor Alpha2 and a charge response stability factor Alpha3; The average charge response rate factor Alpha1 is used to reflect the average rate of change of the gate charge over time when the gate voltage is in the effective rising region. When constructing the average charge response rate factor Alpha1, the boundary point of the gate voltage rising section is determined, and the change amount and the time used in the charge value are extracted within the interval to form the average charge response rate parameter acquisition; The charge disturbance response magnification factor Alpha2 is used to measure the system's charge change rate response capability to a small voltage disturbance when the gate voltage is close to the conduction threshold. When constructing the average charge response rate factor Alpha1, the gate charge change trend is extracted in two adjacent areas near the conduction threshold voltage, and the difference between the two is calculated to obtain the value; The charge response stability factor Alpha3 is used to measure the stability of the gate charge response process in the effective working range. In the entire interval from the initial rise of the gate voltage to the saturation stage, the gate charge curve is extracted and the ratio between the fluctuation degree of the charge change in this curve and the average trend is calculated to obtain it.
5. The method for evaluating switching loss of a field effect transistor based on gate charge analysis according to claim 4, characterized in that: The S2 includes S22; S22, based on the acquired feature vectors of the average charge response rate factor Alpha1, the charge disturbance response magnification factor Alpha2 and the charge response stability factor Alpha3 reflecting the changes in different load attributes, and by integrating the average charge response rate factor Alpha1, the charge disturbance response magnification factor Alpha2 and the charge response stability factor Alpha3, a structured feature set FV is formed; The structured feature set FV is specifically FV={Alpha1, Alpha2, Alpha3}.
6. The method for evaluating switching loss of a field effect tube based on gate charge analysis according to claim 1, characterized in that: The S3 includes S31; S31, based on the structured feature set FV, input into a pre-established charge behavior recognition model for recognition reasoning, the charge behavior recognition model is based on a set of feature judgment logics built based on a preset load sample library, used to reflect the distribution law of different types of loads on the three features in the structured feature set FV, and record the similarity between the load sample and each feature in the structured feature set FV, and then judge and allocate the load type recognition result of the current cycle based on the similarity, marked as the load label LT; In the process of identification and reasoning in the charge behavior recognition model, the load type to which each feature in the structured feature set FV belongs is determined according to the feature space distribution obtained by the classification boundary predefined in the charge behavior recognition model and each feature in the structured feature set FV; The different types of loads include inductive loads, capacitive loads and resistive loads; The load tags LT include inductive type, capacitive type and resistive type.
7. The method for evaluating switching loss of a field effect transistor based on gate charge analysis according to claim 6, characterized in that: The S3 includes S32; S32, based on the obtained load tag LT and the structured feature set FV, calling a built-in energy consumption evaluation model, wherein the energy consumption evaluation model is a set of energy consumption estimation algorithms constructed based on empirical data and switch behavior rules, and is used to determine the typical turn-on and turn-off loss levels of the field effect tube under specific load characteristic conditions; The energy consumption assessment model is provided with two input interfaces, which include a feature vector interface and a load label interface; The feature vector interface is used to receive the structured feature set FV, representing the response characteristics of the gate control behavior of the current cycle; The load label interface is used to receive the load label LT as a basis for loss function path selection; When the input interface receives data, the energy consumption assessment model executes a pre-built multi-factor loss estimation function, performs weight combination and behavior fitting on each parameter factor input into the feature vector interface, and outputs the loss assessment value under the current working cycle, which is marked as the instantaneous switching loss estimate LE.
8. The method for evaluating switching loss of a field effect tube based on gate charge analysis according to claim 7, characterized in that: The S4 includes S41; S41, fusing the switch loss estimate LE with the maximum recognition confidence value CM output by the charge behavior recognition model to generate a comprehensive state evaluation index SSE; The fusion process calculates the maximum recognition confidence value CM as a correction weight of the switching loss estimate L to obtain a corrected switching loss estimate L, which is marked as a comprehensive state evaluation indicator SSE; The maximum recognition confidence value CM is obtained based on the maximum value among the different types of loads output by the charge behavior recognition model.
9. The method for evaluating switching loss of a field effect transistor based on gate charge analysis according to claim 1, characterized in that: The S5 includes S51; S51, comparing the comprehensive state evaluation index SSE with a preset state evaluation threshold TE, and judging to enter the drive control strategy adjustment process according to the comparison result, and generating a drive strategy adjustment instruction set DCS; The drive control strategy adjustment process is entered by judging the following comparison results: When the comprehensive state evaluation index SSE is less than the state evaluation threshold TE, the current control state is obtained to be normal, and the original drive control strategy adjustment process is not adjusted; When the comprehensive state evaluation index SSE ≥ the state evaluation threshold TE, the current control state is abnormal, indicating that the current drive control strategy has losses and problems with the recognition credibility. The original drive control strategy adjustment process is adjusted, and the adjustment includes the gate drive voltage correction value, the PWM drive signal rising and falling edge timing adjustment parameters, the PWM duty cycle and frequency fine-tuning amount, the soft start delay adjustment amount and the control pulse edge filtering strategy switching flag.
10. The method for evaluating switching loss of a field effect transistor based on gate charge analysis according to claim 1, characterized in that: The S6 includes S61; S61, applying the generated drive strategy adjustment instruction set DCS, and re-collecting gate charge behavior data to form a new parameter set RPSN, extracting a new feature vector FVN, and obtaining a differential feature vector DV by comparing the difference between the structured feature set FV and the feature vector FVN, and then performing iterative optimization according to the differential feature vector DV; When the differential characteristic vector DV is in a positive trend, it indicates that the driving strategy adjustment instruction set DCS is valid, and the driving strategy adjustment instruction set DCS is recorded as a valid parameter configuration; When the differential characteristic vector DV shows a negative trend, it indicates that the driving strategy adjustment instruction set DCS is invalid, and the driving strategy adjustment instruction set DCS is not recorded as a valid parameter configuration, and S1 to S5 are continued to be executed for iterative optimization.
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