Automatic test point generation method

Abstract

The invention discloses an automatic test point generation method, which comprises the following steps of: obtaining a netlist file which is used for storing chip test data; reading a plurality of chip configuration data sets from the netlist file according to a preset key data reading rule; performing data processing on the plurality of chip configuration data sets by using a preset data processing rule to obtain a candidate chip test data set, the candidate chip test data including a candidate chip identifier and corresponding candidate test node data; determining a to-be-tested chip identifier; based on the to-be-tested chip identifier, extracting candidate chip test data matched with the to-be-tested chip identifier from the candidate chip test data set as target chip test data; and generating to-be-tested node data corresponding to the to-be-tested chip identifier according to the target chip test data. An accurate to-be-tested node can be automatically generated.

Description

Technical Field

[0001] This application belongs to the technical field of chip testing, and particularly relates to a method for automatically generating test points. Background Art

[0002] During the chip testing process, it is usually necessary to write test cases to clarify the test points. For example, determine the naming and quantity of the worksheets (sheets) of the test case table (Excel) according to the pagination of the hardware schematic diagram, and then write the test items and test execution guidance and instructions in each test case sheet according to the hardware requirements document; finally, fill in the corresponding test points in the test case Excel according to the hardware schematic diagram.

[0003] The existing method for writing test cases requires the hardware test planning engineer to combine the network names, test (Test Point, TP) points or debug (Debug Point) points in the schematic diagram one by one and then fill them into the table. This way of manually searching for test points and filling them into the table consumes a lot of manpower and time, and there is a risk of omission and error. As a result, the hardware test execution engineer cannot test the correct points, and the test item cannot pass. Summary of the Invention

[0004] The embodiments of this application provide a method for automatically generating test points, which can automatically generate accurate test points during the chip testing process.

[0005] In a first aspect, the embodiments of this application provide a method for automatically generating test points, and the method includes:

[0006] Obtain a netlist file, where the netlist file is used to store chip test data;

[0007] Read out a plurality of chip configuration data sets from the netlist file according to a preset key data reading rule, and the chip configuration data sets include initial chip identifiers and chip test data;

[0008] Use a preset data processing rule to process the plurality of chip configuration data sets to obtain a candidate chip test data set, and the candidate chip test data set includes candidate chip test data, and the candidate chip test data includes candidate chip identifiers and corresponding candidate test node data;

[0009] Determine the chip identifier to be tested;

[0010] Based on the chip identifier to be tested, extract the candidate chip test data that matches the chip identifier to be tested from the candidate chip test data set as the target chip test data;

[0011] Generate the to-be-tested node data corresponding to the to-be-tested chip identifier according to the target chip test data.

[0012] In a second aspect, an embodiment of the present application provides a test point automatic generation device, which includes:

[0013] An acquisition module, configured to acquire a netlist file, where the netlist file is used to store chip test data;

[0014] A processing module, configured to read out a plurality of chip configuration data sets from the netlist file according to a preset key data reading rule, where the chip configuration data sets include initial chip identifiers and chip test data;

[0015] The processing module is further configured to perform data processing on the plurality of chip configuration data sets by using a preset data processing rule to obtain a candidate chip test data set, where the candidate chip test data set includes candidate chip test data, and the candidate chip test data includes candidate chip identifiers and corresponding candidate test node data;

[0016] The processing module is further configured to determine a chip identifier to be tested;

[0017] The processing module is further configured to, based on the chip identifier to be tested, extract candidate chip test data that matches the chip identifier to be tested from the candidate chip test data set as target chip test data;

[0018] A generation module, configured to generate test node data corresponding to the chip identifier to be tested according to the target chip test data.

[0019] In a third aspect, an embodiment of the present application provides a test point automatic generation device, which includes: a processor and a memory storing computer program instructions; when the processor executes the computer program instructions, the above-mentioned test point automatic generation method is implemented.

[0020] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, the above-mentioned test point automatic generation method is implemented.

[0021] In a fifth aspect, an embodiment of the present application provides a computer program product, and when the instructions in the computer program product are executed by a processor of an electronic device, the electronic device is enabled to execute the above-mentioned test point automatic generation method.

[0022] In the embodiments of the present application, by obtaining the connection information and groups of devices recorded in the netlist file, the chip test data required for testing can be accurately located; according to the preset key data reading rules, multiple chip configuration data sets are read from the netlist file, and the data in the netlist is converted into a configuration data set that can be further processed, providing an accurate data basis to ensure the accuracy and integrity of the data extracted subsequently; using the preset data processing rules to process the multiple chip configuration data sets to obtain a candidate chip test data set, processing, screening, and transforming the extracted configuration data to form a candidate chip test data set can effectively remove invalid and redundant data, streamline the data range of the data to be tested, avoid processing unnecessary data, thereby optimizing the test work efficiency and improving the accuracy of the final nodes to be tested; according to the determined chip identification to be tested, the candidate chip test data matching the chip identification to be tested is extracted from the candidate chip test data set as the target chip test data, and the test node data corresponding to the chip identification to be tested is generated according to the target chip test data, which can accurately determine the test nodes corresponding to the chip identification to be tested, reduce manual operations and search time, avoid misoperations and data confusion, and can automatically generate accurate test nodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0024] Figure 1 is a flowchart of a method for automatically generating test points provided by an embodiment of the present application;

[0025] Figure 2 is a data processing flowchart provided by an embodiment of the present application;

[0026] Figure 3 is a data extraction flowchart provided by an embodiment of the present application;

[0027] Figure 4 is a schematic diagram of a user selection interface provided by an embodiment of the present application;

[0028] Figure 5 is a schematic diagram of an automatic mode interface provided by an embodiment of the present application;

[0029] Figure 6 is a schematic diagram of a semi-automatic mode interface provided by an embodiment of the present application;

[0030] Figure 7 is a flowchart of another method for automatically generating test points provided by an embodiment of the present application;

[0031] Figure 8 It is a schematic structural diagram of a test point automatic generation device provided by an embodiment of the present application;

[0032] Figure 9 It is a schematic structural diagram of a test point automatic generation device provided by an embodiment of the present application. Detailed implementation manners

[0033] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than limiting the present application. For those skilled in the art, the present application can be implemented without some of these specific details. The following description of the embodiments is only intended to provide a better understanding of the present application by showing examples of the present application.

[0034] It should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, elements defined by the statement "including..." do not exclude the presence of additional identical elements in the process, method, article or device including the said elements.

[0035] When writing test cases in the sensing solution, to find the corresponding test points, the hardware test planning engineer needs to combine the network names and TP points (or DP points) in the schematic diagram one by one and then fill them into the table. This way of manually finding test points and filling them into the table will consume a lot of manpower and time, and there is a risk of omission and error. As a result, the hardware test execution engineer cannot test the correct points, and the test item cannot pass.

[0036] To solve the problems of the prior art, embodiments of the present application provide a test point automatic generation method, device, equipment, computer storage medium and computer program product. First, the test point automatic generation method provided by the embodiments of the present application will be introduced below.

[0037] Figure 1 Shows a flowchart of a test point automatic generation method provided by an embodiment of the present application. AsFigure 1 As shown Figure 1 It includes the following steps S101 to S106.

[0038] S101. Obtain a netlist file.

[0039] The netlist file is used to store chip test data.

[0040] Generally speaking, the netlist file corresponds to the hardware schematic diagram in the chip test process, contains all the component information of the circuit (such as resistors, capacitors, transistors, etc.) and the connection information (i.e., networks) between these components, etc., and can be determined by analyzing the devices and the connection relationships between the devices in the hardware schematic diagram. It can also be understood that the netlist file is used to describe the components and their connection relationships in the circuit during the chip test process.

[0041] For example, the netlist file can be a component file (pstchip.dat), a network file (pstxnet.dat), and a port file (pstxprt.dat).

[0042] Among them, the component file can include the information of all components (or devices) in the circuit. For example, information such as device name, device pin number, and pin name.

[0043] The network file can include the information of all networks (i.e., connection lines) in the circuit. For example, the network name (the unique identifier of the network); the nodes on the network, that is, all the nodes connected to each network.

[0044] The port file can include information such as device reference designator and device name.

[0045] The device reference designator refers to the unique identifier of each device.

[0046] As an example rather than a limitation, the folder path for selecting the netlist file and the button for selecting the netlist file can be displayed on the user display interface. When the user selects and clicks this button, an interface for selecting files in the computer will pop up, and then the corresponding netlist file is selected. The file path and naming information will be displayed in the first line, facilitating the user to check whether the selection of the netlist file is correct.

[0047] S102. Read multiple chip configuration data sets from the netlist file according to a preset key data reading rule.

[0048] The chip configuration data set includes an initial chip identifier and chip test data.

[0049] The initial chip identifier is the unique identifier used to determine the location or identity of the chip to be tested.

[0050] Combined with the above, the initial chip identifier can be a unique identifier such as a network name or a chip pin name, etc.

[0051] The preset key data reading rule is used to find the data that matches the set key fields from the netlist file according to the preset key fields, that is, to obtain multiple chip configuration data sets.

[0052] The method of searching according to the key fields can be using regular expressions, string operations, searching using a database, etc. The specific searching method can be selected according to the actual situation and is not limited here.

[0053] The preset key fields are determined according to the identifiers corresponding to the data in the netlist file. That is to say, if you want to read network name data, you need to set the key fields to the identifiers corresponding to the network name data, such as "NET_NAME". Similarly, if you want to find other data, you only need to determine the identifier corresponding to that data.

[0054] S103. Use the preset data processing rule to process the multiple chip configuration data sets to obtain a candidate chip test data set.

[0055] The preset data processing rule is used to perform data screening, data splicing, and data cleaning on the above-mentioned multiple chip configuration data sets.

[0056] The candidate chip test data set includes candidate chip test data, and the candidate chip test data includes candidate chip identifiers and corresponding candidate test node data.

[0057] In one example, the preset data processing rule can include performing data screening on the multiple chip configuration data sets according to the set screening conditions, that is, extracting the data that meets the set conditions, which can also be understood as deleting the data that does not meet the set conditions.

[0058] For example, set a network name, keep the data that meets the network name, and delete the data that does not meet the network name.

[0059] In one example, the preset data processing rule can include performing data splicing on the multiple chip configuration data sets according to the common data, which can also be understood as splicing and integrating the data with the same data or matching data types to obtain the integrated data.

[0060] For example, splice the data with the same network name, and after processing, there will be only one piece of data for each network name.

[0061] In one example, the preset data processing rule can include cleaning the multiple chip configuration data sets according to the set cleaning conditions, keeping the data that meets the cleaning conditions, and deleting the data that does not meet the cleaning conditions.

[0062] For example, it is set that only one piece of data of the same type is retained, and the remaining data of the same type is deleted.

[0063] It can be understood that after the above processing process, the data set finally retained is the candidate chip test data set.

[0064] S104. Determine the identifier of the chip to be tested.

[0065] The identifier of the chip to be tested is a code or label used to uniquely identify and distinguish different chips to be tested. It can also be understood that the identifier of the chip to be tested is a unique identifier, and through the identifier of the chip to be tested, the corresponding test node of the chip to be tested can be accurately located.

[0066] The identifier of the chip to be tested can be a serial number, a batch number, or other unique encoding. The specific identifier of the chip to be tested can be selected according to the actual situation and is not limited here.

[0067] Combined with the above text, the identifier of the chip to be tested can be a unique identifier such as a network name or a chip pin name.

[0068] S105. Based on the identifier of the chip to be tested, extract the candidate chip test data that matches the identifier of the chip to be tested from the candidate chip test data set as the target chip test data.

[0069] It can be understood that through the data processing in step S103, a candidate chip test data set including various chip identifiers and candidate chip test data corresponding to various chip identifiers is obtained. According to the identifier of the chip to be tested, the candidate chip test data that is the same as or of the same data type as the identifier of the chip to be tested is extracted from the candidate chip test data set as the target chip test data.

[0070] Combined with the above text, the target chip test data can be extracted by using regular matching or database query. The specific search method is not limited here.

[0071] S106. Generate the test node data corresponding to the identifier of the chip to be tested according to the target chip test data.

[0072] The target chip test data includes the target chip identifier and the target test node data.

[0073] When the identifier of the chip to be tested matches the target chip identifier, the target test node data can be used to determine the test node data.

[0074] Among them, the test node data is used to generate test cases.

[0075] For example, the target test node data can be directly used as the data of the node to be tested.

[0076] For another example, when there are two or more pieces of target test node data, one can be selected from the two or more pieces of target test node data as the data of the node to be tested.

[0077] By obtaining the connection information and groups of the devices recorded in the netlist file, the chip test data required for testing can be accurately located; according to the preset key data reading rules, multiple chip configuration data sets are read from the netlist file, and the data in the netlist is converted into a configuration data set that can be further processed, providing an accurate data basis to ensure the accuracy and integrity of the subsequently extracted data; using the preset data processing rules to process the multiple chip configuration data sets to obtain a candidate chip test data set, processing, screening, and transforming the extracted configuration data to form a candidate chip test data set can effectively remove invalid and redundant data, streamline the data range of the data to be tested, avoid processing unnecessary data, thereby optimizing the test work efficiency and improving the accuracy of the final node to be tested; according to the determined chip identifier to be tested, the candidate chip test data matching the chip identifier to be tested is extracted from the candidate chip test data set as the target chip test data, and the data of the node to be tested corresponding to the chip identifier to be tested is generated according to the target chip test data, which can accurately determine the node to be tested corresponding to the chip identifier to be tested, reduce manual operation and search time, and avoid misoperation and data confusion.

[0078] In one implementation, the preset data processing rules include a preset screening rule and a preset cleaning rule; using the preset data processing rules to process the multiple chip configuration data sets to obtain a candidate chip test data set includes: screening and processing the multiple chip configuration data sets according to the preset screening rule to obtain a screened chip test data set, and the preset screening rule is used to delete the data corresponding to non-test nodes; when there are at least two pieces of data in the screened chip test data set, detecting the common data in the at least two pieces of data, and splicing the at least two pieces of data with common data into one piece of data to obtain a spliced chip test data set; cleaning the spliced chip test data set according to the preset cleaning rule to obtain a candidate chip test data set, and the preset cleaning rule is used to delete the test nodes of the same type.

[0079] The preset screening rule is used to screen out the matching test nodes from the chip configuration data and can delete the node data that does not participate in the test or is invalid.

[0080] The preset cleaning rule is used in the data cleaning stage to delete duplicate or redundant data. For example, when there are multiple test nodes of the same type, only one of them can be retained to ensure the uniqueness and validity of the final data.

[0081] By applying preset screening rules, multiple chip configuration data sets are processed to obtain a screened chip test data set. This set only contains those valid data related to test nodes.

[0082] In the screened set, if at least two pieces of data (assumed to be data A and data B) are found to have commonalities (i.e., they are the same in certain specific fields or characteristics), these data will be merged into a new data record. This process aims to combine similar test data, reduce the data volume, and improve the test efficiency and accuracy.

[0083] For example, if data A and data B both involve similar configurations of the same type of chip, their common data parts can be merged into a more concise record (such as merging chip IDs, configuration parameters, etc.).

[0084] In the obtained merged chip test data set, preset cleaning rules are applied to delete the same type of test nodes. For example, removing duplicates or similar items to ensure the uniqueness of the final candidate chip test data set and also reduce redundant data.

[0085] Through data screening, merging, and cleaning, highly available and highly relevant test data can be refined. By eliminating invalid data, merging similar data, and removing duplicate information, the efficiency and accuracy of subsequent tests can be improved.

[0086] In one implementation, the netlist file includes a first netlist file, and network name data is stored in the first netlist file; screening and processing multiple chip configuration data sets according to preset screening rules includes: obtaining a preset network name; comparing the preset network name with the network name data in the multiple chip configuration data sets corresponding to the first netlist file; when the network name data matches the preset network name, deleting the network name data and retaining the test node data connected to the network name data; when the network name data does not match the preset network name, deleting the test node data connected to the network name data.

[0087] As can be understood from the above, the first netlist file contains multiple network name data, and these network names are usually identifiers of each node in the circuit. Each network name may correspond to a specific circuit connection, such as a signal line or a reference point.

[0088] The preset network name refers to a set of network identifiers predefined by the user or the system. For example, it can be the network name to be tested.

[0089] During data screening and processing, only the data in the first netlist file is screened. It can also be understood that this screening step only screens according to the net name, leaving the data corresponding to the preset net name.

[0090] For example, determine whether the net name is in the form of "N + number" (the default net name automatically generated by the schematic software). If the judgment is true, remove this net name and retain the node information connected to it; if the judgment is false, remove the nodes starting with U connected to this net (this net name is a custom net name representing a net with certain functions, and there is no need to retain the chip information connected to this net).

[0091] Through this screening process, the subsequent test and analysis steps can be simplified, important test node information can be retained, and the interference of irrelevant information can be avoided. Generally speaking, through screening, the amount of data to be processed can be reduced, thus saving computing resources and time.

[0092] In one implementation, the netlist file includes a first netlist file, a second netlist file, and a third netlist file. Both the first netlist file and the second netlist file store test node data; both the second netlist file and the third netlist file store device name data; when there are at least two pieces of data in the screened chip test data set, detect the common data in the at least two pieces of data, and splice the at least two pieces of data with common data into one piece of data to obtain a spliced chip test data set, including: detecting the common data in the screened chip test data sets corresponding to the first netlist file and the second netlist file to obtain common test node data; splicing the at least two pieces of data with common test node data in the screened chip test data sets corresponding to the first netlist file and the second netlist file into one piece of data to obtain a first spliced data set; detecting the common data in the screened chip test data sets corresponding to the second netlist file and the third netlist file to obtain common device name data; splicing the at least two pieces of data with common device name data in the first spliced data set and the screened chip test data set corresponding to the third netlist file into one piece of data to obtain a spliced chip test data set.

[0093] The first netlist file and the second netlist file store test node data, representing each test point in the circuit.

[0094] The second netlist file and the third netlist file store device name data, representing the specific devices used in the circuit (such as resistors, capacitors, or integrated circuits, etc.).

[0095] In the filtered chip test data sets corresponding to the first netlist file and the second netlist file, detect common data. This means finding the common test nodes that exist in both files. Determine which test nodes are the same in these two sets, and these are the "common test node data".

[0096] Based on the just-detected common test node data, splice at least two pieces of data in the first netlist file and the second netlist file with these common data to form a new data set (the first spliced data set).

[0097] Then, detect the common data in the filtered chip test data sets corresponding to the second netlist file and the third netlist file. Find the parts that commonly exist in the device name data. Determine which device names match in both the second netlist file and the third netlist file to obtain the "common device name data".

[0098] Finally, splice at least two pieces of data in the first spliced data set and the third netlist file that match the common device name data to form the final spliced chip test data set.

[0099] For example, list a (the third netlist file) and list c (the second netlist file) both contain device name information, and data can be spliced according to the device name; list b (the first netlist file) and list c both contain device part number information, and data can be spliced according to the device part number; that is, the data of list a and list c can be spliced through list b to obtain a data structure of "network name / node 1 (device part number) / node 2 (device part number) / node 3 (device part number)..." or "chip pin name (the chip refers to the device with the device part number starting with U) / node 1 (device part number) / node 2 (device part number) / node 3 (device part number)..." and store the data in the list variable d.

[0100] This data splicing process is also to reduce redundancy and highlight important information. Through splicing, it can effectively extract data with the same test nodes and device names from multiple netlist files to form a comprehensive chip test data set, ensuring the relevance of the final data set for subsequent processing and analysis.

[0101] In one implementation, clean the spliced chip test data set according to the preset cleaning rules to obtain the candidate chip test data set, including: traverse the test node data in the spliced chip test data set. In the case where a network name connects multiple test node data of the same type, delete multiple test node data of the same type and retain any one of the test node data among the multiple test node data of the same type.

[0102] The preset cleaning rule is a series of predefined conditions or steps aimed at optimizing data, that is, identifying and processing redundant or duplicate data.

[0103] It can be understood that there may be a situation where multiple test nodes are connected to the same network name in the spliced chip test data set, and these test nodes belong to the same type. For example, a certain network name is connected to multiple capacitors.

[0104] The key step in the cleaning process is to identify the test node data of the same type connected to the same network name and delete it. Specifically, if multiple test node data of the same type are found, the system only retains any one of the test node data and deletes the remaining node data. This can effectively reduce data redundancy.

[0105] It can be understood that by removing redundant test node data of the same type, the size of the data set can be reduced, saving storage space; the cleaned data is more concise, and subsequent data analysis, test processing, and verification will be more efficient, and the consumption of computing resources will also be reduced accordingly. Although some data is deleted, representative test node information is still retained, which is sufficient to ensure the validity of the test results.

[0106] In one implementation, when the types of test node data include test point type and / or debug point type, the above method further includes: in the case where test node data of both test point type and debug point type are connected to the same network name, deleting the test node data of test point type and debug point type, and retaining any one of the test node data of test point type or debug point type.

[0107] A test (Test Point, TP) point, also known as a TP point, usually refers to a test point used to test the performance of a circuit. These nodes can be connected to test instruments for measurement, diagnosis, or fault troubleshooting.

[0108] A debug (Debug Point) point, also known as a DP point, usually refers to a point used to debug a circuit. These nodes may be used for real-time monitoring, signal tracing, or fault analysis, enabling engineers to obtain information while the circuit is running.

[0109] TP points and DP points may carry similar information in some cases, that is, they can both be used to test or debug a circuit. If both types of points are present in a network name, retaining one of them is sufficient to meet the needs of testing or debugging. Therefore, retaining one can reduce redundant information.

[0110] If both TP points and DP points are retained, it may lead to confusion in functions or purposes. In actual use, testers may not know which point to use in a specific situation. To reduce redundancy, simplify the data structure, and reduce confusion, retaining one can reduce such errors, which can more effectively provide relevant node information for test cases. This method ensures the neatness of the data and helps improve the efficiency and accuracy of the test process.

[0111] For example, traverse the nodes in the list variable d, and determine whether they start with C (i.e., capacitance). If the determination is true, retain this node and remove other nodes starting with C. Similarly, retain one chip pin, one TP point, or one DP point. Finally, obtain a data structure of "network name / capacitance / TP point or DP point (only one of the TP point and DP point needs to be retained)" or "chip pin name / capacitance / TP point or DP point", that is, the test point information that can be filled into the test case, and store it back in the list variable d.

[0112] The following combines Figure 2 to specifically introduce the above data processing process.

[0113] Figure 2 is a data processing flow chart provided by an embodiment of the present application.

[0114] As Figure 2 shown, Figure 2 includes the following steps S201 to S207.

[0115] S201. Obtain the list variable a.

[0116] S202. Obtain the list variable b.

[0117] S203. Obtain the list variable c.

[0118] S204. Perform data screening on the list variable b to generate a new list variable b.

[0119] S205. Obtain the network name, device part number, and pin name by performing data splicing on the list variables a to c.

[0120] S206. Generate the list variable d.

[0121] S207. Perform data cleaning to generate a new list variable d.

[0122] In one implementation, multiple chip configuration data sets are read from the netlist file according to a preset key data reading rule, including: obtaining a preset keyword; and performing reading processing on the netlist file by using a regular matching method according to the preset keyword to obtain multiple chip configuration data sets.

[0123] The preset keywords are specific identifiers used to locate the required data parts. For example, these keywords can be the type of a certain chip, specific pins, test points, etc.

[0124] Regular expressions are used for string matching and processing. Using regular matching, relevant chip configuration data can be filtered and extracted from the netlist file according to the preset keywords. By defining specific regular expressions, information in the netlist can be efficiently identified and extracted.

[0125] The following will be specifically introduced in conjunction with Figure 3 as follows.

[0126] Figure 3 is a data extraction flowchart provided by an embodiment of the present application.

[0127] As Figure 3 shown, Figure 3 it includes the following steps S301 to S309.

[0128] S301. Read the component file data.

[0129] S302. Obtain the device name, pin number, and pin name through keyword matching.

[0130] S303. Define a data structure to generate a list variable a.

[0131] Locate all the information of a single device according to the keywords "primitive" and "end_primitive" and obtain the device name, or locate the information of the device pin number and pin name according to the keywords "pin" and "end_pin" and obtain them. Generate a data structure of "device name / pin number / pin name" and store it in the list variable a to obtain the first chip configuration data set.

[0132] S304. Read the network file data.

[0133] S305. Obtain the network name, device reference number, and pin number through keyword matching.

[0134] S306. Define a data structure to generate a list variable b.

[0135] Locate and read the network name according to the keyword "NET_NAME", and locate and read the node names (including device reference numbers and pin numbers) connected to this network name according to the keyword "NODE_NAME". Generate a data structure of "network name / node 1 / node 2 / node 3..." and store it in the list variable b to obtain the second chip configuration data set.

[0136] S307. Read the port file data.

[0137] S308. Obtain the device part number and device name through keyword matching.

[0138] S309. Define a data structure to generate a list variable c.

[0139] Locate and extract the device part number and device name according to the keyword "PART_NAME", generate a data structure of "device part number device name" and store it in the list variable c to obtain the third chip configuration data set.

[0140] Extracting data in an automated manner greatly improves the processing speed and avoids the time waste caused by manual searching. Using preset keywords and regular expressions can reduce errors in manual operations and ensure the accuracy of the extracted data. At the same time, different types of netlist files can be flexibly adapted, and only the preset keywords and regular expressions need to be adjusted.

[0141] In one implementation, the target chip test data includes target test node data. Generate the test node data corresponding to the chip to be tested according to the target chip test data, including: display a preset operation mode on the user interface, and the preset operation mode includes an automatic mode and a semi-automatic mode; receive a selection operation on the preset operation mode through the user interface; execute the preset operation mode based on the selection operation, and determine the target test node as the test node corresponding to the chip to be tested.

[0142] The user interface is the part where the user interacts with the system, allowing the user to make selections, inputs, and operations.

[0143] The automatic mode usually means that the system can complete all operations independently. The user only needs to start the process, and the system will automatically generate the test nodes to be tested according to the preset parameters and logic.

[0144] The semi-automatic mode means that the system will assist the user in selecting and confirming certain steps, and the user still needs to intervene to make key decisions in this mode.

[0145] The following is combined with Figure 4 to illustrate specifically.

[0146] Figure 4 It is a schematic diagram of a user selection interface provided by an embodiment of the present application.

[0147] As shown in the figure, the first line displays the folder path for selecting the netlist file, the second line is the button for selecting the netlist file. When the user selects and clicks this button, an interface for selecting files in the computer will pop up. After selecting the corresponding netlist file, the file path and naming information will be displayed in the first line, which is convenient for the user to check whether the file selection is correct. The third line is two buttons for selecting the automatic mode and the semi-automatic mode.

[0148] By selecting the automatic mode or the semi-automatic mode, determine the target test node as the test node corresponding to the chip identifier to be tested.

[0149] In one implementation, when the preset operation mode is the automatic mode, determining the target test node as the test node corresponding to the chip identifier to be tested includes: determining chip template information, where the chip template information includes a template chip identifier and a template test node, and the template chip identifier matches the chip identifier to be tested; determining whether the types of the target test node and the template test node match; and when the types of the target test node and the template test node match, replacing the template test node with the target test node to obtain the test node to be tested.

[0150] Figure 5 This is a schematic diagram of the automatic mode interface provided by the embodiments of the present invention.

[0151] It can be seen that in the automatic mode, the user only needs to input a chip identifier to be tested (such as the chip part number in the figure) to automatically generate the corresponding test node to be tested.

[0152] Click the full automatic mode button. Figure 5 The user interface of will display the chip template information (test cases with fixed test content and test points that have been written). The user selects a test case with fixed test content and test points that has been written, inputs the part number of the chip, and clicks the start generation button. The program reads the test point information in the selected netlist file, including the network name and the connected capacitor or TP point, locates the data in the list variable d generated above according to the network name, and then matches the device type connected to the network with the element nodes in the list variable d to filter out the nodes connected to the network that are capacitors, TP points, or DP points. Finally, the cleaned test points are determined as the test nodes to be tested. It can be understood that by determining the test nodes to be tested, the data structure of "network name / test node to be tested" can be obtained, that is, a new test case is generated.

[0153] In one implementation, when the preset operation mode is the semi-automatic mode, determining the target test node as the test node corresponding to the chip identifier to be tested includes: receiving the chip identifier to be tested input by the user in the user interface; and searching for the test node to be tested in the target test node according to the chip identifier to be tested.

[0154] Figure 6 This is a schematic diagram of the semi-automatic mode interface provided by the embodiments of the present application.

[0155] It can be seen that in the semi-automatic mode, the user needs to input the corresponding characters and then select the appropriate test node to be tested from a series of characters that pop up.

[0156] Click the semi-automatic mode button, and the pop-up is asFigure 6 interface. Enter partial characters of the network name to be filled in the text box, and the network names containing the entered characters will pop up automatically. After selecting the test point, two copy options will appear, namely the capacitor connected to the network and the TP point or DP point. The user can select to copy the capacitor, TP point or DP point according to the actual situation to determine the node to be tested, and then paste the node to be tested into the cell of the corresponding table, so as to obtain the data structure of "network name / node to be tested", that is, a new test case is generated.

[0157] The following combines Figure 7 to introduce the method mentioned above as a whole.

[0158] Figure 7 is a schematic flowchart of another method for automatically generating test points provided by an embodiment of the present application.

[0159] S701. Select a netlist file.

[0160] Display the folder path for selecting the netlist file, the button for selecting the netlist file, and the two buttons for selecting the automatic mode and the semi-automatic mode in the user interface.

[0161] S702. Read the selected file information, and use the method of regular matching to read information such as device name, network name, node name, and device part number.

[0162] Read the selected netlist file, and use the method of regular matching in Python to read the device name, device pin number, and pin name information; the network name and the node names connected to the network; the part number and device name of the device.

[0163] Continuing with the previous example, in the component file, locate all the information of a capacitor through the keywords "primitive" and "end_primitive", and obtain that the name of the capacitor is "CAP_CAPM0603X85_22UF 6.3V". Obtain the pin numbers of the capacitor as "1" and "2", and the pin names as "1" and "2" through the keywords "pin" and "end pin", and extract all the data in the component file to generate a list variable a.

[0164] In the network file, obtain the network name of a network as "VCC3V3_ETH4" through the keyword "NET_NAME", and obtain the devices connected to the network and the pin names of the devices as "R4035 2", "C4001 2", "C4002 1", "TP4001 1", and "U4002 LDOAVDD3P3" through the keyword. Extract all the data in the network file to generate a list variable b.

[0165] Combined with the above text, in the port file, the device part number and device name obtained through the keyword "PART_NAME" are "C4001" and "CAP_CAPM0603X85_22UF 6.3V" respectively. Extract the data in all port files to generate the list variable c.

[0166] Extract the data in all component files to generate the list variable a; extract the data in all network files to generate the list variable b; extract the data in all port files to generate the list variable c.

[0167] S703. Screen, splice, and clean the read information.

[0168] Combined with the example in the above text, screen the data of the list variable b to determine whether the network name is "N + number". The network name "VCC3V3_ETH4" is not "N + number", so remove the U - starting node connected to this network, that is, "U4002LDOAVDD3P3".

[0169] The list a and list c are spliced according to the device name; the list b and list c are spliced according to the device part number; the obtained data splicing result is "VCC3V3_ETH4 / C4001 / C4002 / TP4001 / R4035".

[0170] Finally, perform data cleaning, keep one capacitor, one TP point or DP point, and finally get "VCC3V3_ETH4 / C4001 / TP4001". Similarly, traverse all the data in the list d and perform the same processing.

[0171] S704. The automatic mode selects the written test cases, inputs the chip part number, and generates new test cases.

[0172] Combined with the above text, click the automatic button to read the test point information in the written test cases. For example, the test point containing VCC3V3_ETH4 / C4020 is included. First, read the network name information VCC3V3_ETH4, and match the test point VCC3V3_ETH4 / C4001 / TP4001 in step 3; then read the node C4020 information connected to the test point, perform data processing on VCC3V3_ETH4 / C4001 / TP4001, and get the test point VCC3V3_ETH4 / C4001; finally, replace VCC3V3_ETH4 / C4020 in the original test case with VCC3V3_ETH4 / C4001, and perform the same operation on all test points to get new test cases.

[0173] S705. In the semi - automatic mode, input some characters and select test points to fill into the test cases.

[0174] Click the semi-automatic mode button and enter characters in the text box of the pop-up interface. For example, enter "VCC5V", and all test points containing "VC C 5V" will appear, such as "VC C 5V_AP / TP 1709 / C 1918", "VCC5V_BAT / C1303", and "VCC5V_V2X / TP701 / C722". Select VCC5V_AP / TP1709 / C1918, and two copy buttons will appear, which copy the strings of VCC5V_AP / TP1709 and VCC5V_AP / C1918 respectively. Select one of them according to the test case writing rules and fill it into the table.

[0175] Based on the test point automatic generation method provided in the above embodiments, correspondingly, the present application also provides a specific implementation manner of the test point automatic generation device. Please refer to the following embodiments.

[0176] First, refer to Figure 8 , the test point automatic generation device provided in the embodiments of the present application includes the following modules:

[0177] The acquisition module 1001 is used to acquire a netlist file, and the netlist file is used to store chip test data;

[0178] The processing module 1002 is used to read out multiple chip configuration data sets from the netlist file according to a preset key data reading rule, and the chip configuration data sets include initial chip identifiers and chip test data;

[0179] The processing module 1002 is further used to perform data processing on multiple chip configuration data sets by using a preset data processing rule to obtain a candidate chip test data set, and the candidate chip test data set includes candidate chip test data, and the candidate chip test data includes candidate chip identifiers and corresponding candidate test node data;

[0180] The processing module 1002 is further used to determine the chip identifier to be tested;

[0181] The processing module 1002 is further used to extract, based on the chip identifier to be tested, the candidate chip test data that matches the chip identifier to be tested from the candidate chip test data set as the target chip test data;

[0182] The generation module 1003 is used to generate the test node data corresponding to the chip identifier to be tested according to the target chip test data.

[0183] By obtaining the connection information and groups of devices recorded in the netlist file, the chip test data required for testing can be accurately located; according to the preset key data reading rules, multiple chip configuration data sets are read from the netlist file, and the data in the netlist is converted into a configuration data set that can be further processed, providing an accurate data basis to ensure the accuracy and integrity of the subsequently extracted data; using the preset data processing rules to process multiple chip configuration data sets to obtain a candidate chip test data set, processing, screening, and transforming the extracted configuration data to form a candidate chip test data set can effectively remove invalid and redundant data, streamline the data range of the data to be tested, avoid processing unnecessary data, thereby optimizing the test work efficiency and improving the accuracy of the final nodes to be tested; according to the determined chip identifier to be tested, the candidate chip test data matching the chip identifier to be tested is extracted from the candidate chip test data set as the target chip test data, and the node data to be tested corresponding to the chip identifier to be tested is generated according to the target chip test data, which can accurately determine the node to be tested corresponding to the chip identifier to be tested, reducing manual operation and search time and avoiding misoperation and data confusion.

[0184] As an implementation manner of the present application, the preset data processing rules include a preset screening rule and a preset cleaning rule; the above device may further include: a data processing module, configured to use the preset data processing rules to process multiple chip configuration data sets to obtain a candidate chip test data set, including: screening and processing multiple chip configuration data sets according to the preset screening rule to obtain a screened chip test data set, and the preset screening rule is used to delete the data corresponding to non-test nodes; in the case that the screened chip test data set includes at least two pieces of data, detecting the common data in the at least two pieces of data, and splicing the at least two pieces of data with common data into one piece of data to obtain a spliced chip test data set; cleaning the spliced chip test data set according to the preset cleaning rule to obtain a candidate chip test data set, and the preset cleaning rule is used to delete the test nodes of the same type.

[0185] Through data screening, merging, and cleaning, test data with high availability and high relevance can be refined. By eliminating invalid data, merging similar data, and removing duplicate information, the efficiency and accuracy of subsequent tests can be improved.

[0186] As an implementation manner of the present application, the netlist file includes a first netlist file, and network name data is stored in the first netlist file; the above device may further include: a screening processing module, configured to perform screening processing on a plurality of chip configuration data sets according to a preset screening rule, including: obtaining a preset network name; comparing the preset network name with the network name data in the plurality of chip configuration data sets corresponding to the first netlist file; in the case where the network name data matches the preset network name, deleting the network name data and retaining the test node data connected to the network name data; in the case where the network name data does not match the preset network name, deleting the test node data connected to the network name data.

[0187] Through this screening process, the subsequent test and analysis steps can be simplified, important test node information can be retained, and the interference of irrelevant information can be avoided. Overall, through screening, the amount of data to be processed can be reduced, thereby saving computing resources and time.

[0188] As an implementation manner of the present application, the netlist file includes a first netlist file, a second netlist file, and a third netlist file. Test node data is stored in both the first netlist file and the second netlist file; device name data is stored in both the second netlist file and the third netlist file; the above device may further include: a splicing processing module, configured to detect common data in at least two pieces of data in the case where the screened chip test data set includes at least two pieces of data, and splice the at least two pieces of data with common data into one piece of data to obtain a spliced chip test data set, including: detecting common data in the screened chip test data sets corresponding to the first netlist file and the second netlist file to obtain common test node data; splicing the at least two pieces of data with common test node data in the screened chip test data sets corresponding to the first netlist file and the second netlist file into one piece of data to obtain a first spliced data set; detecting common data in the screened chip test data sets corresponding to the second netlist file and the third netlist file to obtain common device name data; splicing the at least two pieces of data with common device name data in the first spliced data set and the screened chip test data set corresponding to the third netlist file into one piece of data to obtain a spliced chip test data set.

[0189] This data splicing process is also to reduce redundancy and highlight important information. Through splicing, data with the same test nodes and device names can be effectively extracted from multiple netlist files to form a comprehensive chip test data set, ensuring the relevance of the final data set for subsequent processing and analysis.

[0190] As an implementation of this application, the above device may further include: a cleaning processing module, configured to clean the spliced chip test data set according to a preset cleaning rule to obtain a candidate chip test data set, including: traversing the test node data in the spliced chip test data set, and when a network name connects multiple test node data of the same type, deleting multiple test node data of the same type, and retaining any one of the multiple test node data of the same type.

[0191] It can be understood that by removing redundant test node data of the same type, the size of the data set can be reduced, saving storage space; the cleaned data is more concise, and subsequent data analysis, test processing, and verification will be more efficient, and the consumption of computing resources will also be reduced accordingly. Although some data is deleted, representative test node information is still retained, which is sufficient to ensure the validity of the test results.

[0192] As an implementation of this application, when the types of test node data include test point types and / or debug point types, the above device may further include: a deletion processing module, configured to delete the test node data of test point types and debug point types when a network name connects test node data of both test point types and debug point types at the same time, and retain any one of the test node data of test point types or debug point types.

[0193] If both TP points and DP points are retained, it may lead to confusion in functions or purposes. In actual use, testers may not know which point to use in a specific situation. To reduce redundancy, simplify the data structure, and reduce confusion, retaining one can reduce such errors, which can more effectively provide relevant node information for test cases. This method ensures the cleanliness of the data and helps improve the efficiency and accuracy of the test process.

[0194] As an implementation of this application, the above device may further include: a reading processing module, configured to read multiple chip configuration data sets from a netlist file according to a preset key data reading rule, including: obtaining a preset keyword; and performing a reading process on the netlist file by using a regular matching method according to the preset keyword to obtain multiple chip configuration data sets.

[0195] Regular matching can be used to screen and extract relevant chip configuration data from a netlist file according to a preset keyword. By defining a specific regular expression, information in the netlist can be efficiently identified and extracted.

[0196] As an implementation manner of the present application, the target chip test data includes target test node data, and the above device may further include: a display module, configured to generate the to-be-tested node data corresponding to the to-be-tested chip identifier according to the target chip test data, including: displaying a preset operation mode on the user interface, the preset operation mode including an automatic mode and a semi-automatic mode; receiving a selection operation on the preset operation mode through the user interface; and executing the preset operation mode based on the selection operation to determine the target test node data as the to-be-tested node data corresponding to the to-be-tested chip identifier.

[0197] As an implementation manner of the present application, the display module is further configured to, when the preset operation mode is the automatic mode, determine the target test node as the to-be-tested node data corresponding to the to-be-tested chip identifier, including: determining chip template information, where the chip template information includes a template chip identifier and template test node data, and the template chip identifier matches the to-be-tested chip identifier; determining whether the types of the target test node data and the template test node data match; and when the types of the target test node and the template test node match, replacing the template test node with the target test node to obtain the to-be-tested node.

[0198] As an implementation manner of the present application, the display module is further configured to, when the preset operation mode is the semi-automatic mode, determine the target test node as the to-be-tested node corresponding to the to-be-tested chip identifier, including: receiving the to-be-tested chip identifier input by the user on the user interface; and searching for the to-be-tested node in the target test nodes according to the to-be-tested chip identifier.

[0199] Figure 9 It is a schematic hardware structure diagram for automatically generating test points provided by an embodiment of the present application.

[0200] The test point automatic generation device may include a processor 2001 and a memory 2002 storing computer program instructions.

[0201] Specifically, the above processor 2001 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0202] The memory 2002 may include a mass storage for data or instructions. By way of example and not limitation, the memory 2002 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 2002 may include removable or non-removable (or fixed) media. Where appropriate, the memory 2002 may be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, the memory 2002 is a non-volatile solid-state memory.

[0203] In a particular embodiment, the memory may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage media device, an optical storage media device, a flash memory device, an electrical, optical, or other physical / tangible memory storage device. Thus, generally, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., memory devices) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to one aspect of the present disclosure.

[0204] The processor 2001 reads and executes the computer program instructions stored in the memory 2002 to implement any one of the test point automatic generation methods in the above embodiments.

[0205] In one example, the test point automatic generation device may further include a communication interface 2003 and a bus 2000. Among them, as Figure 9 shown, the processor 2001, the memory 2002, and the communication interface 2003 are connected through the bus 2000 and complete communication with each other.

[0206] The communication interface 2003 is mainly used to implement communication between the various modules, devices, units, and / or devices in the embodiments of the present application.

[0207] The bus 2000 includes hardware, software, or both, and couples the components of the online data flow metering device to each other. By way of example and not limitation, the bus may include an Accelerated Graphics Port (AGP) or other graphics bus, an Enhanced Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a HyperTransport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a MicroChannel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local (VLB) bus, or other suitable buses, or a combination of two or more of these. Where appropriate, the bus 2000 may include one or more buses. Although the embodiments of the present application describe and illustrate specific buses, the present application contemplates any suitable bus or interconnect.

[0208] In addition, in combination with the method for automatically generating test points in the above embodiments, the embodiments of the present application can be implemented by providing a computer storage medium. Computer program instructions are stored on the computer storage medium; when the computer program instructions are executed by a processor, the method for automatically generating any one of the test points in the above embodiments is implemented.

[0209] The embodiments of the present application also provide a computer program product, including a computer program, and when the computer program is executed by a processor, the method for automatically generating any one of the test points in the above embodiments is implemented.

[0210] It should be clear that the present application is not limited to the specific configurations and processes described above and illustrated in the figures. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and illustrated as examples. However, the method process of the present application is not limited to the specific steps described and illustrated, and those skilled in the art can make various changes, modifications, and additions, or change the order between steps after understanding the spirit of the present application.

[0211] The functional blocks shown in the above-described structural block diagrams can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a functional card, and so on. When implemented in software, the elements of the present application are programs or code segments for performing the required tasks. The program or code segment can be stored in a machine-readable medium or transmitted via a data signal carried in a carrier wave over a transmission medium or a communication link. A "machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, fiber optic media, radio frequency (RF) links, and so on. The code segment can be downloaded via a computer network such as the Internet, an intranet, and so on.

[0212] It should also be noted that the exemplary embodiments mentioned in the present application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps can be executed in the order mentioned in the embodiments, can be different from the order in the embodiments, or several steps can be executed simultaneously.

[0213] Aspects of the present disclosure have been described above with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block in the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine, such that the instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the functions / actions specified in one or more blocks of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It should also be understood that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can also be implemented by dedicated hardware for performing the specified functions or actions, or can be implemented by a combination of dedicated hardware and computer instructions.

[0214] As described above, this is only the specific implementation manner of the present application. Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the systems, modules, and units described above can refer to the corresponding processes in the foregoing method embodiments, and will not be elaborated herein. It should be understood that the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present application.

Claims

1. A method for automatically generating test points, characterized in that: include: Obtaining a netlist file, wherein the netlist file is used to store chip test data; Reading a plurality of chip configuration data sets from the netlist file according to a preset key data reading rule, wherein the chip configuration data sets include an initial chip identification and chip test data; Performing data processing on the plurality of chip configuration data sets using a preset data processing rule to obtain a candidate chip test data set, wherein the candidate chip test data set includes candidate chip test data, and the candidate chip test data includes a candidate chip identifier and corresponding candidate test node data; Determine the chip identification to be tested; Based on the chip to be tested identifier, extracting candidate chip test data matching the chip to be tested identifier from the candidate chip test data set as target chip test data; The node data to be tested corresponding to the chip to be tested identifier is generated according to the target chip test data.

2. The method according to claim 1, characterized in that The preset data processing rules include preset screening rules and preset cleaning rules; the method of using the preset data processing rules to process the plurality of chip configuration data sets to obtain a candidate chip test data set includes: Filter the plurality of chip configuration data sets according to a preset filtering rule to obtain a filtered chip test data set, wherein the preset filtering rule is used to delete data corresponding to non-test nodes; In the case where the screening chip test data set includes at least two pieces of data, detecting common data in the at least two pieces of data, and splicing the at least two pieces of data having the common data into one piece of data to obtain a spliced ​​chip test data set; The spliced ​​chip test data set is cleaned according to a preset cleaning rule to obtain the candidate chip test data set, wherein the preset cleaning rule is used to delete test nodes of the same type.

3. The method according to claim 2, characterized in that The netlist file includes a first netlist file, wherein the first netlist file stores network name data; the screening process of the plurality of chip configuration data sets according to a preset screening rule includes: Get the preset network name; Comparing the preset network name with network name data in the plurality of chip configuration data sets corresponding to the first netlist file; In the case where the network name data matches the preset network name, the network name data is deleted, and the test node data connected to the network name data is retained; In the case that the network name data does not match the preset network name, the test node data connected to the network name data is deleted.

4. The method according to claim 2, characterized in that: The netlist file includes a first netlist file, a second netlist file and a third netlist file, wherein the first netlist file and the second netlist file both store test node data; the second netlist file and the third netlist file both store device name data; in the case where the screening chip test data set includes at least two pieces of data, common data in the at least two pieces of data are detected, and the at least two pieces of data with common data are spliced ​​into one piece of data to obtain a spliced ​​chip test data set, including: Detecting common data in the screening chip test data set corresponding to the first netlist file and the second netlist file to obtain common test node data; splicing at least two data having the common test node data in the screening chip test data sets corresponding to the first netlist file and the second netlist file into one data to obtain a first spliced ​​data set; Detecting common data of the corresponding screening chip test data set in the second netlist file and the third netlist file to obtain common device name data; At least two data having the common device name data in the first spliced ​​data set and the screening chip test data set corresponding to the third netlist file are spliced ​​into one data to obtain a spliced ​​chip test data set.

5. The method according to claim 2, characterized in that: The step of cleaning the spliced ​​chip test data set according to a preset cleaning rule to obtain the candidate chip test data set includes: The test node data in the spliced ​​chip test data set are traversed, and when a plurality of test node data of the same type are connected to one network name, the plurality of test node data of the same type are deleted, and any one of the plurality of test node data of the same type is retained.

6. The method according to claim 5, characterized in that When the type of the test node data includes a test point type and / or a debug point type, the method further includes: When a network name is connected to both the test point type and the test node data of the debug point type, the test node data of the test point type and the debug point type are deleted, and the test node data of the test point type or any one of the debug point types is retained.

7. The method according to any one of claims 1 to 6, characterized in that The step of reading a plurality of chip configuration data sets from the netlist file according to a preset key data reading rule includes: Get preset keywords; According to preset keywords, the netlist file is read and processed by using a regular matching method to obtain the plurality of chip configuration data sets.

8. The method according to claim 1, characterized in that The target chip test data includes target test node data, and the step of generating the node data to be tested corresponding to the chip to be tested identifier according to the target chip test data includes: Displaying a preset operation mode on a user interface, wherein the preset operation mode includes an automatic mode and a semi-automatic mode; receiving a selection operation of the preset operation mode through a user interface; The preset operation mode is executed based on the selection operation, and the target test node data is determined as the node data to be tested corresponding to the chip to be tested identifier.

9. The method according to claim 8, characterized in that In the case where the preset operation mode is the automatic mode, determining the target test node as the node data to be tested corresponding to the chip to be tested identifier includes: Determine chip template information, the chip template information includes a template chip identifier and template test node data, the template chip identifier matches the to-be-tested chip identifier; Determining whether the types of the target test node data and the template test node data match; In the case where the types of the target test node match those of the template test node, the template test node is replaced with the target test node to obtain a node to be tested.

10. The method according to claim 8, characterized in that When the preset operation mode is the semi-automatic mode, determining the target test node as the node to be tested corresponding to the chip to be tested identifier includes: Receiving a chip identification to be tested input by a user on the user interface; The node to be tested is found in the target test node according to the chip identifier to be tested.

Images