Power decoupling circuit evaluation method, control method and system of optical storage and charging system

Abstract

The invention discloses a power decoupling circuit evaluation method, a soft switching control method and a soft switching control system of an optical storage and charging system, and belongs to the technical field of power distribution network load storage interaction, the power decoupling circuit evaluation method evaluates the performance of different power decoupling circuits from multiple dimensions, and the soft switching control method and the soft switching control system are based on a selected circuit topology. A soft switching modulation method and a corresponding closed-loop control strategy are given, the harmonic current suppression capability can be effectively improved, meanwhile, full-range zero-voltage switching-on can be achieved, and the effectiveness of the power decoupling circuit and the proposed control strategy is verified through simulation and experiments.

Description

Technical Field

[0001] The present invention belongs to the technical field of interactive technologies of power sources, grids, loads and energy storage in distribution networks, and more specifically, relates to an evaluation method, a soft-switching control method and a system for an active power decoupling circuit of a photovoltaic energy storage charging integrated system. Background Art

[0002] With the rapid development of distributed photovoltaics and electric vehicles, the source-load mismatch in the distribution network has intensified, and the consumption of photovoltaics and the charging of electric vehicles have become important factors affecting the safe and stable operation of the distribution network. In order to make full use of light resources and at the same time reduce the impact of electric vehicle charging on the distribution network, a photovoltaic energy storage charging integrated system has emerged in the prior art. In a DC bus-type photovoltaic energy storage charging system, there are fewer inverter devices, high integration, higher efficiency, faster response speed and better scalability, making it a better choice for the architecture design of the photovoltaic energy storage charging integrated system.

[0003] In a DC bus-type photovoltaic energy storage charging system, photovoltaics, energy storage and charging piles are all connected in parallel to the DC bus through DC / DC converters. To ensure the safe and efficient operation of the system, the DC bus voltage needs to be stabilized within a certain range. When the power of photovoltaics and charging piles is small, a single-phase inverter is usually used for grid connection in the photovoltaic energy storage charging system, and there is double-frequency pulsating power on the DC bus side. For a high-power photovoltaic energy storage charging system that is connected to the grid through a three-phase inverter, when the grid voltage is unbalanced, in order to ensure the quality of the three-phase grid-connected current, a balanced positive-sequence control is usually adopted, and there is also double-frequency pulsating power on the DC side, which further generates second-harmonic current. The second-harmonic current will bring a series of hazards to the photovoltaic energy storage charging integrated system, such as causing the oscillation of the photovoltaic output power, increasing the current stress of the switching tube, increasing the conduction loss and switching loss of the circuit, and reducing the conversion efficiency. Therefore, suppressing the second-harmonic current on the DC side of the photovoltaic energy storage charging system has important practical significance.

[0004] To suppress the second-harmonic current of the DC bus, the current methods mainly include: directly increasing the electrolytic capacitor of the DC bus, adding an LC resonance branch, controlling based on the front and rear stage DC / DC converters and active power decoupling technology. The passive suppression method of the second-harmonic current does not require additional large numbers of components, but usually requires a large electrolytic capacitor to stabilize the bus voltage, which is not conducive to improving the power density and the long-term operation of the circuit.

[0005] The APD (Active Power Decoupler) can significantly reduce the capacitance value of the DC bus capacitor. However, the lack of soft switching in the APD hinders the further improvement of power density and efficiency. Although the use of wide-bandgap components can increase the switching frequency, thereby reducing the volume of passive components and enhancing the power density of the system, the high switching frequency also brings relatively large switching losses, resulting in a decrease in efficiency. To reduce or eliminate the switching losses at high frequencies, an auxiliary network can be added to the buck converter to achieve ZVS (Zero-Voltage Switching) of the active switch. However, this also makes the circuit structure and control more complex. Different from DC / DC circuits and inverters with a constant output voltage, the APD has no output-side load, and the voltage on the decoupling capacitor fluctuates continuously. The pulsating capacitor voltage increases the difficulty of system stability control. The control strategy needs to consider the implementation of soft switching, the suppression of second-harmonic current, and the stability of the decoupling capacitor voltage simultaneously. Currently, there is still a lack of solutions for soft-switching APD circuits. Summary of the Invention

[0006] To address the deficiencies in the prior art, the present invention provides an APD evaluation method, a soft-switching control method, and a system for an integrated photovoltaic energy storage and charging system. The performance of different power decoupling circuits is evaluated from multiple dimensions. Based on the selected circuit topology, a soft-switching modulation method and the corresponding closed-loop control strategy are given, which can effectively improve the harmonic current suppression ability while achieving zero-voltage switching over the entire range. The effectiveness of the power decoupling circuit and the proposed control strategy is verified through simulation and experiments.

[0007] The present invention adopts the following technical solutions.

[0008] The first aspect of the present invention provides a method for evaluating a power decoupling circuit of a photovoltaic energy storage system, including the following steps:

[0009] Establish a model for suppressing the second-harmonic current on the DC side with the capacitor absorbing pulsating power;

[0010] Based on the established model for suppressing the second-harmonic current on the DC side, construct various types of power decoupling circuits to be evaluated that include decoupling capacitors; including a serial voltage injection circuit for compensating voltage and a parallel current injection circuit for compensating current;

[0011] Based on the differences in capacitor selection between the serial voltage injection circuit and the parallel current injection circuit, including the number of capacitors, capacitance value, volume, and combining the withstand voltage requirements, circuit efficiency, and cost, form an evaluation result.

[0012] Preferably, the method for evaluating a power decoupling circuit of the photovoltaic energy storage system further includes:

[0013] For each selected type of power decoupling circuit, continue to evaluate the specific selection of the parallel current injection circuit from the perspectives of component volume, withstand voltage requirements, efficiency, and safety.

[0014] The second aspect of the present invention provides a control method for a power decoupling circuit of a photovoltaic energy storage charging system, which is used to control the power decoupling circuit after the evaluation and selection according to Claim 1 or 2, and includes the following steps:

[0015] Adopt a soft-switching strategy to configure the operating mode of the power decoupling circuit within a switching period to achieve zero-voltage switching;

[0016] Establish a mathematical model of the inverter using the power decoupling circuit;

[0017] Based on the mathematical model of the single-phase inverter using the power decoupling circuit, configure the circuit parameters of the power decoupling circuit. Based on the operating mode of the power decoupling circuit within a switching period, configure the pulsating power feedforward control link, the decoupling capacitor voltage control link, and the DC bus voltage control link to suppress the secondary harmonic current on the DC side.

[0018] Preferably, the power decoupling circuit adopts a Buck-type power decoupling circuit, and the decoupling inductor L and the decoupling capacitor C b are connected in series, and then connected in parallel with the second switching tube S 2 After being connected in parallel, it is connected in series with the first switching tube S 1 The other end of the first switching tube S 1 and the other end of the second switching tube S 2 serve as the two terminals of the power decoupling circuit.

[0019] Preferably, the step of adopting a soft-switching strategy to configure the operating mode of the power decoupling circuit within a switching period to achieve zero-voltage switching includes:

[0020] The Buck circuit adopts a soft-switching strategy based on the triangular current mode to achieve zero-voltage switching. Within a half-cycle of the alternating current, it is divided into four stages:

[0021] Stage I: At the beginning of this stage, the inductor current i L < 0, the first switching tube S 1 is turned on under the condition of zero-voltage switching, and the second switching tube S 2 is turned off. During this stage, the inductor current i L rises gradually from negative to positive;

[0022] Stage II: Turn off the first switching tube S 1 , the junction capacitance of the first switching tube S 1 is charged, and the junction capacitance of the second switching tube S 2 is discharged until the voltage becomes 0. When the second switching tube S 2When the voltage across the junction capacitance reverses and reaches a certain value, the body diode turns on, and the inductor current i L flows through the body diode for freewheeling, and the voltage drop across the drain-source of the switching transistor becomes 0;

[0023] Stage Ⅲ: The second switching transistor S 2 realizes zero-voltage-switching turn-on, including: The second switching transistor S 2 turns on, the first switching transistor S 1 turns off, and the inductor current i L gradually decreases and reverses until it reaches the reverse current value -I r ;

[0024] Stage Ⅳ: Turn off the second switching transistor S 2 , including: Charging the junction capacitance of the second switching transistor S 2 , discharging the junction capacitance of the first switching transistor S 1 until the voltage becomes 0; When the voltage across the junction capacitance of the first switching transistor S 1 reverses and reaches a certain value, the body diode turns on, and the inductor current i L flows through the body diode for freewheeling, and the voltage drop across the DS of the switching transistor becomes 0, preparing for the soft turn-on in the next stage I.

[0025] Preferably, the establishment of the inverter mathematical model using a power decoupling circuit includes:

[0026] Establish a single-phase inverter model, obtain the DC-side current expression, extract the second-harmonic current part therein as the compensation current for establishing the Buck-type power decoupling circuit model;

[0027] Establish a Buck-type power decoupling circuit model, including: Based on the decoupling capacitance voltage v b fully pulsating between 0 and the bus voltage, establish the expression of the decoupling capacitance in the Buck-type power decoupling circuit model; Based on the reverse current I r establish the upper and lower bounds of the inductor current envelope; and then obtain the switching time of the switching transistor.

[0028] Preferably, based on the expression of the decoupling capacitance, configure the capacitance value of the decoupling capacitance in the power decoupling circuit to be a set multiple of the theoretical minimum value calculated by the expression;

[0029] And based on the capacitance value of the decoupling capacitance in the configured power decoupling circuit, calculate the decoupling capacitance voltage, and then calculate the switching time of the switching transistor.

[0030] Preferably, the reverse current I r is the minimum soft-switching current, and the product of it and the dead time is greater than twice the product of the DC bus voltage and the parasitic capacitance of the switching transistor.

[0031] Preferably, the pulsating power feedforward control section is configured to:

[0032] Calculate the instantaneous power p on the AC side of the sampling inverter based on the voltage and current on the AC side, ac and obtain the DC component P of the output power through low-pass filtering dc Further separate the AC component in the instantaneous power and calculate the average inductor current feedforward amount

[0033] Preferably, the decoupling capacitor voltage control section is configured to:

[0034] Maintain the stability of the decoupling capacitor voltage, compare the DC component of the decoupling capacitor voltage with its given value, and obtain the DC component of the current injected into the decoupling capacitor through a closed loop Further through And the conversion coefficient between i b to obtain the compensation current i b .

[0035] Preferably, the DC bus voltage control section is configured to:

[0036] Subtract the voltage drop on the power supply internal resistance R s from the power supply voltage V s to obtain the DC bus voltage reference value Control the average value of the DC bus voltage through PI to output the DC part of the average inductor current reference value Control the instantaneous value of the DC bus voltage through PR to output the AC part of the average inductor current reference value

[0037] Add the average inductor current feedforward amount DC part and the AC part to obtain the average inductor current reference value

[0038] The triangular current mode control module combines the decoupling capacitor voltage reference value v b , the DC bus voltage value V dc , the average inductor current reference value and the reverse current I r to calculate the turn-on and turn-off times and achieve triangular current mode control.

[0039] Preferably, introduce a reference feedforward coefficient K f , 0 < K f < 1, update the decoupling capacitor voltage reference value v b used to calculate the opening and closing times in the triangular current mode control module, and the reference feedforward coefficient K fAs the reference value weight of the decoupling capacitor voltage before update, 1 - K f is the weight of the sampled value of the decoupling capacitor voltage.

[0040] The third aspect of the present invention provides a soft - switching control system for the power decoupling circuit of a photovoltaic - energy - storage - charging system. Operating the control method for the power decoupling circuit of a photovoltaic - energy - storage - charging system includes: a triangular current - mode control module, a pulsating power feed - forward control module, a decoupling capacitor voltage control module, and a DC bus voltage control module;

[0041] The triangular current - mode control module is used to calculate the turn - on and turn - off times to achieve triangular current - mode control by combining the reference value v of the decoupling capacitor voltage b , the DC bus voltage value V dc , the reference value of the average inductor current and the reverse current I r ;

[0042] The pulsating power feed - forward control module is used to calculate the feed - forward amount of the average inductor current

[0043] The decoupling capacitor voltage control module is used to calculate the compensation current i b ;

[0044] The DC bus voltage control module is used to superimpose the feed - forward amount of the average inductor current the DC part and the AC part to obtain the reference value of the average inductor current

[0045] Compared with the prior art, the beneficial effects of the present invention at least include:

[0046] By proposing an APD evaluation method for a photovoltaic - energy - storage - charging integrated system, the performance of different power decoupling circuits is evaluated from multiple dimensions such as lifespan, efficiency, and power density;

[0047] Then, an APD soft - switching control method for a photovoltaic - energy - storage - charging integrated system is proposed. Based on the selected active power decoupling circuit topology, its working principle and the implementation method of soft - switching are analyzed, and then a cascaded closed - loop control strategy for AC - DC power decoupling is proposed, which can effectively suppress the secondary harmonic current on the power supply side while keeping the decoupling capacitor voltage stable, and the power decoupling circuit can achieve full - range ZVS.

[0048] Finally, the power decoupling circuit and control strategy adopted are verified through simulation and experiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1It is a schematic diagram of a DC bus type integrated photovoltaic energy storage and charging system in the prior art;

[0050] Figure 2 It is a schematic diagram of a DC-side active power decoupling circuit provided according to an embodiment of the present invention;

[0051] Figure 3 It is a schematic diagram of three PCI (Parallel Current Injection) circuit topologies provided according to an embodiment of the present invention;

[0052] Figure 4 It is a schematic diagram of a Buck-type power decoupling system and the TCM (Triangular Current Mode) control principle;

[0053] Figure 5 It is a schematic diagram of the state diagram of a Buck circuit under TCM (Triangular Current Mode) control provided according to an embodiment of the present invention;

[0054] Figure 6 It is a schematic diagram of the system closed-loop control strategy provided according to an embodiment of the present invention;

[0055] Figure 7 It is a schematic diagram of the simulation waveform provided according to the verification example of the present invention;

[0056] Figure 8 It is a schematic diagram of the experimental prototype provided according to the verification example of the present invention;

[0057] Figure 9 It is a schematic diagram of the experimental waveform of a Buck type with APD under TCM control provided according to the verification example of the present invention;

[0058] Figure 10 It is a schematic diagram of the experimental waveform of directly increasing the bus capacitor provided according to the verification example of the present invention.

[0059] Figure 11 It is a schematic diagram of the switching action waveform of a Buck type APD provided according to the verification example of the present invention;

[0060] Figure 12 It is a schematic diagram of the system efficiency curve before and after adding the power decoupling circuit provided according to the verification example of the present invention. Detailed implementation manners

[0061] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. The described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the spirit of the present invention without creative efforts belong to the protection scope of the present invention.

[0062] Embodiment 1 of the present invention provides a method for evaluating a power decoupling circuit of a photovoltaic-storage-charging integrated system, including the following steps:

[0063] As Figure 1 shown, the photovoltaic-storage-charging integrated system is a DC bus-type photovoltaic-storage-charging system. The photovoltaic power generation unit, the energy storage unit, and the charging pile are all connected in parallel to the DC bus through DC / DC converters. The DC bus is connected to the distribution network through an inverter. The power decoupling circuit is connected to the DC side of the inverter and is used to suppress the second harmonic current on the DC side. Preferably but not restrictively, the power decoupling circuit is an APD.

[0064] Step 1: Establish a model for the suppression ability of the second harmonic current on the DC side.

[0065] If increasing the DC bus capacitance is used to suppress the second harmonic on the DC side, its essence is to improve the absorption ability of the capacitor for pulsating power. The relationship between the second pulsating power on the capacitor and related parameters is expressed by the following formula:

[0066] S b = 2πf ac CV c ΔV c (1)

[0067] In the formula:

[0068] S b is the second pulsating power on the capacitor;

[0069] f ac is the fundamental frequency;

[0070] C is the capacitance value of the capacitor;

[0071] V c is the average value of the voltage across the capacitor;

[0072] ΔV c is the ripple amount of the capacitor voltage.

[0073] Based on the model for the suppression ability of the second harmonic current on the DC side, increasing the DC bus capacitance is to increase the second pulsating power S on the capacitor by increasing the capacitance value C of the capacitor b. Since there are strict requirements for the ripple of the DC bus voltage in most cases, a large bus capacitance value is often required to meet the harmonic suppression requirements. However, the service life of electrolytic capacitors is relatively short, usually not exceeding 5000 hours, which restricts the reliability and service life of the overall circuit.

[0074] If an LC series resonance branch is added to the DC bus and the LC resonance characteristic is used to absorb the double pulsating quantity, when the LC resonance frequency f r is equal to 2f ac , the theoretical effect of suppressing the second harmonic is the best. However, since the resonance frequency is only 100 Hz, the required inductance and capacitance values of the introduced LC passive components are relatively large, which will not only increase the volume of the converter but also bring relatively large power losses.

[0075] The APD is connected to the DC side of the inverter and is an additional circuit part in the photovoltaic energy storage charging system to solve the problem of the second pulsating current on the DC side. Therefore, the APD needs to pursue the best in terms of power density and efficiency to ensure the overall system performance. The good ability of the APD to suppress the second harmonic current on the DC side is the most basic requirement. The APD actually uses a capacitor to absorb the pulsating power. Through additional topological conversion, the limitation on the ripple of the capacitor voltage is reduced, thus greatly reducing the required capacitance value.

[0076] Based on the model of the ability to suppress the second harmonic current on the DC side, the decoupling capacitor in the APD and the DC bus capacitor after adopting the APD are the key objects of concern in the present invention, which largely determines the power density of the circuit.

[0077] Step 2: Based on the model of the ability to suppress the second harmonic current on the DC side established in Step 1, construct various types of APD circuits to be evaluated.

[0078] As Figure 2 shown, the horizontal line represents the DC quantity, and the wavy line represents the AC quantity. V in and v ac respectively represent the DC input voltage and the AC output voltage, and C dc represents the DC bus capacitor.

[0079] As Figure 2 (a) shown, construct a serial voltage injection circuit for compensating voltage, denoted as SVI. The serial voltage injection circuit is connected in series to the input port of the inverter and is used to ensure the stability of the DC voltage on the input side while the DC bus capacitor voltage pulsates and compensate for the voltage pulsation. Figure 2 (a), i dc represents the pulsating current absorbed by the bus voltage, v svi represents the compensation voltage output by the serial voltage injection circuit, and the sum of the compensation voltage v svi and the bus voltage v dc is the DC input voltage Vin It can be understood that the serial voltage injection circuit uses the DC bus capacitor C dc to absorb the pulsating power. For example but not limited to, the serial voltage injection circuit is of a full-bridge structure, and the capacitors in parallel with the bridge arms serve as its decoupling capacitor C b,SVI , and the AC-side filter capacitor C f is connected in series on the bus as the voltage compensation port.

[0080] As Figure 2 (b) shows, a parallel current injection circuit for compensating current is constructed, denoted as PCI. The parallel current injection circuit is connected in parallel to the inverter input port and is used to compensate all the current secondary pulsations when the DC bus voltage remains unchanged. Figure 2 In (b), i in represents the input current on the DC side, and i b represents the pulsating current absorbed by the parallel current injection circuit. The difference between the input current i in on the DC side and the pulsating current i b absorbed by the parallel current injection circuit is the inverter input current i inv . It can be understood that the parallel current injection circuit no longer uses the DC bus capacitor C dc to absorb the pulsating power, but compensates all the current secondary pulsations when the DC bus voltage remains unchanged. For example but not limited to, the parallel current injection circuit is of a Buck, Boost or Buck - Boost structure without an output load, and the output capacitor serves as the decoupling capacitor C b,PCI .

[0081] It should be noted that according to the DC-side second-harmonic current suppression ability model, both the serial voltage injection circuit for compensating voltage and the parallel current injection circuit for compensating current reduce the capacitance value of the capacitor on the basis of achieving the same power pulsation suppression by increasing the voltage pulsation on the capacitor. In order to generate secondary voltage or current compensation, the power of both the serial voltage injection circuit and the parallel current injection circuit is pulsating.

[0082] Step 3: Since there is no load in the circuit, the pulsating power is finally absorbed by the decoupling capacitor of the APD on the DC side. Therefore, the differences in capacitor selection between the serial voltage injection circuit and the parallel current injection circuit are evaluated to form an evaluation result.

[0083] Specifically, it includes: evaluating the number of capacitors used in the serial voltage injection circuit and the parallel current injection circuit, the influence on the capacitance value of the DC bus capacitor, and the capacitor volume.

[0084] For example but not limited to, first, the serial voltage injection circuit has one more capacitor C f than the parallel current injection circuit. Second, the DC bus capacitor C dc,PCIIt is only used to filter out switching sub-harmonics, and the capacitance value can be made very small. Finally, for practical considerations, the decoupling capacitor C of the serial voltage injection circuit b,SVI has a lower voltage level, and the DC bus capacitor C when using the parallel current injection circuit dc,SVI absorbs most of the power ripple and the voltage ripple is limited. Therefore, the value of the DC bus capacitor C dc,SVI is still large, which is not conducive to improving the power density of the system. The decoupling capacitor C of the parallel current injection circuit b,PCI is close to the DC bus voltage level, so the capacitor volume is also smaller than that of the DC bus capacitor C when using the parallel current injection circuit dc,SVI .

[0085] Comprehensively considering the withstand voltage requirements, circuit efficiency and cost, comprehensively evaluate and determine the comparison results between the serial voltage injection circuit and the parallel current injection circuit.

[0086] For example but not limited to, the serial voltage injection circuit is connected in series in the DC bus, with lower withstand voltage requirements and advantages in circuit efficiency. However, the serial voltage injection circuit has two more switching devices than the parallel current injection circuit, the topology is more complex, and the cost is higher. In addition, the existence of the DC bias voltage on the decoupling capacitor of the parallel current injection circuit can better adapt to load mutations. In summary, the serial voltage injection circuit has advantages in terms of efficiency and voltage stress, while the parallel current injection circuit is better in other aspects such as power density.

[0087] Step 4: For the evaluation results in Step 3, based on each subdivision selection of the initially selected type of APD circuit, continue to evaluate the specific selection of the parallel current injection circuit from the perspectives of component volume, withstand voltage requirements, efficiency and safety.

[0088] The parallel current injection circuit includes: Boost type, Buck type and Buck-Boost type, and the topological structures are as Figure 3 shown.

[0089] For example but not limited to, the output voltage polarity of the Buck-Boost type is negative, making the voltage on both sides of the switch tube equal to the sum of the DC bus voltage and the decoupling capacitor voltage, which is inferior to the Boost or Buck circuit in terms of component volume, withstand voltage requirements, efficiency and safety.

[0090] The types and quantities of components of the Buck and Boost type APDs are the same, but the withstand voltage and overcurrent levels of the components are different. From the perspective of withstand voltage level, the voltage of the Boost type APD is higher than that of the Buck type. The parallel current injection circuit controls the decoupling circuit to generate a port current i that is complementary to the secondary pulsating current b, thus absorbing all the second-harmonic current. To suppress the same second harmonic, the input-side port currents of Buck and Boost type APDs should be the same. In the Boost circuit, this port current is equal to the inductor current; while in the Buck circuit, there is a proportional relationship between the input port current and the effective value of the inductor current, and this proportion is related to the duty cycle. Therefore, the inductor current of the Buck type APD is greater than that of the Boost type APD. In summary, it can be qualitatively judged that the Buck type APD is suitable for occasions with large voltage and small current, and the Boost type APD is suitable for occasions with small voltage and large current.

[0091] The Buck type APD and the Boost type APD have different decoupling capacitor capacitance values. According to the DC-side second-harmonic current suppression ability model established in step 1, the voltage on the decoupling capacitor of the Boost type APD is higher, and the required decoupling capacitor capacitance value is smaller. In theory, a small capacitor capacitance is beneficial to improving the power density. However, the capacitor volume is also affected by the withstand voltage level. Under the 400V voltage level, the capacitance values of ceramic capacitors and thin-film capacitors are generally in the nF to μF level, while the decoupling capacitor is generally in the tens of μF level, and small capacitors need to be connected in parallel in a stack. At this time, the capacitor volume is greatly affected by the withstand voltage level. Coupled with the DC bias characteristics of ceramic capacitors, the influence of the withstand voltage level on the capacitor volume exceeds the influence of the capacitance value, and the Buck type APD has a power density advantage instead. If the APD is used in an occasion with a smaller voltage level, the Boost type APD will gradually show its advantages. For example, in a single-stage isolated micro photovoltaic inverter, since there is no DC bus, the pulsating power can only be absorbed by the electrolytic capacitor on the photovoltaic panel side. Considering a scenario with a rated power of 500W and a DC voltage of 40V, about 20mF of electrolytic capacitor is required on the DC side; the required capacitor capacitance value for using the Buck type APD is about 1.6mF; if the Boost type APD is used, a thin-film capacitor with a rated voltage of 160V can be used, and the required capacitor capacitance value is about 100μF.

[0092] The decoupling circuit losses mainly include three parts: switch tube loss, inductor loss, and capacitor loss. In the subsequent embodiments of the present invention, soft-switching technology can be used to eliminate the switch tube turn-on loss. The losses of the remaining parts are affected by various factors such as device selection, switching frequency, voltage and current levels. However, it should be noted that in order to improve the efficiency as much as possible, the decoupling capacitor voltage range is generally set near the DC bus voltage. Therefore, the efficiency difference between the Buck type and the Boost type APDs is not particularly large, and overall, it still follows the practical rule of selecting Buck for high voltage levels and Boost for low voltage levels. The applicable scenario of the present invention is a photovoltaic-storage-charging integrated system with a common DC bus, and its DC bus voltage level is relatively high. Therefore, it is better to use the Buck type APD than the Boost type.

[0093] In the subsequent embodiments, the technical solution will be introduced in detail with the Buck type APD as an example.

[0094] Embodiment 2 of the present invention provides a method for controlling the APD soft switch of a photovoltaic-storage-charging integrated system, which is used to control the APD circuit selected after evaluation in Embodiment 1, and includes the following steps:

[0095] Step 1: Configure the working mode of the APD within the switching period by using a soft-switching strategy to achieve ZVS.

[0096] The system structure of the Buck-type APD circuit is as Figure 4 shown. After the decoupling inductor L and the decoupling capacitor C b are connected in series, they are connected in parallel with the second switching tube S 2 . After being connected in parallel, they are connected in series with the first switching tube S 1 . The other end of the first switching tube S 1 and the other end of the second switching tube S 2 serve as the two terminals of the APD circuit.

[0097] The Buck circuit adopts a soft-switching strategy based on TCM to achieve ZVS. According to the action moments of the switching tubes, a switching period can be divided into four stages, as Figure 4 shown. Taking the positive half-cycle of the alternating current as an example below, the soft-switching implementation principle of the TCM control method will be described in detail. The negative half-cycle of the alternating current is the same and will not be elaborated.

[0098] Stage I: At the beginning of this stage, the inductor current i L < 0, and the first switching tube S 1 is turned on under ZVS conditions, and the second switching tube S 2 is turned off. During the stage process, the inductor current i L rises gradually from negative to positive, as Figure 5 (a) shown.

[0099] Stage II (transition stage): Turn off the first switching tube S 1 . As Figure 5 (b) shown, since the inductor current i L > 0, the junction capacitance of the first switching tube S 1 is charged, and the junction capacitance of the second switching tube S 2 is discharged until the voltage is 0. When the voltage on the junction capacitance of the second switching tube S 2 reverses and reaches a certain value, the body diode is turned on, and the inductor current i L continues to flow through the body diode, and the voltage drop between the drain and source of the switching tube DS becomes 0.

[0100] Stage III: The second switching tube S 2 achieves ZVS turn-on. The second switching tube S 2 is turned on, and the first switching tube S 1Turn off, inductor current i L Gradually decreases and reverses until the reverse current value -I is reached r , -I r is the lower boundary current value, and this current needs to satisfy that the junction capacitance of the first switch S 2 is fully discharged during the dead time after the second switch S 1 is turned off. The schematic diagram of this stage is shown in Figure 5 (c).

[0101] Stage Ⅳ (transition stage): Turn off the second switch S 2 . As shown in Figure 5 (d), since the inductor current i L <0, the junction capacitance of the second switch S 2 is charged, and the junction capacitance of the first switch S 1 is discharged until the voltage is 0. When the voltage on the junction capacitance of the first switch S 1 reverses and reaches a certain value, the body diode turns on, and the inductor current i L flows through the body diode for freewheeling, and the voltage drop between the switch tubes DS becomes 0, preparing for the soft turn-on in the next stage I.

[0102] Step 2: Establish a mathematical model of a single-phase inverter using APD.

[0103] Establish a single-phase inverter model, including: The voltage and current on the AC side of the single-phase converter both change sinusoidally. Without loss of generality, it is expressed by the following formula:

[0104]

[0105] In the formula:

[0106] V ac is the effective value of the AC output voltage v ac ;

[0107] I ac is the effective value of the AC output current i ac ;

[0108] ω is the angular frequency, ω = 2πf ac ;

[0109] f ac is the output frequency of the single-phase inverter;

[0110] θ is the phase difference between the AC output voltage v ac and the current i ac .

[0111] The input and output side powers of the single-phase inverter are conserved, and the instantaneous power S b = V ac Iac = V dc I dc , the DC-side current i can be further calculated dc , and is expressed by the following formula:

[0112] i dc (t) = p ac (t) / V dc = I dc cosθ - I dc cos(2ωt - θ) (4)

[0113] Where:

[0114] V dc and I dc are the average values of the DC bus voltage and current respectively.

[0115] It should be noted that since the instantaneous power obtained by multiplying the AC voltage and current contains a second harmonic component, assuming that the bus voltage remains approximately constant, there will also be a second harmonic current on the DC side, that is, the last part in formula (4). The APD circuit absorbs these second current harmonics through compensation.

[0116] Therefore, based on the single-phase inverter model, a Buck-type APD model is established for configuring the decoupling capacitor, including: The Buck-type APD generates a port current complementary to the second pulsating current through controlling the decoupling circuit, thereby absorbing all the second current harmonics. The port current is expressed by the following formula:

[0117] i b = I dc cos(2ωt - θ) (5)

[0118] Where:

[0119] i b is the port current complementary to the second pulsating current.

[0120] Based on the expression of the port current, a model for the decoupling capacitor to absorb the second pulsating power is further established, including: In the Buck-type active power decoupling circuit, the DC bus capacitor C dc is used to filter the switching frequency current, and all the second pulsating power of the single-phase inverter is absorbed by the decoupling capacitor C b , and is expressed by the following formula:

[0121]

[0122] Where:

[0123] represents the port current;

[0124] vb Indicates the decoupling capacitor voltage.

[0125] Further solve the decoupling capacitor voltage according to Equation (6), which is expressed by the following formula:

[0126]

[0127] In the formula:

[0128] V b Indicates the DC component of the decoupling capacitor voltage. If the decoupling capacitor voltage v b fully pulsates between 0 and V dc According to the energy relationship, the theoretical minimum value of the decoupling capacitor can be calculated, which is expressed by the following formula:

[0129]

[0130] In the formula:

[0131] C b,min Is the theoretical minimum value of the decoupling capacitor.

[0132] In practice, to cope with sudden changes in the load, a certain DC bias voltage margin needs to be reserved for the decoupling capacitor voltage v b , and the capacitance value of the decoupling capacitor is taken as C b = 2C b,min .

[0133] When the decoupling capacitor takes twice the theoretical minimum value, the decoupling capacitor voltage v b is expressed by the following formula:

[0134]

[0135] In the formula:

[0136] V b Indicates the DC component of the decoupling capacitor voltage.

[0137] After selecting an appropriate reverse current I r , the upper and lower bounds of the inductor current envelope are expressed by the following formula:

[0138]

[0139] In the formula:

[0140] i Lref+ Is the upper bound of the inductor current envelope,

[0141] i Lref- Is the lower bound of the inductor current envelope,

[0142] i L,avg Is the average value of the inductor current.

[0143] During a switching cycle, the output voltage and current can be approximately considered as constant values. According to the voltage across the inductor, there is a current slope k during the current rising stage 1 and a current slope k during the falling stage 2 , which are expressed by the following formula:

[0144]

[0145] In the formula:

[0146] k 1 is the current slope during the current rising stage;

[0147] k 2 is the current slope during the current falling stage.

[0148] Combining formulas (9)-(11), the switching time of the switching device can be obtained, which is expressed by the following formula:

[0149]

[0150] In the formula:

[0151] t on is the turn-on time of the switching device;

[0152] t off is the turn-off time of the switching device.

[0153] According to formula (10), during the entire power frequency cycle, the reverse current I r is the minimum turn-off current, that is, the minimum soft-switching current. Taking the positive half-cycle of the current as an example, -I r needs to satisfy discharging the junction capacitance of S 1 to 0 within the dead time. It is approximately considered that the inductor current remains unchanged within the dead time, and a constraint condition is established, which is expressed by the following formula:

[0154] 0.5I r t dead >V dc C oss (13)

[0155] In the formula:

[0156] t dead is the dead time,

[0157] C oss is the parasitic capacitance of the switching device.

[0158] Step 3: Configure the APD circuit parameters based on the single-phase inverter mathematical model with the APD circuit in Step 2. Based on the operating mode configured in Step 1, configure the pulsating power feedforward control link, the decoupling capacitor voltage control link, and the DC bus voltage control link to suppress the secondary harmonic current on the DC side.

[0159] For Figure 4 the system shown, its control objective is to suppress the secondary harmonic current on the DC side while ensuring the stability of the decoupling capacitor voltage and the DC bus voltage. Therefore, the overall control strategy of the proposed system is as Figure 6 shown, mainly including three parts: pulsating power feedforward control, decoupling capacitor voltage control, and DC bus voltage control.

[0160] First, sample the voltage and current on the AC side to calculate the instantaneous power p ac of the AC side, and obtain the DC component P dc of the output power through low-pass filtering. Further separate the AC component in the instantaneous power and calculate the average inductor current feedforward quantity

[0161] Second, to maintain the stability of the decoupling capacitor voltage, compare the DC component of the decoupling capacitor voltage with its given value V b , and obtain the DC component of the current injected into the decoupling capacitor through closed-loop

[0162] Therefore, the current i in output by the DC power supply includes two parts: i dc corresponding to the DC component of the output power part and i b compensating for the energy of the decoupling capacitor. v b / v dc is the conversion coefficient between i b , which is obtained through power balance.

[0163] Subtract the voltage drop on the power supply internal resistance R s from the power supply voltage V s to obtain the DC bus voltage reference value Control the average value of the DC bus voltage through PI to output the DC part of the average inductor current reference value Control the instantaneous value of the DC bus voltage through PR to output the AC part of the average inductor current reference value Superimpose the average inductor current feedforward quantity DC part △ and the AC part of the three to obtain the average inductor current reference value

[0164] Finally, according to Equation (12), combining the decoupling capacitor voltage reference value v b , the DC bus voltage value V dc , the average inductor current reference value and the reverse current I r to calculate the turn-on and turn-off times to achieve TCM control.

[0165] Preferably but not limitedly, there is an error between the calculated reference value of the decoupling capacitor voltage and the actual value, and there is also an error between the sampled value v b_sam and the actual value. To balance the relationship between the two and utilize more effective information, a reference feedforward coefficient K f (0 < K f < 1) is introduced to update the decoupling capacitor voltage reference value v b used to calculate the turn-off time in the TCM control module, which is expressed by the following formula (14):

[0166] v b = K f ·v b * +(1 - K f )·v b_sam (14)

[0167] Wherein:

[0168] v b_sam represents the sampled value of the decoupling capacitor voltage;

[0169] represents the reference value of the decoupling capacitor voltage.

[0170] The closer the feedforward coefficient K f is to 0, the stronger the decisive role of the sampled information. After sampling calibration, the error mainly comes from random errors, which will cause jitter in the experimental waveform. The closer the feedforward coefficient K f is to 1, the stronger the decisive role of the prediction model, and the error mainly comes from systematic errors, which will cause regular deformation in the experimental waveform. Adjusting the value of the feedforward coefficient K f according to the circuit characteristics and actual working conditions can effectively improve the control effect.

[0171] Embodiment 3 of the present invention provides an APD soft-switching control system for a photovoltaic-storage-charging integrated system, which operates according to the APD soft-switching control method for a photovoltaic-storage-charging integrated system described in Embodiment 2, including: a TCM control module, a pulsating power feedforward control module, a decoupling capacitor voltage control module, and a DC bus voltage control module;

[0172] The TCM control module is used to combine the decoupling capacitor voltage reference value v b , the DC bus voltage value Vdc , average inductor current reference value and reverse current I r Calculate the turn-on and turn-off times to achieve TCM control; the pulsating power feedforward control module is used to calculate the average inductor current feedforward quantity The decoupling capacitor voltage control module is used to calculate the compensation current i b ; the DC bus voltage control module is used to use the average inductor current feedforward quantity DC part and AC part The three are superimposed to obtain the average inductor current reference value

[0173] In order to more clearly introduce the prominent substantial features of the present invention and the significant progress brought to the prior art, the following introduces two verification examples for implementing the present invention, namely building a simulation model for verification and building a prototype system for verification.

[0174] Build a simulation model for verification using a power electronics system simulation platform. The system consists of a Buck-type active power decoupling circuit and a single-phase full-bridge inverter. For the convenience of actual digital control implementation, the decoupling capacitor capacitance value calculated according to the conditions of formula (8) and formula (9) is 88.2 μF. For convenience in the experiment, the decoupling capacitor C b = 100 μF. Calculate the switching frequency range under different inductors and reverse currents according to formula (12). Finally, select the decoupling inductor L = 80 μH and reverse current I r = 2A. At this time, the maximum switching frequency is 242.6 kHz. The other parameters of the system are shown in Table 1.

[0175] Table 1 System parameters

[0176]

[0177] Under the above simulation parameters, Figure 7 The key simulation waveforms under the proposed soft-switching closed-loop control strategy at 1 kW output are given. In order, they are the average current i on the power supply side in , the average current i at the decoupling circuit port b , the average current i at the inverter input port dc , the decoupling inductor current i L and the decoupling capacitor voltage v b waveforms. The simulation results are consistent with the principle analysis. The average current at the input port of the single-phase inverter shows a second-order pulsation, and the average current at the Buck-type active power decoupling circuit port is basically complementary to it, making the average current on the power supply side fluctuate around 2.6 A, and there is almost no second-order harmonic current on the power supply side.

[0178] The prototype system parameters built in the laboratory are the same as those in Table 1. The experimental prototype is as Figure 8 shown. The main circuit consists of a pre-stage Buck-type APD, a post-stage single-phase full-bridge inverter circuit, and an LCL filter. The DSP control board selects, for example but not limited to, a 32-bit floating-point digital signal controller. Considering the experimental cost and verification nature, electrolytic capacitors and ceramic capacitors are used in combination for the decoupling capacitors. The decoupling capacitor part is composed of 3 parallel 33 μF electrolytic capacitors and 1 1 μF ceramic capacitor. If the power decoupling circuit is not added, 6 parallel 100 μF electrolytic capacitors as shown in Figure 8 are required on the DC bus.

[0179] Figure 9 are the key experimental waveforms under voltage closed-loop control, including the output AC voltage v ac , the decoupling capacitor voltage v b , the decoupling inductor current i L and the power supply side current i in . The resistance power is 600 W. Under voltage closed-loop control, the change range of the decoupling capacitor voltage is 274 - 340 V. The capacitor voltage changes periodically, and the frequency is twice that of the AC output, which is basically consistent with the theoretical calculation range in Equation (9). The waveform of the decoupling inductor current is basically the same as the theoretical waveform under TCM control. The average value is a sine wave of 100 Hz, and the DC component is almost 0. According to Equation (5), the peak value of the pulsating current corresponds to the zero-crossing point and peak value of the AC voltage. The experimental results are consistent with the theory. Most of the double-frequency current input on the inverter side is borne by the active power decoupling circuit, making the content of the secondary harmonic current on the power supply side very small. The average current on the power supply side fluctuates around 1.6 A, and the fluctuation range is about 1.2 - 1.7 A. A 600 μF electrolytic capacitor is connected in parallel on the DC side. The experimental waveform when the decoupling circuit is turned off is as shown in Figure 10 . Since the bus voltage is clamped and the pulsating space of the bus capacitor is very small, there is still an obvious secondary harmonic current on the DC side, and the fluctuation range is about 0.5 - 2.6 A. Comparing Figure 9 and Figure 10 , the Buck decoupling circuit effectively suppresses the secondary harmonic current on the power supply side by outputting double-frequency pulsating power.

[0180] Figure 11 (a) and (b) are respectively the switching action waveforms of the lower transistor in the power decoupling circuit during the positive half-cycle and negative half-cycle of the inductor current. During the positive half-cycle of the inductor current, the soft-switching current of the lower transistor is 2i Lavg +i r , and during the negative half-cycle of the inductor current, the soft-switching current of the lower transistor is I r . For the lower transistor, the soft-switching current is the smallest during the negative half-cycle of the inductor current. As shown in Figure 11 , in these two cases, before the driving signal vGS H is pulled high, vDSH has dropped to zero, and ZVS has been achieved for all the lower switches. The soft-switching conditions of the upper and lower switches are symmetric in the positive and negative half-cycles of the inductor current. Therefore, it can be considered that the power decoupling circuit has achieved ZVS in the full range.

[0181] Since it is difficult to directly measure the efficiency of the power decoupling circuit, Figure 12 the efficiency curves of the system before and after adding the power decoupling circuit are given. Further, the efficiency curve of the power decoupling circuit can be calculated as shown by the blue line in the figure, and its peak efficiency can reach more than 99%.

[0182] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications or equivalent replacements can still be made to the specific implementation manners of the present invention, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.

Claims

1. A method for evaluating a power decoupling circuit of a photovoltaic storage and charging system, characterized in that: The following steps are involved: Establish a DC side second harmonic current suppression capability model using capacitors to absorb pulsating power; Based on the established DC side second harmonic current suppression capability model, various types of power decoupling circuits including decoupling capacitors to be evaluated are constructed; A serial voltage injection circuit for a compensation voltage and a parallel current injection circuit for a compensation current are included; The evaluation result is formed based on the differences in capacitor selection between the serial voltage injection circuit and the parallel current injection circuit, including the number of capacitors, capacitance, and volume, and the comprehensive voltage resistance requirements, circuit efficiency, and cost.

2. A method for evaluating a power decoupling circuit of a photovoltaic storage and charging system according to claim 1, characterized in that: The power decoupling circuit evaluation method of the optical storage and charging system also includes: The types of power decoupling circuits that have been preliminarily selected are selected for each subdivision, and the specific selection of parallel current injection circuits is further evaluated from the perspectives of component size, withstand voltage requirements, efficiency, and safety.

3. A control method for a power decoupling circuit of a photovoltaic storage and charging system, used to control a power decoupling circuit selected after evaluation according to claim 1 or 2, characterized in that: The following steps are involved: A soft switching strategy is used to configure the working mode of the power decoupling circuit within the switching cycle to achieve zero voltage switching; Establish a mathematical model of the inverter using a power decoupling circuit; The circuit parameters of the power decoupling circuit are configured based on the mathematical model of the single-phase inverter using the power decoupling circuit. Based on the working mode of the power decoupling circuit in the switching cycle, the pulsating power feedforward control link, the decoupling capacitor voltage control link and the DC bus voltage control link are configured to suppress the second harmonic current on the DC side.

4. The power decoupling circuit control method of a solar energy storage and charging system according to claim 3, characterized in that: The power decoupling circuit adopts a Buck type power decoupling circuit, and the decoupling inductor L and the decoupling capacitor C b After being connected in series, it is connected in parallel with the second switch tube S2. After being connected in parallel, it is connected in series with the first switch tube S1. The other end of the first switch tube S1 and the other end of the second switch tube S2 serve as two terminals of the power decoupling circuit.

5. The power decoupling circuit control method of a solar energy storage and charging system according to claim 4, characterized in that: The method of using a soft switching strategy to configure the working mode of the power decoupling circuit within a switching cycle to achieve zero voltage switching includes: The Buck circuit adopts a soft switching strategy based on the triangle current mode to achieve zero voltage switching. In the half cycle of AC current, it is divided into four stages: Phase I: At the beginning of this phase, the inductor current i L <0, the first switch tube S1 is turned on under zero voltage switching conditions, and the second switch tube S2 is turned off. During the stage, the inductor current i L From negative to positive, gradually rising; Phase II: Turn off the first switch tube S1, the junction capacitance of the first switch tube S1 is charged, and the junction capacitance of the second switch tube S2 is discharged until the voltage is 0. When the voltage on the junction capacitance of the second switch tube S2 reverses and reaches a certain value, the body diode is turned on, and the inductor current i L Through the body diode freewheeling, the voltage between the drain and source of the switch tube drops to 0; Phase III: The second switch tube S2 is turned on to achieve zero voltage switching, including: the second switch tube S2 is turned on, the first switch tube S1 is turned off, and the inductor current i L Gradually decrease and reverse until the reversal current value -I is reached r ; Phase IV: Turning off the second switch tube S2, including: charging the junction capacitance of the second switch tube S2, discharging the junction capacitance of the first switch tube S1 until the voltage is 0; when the voltage on the junction capacitance of the first switch tube S1 reverses and reaches a certain value, the body diode is turned on, and the inductor current i L Through the body diode freewheeling, the voltage between the drain and source of the switch tube drops to 0, preparing for the next soft turn-on in stage I.

6. A power decoupling circuit control method for a photovoltaic storage and charging system according to claim 4 or 5, characterized in that: The establishment of a mathematical model of an inverter using a power decoupling circuit includes: A single-phase inverter model is established to obtain the DC side current expression, and the second harmonic current part is extracted as the compensation current for establishing the Buck type power decoupling circuit model; Establish a Buck type power decoupling circuit model, including: based on the decoupling capacitor voltage v b The voltage between 0 and bus voltage is fully pulsated to establish the expression of decoupling capacitor in Buck type power decoupling circuit model; based on the reverse current I r Establish the upper and lower bounds of the inductor current envelope; and then derive the switching time of the switch tube.

7. The power decoupling circuit control method of a solar energy storage and charging system according to claim 6, characterized in that: Based on the expression of the decoupling capacitor, the capacitance of the decoupling capacitor in the power decoupling circuit is configured to be a multiple of the theoretical minimum value calculated by the expression; Based on the capacitance of the decoupling capacitor in the configured power decoupling circuit, the decoupling capacitor voltage is calculated, and then the switching time of the switch tube is calculated.

8. The power decoupling circuit control method of a solar energy storage and charging system according to claim 6, characterized in that: The reverse current I r is the minimum soft switching current, the product of which and the dead time is greater than twice the product of the DC bus voltage and the parasitic capacitance of the switch tube.

9. The power decoupling circuit control method of a solar energy storage and charging system according to claim 4, characterized in that: The pulsating power feedforward control link is used for: Calculate the instantaneous power p on the AC side based on the voltage and current on the AC side of the sampled inverter ac The DC component P of the output power is obtained by low-pass filtering. dc , further separate the AC component in the instantaneous power and calculate the average inductor current feedforward 10. A power decoupling circuit control method for a photovoltaic storage and charging system according to claim 4 or 9, characterized in that: The decoupling capacitor voltage control link is used for: Maintain the stability of the decoupling capacitor voltage, compare the DC component of the decoupling capacitor voltage with its given value, and obtain the DC component of the current injected into the decoupling capacitor through a closed loop. Further with i b The conversion coefficient between the compensation current i b .

11. A power decoupling circuit control method for a photovoltaic storage and charging system according to claim 10, characterized in that: The DC bus voltage control link is used for: The power supply voltage V s Subtract the power supply internal resistance R s The voltage drop on the DC bus voltage reference value is obtained The average value of the DC bus voltage is controlled by PI, and the DC part of the average inductor current reference value is output The PR controls the instantaneous value of the DC bus voltage and outputs the AC part of the average inductor current reference value. The average inductor current feedforward DC section and communication part The three are superimposed to obtain the average inductor current reference value The triangle current mode control module combines the decoupling capacitor voltage reference value v b , DC bus voltage value V dc , average inductor current reference value and reverse current I r The turn-on and turn-off times are calculated to implement triangle current mode control.

12. A power decoupling circuit control method for a photovoltaic storage and charging system according to claim 11, characterized in that: Introducing the reference feedforward coefficient K f , 0 <K f <1, update the decoupling capacitor voltage reference value v used to calculate the disconnection time in the triangle current mode control module b , reference feedforward coefficient K f As the reference value weight of the decoupling capacitor voltage before updating, 1-K f is the weight of the decoupling capacitor voltage sampling value.

13. A power decoupling circuit soft switch control system for a photovoltaic storage and charging system, running a power decoupling circuit control method for a photovoltaic storage and charging system according to any one of claims 4 to 12, characterized in that: include: A triangle current mode control module, a pulsating power feedforward control module, a decoupling capacitor voltage control module and a DC bus voltage control module; The triangle current mode control module is used to combine the decoupling capacitor voltage reference value v b , DC bus voltage value V dc , average inductor current reference value and reverse current I r Calculate turn-on and turn-off times to implement triangle current mode control; The pulsating power feedforward control module is used to calculate the average inductor current feedforward The decoupling capacitor voltage control module is used to calculate the compensation current i b ; The DC bus voltage control module is used to feed forward the average inductor current DC section And the communication part The three are superimposed to obtain the average inductor current reference value

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