An absorbing circuit for multiple parallel flyback switching power supply MOS tubes

Abstract

The application discloses an absorption circuit for a plurality of parallel flyback switching power supplies MOS tubes, which is used for controlling the voltage between the drain and the source of the MOS tube, and comprises a first flyback circuit, a second flyback circuit and an absorption circuit, wherein the first flyback circuit and the second flyback circuit are connected in parallel and connected to the output end of the absorption circuit; high-frequency capacitors C101 and C103 form loops with the primary side leakage inductance Lm of the transformer in the first flyback circuit and the second flyback circuit respectively, so as to reduce the voltage amplitude generated by the resonance of the leakage inductance Lm and the MOS tube parasitic capacitance Coss. At the same time, the fast recovery diodes D102 and D104 are turned on, the high-frequency capacitor C102 absorbs voltage energy, the transient voltage suppression diode D101 performs voltage clamping, and the end voltage of the MOS tube in the flyback circuit is controlled. The circuit is verified by an actual plurality of parallel flyback switching power supplies, is stable and reliable in work, has good MOS tube stress control effect, and is low in cost.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of switching power supply circuit, in particular to an absorption circuit for MOS transistors of multi-parallel flyback switching power supply. BACKGROUND

[0002] When the flyback switching power supply works, the flyback MOS transistor is in a high-frequency repeated switching state. Due to the existence of the leakage inductance Lm of the flyback transformer and the parasitic capacitance of the MOS transistor, the switching state of the flyback MOS transistor will cause a large VDS voltage (the sum of the bus voltage, the secondary side emission voltage and the transformer leakage inductance peak voltage), which is easy to exceed the maximum voltage that the flyback MOS transistor can withstand, causing the flyback MOS transistor to be damaged. At the same time, the stress peak caused by the high-frequency switching state will produce strong noise pollution, forming electromagnetic interference affecting the operation of the whole machine.

[0003] The traditional absorption circuit of the flyback switching power supply is to set a corresponding absorption circuit for each branch MOS transistor, and an RCD absorption circuit is used. This RCD absorption circuit will cause a large power consumption, affecting the working efficiency of the circuit. At the same time, each branch has a corresponding absorption circuit, which will cause a large PCB layout space and high cost. SUMMARY

[0004] Therefore, it is necessary to provide an absorption circuit for MOS transistors of multi-parallel flyback switching power supply, which has a small PCB layout space, low cost and low power consumption.

[0005] An absorption circuit for MOS transistors of multi-parallel flyback switching power supply is used to control the voltage between the drain and the source of the MOS transistor, which comprises a first flyback circuit, a second flyback circuit and an absorption circuit, the first flyback circuit and the second flyback circuit are connected in parallel and connected to the output end of the absorption circuit; the first flyback circuit and the second flyback circuit each comprise a transformer and a MOS transistor connected in series, the absorption circuit comprises a fast recovery diode, a high-frequency capacitor and a transient voltage suppression diode, when the MOS transistor in the first flyback circuit and the second flyback circuit is turned off, the drain voltage of the MOS transistor charges the high-frequency capacitor through the fast recovery diode, the high-frequency capacitor absorbs energy, and when the high-frequency capacitor voltage is full and the voltage continues to rise to the clamping voltage of the transient voltage suppression diode, the transient voltage suppression diode clamps the voltage between the drain and the source of the MOS transistor within a predetermined range.

[0006] Preferably, the first flyback circuit comprises a first transformer T1, a first MOS tube Q1, a first Schottky diode D103 and a first electrolytic capacitor CE1; a first end of a primary side T1-A of the first transformer T1 is connected to a circuit input end VDC, a second end of the primary side T1-A of the first transformer T1 is connected to a drain of the first MOS tube Q1, a source of the first MOS tube Q1 is grounded GND; a first end of a secondary side T1-B of the first transformer T1 is connected to an anode of the first Schottky diode D103, a cathode of the first Schottky diode D103 is connected to a positive pole of the first electrolytic capacitor CE1, a second end of the secondary side T1-B of the first transformer T1 is connected to a negative pole of the first electrolytic capacitor CE1; the positive pole of the first electrolytic capacitor CE1 is connected to an output end OUT1 of the first flyback circuit, and the negative pole of the first electrolytic capacitor CE1 is grounded GND.

[0007] Preferably, the second flyback circuit comprises a second transformer T2, a second MOS tube Q2, a second Schottky diode D105 and a second electrolytic capacitor CE2; a first end of a primary side T2-A of the second transformer T2 is connected to a circuit input end VDC, a second end of the primary side T2-A of the second transformer T2 is connected to a drain of the second MOS tube Q2, a source of the second MOS tube Q2 is grounded GND; a second end of a secondary side T2-B of the second transformer T2 is connected to an anode of the second Schottky diode D105, a cathode of the second Schottky diode D105 is connected to a positive pole of the second electrolytic capacitor CE2, a second end of the secondary side T2-B of the second transformer T2 is connected to a negative pole of the second electrolytic capacitor CE2; the positive pole of the second electrolytic capacitor CE2 is connected to an output end OUT2 of the second flyback circuit, and the negative pole of the second electrolytic capacitor CE2 is grounded GND.

[0008] Preferably, the absorption circuit comprises a transient voltage suppression diode D101, a first high-frequency capacitor C101, a second high-frequency capacitor C102, a third high-frequency capacitor C103, a first fast recovery diode D102, a second fast recovery diode D104, and a magnetic bead inductor L101; the two ends of the first high-frequency capacitor C101 are connected in parallel to the two ends of the primary side T1-A of the first transformer T1, and a connection point between the first high-frequency capacitor C101 and the second end of the primary side T1-A of the first transformer T1 and the drain of the first MOS tube Q1 is connected to the anode of the first fast recovery diode D102; the two ends of the third high-frequency capacitor C103 are connected in parallel to the two ends of the primary side T2-A of the second transformer T2, and a connection point between the third high-frequency capacitor C103 and the second end of the primary side T2-A of the second transformer T2 and the drain of the second MOS tube Q2 is connected to the anode of the second fast recovery diode D104; the cathode of the first fast recovery diode D102 is connected to the cathode of the second fast recovery diode D104, and the cathode of the second fast recovery diode D104 is connected to the first end of the second high-frequency capacitor C102, and the second end of the second high-frequency capacitor C102 is grounded GND; the anode of the transient voltage suppression diode D101 is connected to the circuit input end VDC, and the cathode of the transient voltage suppression diode D101 is connected to a connection point between the cathode of the first fast recovery diode D102, the cathode of the second fast recovery diode D104, and the first end of the second high-frequency capacitor C102 through the magnetic bead inductor L101.

[0009] In the above absorption circuit for the MOS tube of the multi-channel parallel flyback switching power supply, the high-frequency capacitors C101 and C103 form loops with the leakage inductance Lm of the primary side of the transformer in the first flyback circuit and the second flyback circuit, respectively, to reduce the voltage amplitude generated by the resonance of the leakage inductance Lm and the parasitic capacitance Coss of the MOS tube. At the same time, the fast recovery diodes D102 and D104 are turned on, the high-frequency capacitor C102 absorbs voltage energy, the transient voltage suppression diode D101 performs voltage clamping, and the end voltage of the MOS tube in the flyback circuit is controlled. In this technical solution, only one transient voltage suppression diode, high-frequency capacitor, and fast recovery diode can effectively solve the MOS tube voltage stress problem of the multi-channel parallel flyback switching power supply. The circuit is verified by an actual multi-channel parallel flyback switching power supply, and the working stability and reliability are good, the MOS tube stress control effect is good, and the cost is low. The circuit structure of the present application is simple, easy to implement, low in cost, and convenient to popularize. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 is a structural schematic diagram of the absorption circuit for the MOS tube of the multi-channel parallel flyback switching power supply according to an embodiment of the present application.

[0011] Figure 2is a current direction schematic diagram of the MOS tube when the MOS tube of the absorption circuit for the multi-path parallel flyback switching power supply MOS tube of the embodiment of the application is turned on.

[0012] Figure 3 is a current direction schematic diagram of the MOS tube when the MOS tube of the absorption circuit for the multi-path parallel flyback switching power supply MOS tube of the embodiment of the application is turned off. DETAILED DESCRIPTION

[0013] The embodiment takes the absorption circuit for the multi-path parallel flyback switching power supply MOS tube as an example, and the application will be described in detail below in combination with specific embodiments and drawings.

[0014] Please refer to Figure 1 , Figure 2 and Figure 3 , which show an absorption circuit for a multi-path parallel flyback switching power supply MOS tube provided by the embodiment of the application, which is used to control the voltage between the drain and the source of the MOS tube, and includes a first flyback circuit, a second flyback circuit and an absorption circuit, the first flyback circuit and the second flyback circuit are connected in parallel and connected to the output end of the absorption circuit; the first flyback circuit and the second flyback circuit each include a transformer and a MOS tube connected in series, and the absorption circuit includes a fast recovery diode, a high-frequency capacitor and a transient voltage suppression diode, when the MOS tube in the first flyback circuit and the second flyback circuit is turned off, the drain voltage of the MOS tube charges the high-frequency capacitor through the fast recovery diode, the high-frequency capacitor absorbs energy, and when the high-frequency capacitor voltage is full and the voltage continues to rise to the clamping voltage of the transient voltage suppression diode, the transient voltage suppression diode clamps the voltage between the drain and the source of the MOS tube within a predetermined range.

[0015] Preferably, the first flyback circuit includes a first transformer T1, a first MOS tube Q1, a first Schottky diode D103 and a first electrolytic capacitor CE1; the first end of the primary side T1-A of the first transformer T1 is connected to the circuit input end VDC, the second end of the primary side T1-A of the first transformer T1 is connected to the drain of the first MOS tube Q1, and the source of the first MOS tube Q1 is grounded GND; the first end of the secondary side T1-B of the first transformer T1 is connected to the anode of the first Schottky diode D103, the cathode of the first Schottky diode D103 is connected to the positive electrode of the first electrolytic capacitor CE1, and the second end of the secondary side T1-B of the first transformer T1 is connected to the negative electrode of the first electrolytic capacitor CE1; the positive electrode of the first electrolytic capacitor CE1 is connected to the output end OUT1 of the first flyback circuit, and the negative electrode of the first electrolytic capacitor CE1 is grounded GND.

[0016] Preferably, the second flyback circuit comprises a second transformer T2, a second MOS tube Q2, a second Schottky diode D105 and a second electrolytic capacitor CE2; the first end of the primary side T2-A of the second transformer T2 is connected to the circuit input end VDC, the second end of the primary side T2-A of the second transformer T2 is connected to the drain of the second MOS tube Q2, and the source of the second MOS tube Q2 is grounded GND; the second end of the secondary side T2-B of the second transformer T2 is connected to the anode of the second Schottky diode D105, the cathode of the second Schottky diode D105 is connected to the positive electrode of the second electrolytic capacitor CE2, and the second end of the secondary side T2-B of the second transformer T2 is connected to the negative electrode of the second electrolytic capacitor CE2; the positive electrode of the second electrolytic capacitor CE2 is connected to the output end OUT2 of the second flyback circuit, and the negative electrode of the second electrolytic capacitor CE2 is grounded GND.

[0017] Preferably, the absorption circuit comprises a transient voltage suppression diode D101, a first high-frequency capacitor C101, a second high-frequency capacitor C102, a third high-frequency capacitor C103, a first fast recovery diode D102, a second fast recovery diode D104, and a magnetic bead inductor L101; the two ends of the first high-frequency capacitor C101 are connected in parallel across the two ends of the primary side T1-A of the first transformer T1, and the connection point between the first high-frequency capacitor C101 and the second end of the primary side T1-A of the first transformer T1 and the drain of the first MOS tube Q1 is connected to the anode of the first fast recovery diode D102; the two ends of the third high-frequency capacitor C103 are connected in parallel across the two ends of the primary side T2-A of the second transformer T2, and the connection point between the third high-frequency capacitor C103 and the second end of the primary side T2-A of the second transformer T2 and the drain of the second MOS tube Q2 is connected to the anode of the second fast recovery diode D104; the cathodes of the first fast recovery diode D102 and the second fast recovery diode D104 are connected, and are also connected to the first end of the second high-frequency capacitor C102, and the second end of the second high-frequency capacitor C102 is grounded GND; the anode of the transient voltage suppression diode D101 is connected to the circuit input end VDC, and the cathode of the transient voltage suppression diode D101 is connected to the connection point between the cathodes of the first fast recovery diode D102 and the second fast recovery diode D104 and the first end of the second high-frequency capacitor C102 through the magnetic bead inductor L101.

[0018] When the first MOS tube Q1 and the second MOS tube Q2 are turned on during operation of the circuit, the cathode voltage of the transient voltage suppression diode D101 is substantially the same as the bus voltage; the first fast recovery diode D102 and the second fast recovery diode D104 are cut off. At this time, the current direction in the circuit is as follows:Figure 2 As shown.

[0019] When the first MOS Q1 and the second MOS Q2 are off, due to the VDS voltage of the MOS cannot be mutated, the current charges the parasitic capacitor Coss between the MOS, at this time, the parasitic capacitor Coss between the MOS and the leakage inductance Lm of the transformer resonate, causing the VDS peak voltage between the MOS.

[0020] At this time, under the action of the absorption circuit, the first high-frequency capacitor C101 and the third high-frequency capacitor C103 form a loop with the leakage inductance Lm of the primary side T1-A of the first transformer T1 and the primary side T2-A of the second transformer T2 respectively, thereby reducing the energy of the leakage inductance Lm, so as to reduce the voltage amplitude generated by the resonance of the leakage inductance Lm and the parasitic capacitor Coss of the MOS. At the same time, the first fast recovery diode D102 and the second fast recovery diode D104 are turned on respectively, so that the second high-frequency capacitor C102 can absorb voltage energy, when the voltage reaches the working voltage of the transient voltage suppression diode D101, the transient voltage suppression diode D101 acts, realizes voltage clamping, clamps the voltage to the sum of the bus voltage and the action voltage of the transient voltage suppression diode D101, thereby controlling the voltage stress of the flyback MOS. At this time, the current direction in the circuit is as shown. Figure 3 As shown.

[0021] In the above absorption circuit for multiple parallel flyback switching power supply MOS, the high-frequency capacitors C101 and C103 form a loop with the leakage inductance Lm of the transformer in the first flyback circuit and the second flyback circuit respectively, thereby reducing the voltage amplitude generated by the resonance of the leakage inductance Lm and the parasitic capacitor Coss of the MOS. At the same time, the fast recovery diodes D102 and D104 are turned on, so that the high-frequency capacitor C102 absorbs voltage energy, and the transient voltage suppression diode D101 clamps the voltage to control the voltage of the MOS in the flyback circuit. In this technical solution, only one transient voltage suppression diode, high-frequency capacitor and fast recovery diode can effectively solve the MOS voltage stress problem of multiple parallel flyback switching power supply. The circuit is verified by actual multiple parallel flyback switching power supply, and is stable and reliable in work, good in MOS stress control effect, and low in cost. The circuit structure of the present application is simple, easy to realize, low in cost and convenient to popularize.

[0022] It should be noted that the above only describes the preferred embodiments of the present application, and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A snubber circuit for a multi-channel parallel flyback switching power supply MOSFET, used to control the voltage between the drain and source of the MOSFET, characterized in that, The device includes a first flyback circuit, a second flyback circuit, and a snubber circuit. The first and second flyback circuits are connected in parallel and connected to the output of the snubber circuit. The first and second flyback circuits each include a transformer and a MOSFET connected in series. The snubber circuit includes a fast recovery diode, a high-frequency capacitor, and a transient voltage suppressor diode. When the MOSFETs in the first and second flyback circuits are turned off, the drain voltage of the MOSFET charges the high-frequency capacitor through the fast recovery diode. The high-frequency capacitor absorbs energy, and when it is fully charged, the voltage continues to rise until it reaches the clamping voltage of the transient voltage suppressor diode. The transient voltage suppressor diode clamps the voltage between the drain and source of the MOSFET within a predetermined range. The first flyback circuit includes a first transformer T1, a first MOSFET Q1, a first Schottky diode D103, and a first electrolytic capacitor CE1; the second flyback circuit includes a second transformer T2, a second MOSFET Q2, a second Schottky diode D105, and a second electrolytic capacitor CE2. The absorption circuit includes a transient voltage suppression diode D101, a first high-frequency capacitor C101, a second high-frequency capacitor C102, a third high-frequency capacitor C103, a first fast recovery diode D102, a second fast recovery diode D104, and a ferrite bead inductor L101. The two ends of the first high-frequency capacitor C101 are connected in parallel to the two ends of the primary winding T1-A of the first transformer T1. The connection point between the first high-frequency capacitor C101 and the second end of the primary winding T1-A of the first transformer T1, and the drain of the first MOSFET Q1, is connected to the anode of the first fast recovery diode D102. The two ends of the third high-frequency capacitor C103 are connected in parallel to the two ends of the primary winding T2-A of the second transformer T2. The third high-frequency capacitor C103 and the second transformer... The connection point between the second terminal of the primary side T2-A of the device T2 and the drain of the second MOS transistor Q2 is connected to the anode of the second fast recovery diode D104; the cathode of the first fast recovery diode D102 is connected to the cathode of the second fast recovery diode D104, and is also connected to the first terminal of the second high-frequency capacitor C102, the second terminal of the second high-frequency capacitor C102 is grounded to GND; the anode of the transient voltage suppression diode D101 is connected to the circuit input terminal VDC, and the cathode of the transient voltage suppression diode D101 is connected through the ferrite bead inductor L101 to the connection point between the cathode of the first fast recovery diode D102, the cathode of the second fast recovery diode D104 and the first terminal of the second high-frequency capacitor C102.

2. The absorption circuit for multi-channel parallel flyback switching power supply MOSFETs as described in claim 1, characterized in that, The first terminal of the primary side T1-A of the first transformer T1 is connected to the circuit input terminal VDC, and the second terminal of the primary side T1-A of the first transformer T1 is connected to the drain of the first MOSFET Q1. The source of the first MOSFET Q1 is grounded to GND. The first terminal of the secondary side T1-B of the first transformer T1 is connected to the anode of the first Schottky diode D103. The cathode of the first Schottky diode D103 is connected to the positive terminal of the first electrolytic capacitor CE1. The second terminal of the secondary side T1-B of the first transformer T1 is connected to the negative terminal of the first electrolytic capacitor CE1. The positive terminal of the first electrolytic capacitor CE1 is connected to the output terminal OUT1 of the first flyback circuit, and the negative terminal of the first electrolytic capacitor CE1 is grounded to GND.

3. The absorption circuit for multi-channel parallel flyback switching power supply MOSFETs as described in claim 2, characterized in that, The first terminal of the primary side T2-A of the second transformer T2 is connected to the circuit input terminal VDC, and the second terminal of the primary side T2-A of the second transformer T2 is connected to the drain of the second MOSFET Q2. The source of the second MOSFET Q2 is grounded to GND. The first terminal of the secondary side T2-B of the second transformer T2 is connected to the anode of the second Schottky diode D105. The cathode of the second Schottky diode D105 is connected to the positive terminal of the second electrolytic capacitor CE2. The second terminal of the secondary side T2-B of the second transformer T2 is connected to the negative terminal of the second electrolytic capacitor CE2. The positive terminal of the second electrolytic capacitor CE2 is connected to the output terminal OUT2 of the second flyback circuit, and the negative terminal of the second electrolytic capacitor CE2 is grounded to GND.

Images