Method and system for improving low signal-to-noise ratio direct sequence spread spectrum signal code tracking performance

By generating I-channel bipolar code sources in direct sequence spread spectrum technology, performing spread spectrum and filtering optimization, and coherent integration and closed-loop feedback at the receiver, the problems of poor code tracking performance under low signal-to-noise ratio and serious crosstalk between codes are solved, and higher communication quality and more reasonable hardware resource utilization are achieved.

CN120074565APending Publication Date: 2025-05-30BEIJING YINHE XINTONG TECH CO LTD
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Patent Information

Application Number
CN202510224964.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-27
Publication Date
2025-05-30

AI Technical Summary

Technical Problem

Direct sequence spread spectrum technology has poor code tracking performance, serious crosstalk between codes and unreasonable hardware resource utilization in low signal-to-noise environments, resulting in a decline in communication quality.

Method used

By generating an I-channel bipolar code source, spread spectrum, oversampling and root-raised cosine filter convolution are performed to optimize the signal spectrum; match filtering, coherent integration and incoherent accumulation operations are performed at the receiving end, code phase identification values ​​are obtained, and the NCO of the local pseudocode sequence is corrected through closed-loop feedback.

Benefits of technology

It significantly improves the code tracking performance under low signal-to-noise ratio, reduces inter-code crosstalk, improves signal decoding accuracy and communication quality, and optimizes hardware resource utilization, enhances the integration and scalability of the system.

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Abstract

The invention discloses a method and system for improving low signal-to-noise ratio direct sequence spread spectrum signal code tracking performance, and the method comprises the steps: generating an I-path bipolar code information source, and obtaining a baseband signal; performing convolution operation with the matched filter coefficient to obtain a matched filtering result; time lag and time lead are respectively carried out according to a specified length, so that a lag branch signal and a lead branch signal are respectively obtained; coherent integration is carried out on the local pseudo code sequence at a PL end, and an envelope value is solved; setting an incoherent accumulation length at a PS end, performing incoherent accumulation operation on the envelope value, and selecting a code phase discrimination mode to obtain a code phase discrimination value; and a phase change value is obtained through the linear filter and a loop filter of the code loop, and the phase change value is used for correcting the NCO of the local pseudo code sequence to realize closed-loop feedback. Code tracking performance is improved, signals can be accurately transmitted in a complex interference environment, error codes are reduced, inter-symbol crosstalk is effectively reduced, signal decoding accuracy is improved, and communication quality is guaranteed.
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Description

Technical Field

[0001] The present invention relates to the technical field of communication signal processing, and particularly to a method and system for improving the code tracking performance of direct sequence spread spectrum signals with low signal-to-noise ratio. Background Art

[0002] In the field of modern communication, direct sequence spread spectrum technology is widely used. However, it faces many challenges in actual applications and urgently needs to be solved.

[0003] With the increasingly complex communication environment, the interference received during signal transmission increases, and the situation of low signal-to-noise ratio frequently occurs. Under such harsh conditions, the code tracking performance of traditional direct sequence spread spectrum signal processing methods significantly deteriorates. On the one hand, due to the strong interference of noise, it is difficult to maintain the stability of the signal's spectral characteristics. This leads to signal distortion during transmission, making it difficult for the receiving end to accurately identify the information carried by the signal. For example, when the signal passes through a noisy electromagnetic environment, the high-frequency components of the signal are submerged by the superimposed noise, and the spectrum shows irregular fluctuations, which in turn affects the subsequent signal processing links. On the other hand, the inter-symbol interference problem also brings great troubles to the direct sequence spread spectrum system. Under the traditional technical architecture, due to the lack of effective signal shaping and optimization means, the signals between adjacent code elements interfere severely with each other. This not only reduces the signal transmission efficiency but also greatly increases the probability of misjudgment at the receiving end, resulting in a significant reduction in communication quality. For example, in high-speed data transmission scenarios, inter-symbol interference causes decoding errors of consecutive code elements at the receiving end, and the accuracy of information cannot be guaranteed. In addition, the traditional method does not utilize hardware resources reasonably. Computationally complex signal processing tasks are often concentrated on hardware such as FPGAs, which not only increases the burden on the hardware but also limits the integration and scalability of the system. With the continuous increase in the functional requirements of communication systems, this resource utilization method makes it difficult for the system to quickly respond to new requirements and hinders the further development of technology. Therefore, the existing direct sequence spread spectrum technology faces technical problems such as poor code tracking performance, severe inter-symbol interference, and unreasonable utilization of hardware resources under low signal-to-noise ratio, and there is an urgent need for a new technical solution to break through these dilemmas and improve the processing ability and communication quality of direct sequence spread spectrum signals. Summary of the Invention

[0004] In view of this, the present invention proposes a method and system for improving the code tracking performance of direct sequence spread spectrum signals with low signal-to-noise ratio, which can effectively improve the processing ability and communication quality of direct sequence spread spectrum signals. The present invention provides the following technical solutions:

[0005] A method for improving the code tracking performance of direct sequence spread spectrum signals with low signal-to-noise ratio. The method includes: generating an I-channel bipolar code source, and processing the data of the source to obtain a baseband signal to be transmitted; performing a convolution operation on the baseband signal and the matching filter coefficients to achieve carrier stripping and obtain a matched filtering result; performing time lag and time lead operations on the matched filtering result according to a specified length to respectively obtain a lag branch signal and a lead branch signal; coherently integrating the lag branch signal, the in-phase branch signal, and the lead branch signal with a local pseudo-code sequence at the PL end, and obtaining an envelope value according to the coherent integration result; setting an incoherent accumulation length at the PS end, performing an incoherent accumulation operation on the envelope value, selecting a code phase discrimination method and obtaining a code phase discrimination value; writing the code phase discrimination value to the PL end, performing a linear filtering process on it, and then obtaining a phase change value through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo-code sequence to achieve closed-loop feedback.

[0006] Optionally, the method of performing oversampling on the spread spectrum signal and convolving it with a root raised cosine filter to achieve shaping filtering includes: selecting a clock frequency for digital-to-analog conversion (DAC) and hardware processing, and setting the sampling frequency of the signal at the transmitting end to determine the oversampling rate of the signal; selecting the carrier Doppler at the signal transmitting end, and calculating the pseudo-code Doppler at this time according to its corresponding relationship with the pseudo-code Doppler; generating a double oversampling rate of the spread spectrum signal according to the sampling frequency of the signal, and generating an oversampled signal; calculating the root raised cosine filter coefficients at the transmitting end, convolving the oversampled signal with the filter coefficients, and obtaining a shaped filtered signal.

[0007] Optionally, the step of generating an I-channel bipolar code source and processing the data of the source to obtain a baseband signal to be transmitted includes: spreading the data of the source with a spreading code to obtain a spread spectrum signal; selecting a system sampling frequency higher than the chip rate of the I channel, and performing high oversampling on the spread spectrum signal at this system sampling frequency, and then convolving the sampled signal with a root raised cosine filter to obtain a shaped filtered signal; performing filtering and decimation operations on the shaped filtered signal to obtain a baseband signal to be transmitted.

[0008] Optionally, the step of performing filtering and decimation operations on the shaped filtered signal to obtain a baseband signal to be transmitted includes: adding carrier Doppler to the shaped filtered signal and convolving it with an anti-aliasing filter; directly performing a decimation operation on the convolved signal; converting the decimated signal into an analog signal through a DAC, and using the analog signal as the baseband signal to be transmitted.

[0009] Optionally, the steps of coherently integrating the lag signal, the prompt branch signal, and the lead signal with the local pseudo-code sequence at the PL end respectively, and obtaining the envelope value according to the coherent integration result include: obtaining the pseudo-code spreading sequence local to the receiving end, and using a correlator to coherently integrate the lead branch signal, the prompt branch signal, and the lag branch signal with the pseudo-code spreading sequence respectively to obtain the coherent integration result of the lead branch and the coherent integration result of the lag branch; obtaining the envelope value of the lead branch signal by operating on the in-phase component and the quadrature component in the coherent integration result of the lead branch; obtaining the envelope value of the lag branch signal by operating on the in-phase component and the quadrature component in the coherent integration result of the lag branch.

[0010] Optionally, the steps of setting the non-coherent accumulation length at the PS end, performing non-coherent accumulation operation on the envelope value, and selecting a code phase discrimination method and obtaining a code phase discrimination value include: extracting the envelope values of the lead branch signal and the lag branch signal and reporting them to the PS end; setting the non-coherent accumulation length at the PS end, and performing non-coherent accumulation operation of adding the envelope values of the lead branch signal and the lag branch signal respectively; selecting a preset normalized lead minus lag amplitude method or a normalized lead minus lag power method as the code phase discrimination method, and calculating the code phase discrimination value based on the result of the non-coherent accumulation operation.

[0011] Optionally, the steps of writing the code phase discrimination value to the PL end, performing linear filtering processing on it, and then obtaining a phase change value through the loop filter of the code loop, where the phase change value is used to correct the local pseudo-code sequence NCO to achieve closed-loop feedback include: configuring a weighting factor to perform weighted averaging on the phase discrimination value to calculate the phase discrimination error; performing quantization processing on the phase discrimination error, and writing the quantized phase discrimination error to the PL end through the configured AXI GPIO interface; the PL end performs linear filtering on the received phase discrimination error through a linear filter, and then filters out noise from the data after the linear filtering processing through the loop filter of the code loop to obtain a phase change value, and uses the phase change value to correct and control the NCO of the local pseudo-code sequence; when the NCO overflows, its value returns to zero, so as to achieve negative feedback control of the code loop, and the coherent integration result of the prompt branch is the de-spread data result output by the code loop to achieve closed-loop feedback.

[0012] The present invention further discloses a system for improving the code tracking performance of a direct sequence spread spectrum signal with low signal-to-noise ratio, including:

[0013] A signal processing module, configured to generate a bipolar code source for the I channel, and process the data of the source to obtain a baseband signal to be transmitted;

[0014] A filtering processing module, configured to perform a convolution operation based on the baseband signal and the matched filter coefficient to achieve carrier stripping and obtain a matched filtering result;

[0015] The coherent integration and phase discrimination module is used to perform time-lag and time-advance operations on the matched filtering results respectively according to a specified length, so as to obtain a lag-branch signal and a lead-branch signal respectively; it is also used to perform coherent integration on the lag-branch signal, the in-phase branch signal, and the lead-branch signal respectively with a local pseudo-code sequence at the PL end, and obtain an envelope value according to the coherent integration result; set an incoherent accumulation length at the PS end, perform an incoherent accumulation operation on the envelope value, select a code phase discrimination method and obtain a code phase discrimination value.

[0016] The closed-loop feedback module is used to write down the code phase discrimination value to the PL end, perform linear filtering processing on it, and then obtain a phase change value through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo-code sequence to achieve closed-loop feedback.

[0017] The present invention further discloses a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the method for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal is realized.

[0018] The present invention further discloses an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the method for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal is realized.

[0019] The present invention further discloses a computer program product, including a computer program. When the computer program is executed by a processor, the method for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal is realized.

[0020] According to the technical solution of the present invention, starting from the signal generation, first, the generated in-phase bipolar code source is spread spectrum by a spreading code, then shaped filtering of oversampling and convolution with a root raised cosine filter is performed, and filtering and decimation are carried out to obtain a baseband signal. Through the above operations, the signal waveform is optimized and the inter-symbol interference is reduced. Then, the matched filtering result is obtained by convolution with the matched filter coefficient. After that, the branches are divided according to a specific time rule and the coherent integration with the local pseudo-code sequence is performed to obtain the envelope value. Also, the non-coherent accumulation length is flexibly set according to the noise environment, and a suitable code phase discrimination method is selected to obtain the phase discrimination value. Finally, the phase discrimination value is written down to the PL end, and the noise is filtered by the loop filter of the code loop and the local pseudo-code sequence NCO is corrected to achieve closed-loop feedback. Therefore, the code tracking performance under low signal-to-noise ratio can be greatly improved, and the inter-symbol interference can be effectively reduced to improve the signal decoding accuracy, so that the signal can be accurately transmitted in a complex interference environment, reducing bit errors and ensuring the communication quality. At the same time, by reasonably allocating processing tasks, the utilization of hardware resources is optimized, and the system integration and scalability are enhanced; it can also be dynamically adjusted according to the noise and adaptively cope with different noisy environments, providing support for the reliable application of direct sequence spread spectrum technology in various complex communication scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] For purposes of illustration and not limitation, the present invention will now be described in conjunction with the embodiments and drawings of the present invention, wherein:

[0022] Figure 1 is a schematic flowchart of a method for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal in an embodiment of the present invention;

[0023] Figure 2 is a schematic structural diagram of a system for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal in an embodiment of the present invention;

[0024] Figure 3 is a schematic structural diagram of an electronic device in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the scope of protection of the present application.

[0026] It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments can be combined with each other. The embodiments of the present application will be described in detail below in conjunction with the drawings.

[0027] ReferenceFigure 1 , this embodiment discloses a method for improving the code tracking performance of a direct sequence spread spectrum (DSSS) signal with low signal-to-noise ratio (SNR). In particular, it can effectively improve the code tracking performance of the DSSS signal under low SNR. The method includes:

[0028] S100: Generate a bipolar code source for the in-phase (I) channel, and process the data of this source to obtain the baseband signal to be transmitted.

[0029] Specifically, use the spreading code to perform spreading operation on the data of this source to obtain the spread signal; the above implementation method steps are implemented at the signal transmitter. Specifically, generate an I-channel bipolar sequence D 1 (n), the spreading code is C(n), and the chip rate of the I-channel is denoted as R chip . For subsequent acquisition needs, the initial sequence of the I-channel sequence is a known sequence head, and the spread signal is s(n).

[0030] Furthermore, select a system sampling frequency higher than the chip rate of the I-channel, perform high oversampling on the spread signal at this system sampling frequency, and then convolve the sampled signal with a root raised cosine filter to obtain the shaped filtered signal.

[0031] Among them, high oversampling can increase the number of sampling points of the signal, improve the resolution and accuracy of the signal, enable the signal to better retain detailed information in subsequent processing, reduce information loss, and at the same time help reduce the influence of noise and improve the anti-interference ability of the signal; and convolving the sampled signal with a root raised cosine filter for shaping filtering can make the signal spectrum meet specific requirements, effectively limit the signal bandwidth, reduce the spectrum spread of the signal during transmission, reduce interference to adjacent channels, make the signal have better spectral characteristics, improve the effectiveness and reliability of signal transmission, ensure the integrity and accuracy of the signal during transmission, and thus provide a better basic signal for subsequent signal processing and reception.

[0032] Specifically, select the clock frequency for digital-to-analog conversion (DAC) and hardware processing, denote the clock frequency as f clk , and at the same time set the sampling frequency f s of the transmitter signal to determine the oversampling rate. The calculation formula for the oversampling rate is: osr = f s / R chip , and at the same time, denote the spreading ratio of the I-channel signal as ss. Select the carrier Doppler of the signal transmitter, and calculate the corresponding pseudo-code Doppler at this time according to its correspondence with the pseudo-code Doppler. By selecting the carrier Doppler of the transmitter as f d , this embodiment exemplarily gives the correspondence between the carrier Doppler and the pseudo-code Doppler as Among them, f cis the signal carrier frequency, f chip is the pseudo-code Doppler. The pseudo-code Doppler at this time can be calculated according to the value of the carrier Doppler: f chip = f d _R chip / f c . Further, generate the oversampling rate of the spread-spectrum signal according to the sampling frequency of the signal, and generate the oversampled signal. The specific method is to generate the osr-fold oversampling sequence of s(n) according to the sampling frequency of f s : When there is no Doppler, select the step of the NCO as FCW chip = R chip / f s ; When there is Doppler, calculate the change amount introduced by the pseudo-code Doppler as ΔFCW chip = f chip / f s = f d / f s × R chip / f c , and the step of the NCO is FCW chip = ΔFCW chip + R chip / f s .

[0033] In this embodiment, the working principle of the NCO is: every time the interval is 1 / f s , the value of the NCO increases by the step value FCW chip . When the accumulated result of the NCO value overflows (exceeds 1), the output selection is to output the signal sequence s(k), and at the same time make k = k + 1; when the accumulated result of the NCO value does not overflow, the output selection is to output 0. The oversampled signal generated thus is s osr (n). After obtaining the oversampled signal, calculate the root raised cosine filter coefficient at the transmitting end, and perform shaping filtering on the oversampled signal s osr (n). The roll-off factor is β, the number of filter symbols is M, and the oversampling rate of each symbol is osr. Using the rcosdesign function of Matlab, select the filter type as the root raised cosine filter, generate the filter coefficient coe, and the filter length is M×osr + 1. Convolve the oversampled signal s osr (n) with the filter coefficient coe to obtain the shaped filtered signal s 1 (n).

[0034] After obtaining the shaped filtered signal, add the carrier Doppler to the shaped filtered signal, convolve it with the anti-aliasing filter, then directly perform the decimation operation on the convolved signal, and convert the decimated signal into an analog signal through the DAC, and use the analog signal as the baseband signal to be transmitted.

[0035] That is, by adding carrier Doppler to the signal s 1 (n), according to the value of the carrier Doppler f d , set the signal spectrum shift frequency to f d , and the baseband signal after adding carrier Doppler is Furthermore, generate an anti-aliasing filter h 1 (n). To filter out out-of-band noise and prevent aliasing after decimation, generate an FIR filter h 1 (n), whose sampling frequency is f s , and the passband and stopband frequencies are (R chip +f dmax ) and (R chip +f dmax +Δ) respectively, where Δ is selected as an appropriate margin according to the filter order and actual situation. h 1 (n) is convolved with s 2 (n) to obtain the signal s 3 (n). Perform direct decimation on s 3 (n), and the decimation factor is K = f s / f clk . After decimation, the signal s 4 (n) is obtained, and its representation is: s 4 (n) = A I [∑ n D 1 (nRT I )·C(nT I )]cos[ωn / f s +A Q [∑ n D 2 (nRT Q )]sin[ωn / f s , where ω = 2π(f c +f d ) represents the carrier Doppler, T I represents the in-phase branch pulse width, T Q represents the quadrature branch pulse width, and R represents the spreading ratio. The sampling rate of this signal is the same as the DAC sampling frequency. Convert s 4 (n) to an analog signal through the DAC, that is, the baseband signal to be transmitted, and further shift it to the carrier frequency f c , and input it into the physical transmission channel.

[0036] S200: Perform a convolution operation based on the baseband signal and the matched filter coefficients to achieve carrier stripping and obtain the matched filtering result.

[0037] Specifically, after passing through the physical transmission channel, the signal after ADC sampling received is denoted as r(n): r(n) = s 4 ′(n) + n(n) + J(n), where the components of r(n) include the valid signal s 4 ′(n), the noise signal n(n), and the interference signal J(n). The shaping filter coefficients coe are decimated to obtain the matched filter coefficients coe 1 , with the decimation factor being K. r(n) is convolved with coe 1 . After decimation, the root raised cosine filter coefficients at the receiving and transmitting ends exactly correspond, and the matched filtering result r 1 (n) is obtained.

[0038] S300: After receiving the matched filtering result, the received signal is converted into a digital signal through an ADC, and it is subjected to matched filtering. The new matched filtering result is respectively subjected to time lag and time lead operations according to a specified length, thereby obtaining a lag branch signal and a lead branch signal respectively.

[0039] Specifically, taking a specific moment as a reference, the matched filtering result is shifted forward by a fixed length in time to obtain the lead branch signal, and shifted backward by a fixed length to obtain the lag branch signal. The signal corresponding to this specific moment is used as the immediate branch signal. In this embodiment, d represents the spacing between adjacent branches, then the spacing D between the lead and lag branches is D = 2d. The lead branch signal is denoted as r 1 (n), then the immediate branch signal can be denoted as r 1 (n - d), and the lag branch signal is denoted as r 1 (n - 2d).

[0040] S400: The lag branch signal, the immediate branch signal, and the lead branch signal are respectively subjected to coherent integration with the local pseudo - code sequence at the PL end, and the envelope value is obtained according to the coherent integration result.

[0041] Specifically, a local pseudo - code spreading sequence at the receiving end is generated, and a correlator is used to respectively perform coherent integration on the lead branch signal, the immediate branch signal, and the lag branch signal with the local pseudo - code spreading sequence at the PL end to obtain the lead branch coherent result and the lag branch coherent result. In this embodiment, the local pseudo - code spreading sequence at the receiving end is denoted as C 1 (n). Taking the lead branch as an example, the result z(n) obtained by the correlator performing correlation operations on the three - branch signals with the local pseudo - code spreading sequence respectively is: where N coh is the number of discrete data points participating in the correlation operation, and the corresponding coherent integration time length is T coh。At this time, after despreading, integration, and cancellation, the signal energy has far exceeded the noise energy. The coherent results of the leading branch, prompt branch, and lagging branch are I E , Q E , I P , Q P , I L , Q L .

[0042] By operating on the in-phase component and quadrature component in the coherent result of the leading branch to obtain the signal envelope value of the leading branch, the calculation formula for the signal envelope value of the leading branch is: By operating on the in-phase component and quadrature component in the coherent result of the lagging branch to obtain the signal envelope value of the lagging branch, the calculation formula for the signal envelope value of the lagging branch is: In this embodiment, exemplarily, a dual-channel AXI GPIO is configured on the Block Design of the Zynq-7000 series. The number of ports of GPIO1 is set according to the quantization bit width of the two signal envelope values. The signal flow direction of each port is from the PL side to the PS side. At the same time, GPIO1 is configured as an interrupt trigger mechanism. Connect the interrupt signal of the GPIO to the IRQ_F2P interrupt signal of the Zynq, which indicates the interrupt triggered by the PL side to the PS side. Select the edge trigger mode. When the reported data connected to the PL side, that is, the signal envelope value E or L changes, an interrupt is triggered, the current process of the PS side is interrupted, and GPIO1 reports the new envelope values E and L to the PS side.

[0043] S500: Set the non-coherent accumulation length at the PS side, perform non-coherent accumulation operation on the envelope value, and select a code discrimination method to obtain a code discrimination value.

[0044] Specifically, extract the envelope values of the coherent integration results of the leading branch and the lagging branch, and perform accumulation. Taking step S400 as an example, when the interrupt is triggered at the PS side, first jump to the data reading program, extract the envelope values E and L of the coherent integration results of the leading and lagging branches, and accumulate the current envelope values E and L to variables E sum , L sum . Secondly, count the current number of coherent integration results as n inco = n inco + 1, and clear the interrupt flag signal. The implementation process of adding and accumulating N nc coherent integration results E(n) and L(n) is as follows:

[0045] When the number of coherent integration results n inco = N nc , output the non-coherent accumulation results E inco and L of the leading branch and the lagging branchinco Meanwhile, clear E sum and L sum to zero.

[0046] Furthermore, the PS side is equipped with two different code phase discrimination methods, namely the normalized leading minus lagging amplitude method and the normalized leading minus lagging power method. If the normalized leading minus lagging amplitude method is selected, the incoherent accumulation results of the leading branch and the lagging branch are read for calculation, and the calculation formula is: Calculate the code phase discrimination value; if the normalized leading minus lagging power method is selected, the incoherent accumulation results of the leading branch and the lagging branch are read for operation, and the calculation formula is: Calculate the code phase discrimination value. To further improve the reliability of the phase discrimination value, this embodiment further uses a method of linearly filtering the phase discrimination result of the previous loop update to make the result smoother. Among them, the linear filtering carried by the PS side includes a moving average filter, a weighted moving average filter, and an exponentially weighted moving average filter. The moving average filter (Moving Average Filter) realizes the smoothing of the signal by taking the average value within the time window at each moment, and is used to reduce the random noise in the signal. Its calculation formula is:

[0047]

[0048] where δ k represents the code phase discrimination value calculated from the incoherent accumulation result, and M is the window length of the moving average filter. That is, each code phase discrimination result needs to be calculated from M code phase discrimination values.

[0049] Furthermore, configure a weighting factor to perform weighted averaging on the phase discrimination value to calculate the phase discrimination error. Specifically, the weighted moving average filter gives different weights according to the influence degree of data at different times on the predicted value, and then realizes filtering through average movement. Different from the moving average filter, the weighted moving average filter gives a larger weight to recent data and a smaller weight to farther data according to the characteristic that recent data has a greater influence on the predicted value, so as to make up for the deficiencies of the moving average filter. Its calculation formula is:

[0050] where δ k represents the code phase discrimination value calculated from the incoherent accumulation result, and M is the window length of the weighted moving average filter. That is, each code phase discrimination result needs to be calculated from M code phase discrimination values.

[0051] Further, the exponential weighted moving average (EWMA) filter is a moving average with exponentially decreasing weights. The weighted influence of each moment's value decreases exponentially over time. The phase discrimination value is weighted and averaged according to the weighting factor α, and its calculation formula is:

[0052] where δ k is the code phase discrimination value calculated during the current loop update, α is the weighting factor with a value in the range of 0 to 1. Expanding this formula for the δ k sequence, we get δ(k) = α[δ k-1 + (1 - α)δ k-2 + (1 - α) 2 δ k-3 + … + (1 - α) m δ k-(m+1) + (1 - α) m+1 δ(k - (m + 1)). Thus, it can be seen that the weight (1 - α) of the δ value farther away from the current value k decays exponentially. When α = 1, the weighted average formula degenerates to: δ(k) = δ k , indicating that the phase discrimination result δ(k) does not refer to the previous phase discrimination result and is only the phase discrimination value δ k obtained by the current loop update.

[0053] Quantize the phase discrimination error and write the quantized phase discrimination error to the PL side through the configured AXI GPIO interface. That is, based on the phase discrimination error result δ(k) calculated at the PS side, for writing to the FPGA for subsequent operations, it is quantized to: N eck + 1 bit, and the calculation formula is: In this embodiment, a single-channel AXI GPIO is configured on the Block Design of the Zynq-7000 series. The number of ports of GPIO2 is set according to the quantization bit width N eck + 1 of the phase discrimination error. The signal flow direction of each port is from the PS side to the PL side. Each time a new ec k result is calculated, the phase discrimination error is written from the PS side to the PL side.

[0054] S600: Write the code phase discrimination value to the PL side, perform linear filtering processing on it, and then obtain the phase change value through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo-code sequence to achieve closed-loop feedback.

[0055] Specifically, the PL side filters out noise from the received phase discrimination error through the loop filter of the code loop, and uses the phase error output by the loop, that is, the phase change value, to correct and control the local pseudo-code sequence NCO. When the NCO overflows, its value returns to zero, thereby realizing the negative feedback control of the code loop. And the coherent integration result of the instantaneous branch is the despread data result output by the code loop to realize closed-loop feedback. The PL side receives the phase discrimination error ec k Filters out noise through the loop filter. The input and output of the first-order loop filter satisfy:

[0056] Where, a 2 Is the filter parameter value, ω n And the loop noise bandwidth B L The relationship is: B L = 0.53ω n . Based on this, the calculation formula for correcting and controlling the local pseudo-code sequence NCO using the phase error output by the loop is:

[0057] FCW(k) = FCW(k - 1)+(ec k - ec k-1 )K f , where, K f Is the control word conversion coefficient, K f = T coh / ss / osr. The same as step S200, every interval of 1 / f clk , the value of the NCO increases by FCW(k). When the NCO overflows, its value returns to zero, indicating the end of a cycle of the local pseudo-code sequence, thereby realizing the negative feedback control of the code loop. The coherent integration result p i,q Of the instantaneous branch is the despread data result output by the code loop. At this time, the implementation method for improving the code tracking performance of direct sequence spread spectrum signals under low signal-to-noise ratio in this embodiment is completed.

[0058] This embodiment utilizes the multi-core processing system of the scalable processing platform of the Zynq-7000 series to perform task reconstruction on the code tracking algorithm. By moving complex arithmetic logic to the ARM core with higher processing speed for calculation, the resource utilization rate of the FPGA is reduced and the system integration degree is improved. At the same time, through flexible non-coherent accumulation of the leading, prompt, and lagging branches of the code loop on the PS side, the signal energy improvement brought by extending the specified integration time is utilized, and with the high-speed data interaction channel between the ARM core and the FPGA, a code tracking algorithm under various noise environments with flexible configuration is realized. Compared with traditional code tracking methods, it can effectively improve the code loop synchronization performance and effectively reduce the synchronization threshold. And by introducing linear filtering operations into the code loop phase discrimination results, including moving average filter, weighted moving average filter, and exponentially weighted moving average filter, the loop stability is enhanced by different weight distributions of the update results at other times and the current calculation result, and the demodulation loss is reduced to a certain extent. At the same time, based on the high-precision operation of the ARM, the selection of the weighting factor is more flexible, and the calculation error introduced by decimal operation in the FPGA operation is also avoided, increasing the applicable noise scenarios for the weighted average calculation of the code phase discrimination results.

[0059] In summary, the technical solution of this application starts from the signal generation end. First, an I-channel bipolar code source is generated and spread spectrum with a spreading code. Pulse shaping filtering is completed through oversampling and convolution with a root raised cosine filter. During this process, the signal spectrum is optimized by adjusting the sampling rate and filter coefficients to reduce inter-symbol interference. Then, carrier Doppler is added and filtering and decimation are performed to convert the signal into a baseband signal suitable for transmission. At the receiving end, the baseband signal is convolved with the matching filter coefficients to obtain the matching filtering result, which is processed according to time advance and lag, and coherently integrated with the local pseudo-code sequence, and the envelope value of the coherent integration result is calculated. The PS end flexibly sets the non-coherent accumulation length according to the noise environment, selects a suitable code phase discrimination method from the normalized advance minus lag amplitude method and the normalized advance minus lag power method to obtain the code phase discrimination value, and then linearly filters the phase discrimination value using a moving average filter, a weighted moving average filter or an exponentially weighted moving average filter to make the result smoother and more reliable. Finally, the phase discrimination value is written down to the PL end, and after the noise is filtered by the loop filter, the local pseudo-code sequence NCO is corrected to achieve closed-loop feedback. The coherent integration result of the instant branch is used as the de-spread data output of the code loop. Therefore, for the problems of the traditional direct sequence spread spectrum technology in a low signal-to-noise ratio environment, where the signal is vulnerable to noise interference, resulting in spectrum distortion, serious inter-symbol interference affecting the transmission efficiency and accuracy, unreasonable utilization of hardware resources, and limited system integration. By optimizing the signal processing flow and reasonably allocating the computing tasks, the problem of poor code tracking performance under low signal-to-noise ratio is overcome, inter-symbol interference is reduced, and the utilization efficiency of hardware resources is improved. Further, in this embodiment, the Zynq-7000 series multi-core processing system is used to transfer the complex operation logic to the ARM core, reducing the FPGA resource usage rate and improving the system integration. Flexible non-coherent accumulation can be selected at the PS end to extend the integration time to increase the signal energy, combined with the high-speed data interaction between the ARM core and the FPGA, enhancing the code loop synchronization performance and reducing the synchronization threshold. Linear filtering operations are introduced, and the phase discrimination results are processed according to different weight distributions to improve the loop stability and reduce the demodulation loss. At the same time, based on the high-precision operation of the ARM, the selection of the weighting factor is more flexible, avoiding the fractional operation error of the FPGA, expanding the applicable noise scenario range of the weighted average calculation of the code phase discrimination result, and ensuring the communication quality.

[0060] To verify the feasibility of the method for improving the code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signals disclosed in this embodiment, this embodiment further gives a simulation example of the signal system. This example takes the signal system simulation under UQPSK-DSSS modulation as an example. Since the simulation purpose is the demodulation performance of the I-channel DSSS signal, the signal of the Q-channel under this condition is equivalent to introducing additional noise, which has a certain proof ability for explaining the application scenario of the present invention under low signal-to-noise ratio conditions. First, generate two signals with a symbol rate of 40 Kbps for the I-channel, a symbol rate of 5 Mbps for the Q-channel, and a spreading ratio of 125 for the I-channel. After spreading, the I-channel is completely aligned with the Q-channel in the time domain and mapped into a UQPSK-DSSS signal according to the power ratio of I:Q = 1:10. Select AD9361 on the board, and the processing clock f clk of the DAC and PL ends is 40 MHz, and the sampling frequency f s of the transmitted signal is 160 MHz, that is, the oversampling rate of the transmitted signal is osr = 32. Set the signal carrier frequency f c to 2.2 GHz, add carrier Doppler f d of 3 KHz, then the calculated pseudo-code Doppler f chip is 6.79 Hz. Calculate the NCO step of upsampling, and the quantization bit width of carrier Doppler is 2 48 , and calculate: FCW dop = 3K / 160M × 2 48 ≈ 5277655813. The quantization bit width of pseudo-code Doppler is 2 40 , and calculate:

[0061] FCW chip = 5277655813 × 5M / 2.2G / 2 8 + 5M / 160M × 2 40 = 34359785222. Every time the interval is 1 / 160M, the value of NCO increases by the step value of 5277655813. When the accumulated result of the NCO value overflows (exceeds 2 40 ), the output signal sequence s(k) is output, and at the same time, let k = k + 1; when the accumulated result of the NCO value does not overflow, 0 is output. The generated signal sequence is s osr (n). Select the roll-off factor β = 0.6, the number of filter symbols M = 1, the oversampling rate osr = 32 for each symbol, generate the filter coefficient coe with a length of 33, and convolve the oversampled signal s osr (n) with the filter coefficient coe to obtain the shaped filtered signal s 1 (n). Generate a single carrier with a frequency of f d , generate a digital signal according to the DDS principle, and obtain the baseband signal s 2 (n) after adding carrier Doppler. Generate the sampling rate fs = 160 MHz, passband F pass = 8 MHz, stopband F band A 33 - order FIR low - pass filter with a passband of 160 MHz, a stopband of 8 MHz, and a stopband attenuation of 20 MHz is used as an anti - aliasing filter for signal decimation. For the signal s 3 (n) passing through the anti - aliasing filter, perform 4 - fold decimation to obtain an output signal s 4 (n) with a sampling rate of 40 MHz. The sampling rate of this signal is consistent with the DAC sampling frequency. Through the DAC, s 4 (n) is converted into an analog signal, shifted to the carrier frequency of 2.2 GHz, and input into the physical transmission channel. Perform 4 - fold decimation on the coefficient coe to obtain the coefficient coe 1 of the receiver matched filter. Convolve the signal r(n) transmitted through the physical channel with coe 1 to obtain the matched - filtering result r 1 (n). The spacing D between the early and late branches is 2. Correlate the early, prompt, and late branches with the local pseudo - code spreading sequence C 1 (n) respectively. The coherent integration clearing time T coh is 1 / 40000 s, and the coherent integration results are obtained as I E and Q E respectively. Calculate the signal envelope values of the early and late branches P and Q P respectively. Calculate the signal envelope values of the early and late branches L and Q L respectively. Calculate the signal envelope values of the early and late branches Configure a dual - channel AXI GPIO on the Block Design. Set the number of ports for both channels of GPIO1 to 32, and the signal flow direction for each port is from the PL side to the PS side. At the same time, configure GPIO1 as an interrupt - triggered mechanism. Connect the interrupt signal of GPIO to the IRQ_F2P interrupt signal of Zynq, which indicates the interrupt triggered from the PL side to the PS side. Select the edge - triggered mode. When the reported data connected to the PL side, that is, the signal envelope values E or L change, trigger an interrupt. The PS side interrupts the current process, and GPIO1 reports the new envelope values E and L to the PS side. When the PS side interrupt is triggered, first jump to the data - reading program, extract the envelope values E and L of the coherent integration results of the early and late branches, and accumulate the current envelope values E and L to the E sum and L sum signals. Secondly, count the current number of coherent integration results as n inco = n inco + 1, and clear the interrupt - flag signal. When the number of coherent integration results n inco = 4, output the non - coherent cumulative results E inco and L inco of the current early and late branches, and at the same time, E sum, L sum Clear. On the PS side, the normalized leading minus lagging amplitude method is selected, and the linear filtering window length M = 4 is set. When the number of coherent integration results n inco = 4, use E inco , L inco Calculate the phase discrimination value δ k , and store it in the array ECK with a length of 4. When selecting a moving average filter, use the following calculation formula:

[0062] Calculate the linear filtering result

[0063] When selecting a weighted moving average filter, use the following calculation formula:

[0064] Calculate the linear filtering result

[0065] When selecting an exponentially weighted moving average filter, select the weighting factor α = 0.5, and perform a weighted operation on the phase discrimination value δ k calculated in the current loop and the phase discrimination result δ(k - 1) updated in the previous cycle. The calculation formula is:

[0066] The update period of δ(k) is T coh ·N nc = 1 / 40000 × 4 = 100 us. After calculating the phase discrimination error result δ(k) on the PS side and writing it to the FPGA for subsequent operations, it is quantized to 16 bits. The calculation formula is:

[0067] ec k = δ(k) × 2 15 .

[0068] Configure a single-channel AXI GPIO on the Block Design, set the number of ports of GPIO2 according to the quantization bit width of 16 for the phase discrimination error, and the signal flow direction of each port is from the PS side to the PL side. Every time a new ec k result is calculated, write the phase discrimination error from the PS side to the PL side. The PL side filters out the noise through the loop filter for the received phase discrimination error ec k , and corrects the control local pseudo-code sequence NCO using the phase error output by the loop. The calculation formula is: FCW(k) = FCW(k - 1)+(ec k - ec k-1 )K f , where K f is the control word conversion coefficient, K f =(1 / 40000) / 125 / 8 = 2.5×10-8 。Every (1 / 40M)s, the value of the NCO is incremented by FCW(k). When the NCO overflows, its value returns to zero, indicating the end of one period of the local pseudo-code sequence, thus realizing the negative feedback control of the code loop. The coherent integration result p of the prompt branch i,q is the despread data result output by the code loop. Thus, the implementation method for improving the code tracking performance of direct sequence spread spectrum signals under low signal-to-noise ratio disclosed in this embodiment is completed.

[0069] Reference Figure 2 , this embodiment further discloses a system for improving the code tracking performance of direct sequence spread spectrum signals under low signal-to-noise ratio, including:

[0070] A signal processing module 21, configured to generate a bipolar code source for the I channel and process the data of the source to obtain a baseband signal to be transmitted; including: performing a spreading operation on the data of the source using a spreading code to obtain a spread signal; selecting a system sampling frequency higher than the chip rate of the I channel, and performing high oversampling on the spread signal at this system sampling frequency, and then convolving the sampled signal with a root raised cosine filter to obtain a shaped filtered signal; performing filtering and decimation operations on the shaped filtered signal to obtain a baseband signal to be transmitted, including: adding carrier Doppler to the shaped filtered signal and convolving it with an anti-aliasing filter; directly performing a decimation operation on the convolved signal; converting the decimated signal into an analog signal through a DAC, and using the analog signal as the baseband signal to be transmitted.

[0071] A filtering processing module 22, configured to perform a convolution operation based on the baseband signal and a matched filter coefficient to achieve carrier stripping and obtain a matched filtering result;

[0072] The coherent integration and phase discrimination module 23 is used to perform time lag and time lead operations on the matched filtering results respectively according to a specified length, so as to obtain a lag branch signal and a lead branch signal respectively; it is also used to perform coherent integration on the lag branch signal, the in-phase branch signal, and the lead branch signal with the local pseudo-code sequence at the PL end respectively, and obtain the envelope value according to the coherent integration result; it includes: obtaining the pseudo-code spreading sequence of the local receiving end, and using a correlator to perform coherent integration on the lead branch signal, the in-phase branch signal, and the lag branch signal respectively with the pseudo-code spreading sequence to obtain the lead branch coherent integration result and the lag branch coherent integration result; obtaining the lead branch signal envelope value by operating on the in-phase component and the quadrature component in the lead branch coherent integration result; obtaining the lag branch signal envelope value by operating on the in-phase component and the quadrature component in the lag branch coherent integration result; it is also used to set the non-coherent accumulation length at the PS end, perform non-coherent accumulation operation on the envelope value, and select a code phase discrimination method and obtain the code phase discrimination value, including: extracting the lead branch signal envelope value and the lag branch signal envelope value and reporting them to the PS end; the PS end sets the non-coherent accumulation length and performs non-coherent accumulation operation of adding the lead branch signal envelope value and the lag branch signal envelope value respectively; selecting the preset normalized lead minus lag amplitude method or the normalized lead minus lag power method as the code phase discrimination method, and calculating the code phase discrimination value based on the result of the non-coherent accumulation operation.

[0073] The closed-loop feedback module 24 is used to write the code phase discrimination value to the PL end, perform linear filtering processing on it, and then obtain the phase change value through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo-code sequence to achieve closed-loop feedback; it includes: configuring a weighting factor to perform weighted averaging on the phase discrimination value to calculate the phase discrimination error; performing quantization processing on the phase discrimination error, and writing the quantized phase discrimination error to the PL end through the configured AXI GPIO interface; the PL end performs linear filtering on the received phase discrimination error through a linear filter, and then filters out noise from the data after linear filtering processing through the loop filter to obtain the phase change value, and uses the phase change value to correct and control the NCO of the local pseudo-code sequence; when the NCO overflows, its value returns to zero, so as to achieve the negative feedback control of the code loop, and the coherent integration result of the in-phase branch is the code loop output despread data result to achieve closed-loop feedback.

[0074] Figure 3 It is a schematic diagram of the physical structure of the electronic device provided by the embodiment of the present invention. As Figure 3 shown, the electronic device 50 includes: a processor 501 (processor), a memory 502 (memory), and a bus 503;

[0075] Among them, the processor 501 and the memory 502 communicate with each other through the bus 503; the processor 501 is used to call the program instructions in the memory 502 to execute the methods provided by the above-mentioned method embodiments.

[0076] This embodiment provides a non-transitory computer-readable storage medium. The non-transitory computer-readable storage medium stores computer instructions, and the computer instructions cause the computer to execute the methods provided by the above-mentioned method embodiments.

[0077] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative labor.

[0078] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the essence of the above technical solution or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0079] The above specific embodiments do not constitute a limitation on the protection scope of the present invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can occur depending on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims

1. A method for improving the code tracking performance of a low signal-to-noise ratio direct sequence spread spectrum signal, characterized in that: The method comprises: Generate I bipolar code signal source, and process the data of the signal source to obtain a baseband signal to be transmitted; Performing a convolution operation based on the baseband signal and the matched filter coefficient to achieve carrier stripping and obtain a matched filtering result; The matched filtering result is subjected to time lag and time advance operations according to the specified length, thereby obtaining a lag branch signal and an advance branch signal respectively; The delayed branch signal, the instantaneous branch signal, the advanced branch signal and the local pseudo code sequence are respectively coherently integrated at the PL end, and an envelope value is obtained according to the coherent integration result; The non-coherent accumulation length is set at the PS end, the non-coherent accumulation operation is performed on the envelope value, and the code phase detection mode is selected to obtain the code phase detection value; The code phase detection value is written down to the PL terminal and linear filtering is performed on it. Then, the phase change value is obtained through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo code sequence to achieve closed-loop feedback.

2. The method for improving code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signal according to claim 1, characterized in that: The step of generating I bipolar code information sources and processing the data of the information sources to obtain a baseband signal to be transmitted includes: Performing a spread spectrum operation on the data of the source by using a spread spectrum code to obtain a spread spectrum signal; Selecting a system sampling frequency higher than the chip rate of channel I, performing high oversampling on the spread spectrum signal at the system sampling frequency, and then convolving the sampled signal with a root raised cosine filter to obtain a shaped filtered signal; Filtering and decimation operations are performed on the signal after shaping filtering to obtain a baseband signal to be transmitted.

3. The method for improving code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signal according to claim 2, characterized in that: The step of performing filtering and extraction operations on the signal after shaping filtering to obtain a baseband signal to be transmitted comprises: Add carrier Doppler to the shaped filtered signal and convolve it with an anti-aliasing filter; Directly perform decimation operation on the convolved signal; The extracted signal is converted into an analog signal through a DAC, and the analog signal is used as the baseband signal to be transmitted.

4. The method for improving code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signal according to claim 1, characterized in that: The steps of coherently integrating the delayed signal, the instantaneous branch signal, the advanced signal and the local pseudo code sequence at the PL end, and obtaining the envelope value according to the coherent integration result include: Acquire a local pseudo code spread spectrum sequence at the receiving end, and use a correlator to perform coherent integration on the leading branch signal, the instantaneous branch signal and the lagging branch signal with the pseudo code spread spectrum sequence, respectively, to obtain an leading branch coherent integration result and a lagging branch coherent integration result; The lead branch signal envelope value is obtained by operating the in-phase component and the orthogonal component in the lead branch coherent integration result; The envelope value of the lag branch signal is obtained by operating the in-phase component and the orthogonal component in the coherent integration result of the lag branch.

5. The method for improving code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signal according to claim 1, characterized in that: The steps of setting the non-coherent accumulation length at the PS end, performing non-coherent accumulation operation on the envelope value, selecting a code phase detection method and obtaining a code phase detection value include: Extract the leading branch signal envelope value and the lagging branch signal envelope value and report them to the PS end; The non-coherent accumulation length is set at the PS end, and the non-coherent accumulation operation of adding the envelope value of the leading branch signal and the envelope value of the lagging branch signal is performed respectively; A preset normalized lead-minus-lag amplitude method or a normalized lead-minus-lag power method is selected as a code phase detection method, and a code phase detection value is calculated based on the result of the incoherent accumulation operation.

6. The method for improving code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signal according to claim 1, characterized in that: The step of writing the code phase detection value to the PL terminal, performing linear filtering on it, and then obtaining a phase change value through a loop filter of the code loop, wherein the phase change value is used to correct the local pseudo code sequence NCO, and realizing closed-loop feedback includes: Configure the weighting factor to perform weighted averaging on the phase detection value to calculate the phase detection error; Quantize the phase detection error and write the quantized phase detection error to the PL end through the configured AXI GPIO interface; The PL end performs linear filtering on the received phase error through a linear filter, and then filters out noise from the data processed by the linear filtering through a loop filter of the code loop to obtain a phase change value, and uses the phase change value to correct the NCO that controls the local pseudo code sequence; When NCO overflows, its value returns to zero, thereby realizing negative feedback control of the code loop, and the coherent integration result of the instant branch is the despread data result output by the code loop to realize closed-loop feedback.

7. A system for improving the code tracking performance of low signal-to-noise ratio direct sequence spread spectrum signals, characterized in that: include: A signal processing module, used for generating I-channel bipolar code signal source and processing the data of the signal source to obtain a baseband signal to be transmitted; A filtering processing module, used for performing a convolution operation based on the baseband signal and the matched filter coefficient to achieve carrier stripping and obtain a matched filtering result; The coherent integration and phase detection module is used to perform time lag and time advance operations on the matched filtering results according to the specified length, so as to obtain the lagging branch signal and the leading branch signal respectively; it is also used to perform coherent integration on the lagging branch signal, the instantaneous branch signal, and the leading branch signal with the local pseudo code sequence at the PL end, and obtain the envelope value according to the coherent integration result; set the non-coherent accumulation length at the PS end, perform non-coherent accumulation operation on the envelope value, select the code phase detection mode and obtain the code phase detection value; The closed-loop feedback module is used to write the code phase detection value to the PL terminal and perform linear filtering on it, and then obtain the phase change value through the loop filter of the code loop. The phase change value is used to correct the NCO of the local pseudo code sequence to achieve closed-loop feedback.

8. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method described in any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.