Double-area boot starting method based on localization FT6713DSP

Abstract

The invention relates to a dual-region boot method based on a localized FT6713DSP. The method comprises the following steps: copying a designed and developed interrupt vector table vectors.sm, a boot startup boot.asm and a memory configuration cmd file into a work project to replace an original project file; annotating an IitEmif function in the initialization function of the DSP chip of the original project; the method comprises the steps that a DSP integrated development environment CCS is opened, a Texas Instruments Simulator is connected and configured in a simulator configuration file, and ram.bin and sd.bin are generated; the method comprises the following steps of: combining ram.bin and sd.bin into a file, and naming the file as ft67132in1. Bin; and a flash Burn project is used for programming the ft67132in1. Bin file into a FLASH chip which is started and guided by a DSP (Digital Signal Processor), so that compiling, programming and starting and guiding of engineering software are completed. According to the method, the software requiring high execution efficiency can run in the high-speed memory on the DSP chip, and the other software can run in the SDRAM external memory outside the chip, so that the software performance and the software function can be ensured, and a great expansion space can be reserved for software engineering.

Description

Technical Field

[0001] The present invention belongs to the technical field of embedded software, and in particular to a dual-region boot method based on the domestic FT6713 DSP. Background Technique

[0002] For strapdown inertial navigation devices, their solution periods are generally 200 Hz to 2000 Hz, and the dimensions of the Kalman filter operation matrix are generally 15*15. When comparing complex solutions, the matrix dimensions can be 21*21, and for even more complex ones, they can be 32*32. Therefore, the solution calculation amount of strapdown inertial navigation device solutions is relatively large, and the real-time performance is very high, requiring high-performance hardware and software to be used in cooperation.

[0003] Booting refers to reading the boot program from the external ROM of the CPU, and then copying the part responsible for starting and running properly to the CPU running memory to run, and then it can mobilize the connected software and hardware to work together. For example, for WINDOWS, LINUX, etc., after the BIOS settings are completed, when powered on, the program is read from the hard disk and the starting part is copied to the CPU, and then it works together with the network card, sound card, monitor, etc.

[0004] Currently, for the commonly used digital signal processing chips DSP in China, their maximum main frequency is 300 MHz and the memory capacity is 256 KB. Based on the commonly used digital signal processing chip DSP, its startup also requires a boot process. For the FT-6713 series, its boot generally reads data from the external FLASH chip and copies it to the DSP on-chip memory, and then jumps to the starting entry of the application program to start running.

[0005] External running memories such as SDRAM and DDR generally have relatively lower prices compared to the CPU and larger capacities, which are several times, even dozens or hundreds of times that of the DSP chip on-chip memory, such as 64 M, 128 M, etc. However, their speeds are much slower than the DSP chip on-chip memory, and some of their running speeds can be as slow as 1 / 30 to 1 / 50 of the DSP on-chip memory. The domestic SDRAM selected for this project is the SM48LC32m16A2TG model SDRAM of Shenzhen Guowei Electronics Co., Ltd., and its memory space is 64 MB.

[0006] The integrated development environment of the DSP is Code Composer Studio v9.2, and the file generated by its compilation is *.out. If it needs to be burned into the chip, the hex6x.exe tool needs to be used for conversion, which can convert the file to *.bin. However, it only provides the starting address and the length parameter of the memory space, and can only perform file conversion for one space, that is, either the software can only run entirely in the on-chip running memory of the DSP (or the data can be set to be saved in the SDRAM), or it can run entirely in the off-chip running memory SDRAM of the DSP, and the program cannot run in both memories simultaneously. In this way, the externally expanded running memory cannot be fully utilized. After the compiled software exceeds the on-chip running memory of the DSP, it can only run entirely in the off-chip SDRAM, but its running speed is too slow to meet the computational requirements and real-time requirements of the strapdown inertial navigation. Summary of the Invention

[0007] The purpose of the present invention is to overcome the deficiencies of the prior art and propose a dual-region boot method based on the domestic FT6713DSP, which can enable the high-performance software part to run in the on-chip memory of the DSP, and the remaining software to run in the off-chip SDRAM external memory, that is, to ensure both software performance and software functions, and also to reserve a large expansion space for software engineering.

[0008] The present invention solves its technical problems by adopting the following technical solutions:

[0009] A dual-region boot method based on the domestic FT6713DSP includes the following steps:

[0010] Step 1: Copy the well-designed vectors.sm, boot.asm, and cmd files to the working project to replace the original project files;

[0011] Step 2: Comment out the InitEmif function in the original project DSP chip initialization function;

[0012] Step 3: Open the DSP integrated development environment CCS, configure the connection in the emulator configuration file as TexasInstruments Simulator, and then generate ram.bin and sd.bin using the files and settings in Step 1 and Step 2;

[0013] Step 4: Merge the ram.bin and sd.bin in Step 3 into one file and name it ft6713_2in1.bin;

[0014] Step 5: Use the flashBurn project to burn the ft6713_2in1.bin file into the FLASH chip for DSP bootstrapping, completing the compilation, burning, and bootstrapping of the project software.

[0015] Moreover, step 1 includes the following steps:

[0016] Step 1.1: Add the enabling of SDRAM, the initialization of SDRAM, and the EMIF configuration of the DSP in the boot.asm file;

[0017] Step 1.2: Add the dual-region boot copy operation of the DSP on-chip RAM and the external SDRAM in the boot.asm file;

[0018] Step 1.3: Modify the project interrupt vector table vectors.asm file;

[0019] Step 1.4: Modify the project memory configuration CMD file;

[0020] Step 1.5: Write a.gel file and associate it with the CCS project.

[0021] Moreover, the specific implementation method of step 1.1 is as follows: Use the external SDRAM, use the cache mechanism of the DSP chip, and configure the cache size to 64KB to improve the speed of the DSP accessing the external SDRAM.

[0022] Moreover, the specific implementation method of step 1.3 is as follows: Add the declaration definition of the reset boot operation, delete the useless interrupt vector declaration definition, save the space occupied by the first 1KB fixed interrupt vector table of the DSP, and make room for modifying and adding the boot.asm file.

[0023] Moreover, the specific implementation method of step 3 is as follows: Open the DSP integrated development environment CCS. After the program run pointer points to the main function, open the Memory Browser view of CCS, click Save Memory, first save the data in the DSP on-chip RAM, whose address is: 0x00000000, with a length of 256K, named ram.bin; then save the data in the SDRAM, whose address is: 0x80000000, with a length of 256K, named sd.bin.

[0024] Moreover, the specific implementation method of step 4 is as follows: Merge ram.bin and sd.bin in step 3 into one file, and name it ft6713_2in1.bin. Add the cumulative checksum end symbol 0xBF at the end of ft6713_2in1.bin.

[0025] Moreover, the specific implementation method of the memory configuration CMD file in step 1.4 is as follows: Add the operation of fill = 0x00 in the.stack,.bss,.data, and.far segments involved in the configuration command file.

[0026] The advantages and positive effects of the present invention are as follows:

[0027] In the present invention, the designed and developed vectors.sm, boot.asm and cmd files are copied into the working project to replace the original project files; the InitEmif function in the original project DSP chip initialization function is commented out; the DSP integrated development environment CCS is opened, and the connection configuration in the emulator configuration file is set to Texas Instruments Simulator, and ram.bin and sd.bin are generated; ram.bin and sd.bin are merged into one file and named ft6713_2in1.bin; the ft6713_2in1.bin file is burned into the FLASH chip for DSP startup boot using the flashBurn project, completing the compilation, burning and startup boot of the project software. The present invention can make the high-performance software part run in the DSP on-chip memory, and the rest of the software runs in the off-chip SDRAM external memory, which can not only ensure the software performance but also ensure the software function, and can also reserve a large expansion space for the software project. Description of the Drawings

[0028] Figure 1 Software screenshot for saving data in DSP on-chip RAM and SDRAM. Detailed Implementation Manner

[0029] The present invention will be further described in detail below with reference to the accompanying drawings.

[0030] A domestic FT6713DSP dual-region boot startup method includes the following steps:

[0031] Step 1: Copy the designed and developed vectors.sm, boot.asm and cmd files into the working project to replace the original project files.

[0032] Step 1.1: Add the enabling of SDRAM, SDRAM initialization and DSP EMIF configuration in the boot.asm file.

[0033] Since the chip memory is available as long as it is powered on, while the external memory SDRAM is not available immediately after power-on. In addition to setting the initialization, attention should also be paid to the order of initializing it before storing data.

[0034] If SDRAM external memory is used, the access speed of the 6713 DSP to the SDRAM external memory can be as slow as 1 / 30 to 1 / 50 of the on-chip memory of the DSP. Therefore, this paper studies the use of the cache mechanism on the DSP chip and configures the cache size to 64 KB, which improves the access speed of the DSP to the external SDRAM. The measured speed can be increased to about 0.9 times the on-chip speed of the DSP.

[0035] Initialize the EMIF bus address and preset values used by the DSP; and set the relevant SDRAM external memory address and preset values; then perform the SDRAM external memory refresh charging time address and preset values, and enable the Cache function for the L2 cache area on the DSP chip, with the size set to 64 KB. The specific code can be seen as follows: (Note that only the address and preset values are configured here, and it is not enabled to take effect.)

[0036]

[0037] Enable and configure the 64KB space for the EMIF bus, SDRAM address, refresh charging time, and the L2 memory Cache on the DSP chip used above through assembly language, so that the settings take effect immediately. The specific code can be seen as follows:

[0038]

[0039] Step 1.2: Add the dual-region boot copy operation of the on-chip RAM and external SDRAM of the DSP in the boot.asm file.

[0040] First, perform the loop operation loop1 to copy the software part with high execution efficiency requirements to the high-speed L2 memory part on the DSP chip for execution. Then copy other parts of the software to the SDRAM external memory for execution. Finally, jump the application program to the entry address main function to start executing all software logic. The specific software is shown in the following figure:

[0041]

[0042] Step 1.3: Modify the project interrupt vector table vectors.asm file. Add the declaration and definition of the reset boot operation, delete the declaration and definition of the useless interrupt vectors, save the space occupied by the first 1KB fixed interrupt vector table of the DSP, and make enough space for modifying and adding the boot.asm file. Configure the reset interrupt address of the DSP chip to be associated with the software entry main function and perform the jump execution. The specific is shown in the following figure:

[0043]

[0044] Step 1.4: Modify the engineering memory configuration CMD file.

[0045] Configure the memory space used by the DSP software, and perform Memory settings for the interrupt vector table, startup code, on-chip L2 high-speed memory of the DSP, and the address space of the SDRAM external memory. Then allocate Sections for the constants, heap, stack, static / dynamic variables, internal / external data segments, and SWITCH statements used by the software. The on-chip L2 high-speed memory of the DSP here is configured as 256KB, and the SDRAM external memory can be configured according to the actual chip capacity, such as 2MB, 16MB, etc.

[0046]

[0047] Step 1.5: Write a.gel file and associate it with the CCS project.

[0048] The content in the.gel file is extremely important. If the settings are incorrect or other functions are used, although the same function may be completed, the internal functions of the CCS development environment will have different activation times, which will cause the SDRAM not to be initialized at the correct time, and online debugging of CCS cannot be carried out.

[0049] The content here is for the convenience of technicians to use CCS for online debugging, setting breakpoints, and observing variables. Without the content of this.gel file to cooperate with CCS to complete the SDRAM and EMIF bus configuration in advance, CCS will not be able to perform online debugging and observation, which is a problem that must be solved in actual engineering projects.

[0050] Write the EMIF bus configuration and phase-locked loop configuration used by the DSP, enable the 64KB size of the L2 Cache, and then the DSP chip and the SDRAM hardware environment can be ready, and data can flow according to the predetermined timing, and the DSP software can run. The configuration used here can be the same as that in boot.asm, but this is an operation for the DSP emulator to be able to perform online debugging of the DSP software and algorithms. The specific EMIF bus configuration and phase-locked loop configuration in the.gel file are shown in the following figure:

[0051]

[0052]

[0053]

[0054] Step 2: Comment out the InitEmif function in the original project DSP chip initialization function.

[0055] Step 3: Open the DSP integrated development environment Code Composer Studio (hereinafter referred to as CCS). In the emulator configuration file, configure the connection as Texas Instruments Simulator, and then generate ram.bin and sd.bin using the files and settings in Steps 1 and 2.

[0056] The specific implementation method of Step 3 is as follows: Figure 1 As shown, open the DSP integrated development environment CCS. After the program execution pointer points to the main function, open the Memory Browser view of CCS, click Save Memory, first save the data in the DSP on-chip RAM. Its address is: 0x00000000, and the length is 256K, named ram.bin; then save the data in the SDRAM. Its address is: 0x80000000, and the length is 256K, named sd.bin.

[0057] Step 4: Combine ram.bin and sd.bin in Step 3 into one file and name it ft6713_2in1.bin.

[0058] When using single-region boot startup, the hex6x software in the development environment will be used for conversion, and this method can be used normally in multiple projects. However, when performing dual-region boot startup, after the two boot files directly generated by the hex6x software are burned, the chip cannot be normally boot-started. Therefore, this article studies directly using the content of the memory and the external memory SDRAM during its online simulation as the boot startup project file, instead of using the hex6x software to convert and generate the boot startup file, and adds a method of forcibly filling 0x00 instead of random values and file verification for the unused memory space to generate the boot startup file.

[0059] The specific implementation method of Step 4 is as follows: Combine ram.bin and sd.bin in Step 3 into one file and name it ft6713_2in1.bin, and add the cumulative checksum end symbol 0xBF at the end of ft6713_2in1.bin.

[0060] Step 5: Use the flashBurn project to burn the ft6713_2in1.bin file into the FLASH chip for DSP boot startup, complete the compilation, burning, and boot startup of the project software.

[0061] It should be emphasized that the embodiments described in the present invention are illustrative rather than restrictive. Therefore, the present invention includes but is not limited to the embodiments described in the specific implementation manners. Any other implementation manners obtained by those skilled in the art according to the technical solutions of the present invention also belong to the scope of protection of the present invention.

Claims

1. A dual-zone boot method based on the domestically produced FT6713DSP, characterized in that: The following steps are involved: Step 1. Copy the designed vectors.sm, boot.asm and cmd files to the working project to replace the original project files; Step 2: Comment out the InitEmif function in the original project DSP chip initialization function; Step 3. Open the DSP integrated development environment CCS, set the connection configuration in the simulator configuration file to Texas InstrumentsSimulator, and then use the files and settings in steps 1 and 2 to generate ram.bin and sd.bin; Step 4. Combine ram.bin and sd.bin in step 3 into one file and name it ft6713_2in1.bin. Step 5. Use the flashBurn project to burn the ft6713_2in1.bin file into the DSP boot FLASH chip to complete the compilation, burning and boot of the project software.

2. According to claim 1, a dual-zone boot method based on domestic FT6713DSP is characterized in that: The step 1 comprises the following steps: Step 1.1, add SDRAM enable, SDRAM initialization and DSP EMIF configuration in the boot.asm file; Step 1.2, add the DSP on-chip RAM and external SDRAM dual-area boot copy operation in the boot.asm file; Step 1.3, modify the project interrupt vector table vectors.asm file; Step 1.4, modify the project memory configuration CMD file; Step 1.5, write the .gel file and associate it with the CCS project.

3. A dual-zone boot method based on domestic FT6713DSP according to claim 2, characterized in that: The specific implementation method of step 1.1 is: use SDRAM external memory, use the cache mechanism of the DSP chip, and configure the cache size to 64KB to improve the speed of DSP accessing the external memory SDRAM.

4. A dual-zone boot method based on domestic FT6713DSP according to claim 2, characterized in that: The specific implementation method of step 1.3 is: add reset boot operation declaration definition, delete useless interrupt vector declaration definition, save the first 1KB fixed interrupt vector table space occupied by DSP, and make room for modifying and adding boot startup boot.asm file.

5. The dual-zone boot method based on the domestic FT6713DSP according to claim 1 is characterized in that: The specific implementation method of step 3 is: open the DSP integrated development environment CCS, wait for the program running pointer to point to the main function, open the Memory Browser view of CCS, click Save Memory, first save the DSP on-chip RAM data, its address is: 0x00000000, the length is 256K, named ram.bin; then save the data in SDRAM, its address is: 0x80000000, the length is 256K, named sd.bin.

6. A dual-zone boot method based on domestic FT6713DSP according to claim 1, characterized in that: The specific implementation method of step 4 is: merge ram.bin and sd.bin in step 3 into one file, and command it as ft6713_2in1.bin, and add the cumulative checksum end mark 0xBF at the end of ft6713_2in1.bin.

7. The dual-zone boot method based on the domestic FT6713DSP according to claim 1 is characterized in that: The specific implementation method of the memory configuration CMD file in step 1.4 is: adding the operation of fill=0x00 in the .stack, .bss, .data and .far segments involved in the configuration command file.

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