Data verification circuit, method, chip, electronic device and electronic equipment
A data verification circuit was designed by connecting multiple layers of AND and OR gates, which solves the problem of OneHot encoding verification in machine learning and deep learning integrated circuits, and realizes efficient and accurate data verification, which is suitable for large-scale, high-speed digital circuits.
Patent Information
- Application Number
- CN202510169656.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-17
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2045-02-17
AI Technical Summary
In integrated circuit design for machine learning and deep learning, existing technologies struggle to effectively verify OneHot encoded or OneHot-like encoded data.
A data verification circuit was designed, which performs AND and OR operations through the connection of multiple AND gates and OR gates, and uses a judgment unit to determine whether the data to be verified is the target data.
It enables intuitive verification of OneHot encoded or OneHot-like encoded data, improving the accuracy and speed of verification, and is suitable for large-scale, high-speed digital circuit design.
Smart Images

Figure CN120087294B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit design technology, and more specifically, to a data verification circuit, method, chip, electronic device, and electronic device. Background Technology
[0002] In integrated circuit design using machine learning and deep learning, OneHot encoding (also known as one-bit valid encoding, where only one bit is valid for data of any bit width) is widely used. Meanwhile, many OneHot-like data types also exist in practical designs, such as data with two valid bits and one invalid bit. In practical designs, it is often necessary to verify whether this type of data is OneHot-like encoded. Summary of the Invention
[0003] The purpose of this application is to provide a data verification circuit, method, chip, electronic device, and electronic device for verifying OneHot encoded or OneHot-like encoded data.
[0004] This application provides a data verification circuit, including: a multi-layer AND operation unit and a multi-layer OR operation unit; in the first layer AND operation unit of the multi-layer AND operation unit, the i-th AND gate is connected to the (2i-1)-th and 2i-th bits of the data to be verified, respectively; in the first layer OR operation unit of the multi-layer OR operation unit, the i-th OR gate is connected to the (2i-1)-th and 2i-th bits of the data to be verified, respectively; the data to be verified has N bits in total, where i is an integer from 1 to N / 2; in the n-th layer AND operation unit of the multi-layer AND operation unit, every 2... n-1 A set of AND gates constitutes a group; in the nth layer or operation unit of the multi-layer OR operation unit, every 2 AND gates form a group. n-1Each AND gate constitutes a group; wherein: the j-th AND gate in the i-th group of the (n+1)-th layer AND operation unit is connected to the (j+1) / 2-th AND gate in the (2i-1)-th group and the (j+1) / 2-th AND gate in the 2i-th group of the n-th layer AND operation unit, respectively; the k-th AND gate in the i-th group of the (n+1)-th layer AND operation unit is connected to the k / 2-th OR gate in the (2i-1)-th group and the k / 2-th OR gate in the 2i-th group of the n-th layer OR operation unit, respectively; the j-th OR gate in the i-th group of the (n+1)-th layer OR operation unit is connected to the (j+1) / 2-th AND gate in the (2i-1)-th group and the (j+1) / 2-th AND gate in the 2i-th group of the n-th layer AND operation unit, respectively. The gates are connected as follows: the k-th OR gate in the i-th group of the (n+1)-th layer OR operation unit is connected to the k / 2-th OR gate in the (2i-1)-th group and the k / 2-th OR gate in the 2i-th group of the n-th layer OR operation unit, respectively; where j is odd and k is even; the judgment unit is connected to each AND gate of the last layer AND operation unit of the multi-layer AND operation unit and each OR gate of the last layer OR operation unit of the multi-layer OR operation unit; the judgment unit is used to determine whether the data to be verified is the target data based on the output value of the last layer AND operation unit and the output value of the last layer OR operation unit; the target data represents one-bit valid encoded data or one-bit valid encoded data.
[0005] In the above implementation, by connecting multiple layers of AND and OR gates, continuous AND and OR operations are performed. The final result will intuitively reflect the number of valid data in the data to be verified, thus determining whether the data to be verified is the target data. For example, for one valid bit of encoded data, assuming the valid data is 1, then the other bits are 0. Therefore, all AND operations should result in 0, while the final OR operation will have exactly one 1 value, thus enabling the determination of one valid bit of encoded data. As another example, for two valid bits of data, after multiple layers of AND operations, there are two possibilities: one is that the final AND result will be all 0, while the final OR operation will have exactly two 1 values. For example... Figure 5 The final result shown can be either one where the final AND operation result has exactly one value of 1, or one where the final OR operation result has exactly one value of 1, for example... Figure 6 The final result shown demonstrates that the determination of two valid data bits can be achieved based on these two cases. The same applies to other types of one-bit valid encoded data. Furthermore, the scheme of this application, where each layer is based on simultaneous AND and OR operations using AND and OR gates, results in lower latency and is beneficial for application in large-scale, high-speed digital circuit designs.
[0006] Furthermore, the number of layers of the AND operation unit is equal to the value after rounding down to log2(N+1); the number of layers of the OR operation unit is equal to the value after rounding down to log2(N+1).
[0007] Furthermore, each layer of the multi-layer AND operation unit and each AND gate of the operation unit are respectively connected to the judgment unit; each layer of the multi-layer OR operation unit and each OR gate of the operation unit are respectively connected to the judgment unit.
[0008] In the above implementation, each AND gate of each layer of AND operation unit is connected to the judgment unit, and each OR gate of each layer of OR operation unit is connected to the judgment unit. In this way, the judgment unit can further combine the AND operation results of each AND gate of each layer of AND operation unit and the OR operation results of each OR gate of each layer of OR operation unit to further determine whether the data to be verified is the target data, thereby improving the accuracy of target data verification.
[0009] Furthermore, the judgment unit includes a first comparator and a second comparator; each AND gate of each layer of the multi-layer AND operation unit is connected to the first comparator; each OR gate of each layer of the multi-layer OR operation unit is connected to the second comparator.
[0010] In the above implementation, a first comparator is used to connect to each AND gate of each layer of AND operation unit, and a second comparator is used to connect to each OR gate of each layer of OR operation unit. This enables separate comparison of the AND operation result and the OR operation result, resulting in higher comparison accuracy.
[0011] Furthermore, if N is odd, and the number of groups in the first-level AND operation unit is odd, and the number of groups in the first-level OR operation unit is odd, then: the first AND gate in the last group of the second-level AND operation unit is connected to the AND gate in the last group of the first-level AND operation unit and the last bit of the data to be verified, respectively; the second AND gate in the last group of the second-level AND operation unit is connected to the OR gate in the last group of the first-level OR operation unit and the last bit of the data to be verified, respectively.
[0012] In the above implementation, by connecting the first AND gate in the last group of the second-layer AND operation unit to the AND gate in the last group of the first-layer AND operation unit and the last bit of the data to be verified, and by connecting the second AND gate in the last group of the second-layer AND operation unit to the OR gate in the last group of the first-layer OR operation unit and the last bit of the data to be verified, the operation on the extra bit is realized, which improves the reliability of the judgment of the data to be verified.
[0013] Furthermore, if N is odd, and the number of groups of each layer and operation unit and each layer or operation unit is even, then: the judgment unit is also connected to the last bit of the data to be verified.
[0014] In the above implementation, by connecting the judgment unit to the last bit of the data to be verified, the combined judgment of the extra bit is realized, which improves the reliability of the judgment of the data to be verified.
[0015] This application embodiment also provides a data verification method, including: upon receiving data to be verified, grouping the (2i-1)th and 2ith bits of the data to be verified into i groups of first-level data to be processed; wherein the data to be verified has N bits in total, and i is an integer from 1 to N / 2; performing AND and OR operations on each group of first-level data to be processed to obtain AND and OR result data for each group of first-level data to be processed; grouping the AND result data of the (2a-1)th group of first-level data to be processed and the AND result data of the (2a)th group of first-level data to be processed into a group of a groups of second-level AND operation data; grouping the OR result data of the (2a-1)th group of first-level data to be processed and the OR result data of the (2a)th group of first-level data to be processed into a group of a groups of second-level OR operation data; wherein a is an integer from 1 to i / 2; for each A set of second-level AND operation data groups is subjected to AND and OR operations respectively to obtain the AND result data and OR result data of each set of second-level AND operation data groups; for each set of second-level OR operation data groups, AND and OR operations are performed respectively to obtain the AND result data and OR result data of each set of second-level OR operation data groups; the above process is repeated, continuously dividing the AND result data of the 2b-1 group and the 2b group of the same data group into a group and performing AND and OR operations respectively, dividing the OR result data of the 2b-1 group and the 2b group of the same data group into a group and performing AND and OR operations respectively, until the above process is performed a first preset number of times; wherein, b takes integers greater than or equal to 1 in sequence; based on the last obtained AND result data and OR result data, it is determined whether the data to be verified is the target data; the target data represents one-bit valid encoded data or one-bit valid encoded data.
[0016] In the above implementation, by continuously grouping the data to be verified and performing AND and OR operations, the final result will more intuitively reflect the number of valid data in the data to be verified, thereby determining whether the data to be verified is the target data. Furthermore, the scheme of this application uses AND and OR operations based on simultaneous AND and OR gates at each layer, resulting in less latency and making it suitable for application in large-scale, high-speed digital circuit design.
[0017] Furthermore, the first preset number of times is equal to the value after rounding down to log2(N+1).
[0018] In the above scheme, by setting the first preset number of times to the value after rounding down to log2(N+1), it can be ensured that each data group has exactly one pair of data in the last calculation, thereby achieving the effect of maximizing the number of calculations and making the final judgment result more reliable.
[0019] Furthermore, if N is odd and the number of first-layer data groups to be operated on is also odd, then: while taking the AND result data of the first-layer data groups to be operated on in group 2a-1 and the AND result data of the first-layer data groups to be operated on in group 2a as a group to obtain group a of second-layer AND operation data groups, it also includes: taking the AND result data of the last group of first-layer data groups to be operated on and the last digit of the data to be verified as a group to obtain group a+1 of second-layer AND operation data groups; while taking the OR result data of the first-layer data groups to be operated on in group 2a-1 and the OR result data of the first-layer data groups to be operated on in group 2a-1 and the OR result data of the first-layer data groups to be operated on in group 2a as a group to obtain group a of second-layer OR operation data groups, it also includes: taking the OR result data of the last group of first-layer data groups to be operated on and the last digit of the data to be verified as a group to obtain group a+1 of second-layer OR operation data groups.
[0020] Further, determining whether the data to be verified is target data based on the last obtained AND result data and / or result data includes: determining the data to be verified as target data if the last obtained AND result data conforms to a preset first type of result value and the last obtained OR result data conforms to a preset second type of result value.
[0021] As mentioned earlier, OneHot encoded or OneHot-like encoded data have different characteristics after processing. Based on this, by designing appropriate first and second type result values, it is easy to determine whether the data to be verified is the target data.
[0022] Further, determining whether the data to be verified is the target data based on the last obtained AND result data and / or result data includes: if each AND result data obtained after the second preset number of times conforms to the preset first type of result value, and the last obtained OR result data conforms to the preset second type of result value, the data to be verified is determined to be the target data; wherein, the second preset number of times is less than the first preset number of times.
[0023] In the above implementation, the AND operation results of each AND gate of each layer of AND operation unit and the OR operation results of each OR gate of each layer of OR operation unit can be combined to further determine whether the data to be verified is the target data, thereby improving the accuracy of target data verification.
[0024] Furthermore, if N equals 2 n +1, where n is a positive integer greater than or equal to 2, then: based on the last obtained AND result data and OR result data, and the last digit of the data to be verified, determine whether the data to be verified is the target data.
[0025] Further, determining whether the data to be verified is the target data based on the last obtained AND result data and OR result data, and the last digit of the data to be verified, includes: determining the data to be verified as the target data if the last obtained AND result data conforms to a preset first type of result value, and the last obtained OR result data plus the last digit of the data to be verified conforms to a preset second type of result value.
[0026] This application also provides a chip including any of the aforementioned data verification circuits.
[0027] This application also provides an electronic device, including the chip described above.
[0028] This application also provides an electronic device, including the aforementioned electronic components. Attached Figure Description
[0029] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0030] Figure 1 A flowchart illustrating a data verification method provided in an embodiment of this application;
[0031] Figure 2 This is a schematic diagram of the structure of a data verification circuit provided in an embodiment of this application;
[0032] Figure 3 A schematic diagram of a data verification circuit provided in this application embodiment when N is odd and the number of groups in the first layer and operation unit is odd;
[0033] Figure 4 This is a schematic diagram of a data verification circuit provided in an embodiment of the present application, where N is an odd number and the number of groups of each layer and operation unit and each layer or operation unit is an even number.
[0034] Figure 5This application provides a schematic diagram of a verification scenario for verifying whether 00001100 is a valid two-bit encoded data.
[0035] Figure 6 This is a schematic diagram illustrating a verification scenario for verifying whether 00010100 is a two-bit valid encoded data, as provided in an embodiment of this application. Detailed Implementation
[0036] The technical solutions in the embodiments of this application will now be described with reference to the accompanying drawings.
[0037] To verify OneHot encoded or OneHot-like encoded data, this application provides a data verification method, which can be found in [reference needed]. Figure 1 As shown, Figure 1 This is a flowchart illustrating the data verification method provided in the embodiments of this application, including:
[0038] S101: Upon receiving the data to be verified, the (2i-1)th and 2ith bits of the data to be verified are grouped together to obtain the i-th group of first-level data to be processed.
[0039] For example, assuming the data to be verified is 8 bits, numbered sequentially from the 1st bit to the 8th bit, then the first and second bits are grouped into one first-level data group to be processed, the third and fourth bits are grouped into another first-level data group, the fifth and sixth bits are grouped into another first-level data group, and the seventh and eighth bits are grouped into yet another first-level data group, resulting in a total of 4 first-level data groups to be processed.
[0040] In this embodiment of the application, the data to be verified consists of N bits, where N is a positive integer greater than or equal to 2, and i belongs to an integer from 1 to N / 2.
[0041] For example, when N is even, i takes values from 1 to N / 2. For example, if N is 8 as mentioned above, then i takes values from 1 to 4. When N is odd, i takes values from 1 to (N-1) / 2. For example, if N is 9, then i takes values from 1 to 4.
[0042] S102: Perform AND and OR operations on each group of first-level data to be operated on to obtain the AND result data and OR result data of each group of first-level data to be operated on.
[0043] For example, assuming the data to be verified is 8 bits, and each bit is denoted as A1 to A8, then: performing a bitwise AND operation on A1 and A2 yields the result. Perform an OR operation on A1 and A2 to obtain the OR result. Perform a bitwise AND operation on A3 and A4 to obtain the result. Perform an OR operation on A3 and A4 to obtain the OR result. Perform a bitwise AND operation on A5 and A6 to obtain the result. Perform an OR operation on A5 and A6 to obtain the OR result. Perform a bitwise AND operation on A7 and A8 to obtain the result. Perform an OR operation on A7 and A8 to obtain the OR result.
[0044] In the embodiments of this application, AND represents the result of an AND operation, OR represents the result of an OR operation, the superscript represents the level of the AND or OR operation, and the subscript represents the two objects of the operation.
[0045] S103: Combine the AND result data of the first layer of data to be operated in group 2a-1 and the AND result data of the first layer of data to be operated in group 2a to obtain the second layer of AND operation data group a; combine the OR result data of the first layer of data to be operated in group 2a-1 and the OR result data of the first layer of data to be operated in group 2a to obtain the second layer of OR operation data group a.
[0046] Here, 'a' is an integer from 1 to i / 2. For example, if i is 4, then 'a' takes the values 1 and 2 respectively.
[0047] For example, taking the aforementioned example where the data to be verified is denoted as A1 to A8 in sequence, we will... and As the first group of second-layer data and operation data group, and As the second group of second-layer data, the operation data group will and As the first group of second-layer or operational data groups, and As the second group, second layer, or operational data group.
[0048] S104: Perform AND and OR operations on each group of second-level AND operation data to obtain the AND result data and OR result data of each group of second-level AND operation data; perform AND and OR operations on each group of second-level OR operation data to obtain the AND result data and OR result data of each group of second-level OR operation data.
[0049] For example, taking the aforementioned example where the data to be verified is denoted as A1 to A8 in sequence, then for and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. In the superscripts 2A and 2O, 2 represents the second-level AND or OR operation, A represents the data source of the operation as the AND result data, and O represents the data source of the operation as the OR result data.
[0050] S105: Repeat the above process, continuously dividing the result data of the 2b-1 group and the 2b group of the same data group into one group and performing AND and OR operations on them respectively, and dividing the result data of the 2b-1 group and the 2b group of the same data group into one group and performing AND and OR operations on them respectively, until the above process has been performed for the first preset number of times.
[0051] Here, b takes integer values greater than or equal to 1. It can be understood that the maximum value of b is equal to the integer part of half the number of the same data set in the previous operation.
[0052] For example, taking the aforementioned example where the data to be verified is denoted as A1 to A8 in sequence, we will continue to... and As a group, we obtain a third-layer first AND operation data group; and As a group, we obtain a third-level first-OR operation data group; and As a group, we obtain a third-layer second AND operation data group; and As a group, we obtain a third-level second OR operation data group.
[0053] After that, and Perform an AND operation to obtain the AND result data of the first AND operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the first AND operation data group in the third layer.
[0054] right and Perform an AND operation to obtain the AND result data of the first OR operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer.
[0055] right and Perform an AND operation to obtain the AND result data of the second AND operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the third-level second AND operation data group.
[0056] right and Perform an AND operation to obtain the AND result data of the third-level second OR operation data group. right and Perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer.
[0057] In this context, the first superscript number 3 represents the third-level AND or OR operation; the second superscript number represents the data source for the second-level operation, where A indicates that the data source is the AND result data and O indicates that the data source is the OR result data; and the third superscript number represents the data source for the third-level operation, where A indicates that the data source is the AND result data and O indicates that the data source is the OR result data.
[0058] It is understandable that in the above example, since the data to be verified is 8 bits, after performing three layers of AND and OR operations, there is only one AND result for the same data group and only one OR result for the same data group. Therefore, it is impossible to continue grouping and performing AND and OR operations separately. Thus, for the above example, a maximum of three layers of AND and OR operations can be performed, meaning the first preset number of operations is a maximum of 3. However, for the case where the data to be verified is 16 bits, four layers of AND and OR operations can be performed, meaning the first preset number of operations is a maximum of 4. And for the case where the data to be verified is 32 bits, five layers of AND and OR operations can be performed, meaning the first preset number of operations is a maximum of 5. Therefore, in this embodiment, the setting of the first preset number of operations can be combined with the size of the data to be verified, and it can be set to be less than or equal to the value rounded down to log2(N+1).
[0059] In this embodiment of the application, when N is odd and N equals 2 n When n is -1 (where n is a positive integer greater than or equal to 2), the number of data groups to be operated on in the first layer will be odd. At this time: we can group the AND result data of the first layer data group to be operated on in the 2a-1 group and the AND result data of the first layer data group to be operated on in the 2a group to obtain the a group of second layer AND operation data groups. At the same time, we can also group the AND result data of the last group of first layer data groups to be operated on and the last digit of the data to be verified to obtain the a+1 group of second layer AND operation data groups. And, when we group the OR result data of the first layer data group to be operated on in the 2a-1 group and the OR result data of the first layer data group to be operated on in the 2a group to obtain the a group of second layer OR operation data groups, we can also group the OR result data of the last group of first layer data groups to be operated on and the last digit of the data to be verified to obtain the a+1 group of second layer OR operation data groups.
[0060] For example, assuming the data to be verified is 7 bits, and the data of each bit is denoted as A1 to A7, then three groups of first-level data to be processed are obtained, namely A1 and A2, A3 and A4, A5 and A6, with A7 being idle.
[0061] Then we have the result of the first-level AND operation. The result of the first-level OR operation
[0062] Therefore, when dividing the second layer and the data group for computation, we have: and As the first group of second-layer data and operation data group, A7 and A8 are designated as the second group, second layer, and operation data group. When dividing the second layer or operation data group, we have: and As the first group of second-layer or operational data groups, A7 and A7 are used as the second group of second-level or operational data groups.
[0063] As can be seen, based on the above implementation method, when N is odd and N equals 2 n When the value is -1, the maximum number of groupings is n. Therefore, the first preset number of groupings can be set to be less than or equal to the value after rounding down to log2(N+1).
[0064] It is understood that in the embodiments of this application, when N is an odd number, but N is not equal to 2... n When -1, if the number of data groups to be operated on in the first layer is also odd, then while taking the AND result data of the first layer data group to be operated on in the 2a-1 group and the AND result data of the first layer data group to be operated on in the 2a group as a group to obtain the second layer AND operation data group a, the AND result data of the last group of the first layer data group to be operated on and the last digit of the data to be verified can still be taken as a group to obtain the second layer AND operation data group a+1; and while taking the OR result data of the first layer data group to be operated on in the 2a-1 group and the OR result data of the first layer data group to be operated on in the 2a group as a group to obtain the second layer OR operation data group a, the OR result data of the last group of the first layer data group to be operated on and the last digit of the data to be verified can still be taken as a group to obtain the second layer OR operation data group a+1.
[0065] In this embodiment of the application, N is an odd number, but N is not equal to 2. n When the value is -1, if the number of data groups to be processed in the first layer is not odd, but the number of data groups to be processed in a certain layer is odd, then the last digit of the data to be verified can be combined with the result of the AND operation of the data group to be processed in that layer, and ...
[0066] For example, assuming N is 13, meaning the data to be verified is 13 bits, and the data of each bit is denoted as A1 to A13, then we have six groups of first-level data to be processed: A1 and A2, A3 and A4, A5 and A6, A7 and A8, A9 and 10, A11 and A12, with A13 being empty. Then there are three groups of second-level data to be processed for each type, namely three groups of second-level AND operation data groups: and and and Three sets of second-level or operational data groups: and and and Therefore, when grouping the data to be operated on in the third layer, there will be odd numbers of data. In this case, we can use A13 to complete the grouping, resulting in two third-layer first AND operation data groups: and And A13, two third-level first-order OR operation data groups: and And A13, two third-level second AND operation data groups: and And A13, two third-level second OR operation data groups: and And A13.
[0067] In this embodiment, when the number of data groups to be processed in a certain layer is odd, the AND result of the last data group in that layer can be combined with the AND result of subsequent odd-numbered data groups to be processed and performed as a single group. Similarly, the OR result of the last data group in that layer can be combined with the AND result of subsequent odd-numbered data groups to be processed and performed as a single group. If no further layers with odd-numbered data groups to be processed exist, these can be used as the final AND and OR result data, and together with the last obtained AND and OR result data, to determine whether the data to be verified is the target data.
[0068] For example, in the above example, assuming N is 12, then and If you cannot continue grouping, you can... and and / or result data, and and / or result data, and and / or result data, and Together with the result data and / or the result data, determine whether the data to be verified is the target data.
[0069] S106: Determine whether the data to be verified is the target data based on the last obtained result data and / or result data.
[0070] In this embodiment of the application, the target data represents one valid coded data or a type of one valid coded data. Specifically, a type of one valid coded data refers to: data with two valid bits (denoted as two valid bits), data with one invalid bit (denoted as one invalid bit), etc.
[0071] In the embodiments of this application, the AND and OR results obtained after the above operations will more intuitively reflect the number of valid data in the data to be verified. For example, for one valid bit of encoded data, assuming the valid data is 1, then the other bits are 0. Therefore, all AND operations should result in 0, and the final OR result will have exactly one 1 value, thus enabling the determination of one valid bit of encoded data. As another example, for two valid bits of data, after multiple AND operations, there are two possibilities: one is that the final AND result will be all 0, and the final OR result will have exactly two 1 values. For example... Figure 5 The final result shown can be either one where the final AND operation result has exactly one value of 1, or one where the final OR operation result has exactly one value of 1, for example... Figure 6 The final result shown demonstrates how these two cases can be used to determine two valid bits. For example, for a single invalid bit, assuming the valid bit is 1, then there is exactly one bit that is 0. Therefore, all OR operations should result in 1, and the final AND operation will have exactly one value of 0, thus enabling the determination of a single invalid bit.
[0072] Based on this, if the last obtained result data conforms to the preset first type of result value and the last obtained result data conforms to the preset second type of result value, the data to be verified can be determined as the target data.
[0073] For different target data, corresponding first-type and second-type result values can be set to determine whether the data to be verified is the target data. For example, if the target data is a single valid coded bit, the data to be verified can be determined to be the target data if all the last obtained AND results are 0, and only one result is 1; otherwise, the data to be verified is determined not to be the target data. As another example, if the target data is a two-digit valid coded bit, the data to be verified can be determined to be the target data if all the last obtained AND results are 0, and only two result values are 1; or if exactly one of the last obtained AND results is 1, and only one result is 1; otherwise, the data to be verified is determined not to be the target data. As yet another example, if the target data is a single invalid bit, the data to be verified can be determined to be the target data if all the last obtained OR results are 1, and only one result value is 0; otherwise, the data to be verified is determined not to be the target data.
[0074] Furthermore, for one-bit valid encoded data or near-one-bit valid encoded data, the result values obtained during each layer of computation can also reflect, to some extent, whether the data to be verified is the target data. Therefore, in an optional embodiment of this application, the result values obtained during each layer of computation can also be combined to determine whether the data to be verified is the target data.
[0075] For example, for one-digit valid encoded data and two-digit valid encoded data, it can be set that if each AND result data obtained after a second preset number of iterations (including the AND result data obtained in the round containing the second preset number of iterations) conforms to a preset first type of result value, and the last AND result data obtained conforms to a preset second type of result value, then the data to be verified is determined to be the target data; otherwise, the data to be verified is determined not to be the target data. The second preset number of iterations is less than the first preset number of iterations.
[0076] For a non-valid bit data, it can be set that if each OR result data obtained after the second preset number of times (including the OR result data obtained in the round in which the second preset number of times is located) conforms to the preset second type of result value, and the last OR result data obtained conforms to the preset first type of result value, then the data to be verified is determined to be the target data; otherwise, the data to be verified is determined not to be the target data.
[0077] The second preset number of operations can be set differently for different target data. For example, for one valid bit and one invalid bit, each operation will yield the same result, so the second preset number of operations can be set to 1. However, for two valid bits, during the operation, the two valid bits may be in the same group or in different groups during the first grouping, which may lead to differences in the result of the first operation. Therefore, the second preset number of operations can be set to 2.
[0078] In some optional embodiments of this application, if N is odd and N equals 2 n If +1 is added, then the last bit of the data to be verified will always be idle and cannot be grouped with any intermediate level AND or OR result data. Therefore, it can be used as a separate verification bit. Based on the last AND and OR result data and the last bit of the data to be verified, it can be determined whether the data to be verified is the target data.
[0079] For example, assuming N is 9, that is, the data to be verified is 9 bits of data, and the data of each bit is denoted as A1 to A9, then four groups of first-level data to be processed can be obtained, namely A1 and A2, A3 and A4, A5 and A6, A7 and A8, and A9 is idle.
[0080] Then we have the result of the first-level AND operation. The result of the first-level OR operation
[0081] Therefore, when dividing the second layer and the data group for computation, we have: and As the first group of second-layer data and operation data group, and As the second group, the second layer, and the operational data group. When dividing the second layer or operational data group, we have: and As the first group of second-layer or operational data groups, and As the second group, second layer, or operational data group.
[0082] After that, and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result. right and Perform an AND operation to obtain the result. right and Perform an OR operation to obtain the OR result.
[0083] Will and As a group, we obtain a third-layer first AND operation data group; and As a group, we obtain a third-level first-OR operation data group; and As a group, we obtain a third-layer second AND operation data group; and As a group, we obtain a third-level second OR operation data group.
[0084] After that, and Perform an AND operation to obtain the AND result data of the first AND operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the first AND operation data group in the third layer.
[0085] right and Perform an AND operation to obtain the AND result data of the first OR operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer.
[0086] right and Perform an AND operation to obtain the AND result data of the second AND operation data group in the third layer. right and Perform an OR operation to obtain the OR result data of the third-level second AND operation data group.
[0087] right and Perform an AND operation to obtain the AND result data of the third-level second OR operation data group. right and Perform an OR operation to obtain the OR result data of the first OR operation data group in the third layer.
[0088] Finally, according to A9 determines whether the data to be verified is the target data.
[0089] Assuming the target data is one or two valid encoded bits, the data to be verified is determined to be the target data if the last obtained result data matches a preset first type of result value, and the last obtained result data plus the last bit of the data to be verified matches a preset second type of result value. For example, to determine whether the aforementioned 9-bit data to be verified is one valid encoded bit, the following steps can be taken: Are all zero, and Does A9 contain one and only one 1?
[0090] Assuming the target data is a single invalid bit, the data to be verified is determined to be the target data if the sum of the last obtained result data and the last bit of the data to be verified matches a preset first type of result value, and the last obtained result data matches a preset second type of result value. For example, to determine whether the aforementioned 9-bit data to be verified is a single valid encoded bit, the following steps can be taken: Does A9 contain one and only one 0? Are all values 1?
[0091] It is understandable that the above judgment process can be implemented through a judgment unit (such as, but not limited to, a comparator).
[0092] Based on the scheme of this application, by continuously grouping the data to be verified and then performing AND and OR operations, the final result will more intuitively reflect the number of valid data in the data to be verified, thereby determining whether the data to be verified is the target data. Furthermore, the scheme of this application allows each layer to perform AND and OR operations based on simultaneous AND and OR gates, resulting in less latency and making it suitable for application in large-scale, high-speed digital circuit design.
[0093] Based on the same inventive concept, this application also provides a data verification circuit that can implement the above method, such as... Figure 2 As shown, it includes: a multi-layer AND operation unit, a multi-layer OR operation unit, and a decision unit. Among them:
[0094] In the first layer of the multi-level AND operation unit, the i-th AND gate is connected to the (2i-1)-th and 2i-th bits of the data to be verified, respectively; in the first layer of the multi-level OR operation unit, the i-th OR gate is connected to the (2i-1)-th and 2i-th bits of the data to be verified, respectively; the data to be verified consists of N bits, where i is an integer from 1 to N / 2.
[0095] In the nth layer of multi-level and operation units, every 2 n-1 A group consists of 2 AND gates; in the nth layer or operation unit of a multi-level OR unit, each 2 n-1 A group consists of one or more gates; where:
[0096] The j-th AND gate in the i-th group of the (n+1)-th layer AND operation unit is connected to the (j+1) / 2-th AND gate in the (2i-1)-th group and the (j+1) / 2-th AND gate in the 2i-th group of the n-th layer AND operation unit, respectively; the k-th AND gate in the i-th group of the (n+1)-th layer AND operation unit is connected to the k / 2-th OR gate in the (2i-1)-th group and the k / 2-th OR gate in the 2i-th group of the n-th layer OR operation unit, respectively.
[0097] The j-th OR gate in the i-th group of the (n+1)-th layer OR operation unit is connected to the (j+1) / 2-th AND gate in the (2i-1)-th group and the (j+1) / 2-th AND gate in the 2i-th group of the n-th layer OR operation unit, respectively; the k-th OR gate in the i-th group of the (n+1)-th layer OR operation unit is connected to the k / 2-th OR gate in the (2i-1)-th group and the k / 2-th OR gate in the 2i-th group, respectively; where j is odd and k is even.
[0098] The decision unit is connected to each AND gate of the last layer AND operation unit of the multi-layer AND operation unit, and each OR gate of the last layer OR operation unit of the multi-layer OR operation unit.
[0099] The judgment unit is used to determine whether the data to be verified is the target data based on the output value of the last layer and the operation unit and the output value of the last layer or the operation unit; the target data represents one-bit valid coded data or one-bit valid coded data.
[0100] It is understandable that, based on the above connection method, the circuit can realize the continuous grouping and multi-level operation of the method described above during execution.
[0101] In the embodiments of this application, each bit of the data to be verified can be one or more data storage devices connected in the circuit, such as data bits in a register or memory. Each bit can be led out through a separate line and connected to an AND gate and an OR gate.
[0102] In this embodiment, the size of the data to be verified is determined when the data verification circuit provided in this embodiment is connected to the corresponding data temporary storage device. That is, the value of N is determined when the data verification circuit is connected to the corresponding data temporary storage device.
[0103] In one feasible embodiment of this application, the number of layers of the operation unit is equal to the value after rounding down to log2(N+1); or the number of layers of the operation unit is equal to the value after rounding down to log2(N+1).
[0104] In another feasible embodiment of this application, the number of layers of the AND operation unit can be less than the value rounded down to log2(N+1); or the number of layers of the OR operation unit can be less than the value rounded down to log2(N+1). However, the number of layers of the AND operation unit is the same as the number of layers of the OR operation unit.
[0105] In an optional embodiment of this application, each AND gate of each layer of the multi-layer AND operation unit can be further connected to a judgment unit; each OR gate of each layer of the multi-layer OR operation unit can also be connected to a judgment unit. In this way, the judgment unit can further combine the AND operation results of each AND gate of each layer of the AND operation unit and the OR operation results of each OR gate of each layer of the OR operation unit to further determine whether the data to be verified is the target data, thereby improving the accuracy of target data verification.
[0106] In an optional embodiment of this application, the determining unit may include a first comparator and a second comparator. Each AND gate of each layer of the multi-layer AND operation unit is connected to the first comparator. Each OR gate of each layer of the multi-layer OR operation unit is connected to the second comparator. Thus, by using the first comparator to connect to each AND gate of each layer of the AND operation unit, and using the second comparator to connect to each OR gate of each layer of the OR operation unit, separate comparisons of the AND and OR operation results can be achieved, resulting in higher comparison accuracy.
[0107] In an optional embodiment of this application, if N is odd, and the number of groups in the first-level AND operation unit is odd, and the number of groups in the first-level OR operation unit is odd, then: the first AND gate in the last group of the second-level AND operation unit is connected to the AND gate in the last group of the first-level AND operation unit and the last bit of the data to be verified, respectively; the second AND gate in the last group of the second-level AND operation unit is connected to the OR gate in the last group of the first-level OR operation unit and the last bit of the data to be verified, respectively. For example Figure 3 As shown.
[0108] In an optional embodiment of this application, if N is odd, and the number of groups of each layer and operation unit and each layer or operation unit is even, then: the judgment unit is also connected to the last bit of the data to be verified. For example Figure 4 As shown.
[0109] It is understood that the embodiments described in the foregoing method section can all be implemented in the data verification circuit of this application embodiment through corresponding wiring connection methods.
[0110] Based on the data verification circuit provided in this application embodiment, through the connection of multiple layers of AND and OR gates, AND and OR operations are continuously performed. The final result will more intuitively reflect the quantity of valid data in the data to be verified, thereby determining whether the data to be verified is the target data. Moreover, in the solution of this application, each layer is based on AND and OR operations performed simultaneously by AND and OR gates, resulting in less latency, which is also beneficial for application in large-scale, high-speed digital circuit design.
[0111] To facilitate understanding of the scheme in the embodiments of this application, the following explanation uses the verification of whether the data to be verified is a two-bit valid encoded data as an example. Assume that the data to be verified is 8-bit data.
[0112] There are two scenarios during the first grouping: two significant digits are grouped together, such as... Figure 5 As shown, the data to be verified is 00001100; the two significant bits are not in the same group, as shown below. Figure 6 As shown, the data to be verified is 00010100.
[0113] like Figure 5 As shown, after performing the first-level grouping AND and OR operations, we obtain... Data group and data group Each of these constitutes a OneHot data set. Further grouping and processing are then performed to obtain data sets. Data group Data group Data group Final results data
[0114] The values are 00010001, thus determining them as two valid coded data.
[0115] like Figure 6 As shown, after the first level of operation, if the result data is all 0 or the data group still consists of 2 significant bits, the grouping continues. This process continues to consider cases where the two significant bits are in the same group and cases where the two significant bits are not in the same group. The grouping continues until the final result data is obtained.
[0116] The values are 00000011, thus determining them as two valid coded data.
[0117] Based on the same inventive concept, this application also provides a chip that includes the aforementioned data verification circuit.
[0118] In the embodiments of this application, the chip can be a processor chip such as GPU (Graphics Processing Unit), CPU (Central Processing Unit), AI (Artificial Intelligence), NPU (Neural Network Processing Unit), ISP (Image Signal Processor), DPU (Display Processing Unit), VPU (Video Processing Unit), DSP (Digital Signal Processor), etc., or a memory chip such as DRAM (Dynamic Random Access Memory), SRAM (Static Random Access Memory), Flash (Flash Memory), etc., or a sensor chip or power management chip, etc.
[0119] In this application embodiment, an electronic device is also provided, which may include the aforementioned chip.
[0120] In the embodiments of this application, the electronic device may be, but is not limited to, a board card, motherboard, communication module, or other device that can be independently manufactured and used as part of other large equipment.
[0121] In this application embodiment, an electronic device is also provided, which includes the aforementioned electronic components. The electronic device may be, but is not limited to, a terminal device, such as a smartphone, a smart wearable device, a computer, etc., or it may be a non-terminal device such as a server.
[0122] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. The apparatus embodiments described above are merely illustrative. Furthermore, the couplings or direct couplings or communication connections shown or discussed may be indirect couplings or communication connections between devices or units through some communication interfaces, and may be electrical, mechanical, or other forms.
[0123] In this document, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, without necessarily requiring or implying any such actual relationship or order between these entities or operations.
[0124] In this article, "multiple" refers to two or more.
[0125] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.
Claims
1. A data verification circuit, characterized by, The application relates to a verification method and device for a target data, and belongs to the field of data verification. The first layer of the multi-layer and operation unit is connected with the (2i-1)th bit and the 2ith bit of the target data through the ith AND gate of the first layer of the multi-layer and operation unit; the first layer of the multi-layer or operation unit is connected with the (2i-1)th bit and the 2ith bit of the target data through the ith OR gate of the first layer of the multi-layer or operation unit; the target data has N bits, and i is an integer in 1 to N / 2. The (j+1) / 2th AND gate of the 2i-1th group of the nth layer of the multi-layer and operation unit and the (j+1) / 2th AND gate of the 2ith group of the nth layer of the multi-layer and operation unit are connected with the jth AND gate of the ith group of the (n+1)th layer of the multi-layer and operation unit; the k / 2th OR gate of the 2i-1th group of the nth layer of the multi-layer or operation unit and the k / 2th OR gate of the 2ith group of the nth layer of the multi-layer or operation unit are connected with the kth OR gate of the ith group of the (n+1)th layer of the multi-layer or operation unit. The multi-layer and the nth layer of the operation unit and the operation unit, every 2 n-1 AND gate constitutes a group; the multi-layer or the nth layer of the operation unit or the operation unit, every 2 n-1 OR gate constitutes a group; wherein: The (j+1) / 2th AND gate of the 2i-1th group of the nth layer of the multi-layer and operation unit and the (j+1) / 2th AND gate of the 2ith group of the nth layer of the multi-layer and operation unit are connected with the jth OR gate of the ith group of the (n+1)th layer of the multi-layer or operation unit; the k / 2th OR gate of the 2i-1th group of the nth layer of the multi-layer or operation unit and the k / 2th OR gate of the 2ith group of the nth layer of the multi-layer or operation unit are connected with the kth OR gate of the ith group of the (n+1)th layer of the multi-layer or operation unit; wherein j is an odd number, and k is an even number. The judging unit is connected with each AND gate of the last layer of the multi-layer and operation unit and each OR gate of the last layer of the multi-layer or operation unit. The judging unit is used for determining whether the target data is the target data according to the output value of the last layer of the multi-layer and operation unit and the output value of the last layer of the multi-layer or operation unit; the target data represents a bit effective encoding data or a bit effective encoding data. Each AND gate of each layer of the multi-layer and operation unit is also connected with the judging unit. The number of layers of the AND operation unit is equal to the number of layers of the OR operation unit after the value is rounded down. The number of layers of the AND operation unit is equal to the number of layers of the OR operation unit after the value is rounded down. The number of layers of the AND operation unit is less than the number of layers of the OR operation unit after the value is rounded down. The number of layers of the AND operation unit is less than the number of layers of the OR operation unit after the value is rounded down. The number of layers of the AND operation unit is less than the number of layers of the OR operation unit after the value is rounded down.
2. The data validation circuit of claim 1, wherein, Each OR gate of each layer of the multi-layer or operation unit is also connected with the judging unit. The judging unit comprises a first comparator and a second comparator.
3. The data validation circuit of claim 2, wherein, Each AND gate of each layer of the multi-layer and operation unit is connected with the first comparator. Each OR gate of each layer of the multi-layer or operation unit is connected with the second comparator. If N is an odd number, and the number of groups in the first layer of the multi-layer and operation unit is an odd number, and the number of groups in the first layer of the multi-layer or operation unit is an odd number, then:
4. The data validation circuit of any of claims 1-3, wherein, The first AND gate of the last group of the second layer of the multi-layer and operation unit is connected with the AND gate of the last group of the first layer of the multi-layer and operation unit and the last bit of the target data. The second AND gate of the last group of the second layer of the multi-layer and operation unit is connected with the OR gate of the last group of the first layer of the multi-layer or operation unit and the last bit of the target data. If N is an odd number, and the number of groups of each layer of the multi-layer and operation unit and the number of groups of each layer of the multi-layer or operation unit are even numbers, then:
5. The data validation circuit of any of claims 1-3, wherein, The judging unit is also connected with the last bit of the target data. The application relates to a verification method and device for a target data, and belongs to the field of data verification.
6. A data verification method characterized by, In the case of receiving the to-be-verified data, the 2i-1th bit and the 2i bit of the to-be-verified data are taken as a group, and i groups of first-layer to-be-operated data groups are obtained; wherein the to-be-verified data has N bits, and i is an integer in 1 to N / 2; AND operation and OR operation are respectively performed on each group of the first-layer to-be-operated data groups, and AND result data and OR result data of each group of the first-layer to-be-operated data groups are obtained; AND result data of the 2a-1th group of the first-layer to-be-operated data groups and AND result data of the 2a group of the first-layer to-be-operated data groups are taken as a group, and a group of second-layer AND operation data groups are obtained; OR result data of the 2a-1th group of the first-layer to-be-operated data groups and OR result data of the 2a group of the first-layer to-be-operated data groups are taken as a group, and a group of second-layer OR operation data groups are obtained; a is an integer in 1 to i / 2; AND operation and OR operation are respectively performed on each group of the second-layer AND operation data groups, and AND result data and OR result data of each group of the second-layer AND operation data groups are obtained; AND operation and OR operation are respectively performed on each group of the second-layer OR operation data groups, and AND result data and OR result data of each group of the second-layer OR operation data groups are obtained; The above process is repeated, AND result data of the 2b-1th group and the 2b group of the same data group are taken as a group to perform AND operation and OR operation, respectively, OR result data of the 2b-1th group and the 2b group of the same data group are taken as a group to perform AND operation and OR operation, respectively, until the first preset number of the above process is performed; wherein b is an integer greater than or equal to 1, and the maximum value of b is equal to the half of the number of the same data group in the last layer operation; It is determined whether the to-be-verified data is target data according to the last obtained AND result data and OR result data; the target data represents a bit effective encoding data or a bit effective encoding data-like; Wherein the first preset number of times is less than or equal to the number of times of the the value after the floor operation.
7. The data verification method of claim 6, wherein, If the N is odd, and the number of the first-layer to-be-operated data groups is also odd, then: In addition to taking AND result data of the 2a-1th group of the first-layer to-be-operated data groups and AND result data of the 2a group of the first-layer to-be-operated data groups as a group to obtain a group of second-layer AND operation data groups, the following is also included: AND result data of the last group of the first-layer to-be-operated data groups and the last bit of the to-be-verified data are taken as a group to obtain the a+1th group of the second-layer AND operation data groups; In addition to taking OR result data of the 2a-1th group of the first-layer to-be-operated data groups and OR result data of the 2a group of the first-layer to-be-operated data groups as a group to obtain a group of second-layer OR operation data groups, the following is also included: OR result data of the last group of the first-layer to-be-operated data groups and the last bit of the to-be-verified data are taken as a group to obtain the a+1th group of the second-layer OR operation data groups.
8. The data verification method of claim 6, wherein, It is determined whether the to-be-verified data is target data according to the last obtained AND result data and OR result data, including: If the last obtained AND result data meets a preset first type result value, and the last obtained OR result data meets a preset second type result value, it is determined that the to-be-verified data is the target data.
9. The data verification method of claim 6, wherein, According to the last obtained each and result data and / or result data, it is determined whether the to-be-verified data is the target data, comprising: If each and result data obtained after a second preset number of times conforms to the preset first type result value, and the last obtained or result data conforms to the preset second type result value, it is determined that the to-be-verified data is the target data. The second preset number of times is less than the first preset number of times.
10. The data verification method of claim 6, wherein, if said N is equal to 2 n +1, said n being a positive integer greater than or equal to 2, then: According to the last obtained each and result data and / or result data, and the last bit data of the to-be-verified data, it is determined whether the to-be-verified data is the target data.
11. The data verification method of claim 10, wherein, According to the last obtained each and result data and / or result data, and the last bit data of the to-be-verified data, it is determined whether the to-be-verified data is the target data, comprising: If each and result data obtained after a second preset number of times conforms to the preset first type result value, and the last obtained or result data conforms to the preset second type result value, it is determined that the to-be-verified data is the target data.
12. A chip, characterized by The data verification circuit according to any one of claims 1-5.
13. An electronic device, characterized by The chip according to claim 12.
14. An electronic device, comprising: The electronic device according to claim 13.
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