Low-phase noise ring oscillator based on feedforward differential delay unit circuit
By using feedforward differential delay unit circuit and fully differential signal processing technology in the ring oscillator, the problem of insufficient phase noise performance of the ring oscillator is solved, and a wide tuning range and low phase noise are achieved.
Patent Information
- Application Number
- CN202510149683.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-11
- Publication Date
- 2025-06-03
AI Technical Summary
Existing ring oscillators have problems with insufficient phase noise performance during oscillation, especially in highly integrated environments, which are difficult to effectively reduce.
The feedforward differential delay unit circuit is adopted, by adding an auxiliary input stage as a pseudo-current source, the latch cross-coupling tube accelerates the signal flip, and the cascaded ring oscillator is processed with a fully differential signal to reduce phase noise.
It achieves a wide tuning range within the specified voltage range, and significantly reduces the phase noise performance of the ring oscillator, achieving an excellent effect of -112.534dBc/Hz@1MHz.
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Figure CN120090600A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of radio frequency analog integrated circuits, and relates to a feedforward differential delay cell circuit and a low phase noise ring oscillator including the delay cell circuit. Background Art
[0002] A voltage controlled oscillator is a device that can generate a clock signal and is widely used in phase locked loop circuits and wireless communication fields. Voltage controlled oscillators are divided into ring oscillators and LC oscillators. LC oscillators have relatively excellent phase noise performance and stable oscillation frequencies because they have high-quality factor components such as capacitors and inductors. However, since the inductor L has a very large area, it is difficult for LC oscillators to be applied in highly integrated environments. Ring oscillators can be realized by CMOS technology, have small sizes, and also have a wider tuning range and a simpler circuit structure, making it easier to integrate them into integrated systems such as phase locked loop circuits. Therefore, ring oscillators are more widely used in phase locked loop circuits.
[0003] Ring oscillators are generally divided into single-ended inverter oscillators and differential oscillators. Ring oscillators are generally realized by CMOS technology and have a very low quality factor. When the oscillator resonates, a lot of energy will be lost, resulting in an unsatisfactory phase noise performance of the ring oscillator. Compared with single-ended inverter type ring oscillators, differential ring oscillators have better phase noise performance. Therefore, to obtain a ring oscillator with better performance, it is more appropriate to use a differential ring oscillator. Currently, in order to obtain a ring oscillator with better phase noise, methods such as increasing the swing and reducing the delay cell have emerged, but there are still many deficiencies in its phase noise performance, which is worthy of further research. Summary of the Invention
[0004] In view of this, the purpose of the present invention is to provide a low phase noise ring oscillator based on a feedforward differential delay cell circuit, and to reduce the phase noise of the ring oscillator by adding a feedforward differential delay cell circuit.
[0005] To achieve the above purpose, on the one hand, the present invention provides a feedforward differential delay cell circuit, which includes an input transistor, an auxiliary input transistor, a latch cross-coupled transistor, a switch transistor, a frequency control cross-coupled transistor, a voltage controlled variable resistor transistor, and a current transistor.
[0006] Among them, the first end of the auxiliary input transistor is connected to an auxiliary input signal, the second end is connected to the power supply, and the third end is respectively connected to the second end of the switch transistor, the second end of the frequency control cross-coupled transistor, and the second end of the input transistor.
[0007] The first terminal of the voltage-controlled variable resistor tube is connected to a voltage control signal, the second terminal is connected to a power supply, and the third terminal is respectively connected to the second terminal of the switching tube, the second terminal of the frequency control cross-coupled tube, and the second terminal of the input tube; in the case of high voltage, the voltage-controlled variable resistor tube can be regarded as a variable resistor to control the output frequency.
[0008] The first terminal of the latch cross-coupled tube is connected to a power supply, and the second terminal is respectively connected to the second terminal of the switching tube, the second terminal of the frequency control cross-coupled tube, and the second terminal of the input tube; the latch cross-coupled tube is used to latch a signal to accelerate the establishment of the waveform.
[0009] The first terminal of the current tube is connected to a power supply, the second terminal is grounded, and the third terminal is respectively connected to the second terminal of the switching tube, the second terminal of the frequency control cross-coupled tube, and the second terminal of the input tube; the current tube is used to provide current for the feed-forward differential delay unit circuit in the case of low voltage so that the circuit can work normally.
[0010] The first terminal of the switching tube is connected to a voltage control signal, the third terminal is connected to the first terminal of the frequency control cross-coupled tube, and the third terminal of the frequency control cross-coupled tube is grounded; wherein, the switching tube is used to control the conduction of the frequency control cross-coupled tube, and the frequency control cross-coupled tube is used for frequency control in the case of low voltage.
[0011] The first terminal of the input end is connected to an input signal, and the third terminal is grounded.
[0012] Among them, the auxiliary input tube, the voltage-controlled variable resistor tube, the latch cross-coupled tube, and the current tube all adopt PMOS tubes, and the switching tube, the frequency control cross-coupled tube, and the input tube all adopt NMOS tubes.
[0013] Furthermore, the phase of the input signal and the auxiliary input signal differ by 45°, so that the PMOS tube and the NMOS tube are turned on simultaneously.
[0014] On the other hand, the present invention provides a low phase noise ring oscillator, which includes a plurality of cascaded feed-forward differential delay unit circuits and adopts full-differential signal processing.
[0015] The beneficial effects of the present invention are as follows: The present invention sets an auxiliary input stage in the feed-forward differential delay unit circuit as a pseudo-current source to reduce power consumption; the latch cross-coupled transistor is connected in parallel with the auxiliary input transistor through cross-coupling to accelerate signal flipping, speed up waveform establishment, increase the frequency and reduce current injection during signal conversion, thereby reducing phase noise; the ring oscillator formed by cascading the feed-forward differential delay unit circuits can achieve a relatively wide tuning range within a specified voltage range.
[0016] Other advantages, objects, and features of the present invention will be set forth in part in the following description, and in part will be obvious to those skilled in the art upon examination of the following, or may be learned by practice of the present invention. The objects and other advantages of the present invention may be realized and attained by the means of the instrumentalities and combinations particularly pointed out hereinafter. Brief Description of the Drawings
[0017] In order to make the objects, technical solutions, and advantages of the present invention more clear, the present invention will be described in detail preferably with reference to the accompanying drawings, where:
[0018] Figure 1 Schematic diagram of the feedforward differential delay unit circuit structure provided in an embodiment of the present invention;
[0019] Figure 2 Schematic diagram of the four-stage cascaded low-phase-noise ring oscillator structure provided in an embodiment of the present invention;
[0020] Figure 3 Phase noise simulation result diagram of the low-phase-noise ring oscillator. Detailed Embodiments
[0021] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the drawings provided in the following embodiments only illustrate the basic concept of the present invention schematically, and the following embodiments and the features in the embodiments can be combined with each other without conflict.
[0022] Among them, the drawings are only for illustrative purposes, showing only schematic diagrams, not physical diagrams, and should not be construed as a limitation on the present invention; in order to better illustrate the embodiments of the present invention, some components in the drawings will be omitted, enlarged, or reduced, which do not represent the dimensions of the actual product; for those skilled in the art, it is understandable that some well-known structures and their descriptions in the drawings may be omitted.
[0023] In the accompanying drawings of the embodiments of the present invention, the same or similar reference numerals correspond to the same or similar components; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "rear", etc. indicating the orientation or positional relationship, they are based on the orientation or positional relationship shown in the accompanying drawings. This is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, the terms describing the positional relationship in the accompanying drawings are only for illustrative purposes and cannot be construed as a limitation of the present invention. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific circumstances.
[0024] As Figure 1 shown, the present invention provides a feedforward differential delay unit circuit according to an embodiment, which includes: an input transistor, an auxiliary input transistor, a latch cross-coupled transistor, a switch transistor, a frequency control cross-coupled transistor, a voltage-controlled variable resistor transistor, and a current transistor.
[0025] Among them, the input transistor is used to access an input signal; the auxiliary input transistor is connected to the power supply VDD and is used to access an auxiliary input signal, and the phase of the auxiliary input signal is 45° different from that of the input signal; the latch cross-coupled transistor is connected to the power supply and is in parallel with the auxiliary input transistor, and it uses current extraction positive feedback to latch the signal and accelerate the waveform establishment; the switch transistor accesses a voltage control signal to control the conduction of the frequency control cross-coupled transistor; the frequency control cross-coupled transistor is connected in parallel with the input transistor, and the frequency control cross-coupled transistor is used to achieve frequency control under low voltage conditions; the voltage-controlled variable resistor transistor is connected to the power supply and is in parallel with the auxiliary input transistor. Under high voltage conditions, the voltage-controlled variable resistor transistor can be regarded as a variable resistor to control the output frequency; the current transistor is connected to the power supply and is in parallel with the auxiliary input transistor. Under low voltage conditions, the current transistor provides current for the delay unit circuit so that the delay unit circuit can work normally.
[0026] The input transistor includes NMOS transistors MN1 and MN4. The gates of MN1 and MN4 are respectively connected to positive and negative input signals, and the sources are both grounded. MN1 and MN4 form a main differential input, which can suppress the common-mode noise injected by the power supply and the substrate.
[0027] The auxiliary input transistor includes PMOS transistors MP2 and MP7. The gates of MP2 and MP7 are respectively connected to positive and negative auxiliary input signals, the sources are both connected to the power supply VDD, the drain of MP2 is connected to the drain of MN1, and the drain of MP7 is connected to the drain of MN4.
[0028] The latch cross-coupled transistors include PMOS transistors MP4 and MP5. The sources of MP4 and MP5 are both connected to the power supply VDD. The gate of MP4 is connected to the drain of MP5, the gate of MP5 is connected to the drain of MP4, the drain of MP4 is connected to the drain of MN1, and the drain of MP5 is connected to the drain of MN4.
[0029] The switching transistors include NMOS transistors MN5 and MN6. The gates of MN5 and MN6 are both connected to a voltage control signal. The drain of MN5 is respectively connected to the drains of MP2 and MP5, and the drain of MN6 is respectively connected to the drains of MP4 and MP7.
[0030] The frequency control cross-coupled transistors include NMOS transistors MN2 and MN3. The sources of MN2 and MN3 are both grounded. The gate of MN2 is connected to the source of MN6, the gate of MN3 is connected to the source of MN5. The drain of MN2 is respectively connected to the drains of MP2 and MP4, and the drain of MN3 is respectively connected to the drains of MP5 and MP7. By turning on the switching transistors MN5 and MN6, the conduction of the transistors MN2 and MN3 in the frequency control cross-coupled transistors is controlled, so as to control the oscillation frequency under low voltage conditions. Among them, the connection point of the drains of the NMOS transistors MN2 and MN1 serves as the output port of the feedforward differential delay unit circuit.
[0031] The voltage control variable resistance transistors include PMOS transistors MP3 and MP6. The sources of MP3 and MP6 are both connected to the power supply VDD. The drain of MP3 is respectively connected to the drains of MN1, MN2, and MN5, and the drain of MP6 is respectively connected to the drains of MN3, MN4, and MN6. The gates of MP3 and MP6 are connected to a voltage control signal, and the resistance of the transistors is changed by the voltage to control the output frequency.
[0032] The current transistors include PMOS transistors MP1 and MP8. The sources of MP1 and MP8 are both connected to the power supply VDD, and the gates are both grounded. The drain of MP1 is respectively connected to the drains of MN1, MN2, and MN5, and the drain of MP8 is respectively connected to the drains of MN3, MN4, and MN6. The current of the delay unit is controlled by the current of MP1 and the current of MP8 to reduce the loss.
[0033] As Figure 2 shown, a low phase noise ring oscillator provided by an embodiment of the present invention is formed by cascading four feedforward differential delay units, and adopts a full differential signal processing method to form a four-stage full differential ring oscillator.
[0034] Based on the low-phase-noise ring oscillator, a simulation experiment is carried out. The experimental components adopt the SMIC 180nm RF CMOS process. Based on the Cadence IC618 simulation experiment platform, the Spectre RF simulation tool is used to simulate the ring oscillator circuit. The given power supply voltage is 1.8V, and the operating temperature is 27°C.
[0035] Under the above working conditions, the PSS+PNOISE simulation of the ring oscillator is carried out at 600MHz, and the results are as Figure 3 shown. The abscissa is the frequency drift, with the unit of Hz, and the ordinate is the phase noise of the output signal, with the unit of dBc / Hz. It can be Figure 3 seen that the phase noise of the low-phase-noise ring oscillator proposed by the present invention is -112.534dBc / Hz@1MHz at the operating frequency of 600MHz, that is, the phase noise at a frequency offset of 1MHz is -112.534dBc / Hz, indicating that the low-phase-noise ring oscillator proposed by the present invention has the advantage of low phase noise.
[0036] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the purpose and scope of the present technical solution, and they should all be covered within the scope of the claims of the present invention.
Claims
1. A feedforward differential delay unit circuit, characterized in that: It includes an input tube, an auxiliary input tube, a latch cross-coupled tube, a switch tube, a frequency control cross-coupled tube, a voltage-controlled variable resistance tube and a current tube; The first end of the auxiliary input tube is connected to the auxiliary input signal, the second end is connected to the power supply, and the third end is respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube; The first end of the voltage-controlled variable resistor is connected to the voltage control signal, the second end is connected to the power supply, and the third end is respectively connected to the second end of the switch tube, the second end of the frequency-controlled cross-coupling tube and the second end of the input tube; The first end of the latch cross-coupling tube is connected to the power supply, and the second end is respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube; The first end of the current tube is connected to the power supply, the second end is grounded, and the third end is respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube; The first end of the switch tube is connected to the voltage control signal, the third end is connected to the first end of the frequency control cross-coupling tube, and the third end of the frequency control cross-coupling tube is grounded; The first end of the input terminal is connected to the input signal, and the third end is grounded.
2. The feedforward differential delay unit circuit according to claim 1, characterized in that: The input signal and the auxiliary input signal have a phase difference of 45°.
3. The feedforward differential delay unit circuit according to claim 1, characterized in that: The auxiliary input tube includes PMOS tubes MP2 and MP7; the gates of MP2 and MP7 are respectively connected to the positive and negative auxiliary input signals, the sources are connected to the power supply, and the drains are respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube.
4. The feedforward differential delay unit circuit according to claim 1, characterized in that: The voltage-controlled variable resistor tube includes PMOS tubes MP3 and MP6; the gates of MP3 and MP6 are both connected to the voltage control signal, the sources are both connected to the power supply, and the drains are respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube.
5. The feedforward differential delay unit circuit according to claim 1, characterized in that: The latch cross-coupled tube includes PMOS tubes MP4 and MP5; the sources of MP4 and MP5 are connected to the power supply, the gate of MP4 is connected to the drain of MP5, the gate of MP5 is connected to the drain of MP4, and the drains of MP4 and MP5 are respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupled tube and the second end of the input tube.
6. The feedforward differential delay unit circuit according to claim 1, characterized in that: The current tube includes PMOS tubes MP1 and MP8; the sources of MP1 and MP8 are connected to the power supply, the gates are grounded, and the drains are respectively connected to the second end of the switch tube, the second end of the frequency control cross-coupling tube and the second end of the input tube.
7. The feedforward differential delay unit circuit according to claim 1, characterized in that: The switch tubes include NMOS tubes MN5 and MN6; the gates of MN5 and MN6 are both connected to the voltage control signal, the sources are both connected to the first end of the frequency control cross-coupling tube, and the drains are respectively connected to the third end of the auxiliary input tube, the third end of the voltage-controlled variable resistor tube, the second end of the latch cross-coupling tube and the third end of the current tube.
8. The feedforward differential delay unit circuit according to claim 7, characterized in that: The frequency control cross-coupling tube includes NMOS tubes MN2 and MN3; the sources of MN2 and MN3 are both grounded, the gate of MN2 is connected to the source of MN6, and the gate of MN3 is connected to the source of MN5; the drains of MN2 and MN3 are respectively connected to the third end of the auxiliary input tube, the third end of the voltage-controlled variable resistor tube, the second end of the latch cross-coupling tube and the third end of the current tube.
9. The feedforward differential delay unit circuit according to claim 1, characterized in that: The input tubes NMOS tubes MN1 and MN4; the gates of MN1 and MN4 are respectively connected to the positive and negative input signals, the sources are both grounded, and the drains are respectively connected to the third end of the auxiliary input tube, the third end of the voltage-controlled variable resistor tube, the second end of the latch cross-coupling tube and the third end of the current tube; wherein the drain of MN1 serves as the output port of the feedforward differential delay unit circuit.
10. A low phase noise ring oscillator, characterized in that: A feedforward differential delay unit circuit comprising a plurality of cascade-connected feedforward differential delay units according to any one of claims 1 to 9.