Microflow heat dissipation packaging structure and integration method

Abstract

The invention discloses a microflow heat dissipation packaging structure and an integration method, relates to the technical field of microelectronic packaging, and is used for solving the problem that in the prior art, stress accumulation is generated in the integration process of different materials, and the packaging reliability is seriously influenced. The structure comprises a substrate; the chip is connected to the end surface of the substrate; the manifold structure is connected with the chip; the packaging cover plate is connected with the manifold structure; the thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the packaging cover plate. According to the technical scheme provided by the invention, the manifold structure is prepared from the material of which the thermal expansion coefficient is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the packaging cover plate, so that the thermal stress generated in the working process of the chip can be effectively controlled through the increase of the manifold structure, and the structural reliability is improved. According to the integration method, mechanical stress and thermal stress generated by heat dissipation structure integration and chip heating are released through step-by-step bonding, and the packaging reliability is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of microelectronic packaging, and in particular to a microfluidic heat dissipation packaging structure and an integration method. Background Art

[0002] With the miniaturization and integration of electronic devices, the application of flip-chip technology is becoming more and more widespread, and the power density of chips has also increased significantly. Manifold / microchannel liquid cooling technology passes the cooling medium into the chip packaging structure, greatly improving the chip's heat dissipation capacity. At the same time, its structure is more compact, and it has great application prospects in high-power density chip heat dissipation scenarios. However, existing heat dissipation structures usually use metal materials such as copper and aluminum, which have a large difference in thermal expansion coefficient with semiconductor materials (silicon, silicon carbide, gallium nitride). Therefore, during the integration of the heat dissipation structure and the heat dissipation of the chip, the accumulated mechanical stress and thermal stress will produce holes and defects at the structural interface, which will affect the heat transfer of the chip. Holes and defects will also cause leakage and other problems, seriously affecting the reliability of the package.

[0003] Therefore, there is an urgent need to provide a microfluidic packaging structure for flip-chip heat dissipation to reduce the stress accumulation generated during the integration of different materials and improve packaging reliability while ensuring efficient heat dissipation of the chip. Summary of the invention

[0004] The purpose of the present invention is to provide a microfluidic heat dissipation packaging structure and an integration method, which are used to solve the problem of stress accumulation generated during the integration of different materials in the prior art, which seriously affects the reliability of the packaging.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] In a first aspect, the present invention provides a microfluidic heat dissipation packaging structure, comprising:

[0007] substrate;

[0008] A chip disposed on an end surface of the substrate;

[0009] A manifold structure connected to the chip and a package cover plate connected to the manifold structure; the thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the package cover plate.

[0010] Optionally, the chip is provided with a plurality of microfluidic structures for circulating cooling medium on an end surface away from the substrate, and each of the microfluidic structures is arranged in parallel and side by side.

[0011] Optionally, the manifold structure is provided with a plurality of channels for circulating cooling medium, and each of the channels is connected to each of the microfluidic structures, and each of the channels is arranged side by side at intervals; the manifold structure is used to evenly distribute the cooling medium to the interior of the microfluidic structure, and to collect the cooling medium after completing convective heat exchange.

[0012] Optionally, the manifold structure and the microfluidic structure are integrated by anodic bonding or direct bonding.

[0013] Optionally, the thermal expansion coefficient of the manifold structure is greater than or equal to the thermal expansion coefficient of the chip, and less than the thermal expansion coefficient of the package cover plate;

[0014] The packaging cover plate is provided with a liquid inlet and outlet for communicating with the channel; the packaging cover plate is a composite material.

[0015] Optionally, the microfluidic structure is a comb-tooth structure or a columnar structure, and the microfluidic structure is used to increase the convection heat exchange area.

[0016] Optionally, the total number of layers of the microfluidic heat dissipation packaging structure is greater than or equal to three layers; and the electrical interconnection between the chip and the outside is achieved through the substrate.

[0017] Optionally, the channel in the manifold structure and the microfluidic structure correspond to form a cooling medium flow path; the packaging cover plate is connected to the manifold structure to form a closed microchannel structure.

[0018] In a second aspect, the present invention provides a method for integrating a microfluidic heat dissipation packaging structure. The method comprises:

[0019] providing a substrate;

[0020] Integrating a chip on the substrate;

[0021] Connecting the chip to a manifold structure; wherein the thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the package cover plate;

[0022] The manifold structure is integrated with a packaging cover plate to obtain a microfluidic heat dissipation packaging structure; the integration method of the microfluidic heat dissipation packaging structure is step-by-step bonding.

[0023] Optionally, the chip is provided with a plurality of microfluidic structures for circulating cooling medium on the end surface away from the substrate, and each of the microfluidic structures is arranged in parallel and side by side; the manifold structure is integrated with the microfluidic structure by anodic bonding or direct bonding;

[0024] The cooling medium enters the manifold structure through the packaging cover plate, is evenly distributed to various areas of the chip through the manifold structure, and performs convection heat exchange in the microfluidic structure. After the heat exchange, the cooling medium flows out of the microfluidic heat dissipation packaging structure through the manifold structure and the packaging cover plate.

[0025] Compared with the prior art, the present invention provides a microfluidic heat dissipation packaging structure and an integration method. The microfluidic heat dissipation packaging structure includes a chip with a microfluidic structure, a manifold structure, and a multilayer structure of a packaging cover plate. The manifold structure is prepared by using a material with a thermal expansion coefficient between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the packaging cover plate. The addition of the manifold structure can effectively control the thermal stress generated during the operation of the chip and improve the structural reliability. The integration method releases the mechanical stress and thermal stress generated by the integration of the heat dissipation structure and the heating of the chip through step-by-step bonding, thereby improving the packaging reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0027] Figure 1 A schematic diagram of the microfluidic heat dissipation packaging structure provided by the present invention;

[0028] Figure 2 A schematic diagram of the liquid cooling process of the microfluidic heat dissipation packaging structure provided by the present invention;

[0029] Figure 3 A schematic diagram of the process flow of the microfluidic heat dissipation packaging structure integration method provided by the present invention;

[0030] Figure 4 A schematic diagram of a microfluidic heat dissipation packaging structure provided in Implementation Example 1;

[0031] Figure 5 A schematic diagram of a microfluidic heat dissipation packaging structure provided for implementation mode 2;

[0032] Figure 6 Schematic diagram of the microfluidic heat dissipation packaging structure provided for implementation mode 3.

[0033] Reference numerals:

[0034] 1-substrate, 2-chip, 3-microfluidic structure, 4-manifold structure, 5-channel, 6-packaging cover, 7-liquid inlet and outlet, 8-microfluidic / manifold structure. DETAILED DESCRIPTION

[0035] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, words such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and their order is not limited. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0036] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0037] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.

[0038] In the prior art, the chip embedded heat dissipation technology directly etches the microchannel structure on the chip substrate, introduces the cooling medium into the chip, reduces the package thermal resistance between the chip heating area and the cooling medium, and thus greatly improves the chip heat dissipation efficiency. The manifold structure can evenly distribute the cooling medium to all parts of the chip, improving the temperature uniformity during the heat dissipation process. The manifold structure is prepared using the same semiconductor material as the chip (such as silicon, silicon carbide, gallium nitride) or a material with a thermal expansion coefficient close to that of the chip (such as high borosilicate glass, quartz, silicon carbide), and integrated using a semiconductor bonding process, which can effectively solve the stress problem introduced by the mismatch between the thermal expansion coefficient of the heat dissipation structure and the chip, reduce interface defects, and improve the heat transfer capacity between the chip and the heat dissipation structure. In addition, since the change of the micron and nanometer scale surface structure pattern has a significant effect on convective heat transfer, and the semiconductor micro-nano processing technology is more precise than metal processing, smaller-scale microfluidic structures can be made to improve heat exchange efficiency. However, the brittleness of the chip material will affect its reliability as a heat sink alone. Therefore, using high-strength materials (such as metals, composite materials, and ceramics) to prepare the package cover plate and integrating the package cover plate with the manifold / microfluidic structure through welding can improve the strength of the heat dissipation structure and release structural stress. In addition, metal, ceramic, and composite materials are also easier to connect to the cooling medium circulation structure.

[0039] Based on the above-mentioned packaging requirements, the present invention proposes a microfluidic heat dissipation packaging structure and an integration method. The structure is composed of a multilayer structure of a chip 2 having a microfluidic structure 3, a manifold structure 4 and a packaging cover plate 6, and the mechanical stress generated during the integration of the heat dissipation structure is buffered by step-by-step bonding. A microfluidic structure is etched on the substrate of the chip 2 to introduce the cooling medium into the interior of the chip 2, thereby improving the convective heat transfer efficiency. The thermal expansion coefficient of the manifold structure is greater than or equal to the thermal expansion coefficient of the chip, and is less than the thermal expansion coefficient of the packaging cover plate; the bonding process can reduce the stress accumulation caused by the difference in the thermal expansion coefficient of the materials, and control the thermal stress of the chip 2 during operation. The packaging cover plate 6 is welded to the manifold structure 4 using high-strength materials. The use of heterogeneous materials for welding can improve the structural rigidity, release structural stress, and improve the packaging reliability. Next, the scheme provided in the embodiments of this specification is described in conjunction with the accompanying drawings:

[0040] like Figure 1 As shown, a microfluidic heat dissipation packaging structure proposed by the present invention may include at least the following structures:

[0041] substrate1;

[0042] A chip 2 is arranged on the end surface of the substrate 1;

[0043] A manifold structure 4 connected to the chip 2 and a packaging cover plate 6 connected to the manifold structure 4; the thermal expansion coefficient of the material of the manifold structure 4 can be between the thermal expansion coefficient of the chip 2 and the thermal expansion coefficient of the packaging cover plate 6, specifically, the thermal expansion coefficient of the manifold structure 4 is greater than or equal to the thermal expansion coefficient of the chip 2, and less than the thermal expansion coefficient of the packaging cover plate 6.

[0044] For example, the manifold structure 4 can be made of the same semiconductor material as the chip 2, such as silicon, silicon carbide, or gallium nitride.

[0045] The manifold structure 4 can also be made of a material having a thermal expansion coefficient close to that of the chip 2, such as high borosilicate glass, quartz, and silicon carbide.

[0046] Figure 1 In the microfluidic heat dissipation packaging structure for liquid cooling of flip chip 2, a microfluidic structure 3 is etched inside chip 2 to introduce the cooling medium into chip 2, and a manifold structure 4 for convective heat transfer of the cooling medium is prepared using a material with a thermal expansion coefficient between chip 2 and package cover plate 6, and a package cover plate 6 structure is prepared using high-strength materials such as metal / ceramic / composite materials. Through multi-layer integration, mechanical stress and thermal stress generated by differences in thermal expansion coefficients of materials are released, thereby improving the reliability of heat dissipation structure packaging.

[0047] based on Figure 1 The embodiment of this specification also provides some specific implementation structures of the structure, which are described below.

[0048] The chip 2 is provided with a plurality of microfluidic structures 3 for cooling medium to flow on the end surface away from the substrate 1 , and each of the microfluidic structures 3 is arranged in parallel.

[0049] Specifically, the microfluidic structure 3 is generally a comb-tooth structure or a columnar structure with a scale of 10 μm to 200 μm, which is used to increase the convection heat exchange area to ensure sufficient heat exchange between the chip 2 and the cooling medium. The microfluidic structure 3 is generally prepared using micro-nano processing technology and processed on the back of the chip 2.

[0050] The manifold structure 4 is provided with a plurality of channels 5 for circulating the cooling medium, and each of the channels 5 is connected to each of the microfluidic structures 3, and each of the channels 5 is arranged side by side at intervals; more specifically, the manifold structure 4 is generally a liquid separation / liquid confluence structure with a scale of 50 μm to 500 μm, which is used to evenly distribute the cooling medium to the inside of the microfluidic structure 3, and to collect the cooling medium after completing the convection heat exchange. The manifold structure 4 is generally prepared by micro-nano processing technology.

[0051] Figure 1In the structure, the chip 2 and the substrate 1 are integrated by flip-chip welding, and the electrical interconnection between the chip 2 and the outside is realized through the substrate 1. The packaging cover plate 6 structure is used to improve the strength of the packaging structure and is connected to the external liquid inlet and outlet 7. More specifically, the functional area of ​​the chip 2 is electrically connected to the substrate 1 through flip-chip welding and other patch technologies, and the embedded microfluidic structure 3 is etched on the back of the functional area of ​​the chip 2 (chip 2 substrate), and the liquid separation / confluence channel 5 in the manifold structure 4 corresponds to the microfluidic structure 3 to form a cooling medium flow path. The packaging cover plate 6 is connected to the manifold structure 4 to form a closed microfluidic channel structure. The liquid inlet and outlet 7 are connected to the packaging cover plate 6 for connecting to the external liquid supply network of the packaging structure. The packaging cover plate 6 is made of high-strength materials (such as metals, composite materials, and ceramics).

[0052] Figure 1 The structure in the liquid cooling process is as follows Figure 2 As shown: the cooling medium enters the manifold structure 4 through the liquid inlet and outlet 7 from the packaging cover plate 6, and fully exchanges heat with the heat generated by the chip 2 in the microfluidic structure 3 through the liquid distribution, and then is discharged from the microfluidic heat dissipation packaging structure through the packaging cover plate 6 and the liquid inlet and outlet 7, completing the liquid cooling cycle.

[0053] In the above-mentioned structure, the microfluidic heat dissipation packaging structure is composed of a chip 2 with a microfluidic structure 3, a manifold structure 4 and a packaging cover plate 6 multilayer structure, and the total number of layers is greater than or equal to three layers. The cooling medium enters the manifold structure 4 through the packaging cover plate 6, and the cooling medium is evenly distributed to various areas of the chip 2 through the manifold, and convective heat exchange is performed in the microfluidic structure 3 in the chip 2. After the heat exchange, the cooling medium flows out of the heat dissipation packaging structure through the manifold and the packaging cover plate 6. The multilayer structure of the chip 2, the manifold structure 4 and the packaging cover plate 6 fully considers the release of mechanical stress and thermal stress during the integration process to improve the packaging reliability.

[0054] Based on the same idea, Figure 3 As shown, an embodiment of the present invention further provides a microfluidic heat dissipation packaging structure integration method, which may include at least the following steps:

[0055] Step 301: Provide a substrate;

[0056] Step 302: Integrating a chip on the substrate;

[0057] Step 303: connecting the chip to a manifold structure; the thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the package cover plate;

[0058] Step 304: Integrate the manifold structure with the packaging cover to obtain a microfluidic heat dissipation packaging structure; the integration method of the microfluidic heat dissipation packaging structure is step-by-step bonding.

[0059] Figure 3The structures and related materials involved in the method are Figure 1 The microfluidic heat dissipation packaging structure is the same as that in the embodiment, and will not be repeated here.

[0060] based on Figure 3 The method in this specification also provides a specific implementation of the method:

[0061] The chip 2 is provided with a plurality of microfluidic structures 3 for circulating cooling medium on the end surface away from the substrate 1, and each of the microfluidic structures 3 is arranged in parallel and side by side; the manifold structure 4 is integrated with the microfluidic structure 3 by an anodic bonding method or a direct bonding method;

[0062] The cooling medium enters the manifold structure 4 through the packaging cover plate 6, and is evenly distributed to various areas of the chip 2 through the manifold structure 4, and performs convection heat exchange in the microfluidic structure 3. After the heat exchange, the cooling medium flows out of the microfluidic heat dissipation packaging structure through the manifold structure 4 and the packaging cover plate 6.

[0063] Furthermore, during the integration method, the thermal expansion coefficient of the material of the manifold structure 4 can be between the thermal expansion coefficient of the chip 2 and the thermal expansion coefficient of the package cover plate 6. Specifically, the thermal expansion coefficient of the manifold structure 4 is greater than or equal to the thermal expansion coefficient of the chip 2 and less than the thermal expansion coefficient of the package cover plate 6. For example, the manifold structure 4 can be made of the same semiconductor material as the chip 2 (such as silicon, silicon carbide, gallium nitride) or a material with a thermal expansion coefficient close to that of the chip 2 (such as high borosilicate glass, quartz, silicon carbide), and the structure is processed by micro-nano processing technology and integrated with the microfluidic structure 3 in the chip 2 by bonding technology.

[0064] In the above setting, the thermal expansion coefficient of the material of the manifold structure 4 is between the thermal expansion coefficient of the chip 2 and the thermal expansion coefficient of the packaging cover plate 6, which can effectively reduce the structural stress and thermal stress generated during the structural integration process and the operation of the chip 2, increase the integration strength and reduce interface defects such as holes and gaps, thereby improving the heat transfer capacity between the chip 2 and the manifold structure 4 and improving the reliability of the packaging structure.

[0065] As an optional embodiment, the package cover plate 6 can be made of high-strength materials (such as metals, composite materials, ceramics), and the structure can be processed by machining technology and integrated with the manifold structure 4 by welding technology. High-strength materials can overcome problems such as easy breakage of semiconductor materials. Since the manifold and the package cover plate 6 have a larger welding area, the use of welding technology can further release stress accumulation. This integration method releases the mechanical stress and thermal stress generated by the integration of the heat dissipation structure and the heat generation of the chip 2 through step-by-step bonding, thereby improving the reliability of the package.

[0066] Next, in order to further illustrate the specific implementation structure and integration method of the present invention, the solution provided by the present invention is further described by taking three specific implementation modes as examples:

[0067] Implementation Method 1

[0068] like Figure 4 As shown, the chip 2 is integrated with the substrate 1 by flip-chip bonding.

[0069] The microfluidic structure 3 is parallel comb teeth etched on the back side of the chip 2 .

[0070] The manifold structure 4 is made of a material (silicon carbide) having a thermal expansion coefficient similar to that of the chip 2 and is directly bonded to the chip 2 by means of gold-gold or the like.

[0071] The packaging cover plate 6 is made of ceramic material (such as high temperature co-fired ceramic, low temperature co-fired ceramic, etc.), and is welded to the manifold structure 4 by solder, and the liquid inlet and outlet 7 is welded to the packaging cover plate 6 by solder.

[0072] The multi-layer step-by-step bonding / welding method is adopted to release the structural stress between the chip 2 and the package cover plate 6 and the working thermal stress of the chip 2, thereby improving the structural reliability.

[0073] Implementation Method 2

[0074] like Figure 5 As shown, the chip 2 is integrated with the substrate 1 by flip-chip bonding.

[0075] The microfluidic structure 3 is a parallel comb structure made of the same material as the chip 2 and is directly bonded to the chip 2 by gold-gold, silicon-silicon or the like.

[0076] The manifold structure 4 is processed (high borosilicate glass) using a material (silicon carbide) whose thermal expansion coefficient is between that of the chip 2 and that of the package cover plate 6 , and is integrated with the microfluidic structure 3 by anodic bonding.

[0077] The packaging cover plate 6 is made of metal (such as aluminum, copper, etc.) and is welded to the manifold structure 4 by solder, and the liquid inlet and outlet 7 is welded to the packaging cover plate 6 by solder.

[0078] The multi-layer step-by-step bonding / welding method is adopted to release the structural stress between the chip 2 and the package cover plate 6 and the working thermal stress of the chip 2, thereby improving the structural reliability.

[0079] Implementation Method 3

[0080] like Figure 6 As shown, the microfluidic / manifold structure 8 mainly includes a microfluidic structure 3 and a manifold structure 4. The chip 2 is integrated with the substrate 1 by flip-chip bonding.

[0081] The microfluidic structure 3 and the manifold structure 4 can be processed with the same material as the chip 2. The manifold structure 4 is processed on the back of the microfluidic structure 3 and is directly bonded to the chip 2 by gold-gold, silicon-silicon or the like.

[0082] The packaging cover plate 6 is made of composite material (such as aluminum-based silicon carbide, etc.), and is welded to the manifold structure 4 by solder, and the liquid inlet and outlet 7 is welded to the packaging cover plate 6 by solder.

[0083] The multi-layer step-by-step bonding / welding method is adopted to release the structural stress between the chip 2 and the package cover plate 6 and the working thermal stress of the chip 2, thereby improving the structural reliability.

[0084] The technical solution provided by the present invention may at least include the following technical effects:

[0085] 1) The multi-layer step-by-step integration method is used to effectively release the mechanical stress generated during the integration of the heat dissipation structure and improve the structural reliability.

[0086] 2) The manifold structure 4 is made of a material with a thermal expansion coefficient between the chip 2 and the package cover plate 6. The addition of the manifold structure can effectively control the thermal stress generated during the operation of the chip 2 and improve the structural reliability. The package cover plate 6 is made of high-strength material and welded to the manifold structure 4, which can enhance the mechanical strength of the structure and facilitate integration with external structures.

[0087] 3) The microfluidic structure 3 and the manifold structure 4 in the chip 2 are integrated by direct bonding or anodic bonding, which can effectively control defects. The heat generated by the chip 2 can be better transferred to the manifold / microfluidic structure 3 and efficiently exchange heat with the cooling medium.

[0088] 4) Processing the microfluidic structure 3 inside the chip 2, introducing the cooling medium into the chip 2, and integrating it with the manifold structure 4 and the packaging cover plate 6 can effectively reduce the packaging thermal resistance, improve the heat exchange capacity of the cooling medium, and achieve efficient thermal management of the chip 2.

[0089] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0090] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. A microfluidic heat dissipation packaging structure, characterized in that: include: substrate; A chip disposed on an end surface of the substrate; A manifold structure connected to the chip and a packaging cover plate connected to the manifold structure; The thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the package cover.

2. The microfluidic heat dissipation packaging structure according to claim 1, characterized in that: The chip is provided with a plurality of microfluidic structures for cooling medium to flow on the end surface away from the substrate, and each of the microfluidic structures is arranged in parallel.

3. The microfluidic heat dissipation packaging structure according to claim 2, characterized in that: The manifold structure is provided with a plurality of channels for circulating the cooling medium, and each of the channels is connected to each of the microfluidic structures, and each of the channels is arranged side by side at intervals; the manifold structure is used to evenly distribute the cooling medium to the inside of the microfluidic structure, and to collect the cooling medium after completing the convective heat exchange.

4. The microfluidic heat dissipation packaging structure according to claim 2, characterized in that: The manifold structure and the microfluidic structure are integrated by anodic bonding or direct bonding.

5. The microfluidic heat dissipation packaging structure according to claim 3, characterized in that: The thermal expansion coefficient of the manifold structure is greater than or equal to the thermal expansion coefficient of the chip and less than the thermal expansion coefficient of the package cover plate; The packaging cover plate is provided with a liquid inlet and outlet for communicating with the channel; the packaging cover plate is a composite material.

6. The microfluidic heat dissipation packaging structure according to claim 2, characterized in that: The microfluidic structure is a comb-tooth structure or a columnar structure, and the microfluidic structure is used to increase the convection heat exchange area.

7. The microfluidic heat dissipation packaging structure according to claim 1, characterized in that: The total number of layers of the microfluidic heat dissipation packaging structure is greater than or equal to three layers; the electrical interconnection between the chip and the outside is achieved through the substrate.

8. The microfluidic heat dissipation packaging structure according to claim 3, characterized in that: The channels in the manifold structure and the microfluidic structure correspond to form a cooling medium flow path; the packaging cover plate is connected to the manifold structure to form a closed microchannel structure.

9. A microfluidic heat dissipation packaging structure integration method, characterized in that: The microfluidic heat dissipation packaging structure is the microfluidic heat dissipation packaging structure according to any one of claims 1 to 8, and the method comprises: providing a substrate; Integrating a chip on the substrate; Connecting the chip to a manifold structure; wherein the thermal expansion coefficient of the manifold structure is between the thermal expansion coefficient of the chip and the thermal expansion coefficient of the package cover plate; The manifold structure is integrated with a packaging cover plate to obtain a microfluidic heat dissipation packaging structure; the integration method of the microfluidic heat dissipation packaging structure is step-by-step bonding.

10. The microfluidic heat dissipation packaging structure integration method according to claim 9, characterized in that: The chip is provided with a plurality of microfluidic structures for circulating cooling medium on the end surface away from the substrate, and each of the microfluidic structures is arranged in parallel and side by side; the manifold structure is integrated with the microfluidic structure by anodic bonding or direct bonding; The cooling medium enters the manifold structure through the packaging cover plate, is evenly distributed to various areas of the chip through the manifold structure, and performs convection heat exchange in the microfluidic structure. After the heat exchange, the cooling medium flows out of the microfluidic heat dissipation packaging structure through the manifold structure and the packaging cover plate.

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