Frame synchronization detection method, equipment, device and readable storage medium

Abstract

The invention discloses a frame synchronization detection method, equipment, a device and a readable storage medium, and belongs to the technical field of asynchronous communication of embedded field equipment.The frame synchronization detection method comprises the steps that firstly, a synchronization sequence is generated; 2, detecting the number of high levels of the synchronization sequence; 3, when a continuous high level appears, exiting synchronous sequence receiving, and returning to the step 2 to continue to detect the high level signal; otherwise, receiving a synchronization sequence field according to the set synchronization sequence length; and 4, performing fuzzy matching. According to the invention, the false alarm rate and the missed alarm rate of frame synchronization detection can be effectively reduced in a scene with high error rate and sudden interference.

Description

Technical Field

[0001] The present invention belongs to the technical field of asynchronous communication of embedded equipment, and in particular relates to a frame synchronization detection method, equipment, device and readable storage medium. Background Art

[0002] At present, frame synchronization plays a vital role in digital time-division multiplexing communication systems. Its main purpose is to provide a start mark for each frame at the transmitting end, and to detect and obtain this mark at the receiving end, so as to correctly separate the time slot signals of each channel. Through frame synchronization, it can ensure that the starting position of each data frame is accurately identified, so that different data frames can be correctly distinguished and separated, thereby ensuring the integrity and accuracy of the data. However, with the widespread application of various wireless communication technologies, the complexity of communication between terminal devices and the probability of data being interfered by sudden interference have increased dramatically, and the data frame synchronization detection technology used is difficult to ensure the accuracy of detection when there is a lot of signal interference, which in turn affects the data communication performance.

[0003] The closest technology: some terminal devices do not perform frame synchronization during communication, and the sender directly sends the data content; or a conventional frame synchronization detection method is used, that is, a synchronization detection sequence code is used to detect the synchronization signal.

[0004] Solution 1: When devices communicate, frame synchronization is not performed. The sender directly sends the data content, and the receiver does not synchronize but directly reads and uses the data content.

[0005] Solution 2: When devices communicate, they use a synchronization sequence as the frame synchronization standard, such as "0xAA55". Continuous detection is performed at the beginning (high level when there is no data). When the character "0xAA55" (i.e. 0b10101010, 0b01010101) is detected, the frame synchronization is considered to be completed.

[0006] Disadvantages of Solution 1: This method cannot correctly identify the beginning and end of the information, resulting in incomplete data reception and inability to correctly parse the information, thus affecting the accuracy and reliability of communication.

[0007] Disadvantages of Solution 2: This method may cause false alarms when the communication data contains "0xAA55", and is prone to false alarms in scenarios with high bit error rates, and missed alarms in scenarios with strong interference signals. Summary of the invention

[0008] The purpose of the present invention is to overcome the deficiencies of the prior art and to provide a frame synchronization detection method, device, apparatus and readable storage medium, which solve the problems in the above-mentioned background technology.

[0009] The object of the present invention is achieved in that: A frame synchronization detection method comprises the following steps: Generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; Detecting the number of high levels of the synchronization sequence, and updating the sampled data into the synchronization cache sequence A according to the number of high levels; If a continuous high level occurs, exit the synchronization sequence reception and continue to detect the high level signal; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; When the synchronization sequence field is received, check whether the number of high-level intervals before the synchronization sequence is received is greater than the set value, and check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met, the synchronization is considered successful.

[0010] The generating of the synchronization sequence specifically includes: powering on the system, initializing the device, and generating a standard synchronization sequence according to the set number of interval high levels and the synchronization code.

[0011] The detecting the number of high levels of the synchronization sequence specifically includes: continuously sampling, detecting the number of high levels of the interval before the synchronization sequence is sent, and updating the sampled data into the synchronization cache sequence A according to the set number of high levels.

[0012] When a low level is detected, the synchronization sequence reception starts and the level signal changes are continued to be monitored. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed to the synchronization cache sequence B.

[0013] The synchronization cache sequence C is fuzzy matched with the standard sequence. If the similarity is greater than a set value, the synchronization is successful, otherwise it is an asynchronous signal.

[0014] A device for a frame synchronization detection method, the device is used to implement the above method, the device comprises: Meter module, the meter module is used for collecting voltage and current data; Electricity meter module and Bluetooth module; the electricity meter module is used to collect user electricity consumption, and the Bluetooth module is used to communicate with other handheld terminal devices.

[0015] A frame synchronization detection device, comprising: A synchronization sequence generation module, used to generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; A detection module, used to detect the number of high levels of the synchronization sequence, and update the sampled data into the synchronization cache sequence A according to the number of high levels; Detection module 2 is used to exit the synchronization sequence reception and continue to detect the high-level signal when a continuous high level occurs; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; The judgment module is used to check whether the number of high-level intervals before the synchronization sequence is received is greater than a set value when the synchronization sequence field is received, and to check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met at the same time, the synchronization is considered successful.

[0016] The standard synchronization sequence module is used to power on the system, initialize the device, and generate a standard synchronization sequence according to the set number of interval high levels and synchronization codes; A module is used for continuous sampling, detecting the number of high levels in the interval before the synchronization sequence is sent, and updating the sampled data to the synchronization cache sequence A according to the set number of high levels; The low level judgment module is used to start the synchronization sequence reception when a low level is detected, and continue to monitor the level signal change. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed into the synchronization cache sequence B; The synchronization cache module is used to synchronize the cache sequence C with the standard sequence for fuzzy matching. If the similarity is greater than the set value, the synchronization is successful, otherwise it is an asynchronous signal.

[0017] A computer-readable storage medium stores a computer program, wherein the program implements the steps of the above method when executed by a processor.

[0018] Beneficial effects of the present invention: The present invention can effectively reduce the false alarm rate and missed alarm rate of frame synchronization detection in scenarios with high bit error rate and burst interference. By combining the high level of L code elements and the synchronization sequence as the detection method of the frame synchronization mark, the frame synchronization combining "time interval" and "byte filling" is combined, and the method of fuzzy matching of the standard sequence is added under the condition of high bit error rate to reduce the missed alarm rate, which greatly reduces the false alarm rate and missed alarm rate of asynchronous serial communication, thereby improving the stability and performance of asynchronous serial communication between terminal devices. Solve the problem of high false alarm rate and missed alarm rate of frame synchronization detection in serial communication under the condition of external interference, high frequency and high bit error rate.

[0019] 1: Conventional methods do not support fuzzy matching detection. When the bit error rate is high, the signal does not match the synchronization sequence due to bit errors, resulting in missed alarms. In this case, this method performs fuzzy matching and can still detect the synchronization signal, reducing the missed alarm rate.

[0020] 2: Before the synchronization sequence appears, the number of high-level intervals is detected. Synchronization is considered only when the number of high-level intervals is greater than the set value and the synchronization character is the same as the standard character. This can effectively reduce false alarms caused by noise or sudden interference and data containing synchronization characters.

[0021] 3: After detecting a low level, continue to detect signal changes. If a high level appears continuously, exit the synchronization sequence reception and continue high level detection until the next low level appears. This can avoid false synchronization triggered by bit errors when there is no synchronization signal and affect the subsequent normal synchronization signal reception.

[0022] 4: By dynamically setting the number of interval high levels, it can adapt to different noise or sudden interference environments and improve detection performance. By dynamically setting the similarity of fuzzy matching, it can adapt to missed alarms caused by different bit error rates of devices and improve detection accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a flow chart of the frame synchronization detection method based on fuzzy matching of the present invention; Figure 2 It is a structural block diagram of the frame synchronization detection method based on fuzzy matching of the present invention; Figure 3 It is a standard sequence waveform reference diagram of the frame synchronization detection method based on fuzzy matching of the present invention. DETAILED DESCRIPTION

[0024] The present invention is further described in detail below in conjunction with the accompanying drawings. It should be pointed out that it is only for the purpose of more clearly describing and explaining the present invention. Example 1

[0025] like Figure 1-3 As shown, this embodiment discloses: A frame synchronization detection method comprises the following steps: Generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; Detecting the number of high levels of the synchronization sequence, and updating the sampled data into the synchronization cache sequence A according to the number of high levels; If a continuous high level occurs, exit the synchronization sequence reception and continue to detect the high level signal; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; When the synchronization sequence field is received, check whether the number of high-level intervals before the synchronization sequence is received is greater than the set value, and check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met, the synchronization is considered successful.

[0026] The generating of the synchronization sequence specifically includes: powering on the system, initializing the device, and generating a standard synchronization sequence according to the set number of interval high levels and the synchronization code.

[0027] The detecting the number of high levels of the synchronization sequence specifically includes: continuously sampling, detecting the number of high levels of the interval before the synchronization sequence is sent, and updating the sampled data into the synchronization cache sequence A according to the set number of high levels.

[0028] When a low level is detected, the synchronization sequence reception starts and the level signal changes are continued to be monitored. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed to the synchronization cache sequence B.

[0029] The synchronization cache sequence C is fuzzy matched with the standard sequence. If the similarity is greater than a set value, the synchronization is successful, otherwise it is an asynchronous signal.

[0030] A frame synchronization detection device, comprising: A synchronization sequence generation module, used to generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; A detection module, used to detect the number of high levels of the synchronization sequence, and update the sampled data into the synchronization cache sequence A according to the number of high levels; Detection module 2 is used to exit the synchronization sequence reception and continue to detect the high-level signal when a continuous high level occurs; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; The judgment module is used to check whether the number of high-level intervals before the synchronization sequence is received is greater than a set value when the synchronization sequence field is received, and to check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met at the same time, the synchronization is considered successful.

[0031] The standard synchronization sequence module is used to power on the system, initialize the device, and generate a standard synchronization sequence according to the set number of interval high levels and synchronization codes; A module is used for continuous sampling, detecting the number of high levels in the interval before the synchronization sequence is sent, and updating the sampled data to the synchronization cache sequence A according to the set number of high levels; The low level judgment module is used to start the synchronization sequence reception when a low level is detected, and continue to monitor the level signal change. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed into the synchronization cache sequence B; The synchronization cache module is used to synchronize the cache sequence C with the standard sequence for fuzzy matching. If the similarity is greater than the set value, the synchronization is successful, otherwise it is an asynchronous signal. Example 2

[0032] like Figure 1-3 As shown, this embodiment discloses a frame synchronization detection method, comprising the following steps: Generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; Detecting the number of high levels of the synchronization sequence, and updating the sampled data into the synchronization cache sequence A according to the number of high levels; If a continuous high level occurs, exit the synchronization sequence reception and continue to detect the high level signal; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; When the synchronization sequence field is received, check whether the number of high-level intervals before the synchronization sequence is received is greater than the set value, and check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met, the synchronization is considered successful.

[0033] The generating of the synchronization sequence specifically includes: powering on the system, initializing the device, and generating a standard synchronization sequence according to the set number of interval high levels and the synchronization code.

[0034] The detecting the number of high levels of the synchronization sequence specifically includes: continuously sampling, detecting the number of high levels of the interval before the synchronization sequence is sent, and updating the sampled data into the synchronization cache sequence A according to the set number of high levels.

[0035] When a low level is detected, the synchronization sequence reception starts and the level signal changes are continued to be monitored. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed to the synchronization cache sequence B.

[0036] The synchronization cache sequence C is fuzzy matched with the standard sequence. If the similarity is greater than a set value, the synchronization is successful, otherwise it is an asynchronous signal.

[0037] A frame synchronization detection device, comprising: A synchronization sequence generation module, used to generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; A detection module, used to detect the number of high levels of the synchronization sequence, and update the sampled data into the synchronization cache sequence A according to the number of high levels; Detection module 2 is used to exit the synchronization sequence reception and continue to detect the high-level signal when a continuous high level occurs; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; The judgment module is used to check whether the number of high-level intervals before the synchronization sequence is received is greater than a set value when the synchronization sequence field is received, and to check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met at the same time, the synchronization is considered successful.

[0038] The standard synchronization sequence module is used to power on the system, initialize the device, and generate a standard synchronization sequence according to the set number of interval high levels and synchronization codes; A module is used for continuous sampling, detecting the number of high levels in the interval before the synchronization sequence is sent, and updating the sampled data to the synchronization cache sequence A according to the set number of high levels; The low level judgment module is used to start the synchronization sequence reception when a low level is detected, and continue to monitor the level signal change. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed into the synchronization cache sequence B; The synchronization cache module is used to synchronize the cache sequence C with the standard sequence for fuzzy matching. If the similarity is greater than the set value, the synchronization is successful, otherwise it is an asynchronous signal.

[0039] A device for a frame synchronization detection method, the device is used to implement the above method, the device comprises: Meter module, the meter module is used for collecting voltage and current data; Electricity meter module and Bluetooth module; the electricity meter module is used to collect user electricity consumption, and the Bluetooth module is used to communicate with other handheld terminal devices.

[0040] A computer-readable storage medium stores a computer program, wherein the program implements the steps of the above method when executed by a processor.

[0041] The present invention can be used for frame synchronization detection of data transmission of terminal equipment and functional modules described in the example, and can also be used for frame synchronization detection of data communication between other types of terminals and functional modules. The standard sequence in the method can automatically change according to different high level and synchronization sequence setting values.

[0042] For those skilled in the art, equivalent substitutions or changes can be made according to the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the claims attached to the present invention.

Claims

1. A frame synchronization detection method, characterized in that: The following steps are involved: Generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; Detecting the number of high levels of the synchronization sequence, and updating the sampled data into the synchronization cache sequence A according to the number of high levels; If a continuous high level occurs, exit the synchronization sequence reception and continue to detect the high level signal; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; When the synchronization sequence field is received, check whether the number of high-level intervals before the synchronization sequence is received is greater than the set value, and check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met, the synchronization is considered successful.

2. The frame synchronization detection method according to claim 1, characterized in that: The generating of the synchronization sequence specifically includes: powering on the system, initializing the device, and generating a standard synchronization sequence according to the set number of interval high levels and the synchronization code.

3. The frame synchronization detection method according to claim 1, characterized in that: The detecting the number of high levels of the synchronization sequence specifically includes: continuously sampling, detecting the number of high levels of the interval before the synchronization sequence is sent, and updating the sampled data into the synchronization cache sequence A according to the set number of high levels.

4. The frame synchronization detection method according to claim 1, characterized in that: When a low level is detected, the synchronization sequence reception starts and the level signal changes are continued to be monitored. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed to the synchronization cache sequence B.

5. The frame synchronization detection method according to claim 1, characterized in that: The synchronization cache sequence C is fuzzy matched with the standard sequence. If the similarity is greater than a set value, the synchronization is successful, otherwise it is an asynchronous signal.

6. A device for a frame synchronization detection method, characterized in that: The device is used to complete the method according to any one of claims 1 to 5, and the device comprises: Meter module, the meter module is used for collecting voltage and current data; Energy meter module and Bluetooth module; the energy meter module is used to collect user power consumption, and the Bluetooth module is used to communicate with other handheld terminal devices. A calculation module is used to generate a synchronization sequence, which includes a synchronization cache sequence A and a synchronization cache sequence B; detect the number of high levels in the synchronization sequence, and update the sampling data to the synchronization cache sequence A according to the number of high levels; if continuous high levels appear, exit the synchronization sequence reception and continue to detect high-level signals; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field to the synchronization cache sequence B; when the synchronization sequence field reception is completed, check whether the number of high levels in the interval before the synchronization sequence is received is greater than the set value, and check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met at the same time, it is considered that the synchronization is successful.

7. A frame synchronization detection device, characterized in that: include: A synchronization sequence generation module, used to generate a synchronization sequence, wherein the synchronization sequence includes a synchronization cache sequence A and a synchronization cache sequence B; A detection module, used to detect the number of high levels of the synchronization sequence, and update the sampled data into the synchronization cache sequence A according to the number of high levels; Detection module 2 is used to exit the synchronization sequence reception and continue to detect the high-level signal when a continuous high level occurs; otherwise, receive the synchronization sequence field according to the set synchronization sequence length, and refresh the received synchronization sequence field into the synchronization cache sequence B; The judgment module is used to check whether the number of high-level intervals before the synchronization sequence is received is greater than a set value when the synchronization sequence field is received, and to check whether the cache sequence is the same as the standard synchronization sequence. If both conditions are met at the same time, the synchronization is considered successful.

8. The frame synchronization detection device according to claim 7, characterized in that: include: The standard synchronization sequence module is used to power on the system, initialize the device, and generate a standard synchronization sequence according to the set number of interval high levels and synchronization codes; A module is used for continuous sampling, detecting the number of high levels in the interval before the synchronization sequence is sent, and updating the sampled data to the synchronization cache sequence A according to the set number of high levels; The low level judgment module is used to start the synchronization sequence reception when a low level is detected, and continue to monitor the level signal change. If a continuous high level appears, the synchronization sequence reception is exited and the high level signal is continued to be detected. Otherwise, the synchronization sequence field is received according to the set standard synchronization sequence length, and the received synchronization sequence field is refreshed into the synchronization cache sequence B; The synchronization cache module is used to synchronize the cache sequence C with the standard sequence for fuzzy matching. If the similarity is greater than the set value, the synchronization is successful, otherwise it is an asynchronous signal.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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