Preparation method of organic single-crystal electronic device and electronic device

Abstract

The invention discloses a preparation method of an organic single-crystal electronic device and an electronic device, and relates to the field of semiconductors, and the preparation method of the organic single-crystal electronic device comprises the steps: coating the surfaces of a source electrode line and a drain electrode line with a hydrophobic material, and forming a hydrophobic layer array with gaps; and filling a semiconductor material in a gap of the hydrophobic layer array, wherein the semiconductor material is in contact with the source line and the drain line respectively. According to the invention, the performance bottleneck of all-printed thin film transistors (TFTs) is broken through, and by preparing the organic single crystal thin film (OSCFs) with extremely low intrinsic defect rate, the device performance close to the theoretical limit is realized, including the subthreshold swing of 59.4 mV / dec, the mobility of 13.8 cm < 2 > / V / s and low working voltage. These properties are significantly superior to existing printed transistors based on organic semiconductors, two-dimensional materials and carbon nanotubes. In addition, more than 2500 TFTs are integrated on a 36 cm < 2 > substrate through a full printing process, the device yield reaches 99.92%, and the expandability and flexibility of the process are shown.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductors, and in particular to a method for preparing an organic single crystal electronic device and the electronic device. Background Art

[0002] In recent years, printing technology has rapidly become an important manufacturing method in the fields of flexible electronics, wearable devices, smart sensors and large-area displays due to its significant advantages such as low cost, high efficiency, large-scale production and environmental friendliness. Functional materials can be directly patterned and deposited on flexible substrates through methods such as inkjet printing, blade coating, and gravure printing, without the need for complex mask steps and expensive equipment investment in traditional photolithography processes, thereby significantly reducing manufacturing costs and improving production efficiency. In addition, printing technology supports low-temperature processing on a variety of flexible substrates such as plastics, polyimides, and even paper, meeting the requirements for device flexibility, lightweight and environmental adaptability, while showing good scalability and industrialization potential.

[0003] However, as the complexity of printed circuits increases, this technology faces significant challenges in preparing high-performance devices on large-area substrates. The heterogeneity of the substrate interface caused by complex circuit design often leads to random nucleation and disordered crystallization of organic small molecule solutions during the printing process, which significantly reduces the crystal quality and charge transfer efficiency of the film. As a result, fully printed organic thin film field effect transistors (OTFTs) usually exhibit lower charge mobility (μ), smaller intrinsic gain (A) and lower charge transfer efficiency. i ) and high power consumption, these performance bottlenecks seriously restrict its application potential in the next generation of high-performance, large-area printed electronic devices. Overcoming the above technical obstacles and optimizing materials, processes and device design have become the key to promoting the development of printed electronics technology. Summary of the invention

[0004] In view of the above problems existing in the prior art, the present invention is proposed.

[0005] Therefore, the problem to be solved by the present invention is how to overcome the random nucleation and disordered crystallization problems caused by heterogeneous interface inhomogeneity during the preparation process of fully printed organic thin film field effect transistors, thereby improving device performance.

[0006] To solve the above technical problems, in the first aspect, the present invention provides the following technical solutions: a method for preparing an organic single crystal electronic device, comprising coating a hydrophobic material on the surface of a source line and a drain line to form a hydrophobic layer array with gaps; filling the gaps in the hydrophobic layer array with a semiconductor material, wherein the semiconductor material is in contact with the source line and the drain line, respectively.

[0007] As a preferred solution of the method for preparing the organic single crystal electronic device of the present invention, the hydrophobic material is a fluorinated polymer, which is coated on the source line and the drain line by a blade coating process.

[0008] As a preferred solution of the method for preparing the organic single crystal electronic device of the present invention, the semiconductor material is dioctylbenzothiophene and dioctylbenzothiophene is coated in the gaps of the hydrophobic layer array by a blade coating process.

[0009] In a second aspect, the present invention further provides an electronic device, which includes a source line and a drain line; a hydrophobic layer array as described above coated on the surface of the source line and the drain line; and an organic single crystal thin film layer filled in the gaps of the hydrophobic layer array.

[0010] As a preferred solution of the electronic device of the present invention, the source line and the drain line are stacked on the surface of the first insulating layer, and the first insulating layer covers the gate layer.

[0011] As a preferred solution of the electronic device of the present invention, wherein: the gate layer and the first insulating layer are stacked on the surface of the substrate, and the substrate is a flexible substrate.

[0012] As a preferred solution of the electronic device of the present invention, a second insulating layer is further provided between the overlapping region of the source line and the drain line.

[0013] As a preferred solution of the electronic device of the present invention, the material of the first insulating layer is polyvinyl pyrrolidone and cyanopolyvinyl chloride stacked in sequence, and the material of the second insulating layer is polyvinyl pyrrolidone.

[0014] As a preferred solution of the electronic device of the present invention, the material of the organic single crystal thin film layer is dioctylbenzothiophene and dioctylbenzothiophene.

[0015] As a preferred solution of the electronic device of the present invention, the substrate is a parylene flexible substrate.

[0016] The beneficial effects of the present invention are as follows: the present invention breaks through the performance bottleneck of fully printed thin film transistors (TFTs), and achieves device performance close to the theoretical limit by preparing organic single crystal thin films (OSCFs) with extremely low intrinsic defect rate, including a subthreshold swing of 59.4mV / dec, a 13.8cm 2 / V / s mobility and low operating voltage. These properties are significantly better than existing printed transistors based on organic semiconductors, two-dimensional materials and carbon nanotubes. In addition, the research used a fully printed process to achieve a 36cm 2More than 2,500 TFTs were integrated on the substrate, with a device yield of 99.92%, demonstrating the scalability and flexibility of the process. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 It is a schematic diagram of the fluid mechanics simulation results and the corresponding scraping results simulation when there is no hydrophobic array confined channel.

[0019] Figure 2 It is a schematic diagram of the fluid mechanics simulation results and the corresponding scraping results simulation when there is a hydrophobic array confined channel.

[0020] Figure 3 This is the polarization image of the C8-BTBT organic small molecule grown in the Cytop channel confinement.

[0021] Figure 4 This is the XRD Mapping characterization result diagram.

[0022] Figure 5 Optical microscope image of a parallel grid array with a pitch of approximately 1000 μm.

[0023] Figure 6 Optical microscope images of PVP and PVCn first insulation layers deposited by doctor blade coating.

[0024] Figure 7 Optical microscope image of the source lines and part of the drain obtained by inkjet printing.

[0025] Figure 8 Optical microscope image of a direct-write printed Cytop line.

[0026] Fig. 9 : is the transfer curve of a typical organic thin film transistor (OTFT) in the transistor array at VDS = -3V, wherein the inset shows the relationship between SS and -IDS at VDS = -3V.

[0027] Fig.10 Comparison of the fully printed OTFT with existing fully printed TFTs based on inorganic and organic semiconductor channels in terms of μ and SS values.

[0028] Fig.11Radar chart comparing the overall performance of fully printed matrix OTFT array, fully printed matrix inorganic TFT array and non-printed matrix OTFT array.

[0029] Fig.12 Overlay transfer curves of 2500 organic thin-film transistors (OTFTs).

[0030] Fig.13 Mobility (μ), subthreshold swing (SS), and threshold voltage (V) of 2500 transistors measured in a 50×50 array T ) distribution heat map.

[0031] Fig.14 Mobility (μ), subthreshold swing (SS), and threshold voltage (V) of 2500 transistors measured in a 50×50 array T )’s histogram.

[0032] Fig.15 This is a cross-sectional view of the structure of an organic single crystal electronic device.

[0033] Fig.16 Schematic diagram of the structure of organic single crystal electronic devices. DETAILED DESCRIPTION

[0034] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0035] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0036] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor is it an embodiment that is mutually exclusive with other embodiments, either individually or selectively.

[0037] Reference Figure 1 , is an embodiment of the present invention, which provides an electronic device, wherein a hydrophobic layer array 3 with gaps is coated on a source line 1 and a drain line 2 of the electronic device.

[0038] Specifically, the hydrophobic layer array 3 is a plurality of mutually parallel strip arrays, and mutually parallel channels are formed between the hydrophobic materials. The semiconductor material is coated in these channels for confined growth. Under the confined effect of the hydrophobic array 3, the organic small molecule semiconductor material can grow in a single orientation in the channel, and finally form an organic single crystal thin film layer 4 (OSCF), which is in contact with the source line 1 and the drain line 2 respectively. In this way, the problem of random nucleation and disordered crystallization of organic small molecule solutions in printing technology can be solved.

[0039] Preferably, the material of the hydrophobic layer array 3 is Cytop (fluorinated polymer), and the semiconductor material and the organic small molecule are C8-BTBT (dioctylbenzothiophene-benzothiophene).

[0040] In order to verify this effect, a fluid dynamics simulation was performed, referring to Figure 1 The figure is a schematic diagram of the fluid mechanics simulation results and the corresponding scraping results when there is no hydrophobic layer confined channel. Figure 2 The figure shows the fluid mechanics simulation results and the corresponding scraping results simulation diagram when there is a hydrophobic layer confined channel. Figure 1 and Figure 2 The comparison can verify that under the confinement effect of the hydrophobic layer array, organic small molecule materials can grow along a single orientation in the channel. Figure 3 and Figure 4 The polarization diagram and XRD Mapping characterization results of organic small molecules further support this conclusion.

[0041] Better, refer to Fig.15 The electronic device further comprises a first insulating layer 4, which separates the gate layer 6 from the source line 1 and the drain line 2, wherein the first insulating layer 4 covers the gate layer 5. Preferably, the first insulating layer 4 is formed by stacking PVP (polyvinyl pyrrolidone) and PVCn (cyanopolyvinyl chloride).

[0042] Preferably, the drain line 2 crosses the source line 1 in sequence, and a second insulating layer 8 is coated in the intersection area of ​​the two to prevent short circuit, and the material of the second insulating layer 8 is PVP.

[0043] Preferably, the first insulating layer 4 and the gate layer 6 are both stacked on a substrate 7 , and the substrate 7 may be a Parylene flexible substrate.

[0044] Reference Figures 5 to 14 The present invention also provides a method for preparing an organic single crystal electronic device, which can prepare the above-mentioned electronic device. The specific steps are as follows:

[0045] S1: preparing a gate layer 5 on a substrate 7 .

[0046] Specifically, the Ag ink was filtered through a 0.22 μm polytetrafluoroethylene syringe filter before being injected into a DMPLCP-11610 ink cartridge (Dimatix). The nozzle of the ink cartridge can typically produce a 10 pL droplet size. The silver ink was inkjet printed onto a 6 μm thick Parylene flexible substrate with a droplet spacing of 40 μm using a single nozzle, and then sintered at 135°C for 20 minutes to obtain a highly conductive patterned gate array with an electrode spacing of approximately 1000 μm to obtain a gate layer 5, as shown in FIG. Figure 5 shown.

[0047] S2: preparing a first insulating layer 4.

[0048] Specifically, the PVP and PVCn double dielectric layers are blade coated at 60°C at a speed of 3000 μm / s and 1000 μm / s respectively. The PVP layer is pre-baked at 100°C for 30 minutes and then cured at 135°C for 1 hour; the PVCn layer is pre-baked at 100°C for 10 minutes, UV-cured for 30 minutes, and then baked at 100°C for another 30 minutes, finally forming the first insulating layer 4, as shown in FIG. Figure 6 shown.

[0049] S3: Prepare source line 1 and drain line 2.

[0050] Specifically, the source line 1 electrode is first deposited by inkjet printing. In order to prevent the source line 1 and the drain line 2 electrodes from being electrically short-circuited, a PVP barrier layer, i.e., the second insulating layer 8, is applied to the crossover region by direct writing before printing the drain line 2. After the source line 1 and the drain line 2 and the second insulating layer 8 are annealed at 135°C for 20 minutes and 135°C for 1.5 hours, respectively, a channel width of 300 μm and a channel length of 100 μm are formed, as shown in FIG. Figure 7 shown.

[0051] S4: Preparation of hydrophobic array 3.

[0052] Parallel Cytop lines were precisely deposited on portions of the source line 1 and drain line 2 regions at a speed of 1000 μm / s at an operating voltage of 0.5 V and a driving frequency of 423.3 kHz, and then cured at 140 °C for 15 min to ensure proper formation and stabilization of the desired superhydrophobic properties. Prior to printing the semiconductor ink, the source line 1 and drain line 2 were treated with a PFBT / ethanol solution (volume ratio of 5:1000) for 10 min, as shown in Figure 2. Figure 8 shown.

[0053] S5: preparing an organic single crystal thin film 4.

[0054] Due to the different toluene contact angles between the dielectric layer and the Cytop surface, the C8-BTBT / PS mixture dissolved in toluene passed through the blade coating at a speed of 200 μm / s to form well-aligned OSCFs in the microchannel area defined by the parallel lines of Cytop.

[0055] S6: C8-BTBTOSCFs were further patterned by direct writing with toluene ink loaded in 70 μm hollow glass needles at an operating voltage of 0.1 V, a driving frequency of 423.3 kHz, and a speed of 1000 μm / s. Finally, the fully printed OTFT array was completed.

[0056] Finally, through reasonable circuit design and printing process, we successfully printed a large-area flexible parylene substrate (about 36cm 2 ) completed the preparation of a fully printed active transistor array (50×50).

[0057] The present invention realizes organic single crystal thin films (OSCFs) with extremely low intrinsic defect rates, breaking through the previously unattainable theoretical performance limits of fully printed thin film transistors (TFTs), allowing the device to exhibit excellent performance and unprecedented functions, such as a subthreshold swing of 59.4mV / dec close to the ideal value and a high capacitance of 13.8cm 2 / V / s mobility and low operating voltage, such as Figures 9 to 11 .

[0058] Through the proposed all-printing process scheme, the present invention successfully demonstrated a monolithically integrated TFT array based on patterned organic single crystal thin films (OSCFs). In particular, at 36 cm 2 The fully printed fabrication process of the present invention has excellent scalability and flexibility, showing the potential to promote printed electronics technology towards larger scale integration, such as Figure 12 to Figure 14 shown.

[0059] By utilizing the high performance, low power consumption and large area of ​​OTFT arrays, we have successfully demonstrated its potential as a cost-effective active matrix integrated multi-sensor platform technology, especially in 3D integration development. This major breakthrough in achieving this integrated functionality has opened up a new path for future IoT, flexible electronics and wearable electronics applications.

[0060] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.

Claims

1. A method for preparing an organic single crystal electronic device, characterized in that: include, A hydrophobic material is coated on the surface of the source line (1) and the drain line (2) to form a hydrophobic layer array (3) with gaps; Semiconductor materials are filled in the gaps of the hydrophobic layer array, and the semiconductor materials are in contact with the source lines (1) and the drain lines (2) respectively.

2. The method for preparing an organic single crystal electronic device according to claim 1, characterized in that: The hydrophobic material is a fluorinated polymer and is coated on the source line (1) and the drain line (2) by a blade coating process.

3. The method for preparing an organic single crystal electronic device according to claim 2, characterized in that: The semiconductor material is dioctylbenzothiophene and dioctylbenzothiophene, which is coated in the gaps of the hydrophobic layer array by a blade coating process.

4. An electronic device, characterized in that: include, A source line (1) and a drain line (2); A hydrophobic layer array (3) as claimed in any one of claims 1 to 3, coated on the surface of the source line (1) and the drain line (2); An organic single crystal thin film layer (4) filled in the gaps of the hydrophobic layer array (3).

5. The method for preparing an organic single crystal electronic device according to claim 4, characterized in that: The source line (1) and the drain line (2) are stacked on the surface of a first insulating layer (5), and the first insulating layer (5) covers the gate layer (6).

6. The method for preparing an organic single crystal electronic device according to claim 5, characterized in that: The gate layer (6) and the first insulating layer (5) are stacked on the surface of the substrate (7), and the substrate (7) is a flexible substrate.

7. The method for preparing an organic single crystal electronic device according to claim 6, characterized in that: A second insulating layer (8) is also provided between the overlapping region of the source line (1) and the drain line (2).

8. The method for preparing an organic single crystal electronic device according to claim 7, characterized in that: The material of the first insulating layer (5) is polyvinyl pyrrolidone and cyanopolyvinyl chloride stacked in sequence, and the material of the second insulating layer (8) is polyvinyl pyrrolidone.

9. The method for preparing an organic single crystal electronic device according to claim 8, characterized in that: The material of the organic single crystal thin film layer (4) is dioctylbenzothiophene and dioctylbenzothiophene.

10. The method for preparing an organic single crystal electronic device according to claim 9, characterized in that: The substrate (7) is a parylene flexible substrate.

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