Sensor fusion for film segmentation

Abstract

Examples of the invention disclose methods of performing semiconductor metrology by analyzing a sample surface, and methods of training machine learning logic for performing semiconductor metrology by analyzing a sample surface. The described examples specifically disclose a method of performing semiconductor metrology by analyzing a sample surface, wherein the method comprises: acquiring (701) a first image (711) generated using a first image modality; acquiring (701) a second image (721) generated using a second image modality; generating (711) a first mark (712) by segmenting the first image (711); generating (711) a second mark (722) by segmenting the second image (721); and generating a third mark (732) associated with the first image (711) and the second image (721) by fusing the first mark (712) and the second mark (722). Further examples disclose a processing apparatus for performing the method.

Description

Technical Field

[0001] The present invention generally relates to performing semiconductor metrology by analyzing a sample surface. Background Art

[0002] The manufacture of semiconductor devices depends on the accurate identification of semiconductor structures and their properties. As feature sizes decrease, it becomes increasingly important to identify features of fabricated semiconductor structures using a scanning electron microscope (SEM), particularly to determine parameters including at least one of the shape, size, and position of the features.

[0003] SEM uses primary electron beams to scan the sample surface. These primary electron beams release a full spectrum of scattered products from the sample surface, which can be distributed to different detectors according to energy and take-off angle, including, for example, at least one of an in-lens secondary electron (SE) detector, an in-lens backscattered electron (BSE) detector, an external SE detector, and an X-ray detector.

[0004] Not every detector can observe all features of the semiconductor structure to be monitored. Furthermore, even small deviations from ideal structure and performance during the processing steps of a semiconductor device production line can result in a reduction in overall yield. It is often necessary to reveal process deviations early in the production line. Summary of the invention

[0005] Therefore, methods that facilitate detection of semiconductor structures and properties may be needed.

[0006] This need has been solved by the subject matter of the independent claims. Advantageous embodiments are described in the dependent claims.

[0007] An example describes a method for performing semiconductor metrology by analyzing a sample surface, the method comprising: acquiring a first image of the sample surface generated using a first image modality; and acquiring a second image of the sample surface generated using a second image modality, generating a third image by performing a nonlinear fusion of the first image and the second image, and generating a third marker associated with the sample surface by segmenting the third image.

[0008] A further example provides a method for performing semiconductor metrology by analyzing a sample surface, the method comprising: acquiring a first image generated using a first image modality; acquiring a second image generated using a second image modality; generating a first mark by segmenting the first image; generating a second mark by segmenting the second image; and generating a third mark associated with the first image and the second image by fusing the first mark and the second mark.

[0009] Some examples disclose a method for performing semiconductor metrology by analyzing a sample surface, the method comprising: acquiring a first image generated using a first image modality; acquiring a second image generated using a second image modality; and generating a third marker associated with the first image and the second image by processing the first image and the second image in trained machine learning logic.

[0010] Additional examples relate to a method for training machine learning logic for performing semiconductor metrology by analyzing a sample surface. The method includes: obtaining a training set, the training set including a first training image of the sample surface generated using a first image modality and a second training image of the sample surface generated using a second image modality; obtaining a third annotation for each training set of the training sets; processing the set of the first training images and the second training images in the machine learning logic; obtaining a third label from the machine learning logic for each set of the first training images and the second training images; performing training of the machine learning logic by updating a parameter value of the machine learning logic based on a comparison of the third label and the third annotation.

[0011] The computer program or computer program product or computer readable storage medium includes program code. The program code can be loaded and executed by at least one processor. When executing the program code, at least one processor performs the above method.

[0012] A processing device is disclosed. The processing device includes a processor and a memory, wherein the processor is configured to load a program code from the memory and execute the program code. When executing the program code, the processor is configured to execute the above method.

[0013] It is to be understood that the features mentioned above and those yet to be explained below can be used not only in the respective combination indicated but also in other combinations or alone. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A scanning electron microscope system is schematically shown;

[0015] Figure 2 A vertical cross-sectional view of a semiconductor structure is shown.

[0016] Figure 3 A top-down cross-sectional view of a semiconductor structure is shown;

[0017] Figure 4 Shows the differences between image modalities;

[0018] Figure 5 A method for analyzing a sample surface is shown;

[0019] Figure 6 Further showing Figure 5Methods for analyzing sample surfaces;

[0020] Figure 7 A method for analyzing a sample surface is shown;

[0021] Figure 8 Further showing Figure 7 Methods for analyzing sample surfaces;

[0022] Fig. 9 A method of analyzing a sample surface is shown; and

[0023] Fig.10 Further analysis shows Fig.10 method for the sample surface.

[0024] Fig.11 Shows a method for training machine learning logic.

[0025] Fig.12 Shows a method for training machine learning logic.

[0026] Fig.13 Shows a method for training machine learning logic. DETAILED DESCRIPTION

[0027] Some examples of the present disclosure generally provide multiple circuits or other electrical devices. All references to circuits and other electrical devices and the functions provided by each device are not intended to be limited to only cover what is illustrated and described herein. Although specific labels may be assigned to various circuits or other electrical devices disclosed, such labels are not intended to limit the scope of operation of circuits and other electrical devices. Such circuits and other electrical devices may be combined and / or separated from each other in any manner based on the specific type of ideal electrical instrument. It should be recognized that any circuit or other electrical device disclosed herein may include any number of microcontrollers, graphics processor units (GPUs), integrated circuits, storage devices (such as flash memory, random access memory (RAM), read-only memory (ROM), electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or other appropriate variants) and software that cooperates with each other to perform the operations disclosed herein. In addition, any one or more electrical devices may be configured to execute a program code contained in a non-transient computer-readable medium, and the program code is programmed to perform any number of functions disclosed.

[0028] Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the following description of the embodiments should not be considered to have a limiting meaning. The scope of the present invention is not intended to be limited by the embodiments or drawings described below, which are merely illustrative.

[0029] The drawings should be considered schematic representations, and the elements in the drawings are not necessarily shown to scale. Instead, the various elements are represented so that their functions and general purposes become clear to those skilled in the art. Any connection or coupling between functional blocks, devices, components, or other entities or functional units shown in the drawings or described herein may also be implemented as indirect connections or couplings. Functional blocks can be implemented as hardware, firmware, software, or a combination thereof.

[0030] Figure 1 A system 100 for analyzing a sample surface is shown. The system 100 includes a SEM 110, which uses one or more imaging modalities to acquire an image of the sample surface, and a processing device 120, which has a processor 121 and a memory 122. The processor 121 can be configured to load program code from the memory and execute the program code, wherein when executing the program code, the processor is configured to perform one of the methods for analyzing a sample surface described below.

[0031] The SEM 110 can acquire an image by scanning the sample surface with a primary electron beam and detecting the scattered products using one or more detectors. The detector may include at least one of the following detectors: an in-lens secondary electron detector (in-lens SE detector), an in-lens backscattered secondary electron (BSE) detector (in-lens BSE detector), an external secondary electron detector (external SE detector), an external BSE detector, and an X-ray detector. Acquiring an image using a specific image modality refers to using one of the above detectors to collect the image. For each position of the primary electron beam, a corresponding signal of the selected detector can be obtained. Usually different channels are associated with different detectors. Therefore, acquiring an image using a specific image modality can also be referred to as acquiring an image using a specific channel (or detector channel).

[0032] In some scenarios, the SEM 110 may jointly acquire the first image using the first image modality and jointly acquire the second image using the second image modality. For example, the SEM 110 may acquire a scan of the sample surface using a primary electron beam and acquire signals from the first detector and the second detector in parallel. Jointly acquiring the first image using the first image modality and jointly acquiring the second image using the second image modality may allow the first image and the second image to be naturally registered with respect to each other. Therefore, an additional registration step may be omitted. This may reduce processing time and energy. In addition, noise caused by registration may be avoided.

[0033] The SEM 110 may use a single primary electron beam or multiple primary electron beams to acquire images. A SEM 110 using multiple primary electron beams may also be referred to as a MultiSEM or mSEM. Using multiple primary electron beams allows a larger area of ​​a surface sample to be scanned in a given time.

[0034] Various types and classes of semiconductor structures and properties may need to be analyzed. For example, three-dimensional (3D) memory chips, such as vertical NAND (3D NAND) memory chips or 3D DRAM chips, may be analyzed. 3D memory chips (3D NAND or 3D RAM) are made up of many pillar-like structures that extend parallel to each other, sometimes referred to as memory channels or "pillars." The deep etched memory channel holes span multiple layers, such as different conductive (e.g., metallization) layers or isolation layers.

[0035] Figure 2 and Figure 3 A 3D NAND memory structure 200 is schematically shown. Figure 3 Shown along Figure 2 222 is a cross-sectional view of a 3D NAND memory structure 200. The 3D NAND cell 200 includes an active portion 201 that connects a bit line 208 of the 3D NAND 200 to a substrate 207. The bit line 208 may be made of a metal material such as tungsten (W), the active portion 201 may be made of a semiconductor material such as polysilicon, and the substrate 207 may be a Si substrate. The active portion 201 may be hollow and filled with a filler 206. The active portion 201 may be made of SiO 2 The active portion 201 is surrounded by a first dielectric layer 202, a floating gate or charge trapping layer 203, a second dielectric layer 204, and a gate or word line 205. Several cells of the 3D NAND memory structure 200 can be separated from each other by an interlayer dielectric 209. 2 Depending on the voltage levels of the charge trapping layer 203 and the gate or word line 205 , a conductive channel may be formed in the active portion 201 that connects the bit line 208 of the 3D NAND 200 to the substrate 207 .

[0036] The first dielectric layer 202 may also be referred to as a tunneling oxide. When a sufficient voltage is applied between the gate 205 and the active portion 201, electrons may tunnel through the first dielectric layer 202 and may be trapped in the floating gate or charge trapping layer 203. The first dielectric layer 202 may be made of SiO 2 The first dielectric layer 202 is formed. Layer 203 may be Si 3 N 4 The second dielectric layer 204 can insulate the layer 203 from the gate 205. The second dielectric layer 204 can be made of a blocking oxide. Specifically, it can be made of Al 2 O 3 A second dielectric layer 204 is formed. A gate electrode 205 may be formed of tungsten.

[0037] During the manufacture of semiconductor devices, it may be necessary to determine the deviation of the manufactured semiconductor structure from the ideal semiconductor structure. For example, slice image tomography can be used to produce a 3D image of the manufactured semiconductor structure. To date, a dual-beam device can be used. In a dual-beam device, two particle optical systems are arranged at a certain angle (column offset angle). The two particle optical systems can be oriented vertically or at a column offset angle between 45° and 90°. The first particle optical system defines an imaging column. The imaging column can be implemented as a SEM or a helium ion microscope (HIM). The second particle optical system defines a milling column. The milling column can be a focused ion beam (FIB) optical system using, for example, gallium (Ga) ions. The FIB of Ga is used to cut slices of the sample test volume piece by piece. Therefore, an image depicting a cross-section of the sample is acquired at different milling depths using an imaging column.

[0038] In order to compare the fabricated semiconductor structure to an ideal semiconductor structure, features of the fabricated semiconductor structure must be identified in the image.

[0039] Depending on the imaging modality used to acquire the image, features of the fabricated semiconductor structure may be easier, more difficult, or not identifiable at all.

[0040] The images described herein may refer to two-dimensional images (2D images) of the sample and / or three-dimensional images (3D images) of the sample. For example, a 3D image may be acquired by performing a tomography technique. Similarly, methods for analyzing the surface of a sample include methods for analyzing the surface volume of the sample.

[0041] Figure 4 Schematically showing a first image 411 depicting a cross-sectional view of a fabricated semiconductor structure that has been acquired using a first imaging modality, and a second image 421 depicting the same cross-sectional view that has been acquired using a second imaging modality. Figure 2 or Figure 3 The ideal semiconductor structure is shown for comparison.

[0042] The interface 413 between the filler and the channel, the interface 413 between the channel and the first dielectric layer, the interface 413 between the charge trapping layer and the second dielectric layer, and the interface 413 between the second dielectric layer and the gate can be easily identified in the first image 411. However, the interface 414 between the first dielectric layer and the charge trapping layer may be barely identifiable.

[0043] For the second image 421, the interface 423 between the channel and the first dielectric layer, the interface 423 between the first dielectric layer and the charge trapping layer, the interface 423 between the charge trapping layer and the second dielectric layer, and the interface 423 between the second dielectric layer and the gate can be easily detected. However, the interface 425 between the filler and the channel is almost invisible.

[0044] The examples described herein contemplate improved use of information provided by different imaging modalities to provide sample surface features, such as regions, with third markers 432. The third markers can then be used to determine deviations of the fabricated semiconductor structure from an ideal semiconductor structure. For example, it can be determined Figure 4 The semiconductor structures and Figure 3 In other examples, a deviation in the thickness of one of the dielectric layers may be determined. Further examples may specify identifying deviations from an ideal form, such as an ellipse instead of a cylinder.

[0045] Figure 5 and Figure 6 An example of analyzing a sample surface is shown, with optional method features depicted in dashed lines.At 501 , the method specifies acquiring a first image 511 of a sample surface produced using a first imaging modality and acquiring a second image 521 of the sample surface produced using a second imaging modality. Figure 6 An example of a first image 511 and a second image 521 is schematically shown. The first image modality is different from the second image modality. For example, the detector used to acquire the first image 511 may be different from the detector used to acquire the second image 521. In addition, the acquisition of the first image 511 may utilize the same detector as the acquisition of the second image 521 but use different detector settings. In some examples, the first image 511 and the second image 521 may be registered with each other. The first image 511 and / or the second image 521 may be acquired from a data storage. For example, the first image 511 and / or the second image 521 may be acquired from the memory 122 of the processing device 120. Acquiring the first image 511 and / or the second image 521 may also include acquiring the first image 511 and / or the second image 521 using an imaging device. For example, acquiring the first image 511 using the first image modality and / or acquiring the second image 521 using the second image modality includes performing a scanning electron microscope, in particular a multi-beam scanning electron microscope 110. This may involve using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered detector, and an X-ray detector.

[0046] Optionally, segmentation 502 of the first image 511 and the second image 521 is performed to obtain a first label 512 of the first image 511 and a second label 522 of the second image 521. In some scenarios, segmentation of the first image 511 and the second image 521 involves machine learning techniques. Other scenarios may dictate that segmentation of the first image 511 and the second image 521 is performed using conventional image processing techniques.

[0047] The third image 531 may be generated by performing a nonlinear fusion of the first image 511 and the second image 521. The nonlinear fusion of the first image 511 and the second image 521 may include setting each pixel value of the third image 531 to a maximum value of a corresponding pixel value of the first image 511 and a corresponding pixel value of the second image 512. The nonlinear fusion of the first image 511 and the second image 521 may also include setting each pixel value of the third image 531 to a product of a corresponding pixel value of the first image 511 and a corresponding pixel value of the second image 512. Some examples may specify that different weights are assigned to the pixel values ​​of the first image 511 and the pixel values ​​of the second image before performing the nonlinear fusion.

[0048] Segmentation 504 of the third image 531 is performed to obtain third labels 532. In some scenarios, segmentation may involve machine learning techniques. Other scenarios may dictate that segmentation is performed using traditional image processing techniques.

[0049] like Figure 6 As schematically shown, the third image 531 may include more information for better segmentation. In particular, the interface between different regions may be more obvious, which is conducive to segmentation. Therefore, segmentation may result in the third mark 532 being more suitable for determining parameters of actual sample characteristics.

[0050] Figure 7 and Figure 8 Another example of analyzing a sample surface is shown. Analyzing a sample surface begins with acquiring 701 a first image 711 of the sample surface generated using a first imaging modality and acquiring a second image 721 of the sample surface generated using a second imaging modality. For illustration purposes, Figure 8 Examples of a first image 711 and a second image 721 are shown.

[0051] The first image modality is different from the second image modality. The detector used to acquire the first image 711 may be different from the detector used to acquire the second image 721. It can also be seen that the first image 711 and the second image 721 are acquired using the same detector, but using different detector settings. Optionally, the first image 711 and the second image 721 may be registered with each other. The first image 711 and / or the second image 721 may be acquired from a data storage device. For example, the first image 711 and / or the second image 721 may be acquired from the memory 122 of the processing device 120.

[0052] Acquiring the first image 711 and / or the second image 721 may also include acquiring the first image 711 and / or the second image 721 using an imaging device. For example, acquiring the first image 711 using the first imaging modality and / or acquiring the second image 721 using the second imaging modality includes performing a scanning electron microscope, in particular a multi-beam scanning electron microscope 110. This may involve using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered secondary electron (BSE) detector, an external backscattered detector, and an X-ray detector.

[0053] At 702, segmentation of the first image 711 and segmentation of the second image 721 may be performed to obtain a first label 712 of the first image 711 and a second label 722 of the second image 721. The segmentation of the first image 711 and the second image 721 may involve machine learning techniques. However, the segmentation of the first image 711 and the second image 721 may also be performed using conventional image processing techniques.

[0054] At 703, a third marker 732 is generated from the first marker 712 and the second marker 722. The first marker 712 and the second marker 722 may be fused or merged to obtain the third marker 732. For example, the processing device may identify that the interface 712-2 between the areas identified by the two first markers 712 corresponds to the interface 722-2 between the areas identified by the two second markers 722. The slight difference between the positions of the detected interface 712-2 and the interface 722-2 may be used to improve the segmentation of the first image 711 and the segmentation of the second image 712. In addition, the processing device may determine that the interface 712-1 has not been detected when the segmentation of the second image 721 is performed, and the interface 722-3 has been detected when the segmentation of the first image 711 is performed.

[0055] In some examples, a confidence level may be assigned to the third marker 732. The confidence level may indicate the level of certainty that the third marker correctly identifies the features of the detected semiconductor structure. In some examples, confidence levels may be provided for the first marker 712 and the second marker 722. For example, the machine learning logic used to obtain the first marker 712 and the second marker 722 may provide corresponding confidence levels. The confidence level of the third marker 732 may be the product of the individual confidence levels. In an example, there is a transition region where the segmentation of the first image 711 and the segmentation of the second image 721 behave differently, resulting in confusion of the third marker, and a reduced confidence level may be assigned to the known third marker.

[0056] Generating the third label 732 associated with the first image 711 and the second image 721 by fusing the first label 712 and the second label 722 may include performing a logical operation on a corresponding pixel of the first label 712 and a corresponding pixel of the second label 722 for each pixel.

[0057] Fig. 9 and Fig.10 Another method of analyzing a sample surface is shown. At 901, a first image 911 of a sample surface produced using a first imaging modality and a second image 921 of the sample surface produced using a second imaging modality are acquired. Fig. 9 An example of a first image 911 and a second image 921 is shown.

[0058] The first image modality and the second image modality are different. The detector used to acquire the first image 911 may be different from the detector used to acquire the second image 921. It can also be seen that the first image 911 and the second image 921 are acquired using the same detector but using different detector settings. In some examples, the first image 911 and the second image 921 may be registered with each other. The first image 911 and / or the second image 921 may be acquired from a data storage. For example, the first image 911 and / or the second image 921 may be acquired from the memory 122 of the processing device 120.

[0059] Acquiring the first image 911 and / or the second image 921 may also include acquiring the first image 911 and / or the second image 921 using an imaging device. For example, acquiring the first image 911 using the first imaging modality and / or acquiring the second image 921 using the second imaging modality includes performing a scanning electron microscope, in particular a multi-beam scanning electron microscope 110. This may involve using at least one of an in-lens secondary electron detector, an in-lens backscattered secondary electron detector, an external secondary electron detector, an external backscattered secondary electron (BSE) detector, an external backscattered detector, and an X-ray detector.

[0060] Instead of separately performing segmentation of the first image 911 to obtain the first label and segmentation of the second image 921 to obtain the second label and then fusing the first label and the second label to obtain the third label, the first image 911 and the second image 912 may be jointly processed in a trained machine learning logic to obtain the third label 932. The trained machine learning logic may be implemented by a processing device.

[0061] Examples have been described herein with respect to a first image generated using a first imaging modality and a second image generated using a second imaging modality. In some scenarios, more than two different imaging modalities may be used to further refine the analysis of a sample surface.

[0062] Regardless of the method used, the third marker can be used to determine parameters of the sample surface characteristics. For semiconductor structures, the third marker can indicate the material in a specific area. For example, the third marker can indicate the chemical composition in the corresponding area. In other examples, the third marker can indicate solid state modification (e.g., polycrystalline, single crystal, crystal orientation, polymorph, crystal modification).

[0063] The third mark can be used to determine the characteristics and / or geometric properties of the region. Specifically, the third mark allows the manufactured semiconductor structure to be compared with an ideal semiconductor structure.

[0064] According to an example, the sample surface analyzed by one of the above methods may be a surface of a semiconductor structure sample or a surface of an exposure mask used to manufacture a semiconductor structure.

[0065] Examples of this method may provide for identifying a feature of the semiconductor structure based at least on the third marking. The feature may include at least one of a polygon, a rectangle, a triangle, an ellipse, a circle, and a ring. Some examples may provide for identifying at least one geometric attribute of the feature of the semiconductor structure. The geometric attribute may include at least one of the following: a thickness of the feature of the semiconductor structure, a position of the feature of the semiconductor structure, a diameter of the feature of the semiconductor structure, a center of the feature of the semiconductor structure, an eccentricity of the feature of the semiconductor structure.

[0066] Based on the analyzed surface of the semiconductor structure sample, variations between the fabricated semiconductor structure and the ideal semiconductor structure can be identified.

[0067] Fig.11 A method for training machine learning logic for performing semiconductor metrology by analyzing a sample surface is shown. At 1101, the method specifies acquiring a training set including a first training image 1111 of a sample surface generated using a first image modality and a second training image 1121 of the sample surface generated using a second image modality.

[0068] For each of the training sets, a third annotation 1133 is obtained (block 1102). Annotation may refer to manually providing a label. Specifically, annotation may refer to adding expertise. Annotation may refer to manually identifying a semiconductor structure. In some examples, the number of values ​​for the third label may be limited. For example, the number of features that make up the semiconductor structure may be limited. For example, the number of materials that make up the semiconductor structure may be limited. The features included in the semiconductor structure may be known to the person providing the third annotation.

[0069] The sets of first training images and second training images are processed in the machine learning logic 1120 to obtain third labels 1132 from the machine learning logic 1120 for each set of first training images 1111 and second training images 1121 .

[0070] At 1104 , training 1104 of the machine learning logic 1120 is performed by updating parameter values ​​of the machine learning logic 1120 based on the comparison of the third tag 1132 and the third annotation 1133 .

[0071] Acquiring (1102) a third annotation 1133 for each training set of the training sets may include: for each training set, acquiring a first label 1113 for the first training image 1111 and a second label 1123 for the second training image 1121 by performing a fusion and annotation operation 1106 on the first label and the second label 1123, and acquiring a third annotation 1133.

[0072] The first mark 1113 may be a first annotation 1113, and the second mark 1123 may be a second annotation 1123. Therefore, the first mark 1113 and the second mark 1123 may be manually added.

[0073] However, if Fig.12 As shown, it is also conceivable to automatically generate the first label 1112 and the second label 1122 by processing the first training image 1111 and the second training image 1121. For example, a trained machine learning logic can be used for this purpose.

[0074] Fig.13 Another method of training machine learning logic for performing semiconductor metrology by analyzing a sample surface is shown. The method includes acquiring (1301) training sets, each training set including a first training image 1311 of the sample surface generated using a first image modality and a second training image 1321 of the sample surface generated using a second image modality. For each training set in the training sets, a third annotation 1333 is acquired.

[0075] At this point, fusion (1305), in particular, nonlinear fusion, of the first training image 1311 and the second training image 1321 is performed to obtain a third training image 1331. The nonlinear fusion of the first training image 1311 and the second training image 1321 may be performed using the method described above with respect to the nonlinear fusion of the first image and the second image. Thereafter, annotation (1306) of the third training image 1331 may be performed to obtain a third annotation 1333.

[0076] From the machine learning logic 1320, for each set of first training images 1311 and second training images 1321, a third label 1332 can be obtained at 1303, and based on the comparison of the third label and the third annotation, the machine learning logic 1320 can be trained by updating the parameter value of the machine learning logic 1320.

[0077] Although the invention has been shown and described with respect to certain preferred embodiments, equivalents and modifications will occur to others skilled in the art upon the reading and understanding of the specification. The invention includes all such equivalents and modifications, and is limited only by the scope of the appended claims.

Claims

1. A method for performing semiconductor metrology by analyzing a sample surface, the method comprising: include: Acquiring (701) a first image (711) generated using a first image modality; Acquiring (701) a second image (721) generated using a second image modality; By segmenting the first image (711) to generate a first mark (712); By segmenting the second image (721) to generate a second mark (722); as well as The first label (712) and the second label (722) are fused to generate a third label (732) associated with the first image (711) and the second image (721).

2. The method of performing semiconductor metrology by analyzing a sample surface according to claim 1, wherein the first mark (712) and the second mark (722) are fused to generate a third mark (732) associated with the first image (711) and the second image (721) include: The corresponding first marker (712) and second marker (722) are identified.

3. A method for performing semiconductor metrology by analyzing a sample surface according to claim 1 or 2, wherein the first mark (712) and the second mark (722) are fused to generate a third mark (732) associated with the first image (711) and the second image (721) include: A confidence level is assigned to the third label (732).

4. A method for performing semiconductor metrology by analyzing a sample surface according to any one of claims 1 to 3, Wherein fusing the first label (712) and the second label (722) to generate a third label (732) associated with the first image (711) and the second image (721) includes performing a logical operation on a corresponding pixel of the first label (712) and a corresponding pixel of the second label (722) for each pixel.

5. A method for performing semiconductor metrology by analyzing a sample surface, the method include: Acquiring (901) a first image (911) generated using a first image modality; Acquiring (901) a second image (911) generated using a second image modality; By processing the first image (911) and the second image (921) in a trained machine learning logic, in particular using a machine learning logic trained according to any one of claims 18 to 21, a third label (932) is generated (902), and the third label (932) is associated with the first image (911) and the second image (921).

6. A method for performing semiconductor metrology by analyzing a sample surface, the method include: Acquiring (501) a first image (511) of the sample surface generated using a first imaging modality; Acquiring (501) a second image (521) of the sample surface generated using a second imaging modality; generating (503) a third image (531) by performing nonlinear fusion of the first image (511) and the second image (521); The third image (531) is segmented to generate (504) a third marking (532) associated with the sample surface.

7. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 6, The performing (503) of nonlinear fusion of the first image (511) and the second image (521) includes setting the pixel value of the third image (531) to the maximum value of the corresponding pixel value of the first image (511) and the corresponding pixel value of the second image (521).

8. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 6, The performing (503) of nonlinear fusion of the first image (511) and the second image (521) includes setting the pixel value of the third image (531) to the product of the corresponding pixel value of the first image (511) and the corresponding pixel value of the second image (521).

9. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 6, The performing (503) of nonlinear fusion of the first image (511) and the second image (521) includes setting the pixel value of the third image (531) to the quotient of the corresponding pixel value of the first image (511) and the corresponding pixel non-zero value of the second image (521).

10. The method of performing semiconductor metrology by analyzing a sample surface according to any one of claims 6 to 9, further comprising: include: Weights are assigned to pixel values ​​of the first image (511) and / or pixel values ​​of the second image (521).

11. Method for performing semiconductor metrology by analyzing a sample surface as claimed in any one of the preceding claims, in, The sample surface is a semiconductor structure sample surface or a surface of an exposure mask used to manufacture a semiconductor structure.

12. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 11, further comprising: include: Based at least on the third marking, a feature of the semiconductor structure is identified.

13. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 12, The feature includes at least one of the following: Polygon; rectangle; triangle; oval; round; and Ring.

14. The method for performing semiconductor metrology by analyzing a sample surface as claimed in claim 12 or 13, further comprising: include: At least one geometric property of the feature of the semiconductor structure is identified.

15. The method of performing semiconductor metrology by analyzing a sample surface as claimed in claim 14, The geometric attribute includes at least one of the following: the thickness of the semiconductor structural feature; The location of the semiconductor structural feature; a diameter of the semiconductor structural feature; a center of the semiconductor structural feature; The eccentricity of the semiconductor structure feature.

16. The method of performing semiconductor metrology by analyzing a sample surface according to any one of claims 12 to 15, further comprising: include: Based on the surface of the semiconductor structure sample, variations between the fabricated semiconductor structure and the ideal semiconductor structure are identified.

17. A method for performing semiconductor metrology by analyzing a sample surface as claimed in any one of the preceding claims, wherein acquiring (701; 801; 901) the first image (511; 711; 911) using the first image modality and / or acquiring the second image (521; 721; 921) using the second image modality comprises performing a scanning electron microscope, in particular a multi-beam scanning electron microscope, using at least one of the following: in-lens secondary electron detector; an in-lens backscattered secondary electron detector; External secondary electron detector; External backscatter detector; external backscattered secondary electron detector; X-ray detector.

18. A method for training machine learning logic for performing semiconductor metrology by analyzing a sample surface, the method include: Get(1101; 1301) training sets, each training set comprising a first training image (1111; 1311) of the sample surface generated using a first image modality and a second training image (1121; 1321) of the sample surface generated using a second image modality; For each training set of the training set, obtaining (1102; 1302) a third annotation (1133; 1333); processing (1103; 1303) the set of the first training image (1111; 1311) and the second training image (1121; 1321) in a machine learning logic (1120; 1320); for each set of the first training images (1111; 1311) and the second training images (1121; 1321), obtaining (1103; 1303) a third label (1132; 1332) from the machine learning logic (1120; 1320); and Based on comparing the third label (1132; 1332) and the third annotation (1133; 1333), the machine learning logic (1120; 1320) is trained (1104; 1304) by updating parameter values ​​of the machine learning logic (1120; 1320).

19. The method of training machine learning logic for performing semiconductor metrology by analyzing a sample surface as claimed in claim 18, in, For each training set of the training set, obtaining (1102) a third annotation (1133) includes: For each training set, obtaining a first label (1113) for the first training image (1111) and obtaining a second label (1123) for the second training image (1121); and The third annotation (1133) is obtained by performing a fusion and annotation operation (1106) on the first label (1113) and the second label (1123).

20. The method of training machine learning logic for performing semiconductor metrology by analyzing a sample surface as claimed in claim 19, wherein the first mark (1113) is a first annotation (1113); and The second mark (1123) is a second annotation (1123).

21. The method of training machine learning logic for performing semiconductor metrology by analyzing a sample surface as claimed in claim 18, in, For each training set of the training set, obtaining (1302) a third annotation (1333) includes: performing fusion (1305), in particular non-linear fusion, of the first training image (1311) and the second training image (1321) to obtain a third training image (1331); and The third training image (1331) is annotated (1306) to obtain the third annotation (1333).

22. A processing device (120), comprising a processor (121) and a memory (122), the processor (121) being configured to load a program code from the memory (122) and execute the program code, wherein when executing the program code, the processor (121) is configured to perform the method according to any one of claims 1 to 21.

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