Circuit board
By designing multiple parallel and equidistantly arranged traces on the circuit board and setting wires for grounding and shielding, the problem of coupling capacitors between traces affecting the induction volume is solved, the accuracy of contact position calculation is improved, and the application effect of the active stylus is enhanced.
Patent Information
- Application Number
- CN202510155674.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-01-24
- Filing Date
- 2025-02-12
- Publication Date
- 2025-06-10
AI Technical Summary
In existing touch control devices, the coupling capacitor between traces will affect the induction amount, resulting in a deviation in the calculation of contact position, affecting the application of active stylus.
A circuit board is designed to reduce coupling capacitance between traces by setting multiple parallel and equidistantly arranged traces in the conductor layer and providing wires between traces for grounding and shielding.
It effectively reduces the impact of the coupling capacitor between traces, improves the accuracy of the touch controller to obtain induction, and enhances the correctness of the position detection of the active stylus.
Smart Images

Figure CN120122844A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a circuit board, and more particularly to a circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor. Background Art
[0002] A touch device includes a touch controller and a capacitive touch sensor. The touch controller is usually electrically connected to a plurality of electrodes of the capacitive touch sensor through a plurality of traces on a circuit board, and calculates the contact position of an object according to the sensed amounts of the plurality of electrodes. However, the coupling capacitance between the plurality of traces may affect the sensed amounts obtained by the touch controller, resulting in a deviation in the contact position calculated by the touch controller, which is not conducive to the application of an active stylus. Summary of the Invention
[0003] One of the objectives of the present invention is to provide a circuit board that reduces the influence of the coupling capacitance between traces.
[0004] The present invention provides a circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor. The capacitive touch sensor includes N first electrodes arranged in sequence along a first direction, and M second electrodes arranged in sequence along a second direction, the first direction being perpendicular to the second direction, and N and M being positive integers greater than or equal to 2. The circuit board includes a first conductor layer, a second conductor layer, a third conductor layer, a first dielectric layer, and a second dielectric layer. The first conductor layer includes N first traces arranged in parallel and at equal intervals, and the N first traces are used to respectively couple to the N first electrodes. The second conductor layer includes M second traces arranged in parallel and at equal intervals, and the M second traces are used to respectively couple to the M second electrodes. The third conductor layer is used for grounding, and the third conductor layer is located between the first conductor layer and the second conductor layer. The first dielectric layer is located between the first conductor layer and the third conductor layer. The second dielectric layer is located between the second conductor layer and the third conductor layer.
[0005] The present invention further provides a circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor. The capacitive touch sensor includes N first electrodes arranged in parallel along a first direction, and M second electrodes arranged in parallel along a second direction, the first direction being perpendicular to the second direction, and N and M being positive integers greater than or equal to 2. The N first electrodes include a first group of first electrodes and a second group of first electrodes. The M second electrodes include a first group of second electrodes and a second group of second electrodes. The circuit board includes a first conductor layer, a second conductor layer, a third conductor layer, a first dielectric layer, and a second dielectric layer. The first conductor layer includes a first group of first traces, a first group of second traces, and a first wire. The first group of first traces includes a plurality of first traces arranged in parallel and equidistantly, for respectively coupling to a plurality of the first electrodes in the first group of first electrodes. The first group of second traces includes a plurality of second traces arranged in parallel and equidistantly, for respectively connecting to a plurality of the second electrodes in the first group of second electrodes. The first wire is located between the first group of first traces and the first group of second traces, and is parallel to the first group of first traces and the first group of second traces. The first wire is used for grounding. The second conductor layer includes a second group of first traces, a second group of second traces, and a second wire. The second group of first traces includes a plurality of first traces arranged in parallel and equidistantly, for respectively coupling to a plurality of the first electrodes in the second group of first electrodes. The second group of second traces includes a plurality of second traces arranged in parallel and equidistantly, for respectively connecting to a plurality of the second electrodes in the second group of second electrodes. The second wire is located between the second group of first traces and the second group of second traces, and is parallel to the second group of first traces and the second group of second traces. The second wire is used for grounding. The third conductor layer is used for grounding, and the third conductor layer is located between the first conductor layer and the second conductor layer. The first dielectric layer is located between the first conductor layer and the third conductor layer. The second dielectric layer is located between the second conductor layer and the third conductor layer.
[0006] The present invention further provides a circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor. The capacitive touch sensor includes N electrodes arranged in parallel along a first direction. The N electrodes include a first group of electrodes, a second group of electrodes, and a third group of electrodes, wherein the first group of electrodes, the second group of electrodes, and the third group of electrodes each include a plurality of electrodes. The touch controller selects 2M - 1 adjacent electrodes for coordinate calculation. The circuit board includes a first conductor layer, a second conductor layer, a third conductor layer, a first dielectric layer, and a second dielectric layer. The first conductor layer includes a first group of traces, and the first group of traces includes a plurality of traces for respectively coupling the plurality of electrodes of the first group of electrodes. The second conductor layer includes a second group of traces, and the second group of traces includes a plurality of traces for respectively coupling the plurality of electrodes of the second group of electrodes. The plurality of traces of the first group of traces and the plurality of traces of the second group of traces are arranged in an interleaved manner in a second direction. The third conductor layer includes a third group of traces, and the third group of traces includes a plurality of traces for respectively coupling the plurality of electrodes of the third group of electrodes. The plurality of traces of the second group of traces and the plurality of traces of the third group of traces are arranged in an interleaved manner in the second direction. The first dielectric layer is located between the first conductor layer and the second conductor layer. The second dielectric layer is located between the second conductor layer and the third conductor layer. Each electrode coupled by a trace is at least separated from the electrodes coupled by the traces adjacent to it in the second direction and a third direction by M electrodes, and the second direction is perpendicular to the third direction. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Figure 1 Showing a touch device applying the circuit board of the present invention.
[0008] Figure 2 Showing Figure 1 an embodiment of the capacitive touch sensor in the
[0009] Figure 3 Showing Figure 1 a cross-sectional view of the first embodiment of the circuit board of the present invention in the
[0010] Figure 4 Showing Figure 1 a cross-sectional view of the second embodiment of the circuit board of the present invention in the
[0011] Figure 5 Showing Figure 1 a cross-sectional view of the third embodiment of the circuit board of the present invention in the
[0012] Description of reference numerals: 10-touch device; 12-touch controller; 14-capacitive touch sensor; 142-first electrode; 144-second electrode; 16-flexible printed circuit board; 20-circuit board; 2002-conductor layer; 2004-dielectric layer; 2006-conductor layer; 2008-dielectric layer; 2010-conductor layer; 2012-dielectric layer; 2014-conductor layer; 2016-dielectric layer; 2018-conductor layer; 2020-conductor layer; 2022-dielectric layer; 2024 -conductor layer; 2026-dielectric layer; 2028-conductor layer; 2030-dielectric layer; 2032-conductor layer; 2034-dielectric layer; 2036-conductor layer; 22-routing; 2202-routing; 2204-routing; 2206-first routing; 2208-second routing; 24-conducting wire; 26-conducting wire; 28-conducting wire; 30-conducting wire; 32-conducting wire; 34-conducting wire; 36-conducting wire; 38-conducting wire; 40-conducting wire; S-line spacing; W-line width; W01~W30-routing. DETAILED DESCRIPTION
[0013] Figure 1 A touch control device using the circuit board of the present invention is shown. Figure 1 In the present invention, the touch device 10 includes a touch controller 12 and a capacitive touch sensor 14. The touch controller 12 is configured on a circuit board 20 of the present invention. The circuit board 20 may be, but is not limited to, a printed circuit board (PCB). The touch controller 12 is connected to a plurality of traces 22 on the circuit board 20. The plurality of traces 22 are connected to the capacitive touch sensor 14 via a flexible printed circuit (FPC) 16. The circuit board 20 is used to provide a signal transmission path between the touch controller 12 and the capacitive touch sensor 14.
[0014] Figure 2 show Figure 1 An embodiment of a capacitive touch sensor. Figure 2As shown, the capacitive touch sensor 14 includes N first electrodes 142 arranged in sequence along the X direction, and M second electrodes 144 arranged in sequence along the Y direction. The X direction is perpendicular to the Y direction, and N and M are positive integers greater than or equal to 2. The number of the plurality of traces 22 is M + N. Each trace 22 is connected to a first electrode 142 or a second electrode 144. The touch controller 12 obtains the induction amounts of the N first electrodes 142 and / or the M second electrodes 144 through the plurality of traces 22 to calculate the contact position of an object (such as a finger or a stylus). In an embodiment, the N first electrodes 142 are driving electrodes, and the M second electrodes 144 are sensing electrodes. When the touch controller 12 performs mutual capacitance scanning on the capacitive touch sensor 14, the touch controller 12 sequentially applies driving signals to the N first electrodes 142 and senses the M second electrodes 144 to obtain N*M induction amounts.
[0015] Figure 3 Display Figure 1 A cross-sectional view of the first embodiment of the circuit board of the present invention. In Figure 3 In the embodiment, the circuit board 20 includes conductor layers 2002, 2006, 2010, 2014, and 2018 and dielectric layers 2004, 2008, 2012, and 2016. The conductor layers 2002, 2010, and 2018 are grounded. The dielectric layer 2004 is between the conductor layers 2002 and 2006. The dielectric layer 2008 is between the conductive layers 2006 and 2010. The dielectric layer 2012 is between the conductive layers 2010 and 2014. The dielectric layer 2016 is between the conductive layers 2014 and 2018. The conductor layer 2006 includes N traces 2202 of the plurality of traces 22 and two conductors 24, where the N traces 2202 are parallel to each other and arranged at equal distances. The N traces 2202 and the two conductors 24 are parallel to each other. The N traces 2202 are respectively coupled to the N first electrodes 142, and the two conductors 24 are grounded and disposed on both sides of the N traces 2202. The two conductors 24 are used to shield the N traces 2202 to isolate external interference to the N traces 2202, such as isolating noise or electrostatic discharge (ESD). The conductor layer 2014 includes M traces 2204 of the plurality of traces 22 and two conductors 26, where the M traces 2204 are parallel to each other and arranged at equal distances. The M traces 2204 and the two conductors 26 are parallel to each other. The M traces 2204 are respectively coupled to the M second electrodes 144, and the two conductors 26 are grounded and disposed on both sides of the M traces 2204. The two conductors 26 are used to shield the M traces 2204 to isolate external interference to the M traces 2204, such as isolating noise or ESD.
[0016] In Figure 3In an embodiment, the charge of the coupling capacitance between adjacent traces 2202 in the conductor layer 2006 is released to the ground terminal via the conductive layers 2002 and 2010, and the charge of the coupling capacitance between adjacent traces 2204 in the conductor layer 2014 is released to the ground terminal via the conductive layers 2010 and 2018. Therefore, the coupling capacitance between adjacent traces 2202 or adjacent traces 2204 can be prevented from affecting the sensing amounts of the N first electrodes 142 and the M second electrodes 144 obtained by the touch controller 12.
[0017] The distance between two adjacent traces 2202 is greater than or equal to the line width of the trace 2202. The distance between two adjacent traces 2204 is greater than or equal to the line width of the trace 2204. In an embodiment, the distance between two adjacent traces 2202 and the distance between two adjacent traces 2204 are both S, the line widths of the traces 2202 and 2204 are both W, and the distance S is greater than or equal to the line width W of the trace, that is, S / W≥1.
[0018] In an embodiment, Figure 3 The conductor layers 2002 and 2018 and the dielectric layers 2004 and 2016 may also be omitted. In this embodiment, the charge of the coupling capacitance between adjacent traces 2202 in the conductor layer 2006 is released to the ground terminal via 2010, and the charge of the coupling capacitance between adjacent traces 2204 in the conductor layer 2014 is also released to the ground terminal via the conductive layer 2010. Therefore, the coupling capacitance between adjacent traces 2202 or adjacent traces 2204 can be prevented from affecting the sensing amounts of the N first electrodes 142 and the M second electrodes 144 obtained by the touch controller 12.
[0019] Figure 4 Display Figure 1 A cross-sectional view of the second embodiment of the circuit board of the present invention. Figure 4 The circuit board 20 of Figure 3 including the conductor layers 2002, 2006, 2010, 2014 and 2018 and the dielectric layers 2004, 2008, 2012 and 2016. Figure 4 The circuit board 20 of Figure 3 The difference between the circuit board 20 of Figure 4 The conductor layer 2006 includes a first group of first traces, a first group of second traces, two conductive lines 28 and a conductive line 30, and the conductor layer 2014 includes a second group of first traces, a second group of second traces, two conductive lines 32 and a conductive line 34, wherein the first group of first traces, the second group of first traces, the first group of second traces and the second group of second traces form the plurality of traces 22. The first group of first traces and the second group of first traces each include a plurality of first traces 2206 arranged in parallel and equidistantly, and the first group of second traces and the second group of second traces each include a plurality of second traces 2208 arranged in parallel and equidistantly.Figure 2 The N first electrodes 142 therein are divided into a first group of first electrodes and a second group of first electrodes, and the M second electrodes 144 are divided into a first group of second electrodes and a second group of second electrodes. The plurality of first traces 2206 of the first group of first traces are used to respectively couple to the plurality of first electrodes 142 of the first group of first electrodes, the plurality of first traces 2206 of the second group of first traces are used to respectively couple to the plurality of first electrodes 142 of the second group of first electrodes, the plurality of second traces 2208 of the first group of second traces are used to respectively couple to the plurality of second electrodes 144 of the first group of second electrodes, and the plurality of second traces 2208 of the second group of second traces are used to respectively couple to the plurality of second electrodes 144 of the second group of second electrodes. The plurality of first traces 2206 of the first group of first traces and the plurality of second traces 2208 of the first group of second traces are parallel to the wires 28 and 30. The two wires 28 are grounded and disposed outside the first group of first traces and the first group of second traces. The wire 30 is grounded and disposed between the first group of first traces and the first group of second traces to isolate the first group of first traces from the first group of second traces. The two wires 28 are used to shield the first group of first traces and the first group of second traces to isolate external interference to the first group of first traces and the first group of second traces, such as isolating noise or ESD. The plurality of first traces 2206 of the second group of first traces and the plurality of second traces 2208 of the second group of second traces are parallel to the wires 32 and 34. The two wires 32 are grounded and disposed outside the second group of first traces and the second group of second traces. The wire 34 is grounded and disposed between the second group of first traces and the second group of second traces to isolate the second group of first traces from the second group of second traces. The two wires 32 are used to shield the second group of first traces and the second group of second traces to isolate external interference to the second group of first traces and the second group of second traces, such as isolating noise or ESD.
[0020] In Figure 4 the embodiment of, the charges of the coupling capacitance between adjacent first traces 2206 in the conductor layer 2006 and the charges of the coupling capacitance between adjacent second traces 2208 are released to the ground terminal via the conductive layers 2002 and 2010, and the charges of the coupling capacitance between adjacent first traces 2206 in the conductor layer 2014 and the charges of the coupling capacitance between adjacent second traces 2208 are released to the ground terminal via the conductive layers 2010 and 2018. Therefore, the coupling capacitance between adjacent first traces 2206 or adjacent second traces 2208 can be avoided from affecting the sensing amounts of the N first electrodes 142 and the M second electrodes 144 obtained by the touch controller 12.
[0021] The distance between two adjacent first traces 2206 is greater than or equal to the line width of the first trace 2206. The distance between two adjacent second traces 2208 is greater than or equal to the line width of the second trace 2208. In one embodiment, among the first group of first traces, the second group of first traces, the first group of second traces, and the second group of second traces of Figure 4 , the line distance between adjacent traces is S, the width of the traces is W, and the line distance S is greater than or equal to the line width W of the traces, that is, S / W≥1.
[0022] In one embodiment, Figure 4 the conductor layers 2002 and 2018 and the dielectric layers 2004 and 2016 can also be omitted. In this embodiment, the charges of the coupling capacitors between adjacent first traces 2206 in the conductor layer 2006 and the charges of the coupling capacitors between adjacent second traces 2208 are released to the ground terminal via 2010, and the charges of the coupling capacitors between adjacent first traces 2206 in the conductor layer 2014 and the charges of the coupling capacitors between adjacent second traces 2208 are also released to the ground terminal via the conductive layer 2010. Therefore, the coupling capacitance between adjacent first traces 2206 or adjacent second traces 2208 can be prevented from affecting the sensing amount of the N first electrodes 142 and the M second electrodes 144 obtained by the touch controller 12.
[0023] Figure 5 Show Figure 1 a cross-sectional view of the third embodiment of the circuit board of the present invention in the figure, which can be applied to couple Figure 2 the capacitive touch sensor shown. The capacitive touch sensor includes N first electrodes 142 arranged along the X direction. The N first electrodes 142 include three groups of electrodes, namely the first group of electrodes, the second group of electrodes, and the third group of electrodes. The first group of electrodes includes i first electrodes 142, the second group of electrodes includes j electrodes 142, and the third group of electrodes includes k first electrodes 142. N, i, j, and k are positive integers greater than 2. Figure 5The circuit board 20 includes conductor layers 2020, 2024, 2028, 2032, and 2036 and dielectric layers 2022, 2026, 2030, and 2034. The conductor layers 2020, 2024, 2028, 2032, and 2036 and the dielectric layers 2022, 2026, 2030, and 2034 are stacked along a vertical direction. The conductor layers 2020 and 2036 are grounded. The dielectric layer 2022 is between the conductor layers 2020 and 2024. The dielectric layer 2026 is between the conductor layers 2024 and 2028. The dielectric layer 2030 is between the conductor layers 2028 and 2032. The dielectric layer 2034 is between the conductor layers 2032 and 2036. The conductor layer 2024 includes a first set of traces and two conductive lines 36. The first set of traces includes i traces 22 that are parallel and equally spaced along a horizontal direction for respectively coupling to the i first electrodes 142 of the first set of electrodes. The horizontal direction is perpendicular to the vertical direction. The first set of traces is parallel to the two conductive lines 36, and the two conductive lines 36 are grounded and are respectively disposed outside the first set of traces to shield the first set of traces from external interference, such as isolating noise or ESD. The conductor layer 2028 includes a second set of traces and two conductive lines 38. The second set of traces includes j traces 22 that are parallel and equally spaced along a horizontal direction for respectively coupling to the j first electrodes 142 of the second set of electrodes. The j traces 22 of the second set of traces are staggered with the i traces 22 of the first set of traces in the upper layer in the vertical direction. The second set of traces is parallel to the two conductive lines 38, and the two conductive lines 38 are grounded and are respectively disposed outside the second set of traces. The two conductive lines 38 are used to shield the second set of traces from external interference, such as isolating noise or ESD. The conductor layer 2032 includes a third set of traces and two conductive lines 40. The third set of traces includes k traces 22 that are parallel and equally spaced along a horizontal direction for respectively coupling to the k first electrodes 142 of the third set of electrodes. The k traces 22 of the third set of traces are staggered with the j traces 22 of the second set of traces in the upper layer in the vertical direction. The traces of the third set of traces are parallel to the two conductive lines 40. The two conductive lines 40 are grounded and are respectively disposed outside the third set of traces. The two conductive lines 40 are used to shield the third set of traces from external interference, such as isolating noise or ESD. The conductor layers 2020 and 2036 are grounded, which helps to isolate interference from the outside to the first set of traces, the second set of traces, and the third set of traces, such as isolating noise or ESD. In one embodiment, Figure 5 the conductor layers 2020 and 2036, the dielectric layers 2022 and 2034, and the two conductive lines 36, the two conductive lines 38, and the two conductive lines 40 can be omitted.
[0024] In Figure 5In an embodiment, the first group of traces, the second group of traces, and the third group of traces altogether include 30 traces W01 to W30 for connecting Figure 2 30 first electrodes 142 arranged in parallel along the X direction in Figure 1 A part of all the traces 22 shown in Figure 2 For example, there are 30 first electrodes 142 arranged in parallel along the X direction in Figure 5 The 30 traces W01 to W30 are sequentially coupled to 30 first electrodes 142. For example, trace W01 is coupled to Figure 2 The first first electrode 142 counted from the left in Figure 2 Trace W02 is coupled to Figure 2 The second first electrode 142 counted from the left in Figure 2 Trace W03 is coupled to
[0025] In Figure 5 The embodiment of Figure 1 is applied to
[0026] Figure 5 An embodiment showing A = 3 is shown. Taking Figure 5Taking the trace W17 in the second group of traces as an example, the trace W17 is coupled to the 17th first electrode 142, and the trace W05 adjacent to the left side of the trace W17 is coupled to the 5th first electrode 142. There are 11 first electrodes between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W05. The trace W29 adjacent to the right side of the trace W17 is coupled to the 29th first electrode 142. There are 11 first electrodes between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W29. The trace W13 adjacent to the upper left of the trace W17 is coupled to the 13th first electrode 142. There are 3 first electrodes between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W13. The trace W21 adjacent to the lower left of the trace W17 is coupled to the 21st first electrode 142. There are 3 first electrodes between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W21. The trace W25 adjacent to the upper right of the trace W17 is coupled to the 25th first electrode 142. There are 7 first electrodes between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W25. The trace W02 adjacent to the lower right of the trace W17 is coupled to the 2nd first electrode 142. There are 14 first electrodes 142 between the first electrode 142 coupled by the trace W17 and the first electrode 142 coupled by the adjacent trace W02. There are at least A = 3 first electrodes 142 between the first electrode 142 coupled by the trace W17 and the first electrodes 142 coupled by the adjacent traces W02, W05, W13, W21, W25 and W29 in the vertical and horizontal directions. When the touch controller 12 takes the sensing amounts of any five adjacent first electrodes 142 for coordinate calculation, the two adjacent traces 22 connected by any two adjacent first electrodes 142 are far enough apart, so there is no shortcoming of the coupling capacitance between adjacent two traces affecting the coordinate calculation. This helps to improve the correctness of the coordinate calculation.
[0027] In one embodiment, the spacing between two adjacent traces 22 in the conductor layer 2024, the conductor layer 2028 and the conductor layer 2032 is S, and the line width of the trace 22 is W. The spacing S is greater than or equal to the line width W of the trace. In one embodiment, S / W≥1.2.
[0028] For the purpose of simplicity, Figure 5 the embodiments only list the trace configurations connecting the multiple first electrodes 142 in the X direction. The trace configurations connecting the multiple second electrodes 144 in the Y direction also follow Figure 5 the rules of the embodiments, and can be arranged Figure 3 above or below the embodiments, or arranged Figure 5 above or below the embodiments, or arranged Figure 5On the left or right side of the embodiment, and as Figure 4 A grounded wire separates the plurality of traces connecting all the first electrodes 142 from the plurality of traces connecting all the second electrodes 144.
[0029] When the active pen is applied to Figure 2 the capacitive touch sensor 14 shown, the active pen emits a signal to the capacitive touch sensor 14, and the touch controller 12 calculates the position of the active pen according to the signals sensed from all the first electrodes 142 and the second electrodes 144 of the capacitive touch sensor 14. By the present invention, the accuracy of detecting the position of the active pen can be improved.
[0030] The above are only embodiments of the present invention and do not impose any formal limitations on the present invention. Although the present invention has been provided above in embodiments, it is not intended to limit the present invention. Any person with ordinary knowledge in any technical field, without departing from the scope of the technical solution of the present invention, may make some changes or modifications to the above-disclosed technical content to obtain equivalent embodiments with equivalent changes. However, as long as it does not depart from the content of the technical solution of the present invention, any simple modification, equivalent change, and modification made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.
Claims
1. A circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor, characterized in that: The capacitive touch sensor includes N first electrodes arranged in sequence along a first direction, and M second electrodes arranged in sequence along a second direction, the first direction is perpendicular to the second direction, N and M are positive integers greater than or equal to 2, and the circuit board includes: A first conductor layer, comprising N first wirings arranged in parallel and equidistantly, wherein the N first wirings are used to couple the N first electrodes respectively; a second conductor layer, comprising M second wirings arranged in parallel and equidistantly, the M second wirings being used to couple the M second electrodes respectively; a third conductor layer, used for grounding, the third conductor layer being located between the first conductor layer and the second conductor layer; a first dielectric layer located between the first conductor layer and the third conductor layer; and A second dielectric layer is located between the second conductor layer and the third conductor layer.
2. The circuit board according to claim 1, characterized in that The distance between two adjacent first routing lines is greater than or equal to the line width of the first routing lines, and the distance between two adjacent second routing lines is greater than or equal to the line width of the second routing lines.
3. The circuit board according to claim 1, characterized in that: Also includes: a fourth conductor layer, located above the first conductor layer and used for grounding; a fifth conductor layer, located below the second conductor layer and used for grounding; a third dielectric layer, located between the first conductor layer and the fourth conductor layer; a fourth dielectric layer, located between the second conductor layer and the fifth conductor layer; Two first wires, located in the first conductor layer and used for grounding, the two first wires are arranged on both sides of the N first routing lines and are parallel to the N first routing lines, and are used for shielding the N first routing lines; as well as Two second conducting wires are located in the second conductor layer and are used for grounding. The two second conducting wires are arranged on both sides of the M second routing wires and are parallel to the M second routing wires, and are used for shielding the M second routing wires.
4. A circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor, characterized in that: The capacitive touch sensor includes N first electrodes arranged in parallel along a first direction, and M second electrodes arranged in parallel along a second direction, the first direction is perpendicular to the second direction, N and M are positive integers greater than or equal to 2, the N first electrodes include a first group of first electrodes and a second group of first electrodes, the M second electrodes include a first group of second electrodes and a second group of second electrodes, and the circuit board includes: A first conductor layer, comprising: A first group of first wirings, comprising a plurality of first wirings arranged in parallel and equidistantly, for respectively coupling a plurality of the first electrodes in the first group of first electrodes; a first group of second wirings, comprising a plurality of second wirings arranged in parallel and equidistantly, for respectively connecting a plurality of the second electrodes in the first group of second electrodes; and a first conductor, located between the first group of first routing wires and the first group of second routing wires, and parallel to the first group of first routing wires and the first group of second routing wires, the first conductor being used for grounding; A second conductor layer, comprising: A second group of first routing lines, comprising a plurality of first routing lines arranged in parallel and equidistantly, for respectively coupling a plurality of the first electrodes in the second group of first electrodes; a second group of second wirings, comprising a plurality of second wirings arranged in parallel and equidistantly, for respectively connecting a plurality of the second electrodes in the second group of second electrodes; and a second conductor, located between the second group of first routing wires and the second group of second routing wires, and parallel to the second group of first routing wires and the second group of second routing wires, the second conductor being used for grounding; a third conductor layer, used for grounding, the third conductor layer being located between the first conductor layer and the second conductor layer; a first dielectric layer located between the first conductor layer and the third conductor layer; and A second dielectric layer is located between the second conductor layer and the third conductor layer.
5. The circuit board according to claim 4, characterized in that: The distance between two adjacent first routing lines is greater than or equal to the line width of the first routing lines, and the distance between two adjacent second routing lines is greater than or equal to the line width of the second routing lines.
6. The circuit board according to claim 4, characterized in that: Also includes: a fourth conductor layer, located above the first conductor layer and used for grounding; a fifth conductor layer, located below the second conductor layer and used for grounding; a third dielectric layer, located between the first conductor layer and the fourth conductor layer; a fourth dielectric layer, located between the second conductor layer and the fifth conductor layer; Two third wires are located in the first conductive layer and are used for grounding. The two third wires are respectively arranged outside the first group of first routing wires and the first group of second routing wires, and are parallel to the first group of first routing wires and the first group of second routing wires, and are used for shielding the first group of first routing wires and the first group of second routing wires; as well as Two fourth wires are located in the second conductive layer and are used for grounding. The two fourth wires are respectively arranged on the outside of the second group of first routing wires and the second group of second routing wires, and are parallel to the second group of first routing wires and the second group of second routing wires, and are used for shielding the second group of first routing wires and the second group of second routing wires.
7. A circuit board for providing a signal transmission path between a touch controller and a capacitive touch sensor, characterized in that: The capacitive touch sensor includes N electrodes arranged in parallel along a first direction, the N electrodes include a first group of electrodes, a second group of electrodes and a third group of electrodes, the first group of electrodes includes i electrodes, the second group of electrodes includes j electrodes, the third group of electrodes includes k electrodes, the touch controller selects 2A-1 adjacent electrodes for coordinate calculation, wherein A is a positive integer greater than or equal to 1, and N, i, j and k are positive integers greater than 2. The circuit board includes: a first conductor layer, comprising a first set of routing lines, the first set of routing lines comprising i routing lines arranged in parallel and equidistantly along a second direction, for respectively coupling the i electrodes of the first set of electrodes; a second conductor layer, comprising a second group of routing lines, the second group of routing lines comprising j routing lines arranged in parallel and equidistantly along the second direction, for respectively coupling the j electrodes of the second group of electrodes, the i routing lines and the j routing lines being arranged alternately in a third direction; a third conductor layer, comprising a third group of routing lines, the third group of routing lines comprising k routing lines arranged in parallel and equidistantly along the second direction, for respectively coupling the k electrodes of the third group of electrodes, the j routing lines being staggered with the k routing lines in the third direction; a first dielectric layer located between the first conductor layer and the second conductor layer; and a second dielectric layer, located between the second conductor layer and the third conductor layer; Among them, the first conductor layer, the first dielectric layer, the second conductor layer, the second dielectric layer and the third conductor layer are stacked in the third direction, and there are at least A electrodes between the electrode coupled to each of the routing lines and the electrode coupled to the adjacent routing lines in the second direction and the third direction, and the second direction is perpendicular to the third direction.
8. The circuit board according to claim 7, characterized in that: A distance between two adjacent routing lines of the first group of routing lines, the second group of routing lines or the third group of routing lines is greater than or equal to a line width of the routing line.
9. The circuit board according to claim 7, characterized in that: Also includes: a fourth conductor layer, located above the first conductor layer and used for grounding; a fifth conductor layer, located below the third conductor layer and used for grounding; a third dielectric layer, located between the first conductor layer and the fourth conductor layer; a fourth dielectric layer, located between the third conductor layer and the fifth conductor layer; Two first conducting wires are located in the first conductive layer and are used for grounding. The two first conducting wires are respectively arranged outside the first group of wirings and are parallel to the first group of wirings, and are used for shielding the first group of wirings. as well as Two second wires are located in the second conductive layer and are used for grounding. The two second wires are respectively arranged outside the second group of wires and are parallel to the second group of wires to shield the second group of wires; and Two third conducting wires are located in the third conductive layer and are used for grounding. The two third conducting wires are respectively arranged outside the third group of wirings and are parallel to the third group of wirings, and are used for shielding the third group of wirings.