Signal processing device, signal processing method, chip and household appliance

Abstract

The invention discloses a signal processing device, a signal processing method, a chip and a household appliance, the device comprises a data detection unit, a single-wire protocol conversion unit, a double-wire data interface, a single-wire communication interface and a double-wire communication interface, the single-wire communication interface multiplexes a data signal port or a clock signal port in the double-wire communication interface, and the single-wire protocol conversion unit is connected with the single-wire communication interface; the data detection unit is connected with the single-wire communication interface and is used for detecting interface connection data sent by the external equipment through the single-wire communication interface when communication connection is established between the external equipment and the signal processing device; and based on the detected interface connection data, the double-wire data interface is selected to be directly communicated with the double-wire communication interface or communicated with the single-wire communication interface through the single-wire protocol conversion unit. Therefore, single-wire communication or double-wire communication can be realized through the same signal processing device, and the signal processing device can be suitable for different chip packaging to meet different requirements.

Description

Technical Field

[0001] This application relates to the technical field of data transmission, and in particular, to a signal processing device, a signal processing method, a chip, and a household electrical appliance device. Background Art

[0002] For recognizable fully synchronous data transmission, at least two signal lines are required, which are respectively used to transmit data signals and clock signals. For example, the Serial Wire Debug (SWD) owned by ARM Corporation. This implementation method is simple and provides a reliable communication interface for the application debugging and programming of a Micro Controller Unit (MCU). Nevertheless, two-wire transmission may cause waste in some applications, especially when the MCU chip has a very limited number of input / output pins.

[0003] In the related art, a signal conversion controller is used to convert a synchronous two-wire communication interface into an asynchronous single-wire communication interface, but this method is not applicable to the encapsulation of the two-wire communication interface. Summary of the Invention

[0004] This application aims to at least solve one of the technical problems in the related art to some extent. To this end, the first object of this application is to propose a signal processing device, which can implement single-wire communication or two-wire communication through the same signal processing device, can be applicable to different chip packages, and meet different requirements.

[0005] The second object of this application is to propose a chip.

[0006] The third object of this application is to propose a household electrical appliance device.

[0007] The fourth object of this application is to propose a signal processing method.

[0008] To achieve the above object, an embodiment of the first aspect of this application proposes a signal processing device, which includes: a data detection unit, a single-wire protocol conversion unit, a two-wire data interface, a single-wire communication interface, and a two-wire communication interface. The single-wire communication interface multiplexes the data signal port or the clock signal port in the two-wire communication interface. Among them, the data detection unit is connected to the single-wire communication interface, and is used to detect the interface connection data sent by the external device through the single-wire communication interface when the external device establishes a communication connection with the signal processing device, and based on the detected interface connection data, select to directly connect the two-wire data interface to the two-wire communication interface or connect to the single-wire communication interface through the single-wire protocol conversion unit.

[0009] According to the signal processing device of the embodiment of the present application, when an external device establishes a communication connection with the signal processing device, the data detection unit detects the interface connection data sent by the external device through the single-wire communication interface, and based on the detected interface connection data, selects a dual-line data interface to be directly connected to the dual-line communication interface or connected to the single-wire communication interface through the single-wire protocol conversion unit. In this way, by the data detection unit selecting dual-line communication or single-wire communication based on the detected interface connection data sent by the external device, dual-line communication or single-wire communication can be realized through the same signal processing device, which can be applied to different chip packages, such as dual-line communication interface packages or single-wire communication interface packages, to meet different requirements.

[0010] In some embodiments, the data detection unit is specifically configured to: when correct interface connection data is detected, output a first selection signal to enable the dual-line data interface to be connected to the single-wire communication interface through the single-wire protocol conversion unit; when incorrect interface connection data is detected, output a second selection signal to enable the dual-line data interface to be directly connected to the dual-line communication interface.

[0011] In some embodiments, the device further includes: a first selection unit, the first selection unit is respectively connected to the single-wire communication interface, the single-wire protocol conversion unit, and the data detection unit; a second selection unit, the second selection unit is respectively connected to the data signal port in the dual-line communication interface, the single-wire protocol conversion unit, the dual-line data interface, and the data detection unit; a third selection unit, the third selection unit is respectively connected to the clock signal port in the dual-line communication interface, the single-wire protocol conversion unit, the dual-line data interface, and the data detection unit; wherein, when the data detection unit outputs the first selection signal, the first selection paths of the first selection unit, the second selection unit, and the third selection unit are turned on, so that the dual-line data interface is connected to the single-wire communication interface through the single-wire protocol conversion unit; when the data detection unit outputs the second selection signal, the second selection paths of the first selection unit, the second selection unit, and the third selection unit are turned on, so that the dual-line data interface is directly connected to the dual-line communication interface.

[0012] In some embodiments, the data detection unit is specifically configured to: detect the pulse sequence on the single-wire communication interface to detect the interface connection data sent by the external device, wherein the pulse sequence includes at least one first pulse and at least one second pulse, the pulse lengths of the first pulse and the second pulse are different, and there is a pulse interval between two adjacent pulses.

[0013] In some embodiments, the data detection unit is further configured to: stop detecting the interface connection data sent by the external device through the single-wire communication interface after the communication connection is established.

[0014] In some embodiments, the interface connection data is further used to indicate the default single-wire communication baud rate of the single-wire protocol conversion unit.

[0015] In some embodiments, the apparatus further includes: a baud rate register. When the dual-line data interface is connected to the single-line communication interface through the single-line protocol conversion unit, the data detection unit is further configured to: write the single-line communication baud rate corresponding to the interface connection data into the baud rate register to set the default single-line communication baud rate of the single-line protocol conversion unit.

[0016] In some embodiments, the apparatus further includes: a baud rate register. When the dual-line data interface is connected to the single-line communication interface through the single-line protocol conversion unit, the single-line protocol conversion unit is configured to: receive the baud rate setting information sent by an external device and send the baud rate setting information to the dual-line data interface; the dual-line data interface is configured to: write the baud rate setting information into the baud rate register to set the single-line communication baud rate of the single-line protocol conversion unit.

[0017] In some embodiments, the apparatus further includes: a data bus. The dual-line data interface is specifically configured to: write the baud rate setting information into the baud rate register through the data bus, where the baud rate register is an address space of the data bus.

[0018] In some embodiments, when the dual-line data interface is connected to the single-line communication interface through the single-line protocol conversion unit, the data detection unit is further configured to: after stopping detecting the interface connection data sent by the external device through the single-line communication interface, start detecting the interface connection data sent by the external device through the single-line communication interface based on the interface reconnection signal sent by the external device.

[0019] In some embodiments, the interface reconnection signal is a reference level pulse whose pulse length exceeds a preset length.

[0020] To achieve the above object, an embodiment of the second aspect of the present application provides a chip, including the foregoing signal processing apparatus.

[0021] According to the chip of the embodiments of the present application, through the foregoing signal processing apparatus, during packaging, the packaging of the single-line communication interface can be realized, that is, there is an input / output pin corresponding on the chip, thereby reducing the number of occupied input / output pins of the chip; the packaging of the dual-line communication interface can also be realized, that is, there are two input / output pins corresponding on the chip to meet different requirements.

[0022] To achieve the above object, an embodiment of the third aspect of the present application provides a home appliance device, including the foregoing signal processing apparatus, or the foregoing chip.

[0023] According to the home appliance device of the embodiments of the present application, through the foregoing signal processing apparatus or chip, different requirements can be met.

[0024] To achieve the above object, an embodiment of the fourth aspect of the present application proposes a signal processing method, which is applied to a signal processing device. The signal processing device includes a dual-line data interface, a dual-line communication interface, a single-line communication interface, and a single-line protocol conversion unit, and the single-line communication interface multiplexes the data signal port or the clock signal port in the dual-line communication interface. The method includes: when an external device establishes a communication connection with the signal processing device, detecting interface connection data sent by the external device through the single-line communication interface; based on the detected interface connection data, selecting to directly connect the dual-line data interface to the dual-line communication interface or to connect to the single-line communication interface through the single-line protocol conversion unit.

[0025] According to the signal processing method of the embodiment of the present application, when an external device establishes a communication connection with the signal processing device, the data detection unit detects the interface connection data sent by the external device through the single-line communication interface, and based on the detected interface connection data, selects to directly connect the dual-line data interface to the dual-line communication interface or to connect to the single-line communication interface through the single-line protocol conversion unit. In this way, by the data detection unit selecting dual-line communication or single-line communication based on the detected interface connection data sent by the external device, dual-line communication or single-line communication can be realized through the same signal processing device, which can be applied to different chip packages, such as dual-line communication interface packages or single-line communication interface packages, to meet different requirements. Description of the Drawings

[0026] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The schematic embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation of the present application. In the drawings:

[0027] Figure 1 is a schematic diagram of a signal processing device according to an embodiment of the present application;

[0028] Figure 2 is a schematic diagram of a signal processing device according to another embodiment of the present application;

[0029] Figure 3 is a schematic diagram of a first positive pulse and a second positive pulse according to an embodiment of the present application;

[0030] Figure 4 is a schematic diagram of having a pulse interval between two adjacent positive pulses according to an embodiment of the present application;

[0031] Figure 5 is a schematic diagram of a positive pulse sequence according to an embodiment of the present application;

[0032] Figure 6 is a schematic diagram of setting a default single-line communication baud rate according to an embodiment of the present application;

[0033] Figure 7 It is a schematic diagram of setting the single - wire communication baud rate provided according to an embodiment of the present application;

[0034] Figure 8 It is a schematic diagram of the single - wire reconnection operation provided according to an embodiment of the present application;

[0035] Figure 9 It is a flowchart of the signal processing method provided according to an embodiment of the present application. Detailed implementation manners

[0036] It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the drawings and in combination with the embodiments.

[0037] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0038] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above - mentioned drawings are used to distinguish similar objects, and do not necessarily need to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so as to describe the embodiments of the present application here. In addition, the terms "including" and "having" and any variations thereof are intended to cover non - exclusive inclusion. For example, a process, method, system, product or device including a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these process, method, product or device.

[0039] According to an embodiment of the present application, a signal processing device is provided.

[0040] Figure 1 It is a schematic structural diagram of the signal processing device according to an embodiment of the present application.

[0041] Such as Figure 1As shown in the figure, the signal processing device 100 includes: a data detection unit 101, a single-wire protocol conversion unit 102, a two-wire data interface 103, a single-wire communication interface SW, and a two-wire communication interface. The two-wire communication interface includes a data signal port SWDIO and a clock signal port SWDCLK, and the single-wire communication interface SW multiplexes the data signal port SWDIO or the clock signal port SWDCLK in the two-wire communication interface (it should be noted that Figure 1 the case of multiplexing the data signal port SWDIO is given as an example. When multiplexing the clock signal port SWDCLK, Figure 1 the SWDCLK and SWDIO in it can be interchanged; in addition, for the sake of simplicity of description, the following examples will all be described by taking the multiplexing of the data signal port SWDIO as an example).

[0042] Among them, the data detection unit 101 is connected to the single-wire communication interface SW, and is used for detecting the interface connection data sent by the external device through the single-wire communication interface SW when the external device establishes a communication connection with the signal processing device 100, and selecting the two-wire data interface 103 to be directly connected to the two-wire communication interface (including the data signal port SWDIO and the clock signal port SWDCLK) or connected to the single-wire communication interface SW through the single-wire protocol conversion unit 102 based on the detected interface connection data.

[0043] Specifically, to realize the information interaction between the external device and the signal processing device 100, it is first necessary to establish a communication interface between the external device and the signal processing device 100. By default, the external device is the master device and the signal processing device 100 is the slave device. When the communication interface is established, the external device transmits the interface connection data to the signal processing device 100 through the single-wire communication interface SW. At the same time, the data detection unit 101 detects the interface connection data on the single-wire communication interface SW, and selects the two-wire data interface 103 to be directly connected to the two-wire communication interface or connected to the single-wire communication interface SW through the single-wire protocol conversion unit 102 based on the detection result.

[0044] Exemplarily, when an external device is connected to the single-wire communication interface SW of the signal processing device 100, that is, when the external device expects to communicate with the signal processing device 100 through the single-wire communication method, the external device will send interface connection data to the signal processing device 100 through the single-wire communication interface SW by using the single-wire communication method. At the same time, the data detection unit 101 detects the interface connection data on the single-wire communication interface SW. Since the external device uses the single-wire communication method, the data detection unit 101 will detect the correct interface connection data. At this time, the dual-line data interface 103 is selected to be connected to the single-wire communication interface SW through the single-wire protocol conversion unit 102. For example, the dual-line pins of the dual-line data interface 103 are connected to the dual-line pins SWDIO0 and SWDCLK0 of the single-wire protocol conversion unit 102, and the single-wire pin of the single-wire protocol conversion unit 102 is connected to the single-wire communication interface SW, thereby realizing the establishment of the single-wire communication interface.

[0045] When an external device is connected to the dual-line communication interface of the signal processing device 100, that is, when the external device expects to communicate with the signal processing device 100 through the dual-line communication method, the external device will send interface connection data to the signal processing device 100 through the dual-line communication interface (including the single-wire communication interface SW) by using the dual-line communication method. At the same time, the data detection unit 101 detects the interface connection data on the single-wire communication interface SW. Since the external device uses the dual-line communication method, the data detection unit 101 will not be able to detect the correct interface connection data. At this time, the dual-line data interface 103 is selected to be directly connected to the dual-line communication interface. For example, the dual-line pins of the dual-line data interface 103 are directly connected to the data signal port SWDIO and the clock signal port SWDCLK of the dual-line communication interface, thereby realizing the establishment of the dual-line communication interface.

[0046] In the above example, the set data detection unit 101 can only detect the interface connection data transmitted through the single-wire communication method. Therefore, when the correct interface connection data is detected, the single-wire communication method is selected, and when the correct interface connection data is not detected, the dual-line communication method is selected. In other examples, the data detection unit 101 can not only detect the interface connection data transmitted through the single-wire communication method, but also detect the interface connection data transmitted through the dual-line communication method. At this time, different communication methods correspond to different interface connection data, and the data detection unit 101 can select the corresponding communication connection method based on the detection result. In this way, the establishment of the communication interface can also be realized. However, compared with the former method, this method increases the difficulty in the design of the data detection unit 101. Therefore, the former method is preferred, but there is no limit on which method to specifically select.

[0047] In the above embodiments, single - line communication or double - line communication can be achieved through the same signal processing device, which can be applied to different chip packages. For example, when the input and output pins of the chip are limited, single - line communication interface packaging can be performed, that is, one input and output pin corresponds to the chip. When the input and output pins of the chip are not restricted, double - line communication interface packaging can be performed, that is, two input and output pins correspond to the chip. In this way, it can be applied to different chip packages to meet different requirements.

[0048] In some embodiments, the data detection unit 101 is specifically configured to: when correct interface connection data is detected, output a first selection signal to enable the double - line data interface 103 to communicate with the single - line communication interface SW through the single - line protocol conversion unit 102; when incorrect interface connection data is detected, output a second selection signal to enable the double - line data interface 103 to directly communicate with the double - line communication interface.

[0049] Specifically, when designing the data detection unit 101, it can be made to only detect the interface connection data transmitted through the single - line communication method. At this time, when an external device is connected to the single - line communication interface SW of the signal processing device 100 and uses the single - line communication method to send interface connection data to the signal processing device 100, the data detection unit 101 will be able to detect the correct interface connection data. At this time, the data detection unit 101 outputs a first selection signal. Based on this first selection signal, the double - line data interface 103 is selected to communicate with the single - line communication interface SW through the single - line protocol conversion unit 102; when an external device is connected to the double - line communication interface of the signal processing device 100 and uses the double - line communication method to send interface connection data to the signal processing device 100, the data detection unit 101 will not be able to detect the correct interface connection data. At this time, the data detection unit 101 outputs a second selection signal. Based on this second selection signal, the double - line data interface 103 is selected to directly communicate with the double - line communication interface.

[0050] It should be noted that in some embodiments, by default, the double - line data interface 103 is directly connected to the double - line communication interface. Correspondingly, the data detection unit 101 outputs a second selection signal by default. When establishing a communication interface, if the data detection unit 101 can detect the correct interface connection data, the data detection unit 101 will switch the second selection signal to the first selection signal to enable the double - line data interface 103 to communicate with the single - line communication interface SW through the single - line protocol conversion unit 102; if the data detection unit 101 cannot detect the correct interface connection data, the data detection unit 101 will keep the second selection signal unchanged to enable the double - line data interface 103 to remain connected to the double - line communication interface.

[0051] In the above example, the first selection signal and the second selection signal can be high and low level signals.

[0052] In this way, the data detection unit detects the interface connection data, and based on the detection result, the corresponding communication method can be simply and accurately selected to establish the communication interface.

[0053] In some embodiments, referring to Figure 2 , the signal processing device 100 further includes: a first selection unit 104, a second selection unit 105, and a third selection unit 106. The first selection unit 104 is respectively connected to the single-wire communication interface SW, the single-wire protocol conversion unit 102, and the data detection unit 101; the second selection unit 105 is respectively connected to the data signal port SWDIO in the two-wire communication interface, the single-wire protocol conversion unit 102, the two-wire data interface 103, and the data detection unit 101; the third selection unit 106 is respectively connected to the clock signal port SWDCLK in the two-wire communication interface, the single-wire protocol conversion unit 102, the two-wire data interface 103, and the data detection unit 101. Among them, when the data detection unit 101 outputs a first selection signal, the first selection paths of the first selection unit 104, the second selection unit 105, and the third selection unit 106 are turned on, so that the two-wire data interface 103 is connected to the single-wire communication interface SW through the single-wire protocol conversion unit 102; when the data detection unit 101 outputs a second selection signal, the second selection paths of the first selection unit 104, the second selection unit 105, and the third selection unit 106 are turned on, so that the two-wire data interface 103 is directly connected to the two-wire communication interface.

[0054] Specifically, the first selection unit 104, the second selection unit 105, and the third selection unit 106 may be single-pole double-throw switches, and specific limitations are not made here.

[0055] Referring to Figure 2 , when the data detection unit 101 detects correct interface connection data, it will output a first selection signal K1. At this time, the first selection paths of the first selection unit 104, the second selection unit 105, and the third selection unit 106 are turned on, that is, the paths represented by "1" in each selection unit are turned on. At this time, the two-wire pins of the two-wire data interface 103 are correspondingly connected to the two-wire pins SWDIO0 and SWDCLK0 of the single-wire protocol conversion unit 102 through the second selection unit 105 and the third selection unit 106, and the single-wire pin of the single-wire protocol conversion unit 102 is connected to the single-wire communication interface SW through the first selection unit 104.

[0056] When the data detection unit 101 fails to detect the correct interface connection data and by default, a second selection signal is output. At this time, the second selection paths of the first selection unit 104, the second selection unit 105, and the third selection unit 106 are turned on, that is, the paths represented by "0" in each selection unit are turned on. At this time, the dual-line pins of the dual-line data interface 103 are correspondingly connected and communicated with the data signal port SWDIO and the clock signal port SWDCLK in the dual-line communication interface through the second selection unit 105 and the third selection unit 106.

[0057] In this way, the connection of the communication interface can be realized through three selection switches.

[0058] In some embodiments, the data detection unit 101 is specifically configured to: detect the pulse sequence on the single-line communication interface SW to detect the interface connection data sent by an external device, where the pulse sequence includes at least one first pulse and at least one second pulse, the pulse lengths of the first pulse and the second pulse are different, and there is a pulse interval between two adjacent pulses.

[0059] Specifically, the interface connection data can be a signal sequence, such as a pulse sequence, and can specifically be a positive pulse sequence or a negative pulse sequence. The pulse sequence includes at least one first pulse and at least one second pulse, and the pulse lengths of the first pulse and the second pulse are different to represent different signals through pulses of different lengths. For example, the first pulse represents the signal "0", and the second pulse represents the signal "1". At the same time, there is a pulse interval between two adjacent pulses to correctly distinguish each pulse.

[0060] Exemplarily, taking the positive pulse sequence as an example, the positive pulse sequence includes at least one first positive pulse and at least one second positive pulse. Refer to Figure 3 , the first positive pulse can be set as a short pulse for representing the signal "0", and its pulse length can be 60 - 90 us; the second positive pulse is set as a long pulse for representing the signal "1", and its pulse length is greater than 120 us. Refer to Figure 4 , the pulse interval between two adjacent positive pulses is greater than 240 us. Refer to Figure 5 , the entire positive pulse sequence can include 16 positive pulses, that is, the interface connection data is composed of 16 - bit binary numbers. And when the external device sends the interface connection data to the single-line communication interface SW, it is sent in the order from high to low, that is, the 15th bit (i.e., the 15th positive pulse) is sent first, then the 14th bit (i.e., the 14th positive pulse),..., and so on until the 0th bit (i.e., the 0th positive pulse) is sent.

[0061] It should be noted that after the signal processing device 100 is powered on, any pulse detected by the data detection unit 101 will be regarded as interface connection data sent by an external device. The data detection unit 101 will sample the pulse using the internal clock of the signal processing device 100. Therefore, in this case, after the signal processing device 100 is powered on, the single-wire communication interface SW should be stable at a high level or a low level to avoid erroneously triggering the data detection unit 101 to detect interface connection data. Additionally, after the interface connection data is sent, a delay hold time will be inserted, and then the single-wire communication interface SW is controlled to remain at a high level. Exemplarily, referring to Figure 5 , before sending the 15th bit (i.e., the 15th positive pulse), the single-wire communication interface SW remains in a stable state. After sending the 0th bit (i.e., the 0th positive pulse), a delay hold time is inserted, and then the single-wire communication interface SW is in a pulled-up state.

[0062] When the interface connection data is a pulse sequence, the corresponding data detection unit 101 is a pulse detection circuit. The pulse sequence can be a low-frequency pulse sequence, which is beneficial for implementing single-wire communication or two-wire communication of the same signal processing device using a simple interface multiplexing method. The reason is that the data signal ports of the single-wire communication interface SW and the two-wire communication interface are shared. When using the two-wire communication method (i.e., the two-wire communication protocol), the communication signal transmission rate on the data line corresponding to the data signal port is relatively fast, which will cause the data detection unit 101 to detect failure, thus prohibiting the use of single-wire communication and allowing the use of two-wire communication.

[0063] It should be noted that using a low-frequency pulse sequence can relax the requirements for timing, which allows the data detection unit 101 to sample using a low-precision and low-cost resistor-capacitor clock source.

[0064] In this way, by setting the interface connection data as a pulse sequence, the pulse detection circuit can simply and accurately identify the corresponding communication method to establish the communication interface.

[0065] In some embodiments, the data detection unit 101 is further configured to: stop detecting the interface connection data sent by the external device through the single-wire communication interface SW after the communication connection is established.

[0066] Specifically, after the data detection unit 101 detects the interface connection data, regardless of whether the single-wire communication method or the two-wire communication method is selected subsequently, the detection is stopped.

[0067] Exemplarily, after the data detection unit 101 detects a 16-bit positive pulse sequence, regardless of whether the single-wire communication method or the two-wire communication method is selected subsequently, the detection is stopped.

[0068] In this way, the implementation method is simplified, and unnecessary switching between the two communication methods is avoided.

[0069] In some embodiments, the interface connection data is further used to indicate the default single-wire communication baud rate of the single-wire protocol conversion unit 102.

[0070] Specifically, when the single-wire communication method is adopted, since the asynchronous communication protocol (UART protocol) is used, the external device still needs to agree with the signal processing device 100 on a transmission rate, that is, the single-wire communication baud rate. For example, one or more interface connection data can be set, and different interface connection data corresponds to different transmission rates. As shown in Table 1, two interface connection data can be set, namely 0xa6c5 and 0xa63a, where the transmission rate corresponding to 0xa6c5 is 1MHz, and the transmission rate corresponding to 0xa63a is 115200Hz.

[0071] Table 1

[0072] Interface connection data Mode 0xa6c5 Normal mode, baud rate is 1M 0xa63a Low-speed mode, baud rate is 115200

[0073] It can be understood that the above transmission rate represents the transmission rate of single-wire communication (UART), and a single-wire data frame (UART frame) is used to encode a two-wire data bit. Since 10 single-wire bits are required to send the single-wire data frame, the actual transmission rate of the encapsulated two-wire communication is 1 / 10 of the single-wire communication baud rate, that is, 100kbps. This relatively low transmission rate is beneficial in the initial stage of communication establishment and can improve the convenience of connection. In addition, in the case of a lower data transmission rate, the interface connection data 0xa63a can be sent to set the single-wire communication transmission rate to 115200, which is a very standard transmission rate and is easier to be supported by many devices. There is no limit on which transmission rate to choose specifically.

[0074] It should be noted that 0xa63a and 0xa6c5 are selected as the interface connection data because these data have balanced numbers of "1" and "0".

[0075] In this way, by reasonably setting the interface connection data, not only can the selection of the communication method be realized, but also the default transmission rate can be selected.

[0076] In some embodiments, referring to Figure 6 , the signal processing device 100 further includes: a baud rate register 107. When the two-wire data interface 103 is connected to the single-wire communication interface SW through the single-wire protocol conversion unit 102, the data detection unit 101 is further configured to: write the single-wire communication baud rate corresponding to the interface connection data into the baud rate register 107 to set the default single-wire communication baud rate of the single-wire protocol conversion unit 102.

[0077] Exemplarily, when the data detection unit 101 detects correct interface connection data, it will output a first selection signal K1, so that the dual-line data interface 103 is connected to the single-line communication interface SW through the single-line protocol conversion unit 102. At the same time, the baud rate register 107 in the signal processing device 100 is configured through the corresponding interface to set the default single-line communication baud rate of the single-line protocol conversion unit 102. For example, the value corresponding to the interface connection data 0xa6c5 is written into the baud rate register 107 to set the default single-line communication baud rate of the single-line protocol conversion unit 102 to 1 MHz.

[0078] In this way, through the data detection unit, based on the received interface connection data, not only can the communication mode be selected, but also the default transmission rate can be selected.

[0079] In some embodiments, referring to Figure 7 , when the dual-line data interface 103 is connected to the single-line communication interface SW through the single-line protocol conversion unit 102, the single-line protocol conversion unit 102 is used to: receive the baud rate setting information sent by the external device and send the baud rate setting information to the dual-line data interface 103; the dual-line data interface 103 is used to: write the baud rate setting information into the baud rate register 107 to set the single-line communication baud rate of the single-line protocol conversion unit 102.

[0080] Specifically, since the interface connection data is designed with a slower default data transmission rate for simplicity of connection, after establishing a single-line communication connection, the transmission rate can be set according to actual needs. Exemplarily, when the dual-line data interface 103 is an SWD debugging interface and the signal processing device 100 is encapsulated into the MCU, in order to obtain a better MCU debugging environment and higher programming performance, it is necessary to switch to a higher transmission rate. At this time, the baud rate setting information can be sent by the external device to set the single-line communication baud rate, that is, to set the transmission rate. In this way, the management of the transmission rate can be realized.

[0081] Exemplarily, the external device can switch to a higher transmission rate by writing to the baud rate register 107 that controls the single-line communication. When writing, it is completed by using the dual-line data interface 103.

[0082] Specifically, the external device sends the baud rate setting information to the single-wire protocol conversion unit 102 through the single-wire communication interface SW. The single-wire protocol conversion unit 102 converts the baud rate setting information into dual-wire communication data and sends it to the dual-wire data interface 103. The dual-wire data interface 103 determines the baud rate setting information based on the received dual-wire communication data and writes it into the baud rate register 107 to set the single-wire communication baud rate of the single-wire protocol conversion unit 102.

[0083] Exemplarily, when the dual-wire data interface 103 is an SWD debug interface, referring to Figure 7 , after establishing a connection and enabling the single-wire communication interface SW, the external device can send a dual-wire data frame (SWD frame) through the single-wire communication interface SW to power on the debug port (DP) of the SWD debug interface. Through the debug port (DP), the external device can send more dual-wire data frames to access the baud rate register 107 through the access port (AP) of the SWD debug interface for setting the single-wire communication baud rate.

[0084] In some embodiments, still referring to Figure 7 , the signal processing device 100 further includes: a data bus 108. The dual-wire data interface 103 is specifically configured to: write the baud rate setting information into the baud rate register 107 through the data bus 108, where the baud rate register 107 is an address space of the data bus 108.

[0085] That is to say, the baud rate register 107 can be accessed through the data bus 108. Exemplarily, still referring to Figure 7 , the data bus 108 can be an AHB (Advanced High-performance Bus) bus. At this time, an address in the AHB bus space can be allocated to the baud rate register 107, and the baud rate setting information is written into this address through the access port (AP) of the SWD debug interface to implement the setting of the single-wire communication baud rate of the single-wire protocol conversion unit 102. It should be noted that the baud rate register 107 can be included in the AHB bus slave (i.e., the AHB slave module), and this AHB bus slave is used to process the read and write access of the register, thereby reducing the overhead required for designing an additional register access method.

[0086] In this way, by allocating the baud rate register in the address space of the data bus, not only can the setting of the single-wire communication transmission rate be achieved, but also the method is simple.

[0087] In some embodiments, when the dual - line data interface 103 communicates with the single - wire communication interface SW through the single - wire protocol conversion unit 102, the data detection unit 101 is further configured to: after stopping detecting the interface connection data sent by the external device through the single - wire communication interface SW, based on the interface re - connection signal sent by the external device, start detecting the interface connection data sent by the external device through the single - wire communication interface SW.

[0088] Specifically, in some cases, it may be necessary to re - establish the communication interface. For example, after using the single - wire communication method, the external device and the signal processing device 100 may be out of sync. At this time, the communication interface can be re - established. At this time, the external device can send an interface re - connection signal through the single - wire communication interface SW, so that the data detection unit 101 starts to detect the interface connection data sent by the external device through the single - wire communication interface SW.

[0089] In some embodiments, the interface re - connection signal is a reference - level pulse with a pulse length exceeding a preset length.

[0090] Specifically, the re - connection operation is that the external device drives the single - wire communication interface SW to the reference level (referred to as the reference level relative to the foregoing positive level, which can also be called the low level) and maintains it for a period of time, so as to start the data detection unit 101 to detect the interface connection data. This method utilizes the characteristics of the asynchronous communication protocol used in single - wire communication. In the idle state, according to this protocol, the single - wire communication interface SW always remains at the high level, as Figure 8 shown. Then the external device can trigger the data detection unit 101 to start through a reference - level (low - level) pulse with a pulse length exceeding a preset length, such as 8 ms. Then the external device can immediately send the interface connection data. Since the pulse is long enough, any single - wire pulse transmission will not be mis - identified as the trigger for re - connection.

[0091] In this way, the trigger for re - connection can be achieved through a long - pulse signal, which is simple and effective.

[0092] In summary, according to the signal processing device of the embodiments of the present application, when implementing single - wire communication, it includes the establishment of the communication interface, the configuration of the data transmission rate, and the interface re - connection. The implementation method is relatively simple, and some resources are utilized to reduce the design overhead, thereby reducing the cost, and improving the connection stability at a relatively high transmission rate.

[0093] In some embodiments, a chip is further provided, including the foregoing signal processing device 100.

[0094] Specifically, the foregoing signal processing device 100 can be encapsulated to obtain a chip. During encapsulation, the encapsulation of a single-wire communication interface can be achieved, that is, there is a corresponding input / output pin on the chip, thereby reducing the number of occupied input / output pins of the chip; or the encapsulation of a two-wire communication interface can be achieved, that is, there are two corresponding input / output pins on the chip to meet different requirements.

[0095] For the chip according to the embodiment of the present application, through the foregoing signal processing device, during encapsulation, the encapsulation of a single-wire communication interface can be achieved, that is, there is a corresponding input / output pin on the chip, thereby reducing the number of occupied input / output pins of the chip; or the encapsulation of a two-wire communication interface can be achieved, that is, there are two corresponding input / output pins on the chip to meet different requirements.

[0096] In some embodiments, a household electrical appliance device is further provided, including the foregoing signal processing device 100 or the foregoing chip. Among them, the household electrical appliance device includes but is not limited to air-conditioning devices such as air conditioners, air purifiers, and humidifiers, or can be kitchen utensils such as microwave ovens and induction cookers, or can also be multimedia network devices such as routers and televisions. Specifically, there is no limitation here.

[0097] For the household electrical appliance device according to the embodiment of the present application, through the foregoing signal processing device or chip, different requirements can be met.

[0098] In some embodiments, a signal processing method is further provided. Applied to the signal processing device 100 as Figure 1 shown, wherein the signal processing device 100 includes a two-wire data interface 103, a two-wire communication interface, a single-wire communication interface SW, and a single-wire protocol conversion unit 102, and the single-wire communication interface SW multiplexes the data signal port SWDIO in the two-wire communication interface.

[0099] Figure 9 is a schematic flowchart of a signal processing method according to an embodiment of the present application. As Figure 9 shown, the signal processing method includes:

[0100] S1001, when an external device establishes a communication connection with the signal processing device, detect the interface connection data sent by the external device through the single-wire communication interface.

[0101] S1002, based on the detected interface connection data, select a two-wire data interface to be directly connected to the two-wire communication interface or to be connected to the single-wire communication interface through the single-wire protocol conversion unit.

[0102] It should be noted that for other embodiments and technical effects of the signal processing method, please refer to the foregoing embodiments and technical effects of the signal processing device, and details are not described herein again.

[0103] It should be noted that the logic and / or steps represented in the flowchart or described in other ways herein, for example, can be considered as a definite sequence list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch instructions from the instruction execution system, apparatus, or device and execute the instructions), or used in combination with these instruction execution systems, apparatuses, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or other suitable processing as necessary, and then stored in a computer memory.

[0104] It should be understood that various parts of the present invention can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application-specific integrated circuits having suitable combinational logic gate circuits, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.

[0105] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0106] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0107] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention.

Claims

1. A signal processing device, characterized in that, the device includes: a data detection unit, a single-wire protocol conversion unit, a two-wire data interface, a single-wire communication interface, and a two-wire communication interface, wherein the single-wire communication interface multiplexes a data signal port or a clock signal port in the two-wire communication interface, and wherein the data detection unit is connected to the single-wire communication interface and is configured to detect interface connection data sent by the external device through the single-wire communication interface when the external device establishes a communication connection with the signal processing device, and select, based on the detected interface connection data, to directly connect the two-wire data interface to the two-wire communication interface or connect the two-wire data interface to the single-wire communication interface through the single-wire protocol conversion unit.

2. The device according to claim 1, characterized in that, the data detection unit is specifically configured to: when correct interface connection data is detected, output a first selection signal to enable the two-wire data interface to be connected to the single-wire communication interface through the single-wire protocol conversion unit; when incorrect interface connection data is detected, output a second selection signal to enable the two-wire data interface to be directly connected to the two-wire communication interface.

3. The device according to claim 2, characterized in that, the device further includes: a first selection unit, the first selection unit is respectively connected to the single-wire communication interface, the single-wire protocol conversion unit, and the data detection unit; a second selection unit, the second selection unit is respectively connected to a data signal port in the two-wire communication interface, the single-wire protocol conversion unit, the two-wire data interface, and the data detection unit; a third selection unit, the third selection unit is respectively connected to a clock signal port in the two-wire communication interface, the single-wire protocol conversion unit, the two-wire data interface, and the data detection unit; wherein, when the data detection unit outputs the first selection signal, a first selection path of the first selection unit, the second selection unit, and the third selection unit is turned on to enable the two-wire data interface to be connected to the single-wire communication interface through the single-wire protocol conversion unit; when the data detection unit outputs the second selection signal, a second selection path of the first selection unit, the second selection unit, and the third selection unit is turned on to enable the two-wire data interface to be directly connected to the two-wire communication interface.

4. The device according to any one of claims 1-3, characterized in that, the data detection unit is specifically configured to: detect a pulse sequence on the single-wire communication interface to detect the interface connection data sent by the external device, wherein the pulse sequence includes at least one first pulse and at least one second pulse, the pulse lengths of the first pulse and the second pulse are different, and there is a pulse interval between two adjacent pulses.

5. The device according to any one of claims 1-3, characterized in that, the data detection unit is further configured to: stop detecting the interface connection data sent by the external device through the single-wire communication interface after the communication connection is established.

6. The device according to claim 1, characterized in that, The interface connection data is also used to indicate the default single - wire communication baud rate of the single - wire protocol conversion unit.

7. The device according to claim 6, wherein, the device further comprises: a baud rate register. When the dual - wire data interface is connected to the single - wire communication interface through the single - wire protocol conversion unit, the data detection unit is further configured to: write the single - wire communication baud rate corresponding to the interface connection data into the baud rate register to set the default single - wire communication baud rate of the single - wire protocol conversion unit.

8. The device according to claim 1, 6 or 7, wherein, the device further comprises: a baud rate register. When the dual - wire data interface is connected to the single - wire communication interface through the single - wire protocol conversion unit, the single - wire protocol conversion unit is configured to: receive the baud rate setting information sent by the external device and send the baud rate setting information to the dual - wire data interface; the dual - wire data interface is configured to: write the baud rate setting information into the baud rate register to set the single - wire communication baud rate of the single - wire protocol conversion unit.

9. The device according to claim 8, wherein, the device further comprises: a data bus. The dual - wire data interface is specifically configured to: write the baud rate setting information into the baud rate register through the data bus, where the baud rate register is an address space of the data bus.

10. The device according to claim 5, wherein, when the dual - wire data interface is connected to the single - wire communication interface through the single - wire protocol conversion unit, the data detection unit is further configured to: after stopping detecting the interface connection data sent by the external device through the single - wire communication interface, start detecting the interface connection data sent by the external device through the single - wire communication interface based on the interface re - connection signal sent by the external device.

11. The device according to claim 10, wherein, the interface re - connection signal is a reference - level pulse with a pulse length exceeding a preset length.

12. A chip, wherein, comprises the signal processing device according to any one of claims 1 - 11.

13. A household electrical appliance, wherein, comprises the signal processing device according to any one of claims 1 - 11, or the chip according to claim 13.

14. A signal processing method, wherein, applied to a signal processing device, the signal processing device includes a dual - wire data interface, a dual - wire communication interface, a single - wire communication interface and a single - wire protocol conversion unit, and the single - wire communication interface multiplexes the data signal port or the clock signal port in the dual - wire communication interface. The method includes: when an external device establishes a communication connection with the signal processing device, detecting the interface connection data sent by the external device through the single - wire communication interface; selecting to directly connect the dual - wire data interface to the dual - wire communication interface or to connect the dual - wire data interface to the single - wire communication interface through the single - wire protocol conversion unit based on the detected interface connection data.

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