Neural network-based deep learning memristor multi-dimensional performance prediction method

Abstract

The application discloses a kind of deep learning memristor multidimensional performance prediction methods based on neural network, mainly solve the problem of high design threshold, high cost of existing prediction technology, and long development cycle.Solution includes:1) using TCAD to model memristor, by adjusting design parameters simulation to obtain corresponding performance index, build sample set and carry out random division;2) by input, output and hidden layer to build deep learning neural network model;3) using part of sample data to train and verify the model, then input test sample into the trained model, test its prediction accuracy;4) high accuracy neural network model as the final model, obtain the performance prediction result of current memristor.The application quickly predicts the resistance switching behavior of memristor by using the automatic feature extraction and high efficiency calculation ability of neural network, optimizes device design parameters, and speeds up the practical application of memristor in memory and neuromorphic computing fields.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductors, further relates to artificial intelligence and semiconductor device simulation technology, and in particular to a deep learning memristor multi-dimensional performance prediction method based on a neural network, which can be used for optimizing device design parameters, thereby accelerating the practical application of memristors in the fields of memories and neuromorphic computing. BACKGROUND

[0002] Memristor, as the fourth basic circuit element, has attracted widespread attention from academia and industry since its theory was proposed, due to its unique non-volatile storage characteristics and neuromorphic computing potential. The core feature of the memristor is that its resistance value can change according to the charge or current passing through it, and it can maintain this state after power-off, which makes it have great application prospects in the fields of non-volatile memories, neuromorphic computing and reconfigurable logic circuits.

[0003] The performance of the memristor is complexly affected by various factors, including material properties (such as oxygen vacancy concentration, film thickness, etc.), device structure (such as electrode material, interface characteristics, etc.), and external operating conditions (such as voltage amplitude, pulse width, etc.). The interaction between these factors makes the resistance switching behavior of the memristor highly nonlinear and random, thereby bringing great challenges to its performance prediction and optimization.

[0004] Traditional memristor performance prediction methods mainly rely on mathematical models based on physical principles and experimental tests. Physical models usually describe the resistance switching behavior of the memristor by establishing differential equations or statistical models, such as models based on drift-diffusion theory. However, the establishment of these models requires rich professional knowledge, which raises the technical threshold, and these models often need to make a lot of simplifications and assumptions about the physical mechanisms inside the device, making it difficult to fully reflect the complex dynamic behavior in actual devices. In addition, experimental test methods, although they can provide more accurate results, are time-consuming and costly, and are difficult to cover all possible combinations of device parameters and operating conditions. SUMMARY

[0005] The purpose of the present application is to overcome the shortcomings of the prior art and provide a deep learning memristor multi-dimensional performance prediction method based on a neural network, which aims to quickly and accurately predict the device performance changes of the memristor through deep learning technology, optimize the device design parameters, and solve the problems of high technical threshold, high design cost and long development cycle of traditional methods.

[0006] The idea of realizing the present application is: with the rapid development of artificial intelligence technology, especially the successful application of deep learning neural networks in the field of material science and device performance prediction, a new idea is provided for the performance prediction of memristors. Neural networks have strong non-linear fitting ability and automatic feature extraction ability, and can learn the complex mapping relationship between input and output from a large amount of data without explicitly establishing a physical model. Compared with traditional physical models and experimental test methods, the prediction method based on neural networks has higher calculation efficiency and prediction accuracy, which can significantly reduce the cost and time of device design and optimization. Therefore, developing a neural network-based performance prediction method for memristor devices can not only overcome the limitations of traditional methods, but also provide strong technical support for the performance optimization and application of memristors. By using the automatic feature extraction and high-efficiency calculation ability of neural networks, the resistance switching behavior of memristors can be quickly predicted, and the device design parameters can be optimized, thereby accelerating the practical application of memristors in the fields of memory and neuromorphic computing.

[0007] The technical solution for realizing the object of the present application comprises the following steps:

[0008] (1) modeling the memristor using computer-aided design TCAD simulation software, i.e. constructing a simulated memristor, changing the design parameters of the simulated memristor multiple times to obtain performance indicators corresponding to different design parameters; taking each design parameter and its corresponding performance indicator as a sample, and using all samples to form a sample set;

[0009] (2) preprocessing the sample set data and randomly dividing it into a training set, a validation set and a test set according to a certain proportion;

[0010] (3) constructing a deep learning neural network model for performance prediction of the memristor;

[0011] (4) training and validating the constructed deep learning neural network model using the training set and the validation set to obtain a trained neural network model;

[0012] (5) inputting the test set into the trained neural network model to test the accuracy of the prediction;

[0013] (6) taking the high-accuracy neural network model after testing as the final model, inputting the design parameters of the memristor into the model, and obtaining the performance prediction result of the device.

[0014] Compared with the prior art, the present application has the following advantages:

[0015] Firstly, the device performance of the memristor is predicted by using the automatic feature extraction and high-efficiency calculation capability of the neural network, without the need of preparing a large number of devices or modeling and simulating the devices, so that the performance index of the memristor can be quickly and accurately obtained, thereby significantly reducing the cost and time of device design and optimization.

[0016] Secondly, since the end-to-end autonomous learning architecture based on the neural network is adopted, the traditional modular design depending on professional knowledge is converted into a data-driven global optimization problem, so that non-professionals can realize the characteristic modeling of the memristor without depending on the microelectronic professional knowledge, thereby quickly and accurately predicting the key parameters of the device and significantly improving the design efficiency and reliability of the device. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is the implementation flowchart of the method of the present application;

[0018] Figure 2 is a schematic diagram of the neural network structure built in the present application;

[0019] Figure 3 is a schematic diagram of the resistive switching memristor model built in the embodiment of the present application;

[0020] Figure 4 is a schematic diagram of the phase change memristor model built in the embodiment of the present application;

[0021] Figure 5 is a schematic diagram of the ferroelectric memristor model built in the embodiment of the present application. DETAILED DESCRIPTION

[0022] The present application will be further described in detail below in combination with the drawings and embodiments.

[0023] Embodiment one, with reference to Figures 1-2 The deep learning memristor multi-dimensional performance prediction method based on the neural network provided by the present application specifically includes the following steps:

[0024] Step 1) modeling the memristor by using the computer-aided design TCAD simulation software, i.e. constructing a simulation memristor, obtaining the performance index corresponding to different design parameters by changing the design parameters of the simulation memristor for multiple times; taking each design parameter and the corresponding performance index as a group of samples, and using all the samples to constitute a sample set. In the present embodiment, the above-mentioned performance index includes the hysteresis curve, high resistance state resistance and low resistance state resistance of the memristor; other performance indexes of the memristor can also be taken here; the above-mentioned design parameters include electrode thickness d E , oxide layer thickness d O , oxygen vacancy concentration C VOof course, other design parameters that can affect the performance of the memristor can also be used; the number of times of changing the simulation memristor design parameters is not less than 8 times, and the embodiment preferably changes 10 times.

[0025] Step 2) Preprocess the sample set data and randomly divide it into training set, validation set and test set in proportion; the preprocessing operation in this step of the embodiment includes standardizing the input data and normalizing the output data, the formula is as follows:

[0026]

[0027]

[0028] Wherein, Z represents the normalized value, x i is the i-th sample data, λ and σ are the arithmetic mean and standard deviation of the data set respectively; x n represents the normalized value, x max and x min are the maximum and minimum values in the sample respectively.

[0029] Step 3) Refer to Figure 2 , build a deep learning neural network model for predicting the performance of the memristor; here, a neural network with nonlinear fitting ability and automatic feature extraction ability can be used for construction, and the embodiment preferably uses a fully connected neural network to build a deep learning neural network model, which includes an input layer, a hidden layer and an output layer in sequence; the input features of the input layer are variables corresponding to the number of design parameters; the hidden layer is responsible for performing complex feature extraction, so that complex patterns and relationships can be expressed; the number of neurons in the output layer is related to the performance index, and is used to output the predicted performance index. The number of layers of the above-mentioned hidden layer is 3, and the number of neurons in each layer is 128, 64 and 32 in sequence.

[0030] Step 4) Use the training set and the validation set to train and validate the built deep learning neural network model to obtain a trained neural network model, and the specific implementation steps are as follows:

[0031] (4a) Set the error function, optimization method and initial learning rate of the deep learning neural network;

[0032] (4b) Take the design parameters as the network input and the corresponding performance index as the output;

[0033] (4c) Input the training set data into the deep learning neural network, calculate the loss function of each batch of training, and optimize the network parameters by back propagation;

[0034] (4d) After each training cycle, the performance of the model is evaluated using the validation set, the loss value of the validation set is calculated, it is judged whether to stop training in advance, if it is stopped in advance, the model parameters with the minimum validation set loss are saved as the optimal parameters, and a trained neural network model is obtained; otherwise, training is performed according to the preset number of training cycles until the preset number of cycles is reached, and a trained neural network model is obtained. Whether to stop training in advance is specifically judged according to the following manner: if the loss of the validation set remains stable for at least 10 consecutive training cycles, the training is stopped in advance, otherwise, the training process is continued.

[0035] Step 5) inputting the test set into the trained neural network model to verify the accuracy of the prediction;

[0036] Step 6) taking the high-accuracy neural network model after verification as the final model, where the judgment standard for the high-accuracy neural network model is that the model prediction accuracy is greater than 90%; inputting the design parameters of the memristor into the model to obtain the performance prediction result of the device.

[0037] Embodiment Two: Refer to Figure 1 The prediction method proposed in this embodiment implements the steps as a whole, and the implementation process of the present application is further described in detail with respect to each step as follows:

[0038] Firstly, a TCAD is used to construct a simulation model of a memristor. The constructed memristor model can be a resistive switching memristor based on an oxide material, a phase change memristor based on a phase change material, a magnetic resistance memristor based on a magnetic tunnel junction, or a ferroelectric memristor based on a ferroelectric material.

[0039] The design conditions affecting the resistive switching memristor include: the type of oxide material (such as HfO2, Ta2O5, TiO2, etc.) and its doping concentration (including metal doping or non-metal doping), the oxygen vacancy concentration and crystal structure (such as polycrystalline or amorphous state) of the oxide thin film; the selection of upper and lower electrode materials (such as Pt, TiN, Al, etc.), the thickness of the resistive switching layer, and whether there is a selection layer (such as TiO2 or Al2O3); the thin film deposition method (sputtering, ALD, PLD, etc.), the annealing temperature and time, and the preparation environment.

[0040] The design conditions affecting the phase change memristor include: the type of phase change material (such as Ge2Sb2Te5, AgInSbTe, etc.) and its doping concentration (such as metal doping or non-metal doping), the crystallization temperature, melting temperature and thermal conductivity of the material; the selection of upper and lower electrode materials, the thickness of the phase change layer, and whether there is a thermal isolation layer (such as SiO2 or Al2O3); the thin film deposition method (sputtering, evaporation, etc.), the annealing temperature and time, and the preparation environment (such as vacuum or inert gas atmosphere).

[0041] The design conditions affecting the magnetoresistive memristor include: the type of magnetic material (such as Co, Fe, Ni, etc.) and its doping concentration (such as alloying or non-alloying), the magnetic anisotropy of the magnetic material, and the thickness and defect density of the non-magnetic tunnel layer (such as Al2O3 or MgO); the selection of upper and lower electrode materials, the stack structure of the magnetic tunnel junction (such as the number of layers and arrangement of MTJ), and whether there is an insulating layer (such as SiO2 or HfO2); process parameters, such as thin film deposition method (sputtering, ALD, etc.), annealing temperature and time, and preparation environment (such as high vacuum or inert gas atmosphere).

[0042] When using simulation to obtain the performance indicators of the memristor, the corresponding simulation conditions are set according to the required performance indicators, and then the data is processed to obtain the corresponding performance indicators.

[0043] In the second step, the specific operation of pre-processing the sample set is to standardize the input data and normalize the output data; then the simulated I-V data set is divided into 70% training set, 20% validation set and 10% test set.

[0044] In the third step, a fully connected neural network is used to predict the performance of the memristor. The input of the neural network is the design parameter of the memristor, and the output is the performance indicator of the memristor. The neural network model architecture used includes an input layer, a hidden layer and an output layer; the input features of the input layer are preferably 3 variables corresponding to 3 design parameters; the number of layers of the hidden layer is 3, and the number of neurons in each layer is 128, 64 and 32 in turn; the output layer uses 83 neurons corresponding to the data points on the hysteresis curve.

[0045] In the fourth step, during the training process, the Mean Squared Error (MSE) is used as the loss function to measure the difference between the predicted current value and the actual current value in the hysteresis curve; the Adam optimizer is used to update the network parameters, and the learning rate is dynamically adjusted through an exponential decay strategy, with an initial learning rate of 0.010.

[0046] After each training cycle, the performance of the model is evaluated using the validation set, and the loss value of the validation set is calculated. If the loss of the validation set does not significantly decrease for several consecutive cycles, the training is stopped in advance to prevent overfitting. The model parameters with the smallest validation set loss are saved as the final trained model.

[0047] In the fifth step, the test set is used to evaluate the trained model, and the loss value and prediction accuracy of the test set are calculated.

[0048] In the sixth step, the neural network model with the highest prediction accuracy is selected as the final model, and the design parameters of the memristor are input into the model to obtain the performance prediction results of the device.

[0049] Example three: reference Figure 3 The prediction method proposed in this embodiment realizes the same steps as in example one or two. The implementation process of using the prediction method to predict the performance of oxide-based resistive memory is as follows:

[0050] Step one: use TCAD to build a simulation model of the memristor, as shown in Figure 3 ; and change the design parameters of the simulation memristor to obtain a data set.

[0051] A simulation model of the memristor is built using TCAD. The memristor model is composed of an upper electrode, a lower electrode, and a middle TiO2 oxide layer. The top electrode of the memristor is defined as Ag, and the bottom electrode is also defined as Ag.

[0052] It is determined that the design parameters to be changed are the electrode thickness d E , the oxide layer thickness d O , and the oxygen vacancy concentration C VO . By continuously changing the electrode thickness d E , the oxide layer thickness d O , and the oxygen vacancy concentration C VO , the I-V hysteresis curve of the corresponding memristor is simulated. The electrode thickness d E is respectively taken as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, and 100 nm; the oxide layer thickness d O is respectively taken as 2 nm, 4 nm, 6 nm, 8 nm, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, and 30 nm; and the oxygen vacancy concentration C VO is respectively taken as 1×10 18 / cm 3 , 2×10 18 / cm 3 , 3×10 18 / cm 3 , 4×10 18 / cm 3 , 5×10 18 / cm 3 , 6×10 18 / cm 3 , 7×10 18 / cm 3 , 8×10 18 / cm 3 , 9×10 18 / cm 3 , 1×10 19 / cm 3 , and 2×10 19 / cm 3, 3 x 10 19 / cm 3 , 4 x 10 19 / cm 3 , 5 x 10 19 / cm 3 , 6 x 10 19 / cm 3 , 7 x 10 19 / cm 3 , 8 x 10 19 / cm 3 , 9 x 10 19 / cm 3 , 1 x 10 20 / cm 3 ;

[0053] The design parameters are combined to obtain a set of design conditions, such as: electrode thickness d E 10 nm, oxide layer thickness d O 2 nm, oxide layer thickness d O 1 x 10 18 / cm 3 Under each set of design conditions, the TCAD is used to simulate to obtain the corresponding I-V hysteresis curve of the memristor.

[0054] The simulation type uses direct current simulation to obtain the current-voltage curve (i.e. hysteresis curve); the voltage scanning mode is set to scan from 0V to 2V, further from 2V to -2V, and further from -2V to 0V, with a step size of 0.1V, and the obtained hysteresis curve has a total of 83 data points; the batch simulation function of the TCAD software is used to simulate each set of parameter combinations in turn to obtain the corresponding hysteresis curve data.

[0055] The design parameters and the corresponding hysteresis curve data points are taken as a set of samples, and after excluding the simulation failure data, there are 2783 groups of data remaining.

[0056] Step two: Preprocess the collected sample set data, and randomly divide the sample set data into training set, validation set and test set according to the proportion.

[0057] Before preprocessing the sample set, the output hysteresis curve current value in the data set needs to be logarithmically operated with base 10, thereby reducing the difference in orders of magnitude between the data.

[0058] The input data electrode thickness d E , oxide layer thickness d O , and oxygen vacancy concentration C VO are standardized using the standardization formula.

[0059] The output data I-V hysteresis curve is normalized using a normalization formula.

[0060] The data set is randomly divided into a 70% training set, a 20% validation set, and a 10% test set.

[0061] Step three: build a deep learning neural network model suitable for memristor performance prediction, as shown in Figure 5 .

[0062] A fully connected neural network is used to build a deep learning neural network model suitable for memristor performance prediction, which includes an input layer, a hidden layer, and an output layer.

[0063] The electrode thickness d E , the oxide layer thickness d O , and the oxygen vacancy concentration C VO are used as input data for the neural network, corresponding to the 3 neurons in the input layer.

[0064] There are three layers of neurons in the hidden layer, with 128, 64, and 32 neurons respectively, and ReLU activation functions are used after each layer of neurons.

[0065] The output data is the current value of the hysteresis curve, and each sample is an 83-dimensional vector corresponding to the current value at 83 voltage points. The transfer characteristic curve composed of 83 equally spaced points corresponds to the 83 neurons in the output layer.

[0066] Step four: use the training set and validation set to train and validate the deep learning neural network model, and obtain the trained neural network model.

[0067] The Mean Squared Error (MSE) is used as the loss function to measure the difference between the predicted current value and the actual current value. The Adam optimizer is used to update the network parameters, and the learning rate is dynamically adjusted through an exponential decay strategy. The initial learning rate is set to 0.010. The training batch size is set to 32, and the training period is set to 100.

[0068] After each training period, the performance of the model is evaluated using the validation set, and the loss value of the validation set is calculated. If the loss of the validation set does not significantly decrease for several consecutive periods, the training is stopped early to prevent overfitting. The model parameters with the smallest validation set loss are saved as the final trained model.

[0069] Step five: input the test set into the trained neural network model to verify the accuracy of the prediction.

[0070] The trained model is evaluated using the test set, and the loss value and prediction accuracy of the test set are calculated.

[0071] Embodiment four: reference Figure 4 The prediction method proposed in this embodiment realizes the steps as a whole as in Embodiment one or two, and the implementation process of predicting the performance of the phase change memristor based on the present application is given, wherein the upper electrode and the lower electrode use W, the insulating layer uses SiO2, the heater uses TiN, and the phase change material uses Ge2Sb2Te5.

[0072] Step 1: use TCAD to build a memristor simulation model, as shown in Figure 4 ; and change the design parameters of the simulation memristor to obtain a data set.

[0073] A memristor simulation model is built using TCAD. The memristor model is composed of an upper electrode, a lower electrode, an insulating layer, a phase change layer, and a heater. The top electrode of the memristor is defined as W, the bottom electrode is defined as W, the insulating layer is defined as SiO2, the heater is defined as TiN, and the phase change material is defined as Ge2Sb2Te5.

[0074] It is determined that the design parameters to be changed are the thickness of the heater and the insulating layer, the thickness of the phase change layer, and the width of the heater. By continuously changing the thickness of the heater and the insulating layer, the thickness of the phase change layer, and the width of the heater, the corresponding I-V hysteresis curve of the memristor is simulated. The thickness of the heater and the insulating layer is 50nm, 70nm, 90nm, 110nm, 130nm, 150nm, 170nm, 190nm, 210nm, 230nm; the thickness of the phase change layer is 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm; and the width of the heater is 0.1μm, 0.2μm, 0.3μm, 0.4μm, 0.5μm, 0.6μm, 0.7μm, 0.8μm, 0.9μm, 1μm, 1.1μm. O

[0075] A group of design conditions is obtained by combining the design parameters, such as the thickness of the heater and the insulating layer being 50nm, the thickness of the phase change layer being 60nm, and the width of the heater being 0.1μm. Under each group of design conditions, TCAD is used to simulate the I-V hysteresis curve of the corresponding memristor.

[0076] The simulation type is direct current simulation, and the current-voltage curve (i.e. hysteresis curve) is obtained. The voltage scanning mode is set to scan from 0V to 2V, further scan from 2V to -2V, and further scan from -2V to 0V, with a step size of 0.1V. The obtained hysteresis curve has a total of 83 data points. The batch simulation function of the TCAD software is used to simulate each group of parameter combinations in turn to obtain the corresponding hysteresis curve data. ​

[0077] The design parameters and the data points of the corresponding hysteresis curves are taken as a set of samples.

[0078] Step 2: Preprocess the collected sample set data, and randomly divide the sample set data into a training set, a validation set, and a test set in proportion.

[0079] Before preprocessing the sample set, the current values of the output hysteresis curves in the data set need to be subjected to logarithmic operation with base 10, thereby reducing the difference in orders of magnitude between the data.

[0080] The input data heater and insulation layer thickness, phase change layer thickness, and heater width are standardized using a standardization formula.

[0081] The output data I-V hysteresis curve is normalized using a normalization formula.

[0082] The data set is randomly divided into a 70% training set, a 20% validation set, and a 10% test set.

[0083] Step 3: Construct a deep learning neural network model suitable for memristor performance prediction, as shown in Figure 3 .

[0084] A fully connected neural network is used to construct a deep learning neural network model suitable for memristor performance prediction, including an input layer, a hidden layer, and an output layer.

[0085] The heater and insulation layer thickness, phase change layer thickness, and heater width are taken as input data of the neural network, corresponding to 3 neurons of the input layer;

[0086] There are three layers of neurons in the hidden layer, with 128, 64, and 32 neurons respectively, and ReLU activation functions are used after each layer of neurons;

[0087] The output data is the current value of the hysteresis curve, and each sample is an 83-dimensional vector corresponding to the current value of 83 voltage points. The transfer characteristic curve composed of 83 equally spaced points corresponds to 83 neurons of the output layer.

[0088] Step 4: Use the training set and the validation set to train and validate the constructed deep learning neural network model, and obtain the trained neural network model.

[0089] The specific implementation of this step is the same as that of step four of embodiment one.

[0090] Step 5: Input the test set into the trained neural network model to verify the accuracy of its prediction.

[0091] The specific implementation of this step is the same as that of step five of embodiment one.

[0092] Example five: reference Figure 5 The prediction method proposed in this embodiment is implemented in the same way as in Example One or Two. Now the implementation process of predicting the performance of ferroelectric memristor based on the present application is given:

[0093] Step A: Use TCAD to build a memristor simulation model, as shown in Figure 5 ; and change the design parameters of the simulation memristor to obtain a data set.

[0094] A memristor simulation model is built using TCAD. The memristor model is composed of a source, a drain, a channel layer, a ferroelectric layer, a gate, and a substrate. The source and drain are defined as Pt / Ti, the gate is defined as Ni / Au, the channel layer is defined as WSe2, the ferroelectric layer is defined as BaTiO2, and the substrate is defined as SiO2.

[0095] The design parameters to be changed are determined to be the thickness of the ferroelectric layer, the thickness of the channel layer, and the distance between the source and the drain. By continuously changing the thickness of the ferroelectric layer, the thickness of the channel layer, and the distance between the source and the drain, the corresponding I-V hysteresis curve of the memristor is simulated. The thickness of the ferroelectric layer is 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, and 100 nm. The thickness of the channel layer is 2 nm, 4 nm, 6 nm, 8 nm, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm, and 30 nm. The distance between the source and the drain is 2 μm, 2.2 μm, 2.4 μm, 2.6 μm, 2.8 μm, 3 μm, 3.2 μm, 3.4 μm, 3.6 μm, 3.8 μm, and 4 μm.

[0096] A set of design conditions is obtained by combining the design parameters, such as a ferroelectric layer thickness of 10 nm, a channel layer thickness of 2 nm, and a source-drain distance of 2 μm. Under each set of design conditions, TCAD is used to simulate the corresponding I-V hysteresis curve of the memristor.

[0097] The simulation type is direct current simulation, and the current-voltage curve (i.e. hysteresis curve) is obtained. The voltage scanning mode is set to scan from 0 V to 2 V, further from 2 V to -2 V, and further from -2 V to 0 V, with a step size of 0.1 V. The obtained hysteresis curve has a total of 83 data points. The batch simulation function of the TCAD software is used to simulate each set of parameter combinations in turn to obtain the corresponding hysteresis curve data.

[0098] The design parameters and the corresponding hysteresis curve data points are used as a set of samples.

[0099] Step B: Preprocess the collected sample set data, and divide the sample set data into training set, validation set and test set in proportion at random.

[0100] The specific implementation of this step is the same as step two of embodiment one.

[0101] Step C: Construct a deep learning neural network model suitable for memristor performance prediction, as shown in Figure 5 .

[0102] A fully connected neural network is used to construct a deep learning neural network model suitable for memristor performance prediction, including an input layer, a hidden layer and an output layer.

[0103] The thickness of the ferroelectric layer, the thickness of the channel layer, and the distance between the source and the drain are used as input data of the neural network, corresponding to three neurons of the input layer.

[0104] There are three layers of neurons in the hidden layer, with 128, 64 and 32 neurons respectively, and ReLU activation function is used after each layer of neurons.

[0105] The output data is the current value of the hysteresis curve, and each sample is an 83-dimensional vector corresponding to the current value of 83 voltage points. The transfer characteristic curve composed of 83 equally spaced points corresponds to 83 neurons of the output layer.

[0106] Step D: Train and validate the constructed deep learning neural network model using the training set and the validation set, and obtain the trained neural network model.

[0107] The specific implementation of this step is the same as step four of embodiment one.

[0108] Step E: Input the test set into the trained neural network model to verify the accuracy of the prediction.

[0109] The specific implementation of this step is the same as step five of embodiment one.

[0110] The part not described in detail in the present application belongs to the common knowledge of those skilled in the art. The above description is only a few specific examples of the present application and does not constitute any limitation on the present application. Obviously, for those skilled in the art, after understanding the content and principles of the present application, various modifications and changes in form and details can be made without departing from the principles and structures of the present application. For example, the design parameters used in this example include electrode thickness d E , oxide layer thickness d O , and oxygen vacancy concentration C VOIn addition, other design parameters that can affect the performance of the memristor can also be used; the neural network model constructed can be other neural networks with nonlinear fitting capability and automatic feature extraction capability in addition to the fully connected neural network used in this example; and the predicted performance of the memristor can be other performance indicators of the memristor in addition to the hysteresis curve used in this example. However, these modifications and changes based on the inventive concept are still within the protection scope of the claims of the present application.

Claims

1. A neural network-based deep learning memristor multi-dimensional performance prediction method, characterized in that, The method comprises the following steps: (1) modeling the memristor using computer-aided design TCAD simulation software, i.e. constructing a simulation memristor, including: constructing a memristor model composed of an upper electrode, a lower electrode, an insulating layer, a phase change layer, and a heater, defining the top electrode of the memristor as W and the bottom electrode as W, using SiO2 as the insulating layer, using TiN as the heater, and using Ge2Sb2Te5 as the phase change material; or constructing a memristor model composed of a source electrode, a drain electrode, a channel layer, a ferroelectric layer, a gate electrode, and a substrate, defining the source electrode and the drain electrode as Pt / Ti, the gate electrode as Ni / Au, the channel layer as WSe2, the ferroelectric layer as BaTiO2, and the substrate as SiO2; By changing the design parameters of the simulation memristor multiple times, the performance indicators corresponding to different design parameters are obtained; wherein the performance indicators include hysteresis curves, high-resistance state resistances, and low-resistance state resistances; the design parameters include electrode thickness, oxide layer thickness, and oxygen vacancy concentration; each design parameter and its corresponding performance indicator are used as a set of samples, and all samples are used to form a sample set; (2) preprocessing the sample set data and randomly dividing it into a training set, a validation set, and a test set according to a proportion; (3) constructing a deep learning neural network model for predicting the performance of the memristor; the model uses a fully connected neural network; the model architecture includes an input layer, a hidden layer, and an output layer in sequence; the input features of the input layer are a corresponding number of variables of the design parameters; the hidden layer is used to extract complex features; the number of neurons of the output layer is related to the performance indicators and is used to output the predicted performance indicators; (4) training and validating the constructed deep learning neural network model using the training set and the validation set to obtain a trained neural network model; (5) inputting the test set into the trained neural network model to verify the accuracy of the prediction; (6) using the high-accuracy neural network model after verification as the final model, inputting the design parameters of the memristor into the model, and obtaining the performance prediction result of the device.

2. The method of claim 1, wherein: In step (1), the number of times of changing the design parameters of the simulation memristor is not less than 8.

3. The method of claim 1, wherein: In step (2), the sample set data is preprocessed, specifically by standardizing the input data and normalizing the output data.

4. The method of claim 3, wherein: The standardization and normalization formulas are as follows: ， ， wherein, denotes the normalized value, is the th sample data, λ and σ are the arithmetic mean and the standard deviation of the data set, respectively; denotes the normalized value, and are the maximum and minimum values in the sample, respectively.

5. The method of claim 1, wherein: In step (4), the constructed deep learning neural network model is trained and validated, and the specific implementation steps are as follows: (4a) setting the error function, optimization method, and initial learning rate of the deep learning neural network; (4b) inputting the design parameters as the network input and the corresponding performance indicators as the output; (4c) inputting the training set data into the deep learning neural network, calculating the loss function of each batch of training, and optimizing the network parameters using backpropagation. (4d) After each training cycle, the performance of the model is evaluated using the validation set, the loss value of the validation set is calculated, it is judged whether to stop training in advance, if it is stopped in advance, the model parameters with the minimum validation set loss are saved as the optimal parameters, and a trained neural network model is obtained; otherwise, training is performed according to the preset number of training cycles until the preset number of cycles is reached, and a trained neural network model is obtained.

6. The method of claim 5, wherein: In step (4d), whether to stop training in advance is determined according to the following method: if the loss of the validation set remains stable for at least 10 consecutive training cycles, the training is stopped in advance, otherwise, the training process is continued.

7. The method of claim 1, wherein: In step (6), the high-accuracy neural network model is determined according to the criterion that the prediction accuracy of the model is greater than 90%.

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