Pixel circuit and pixel circuit driving method
By introducing the first capacitor and a specific pixel update cycle in the pixel circuit, the problem of the short writing time of the data voltage signal in the high-frequency pixel circuit is solved, and the rapid and complete writing of the data voltage signal is achieved, which significantly improves the light emitting effect of the light emitting device and the display effect of the display device.
Patent Information
- Application Number
- CN202510510886.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-22
- Publication Date
- 2025-06-10
AI Technical Summary
In the fast refresh frequency and high-resolution display of high-frequency pixel circuit, the data voltage signal writing time is too short, which affects the OLED luminous effect and reduces the display effect of the display device.
The first capacitor is introduced into the pixel circuit, and the threshold voltage compensation and data voltage signal writing of the driving module are respectively carried out through the specific designed pixel circuit structure and pixel update period to ensure that the threshold voltage compensation is sufficient and the data voltage signal is fully written.
By introducing the first capacitor and a pixel update cycle of a specific design, the light emitting effect of the light emitting device is significantly improved, ensuring rapid and complete writing of the data voltage signal, and improving the display effect of the display device.
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Figure CN120126419A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of pixel circuits, and particularly to a pixel circuit and a driving method thereof. Background Art
[0002] With the rapid development of display technology, high-frequency pixel circuits have been widely used. Existing high-frequency pixel circuits are usually 7T (i.e., seven switching devices) pixel circuits. The 7T pixel circuit can realize data writing, threshold voltage compensation, and organic light-emitting diode (OLED) light emission control based on a specific circuit structure. The 7T pixel circuit can exhibit good performance in low-frequency display devices or low-resolution display devices, and can effectively drive the OLED to emit light stably to achieve a stable display effect.
[0003] However, with the continuous rapid development of display technology, the current requirements for display devices are getting higher and higher. That is to say, people are pursuing higher-frequency display effects and higher-resolution display effects. As the refresh frequency continues to increase, the data writing time (1h) for each row in the high-frequency pixel circuit will become shorter and shorter, and the data does not have enough time to be written into the high-frequency pixel circuit, resulting in a large potential difference in the high-frequency pixel circuit at different times. Consequently, the light emission effect of the OLED will be affected, and further, the display effect of the display device will be affected. Summary of the Invention
[0004] Based on this, it is necessary to provide a pixel circuit, a driving method of the pixel circuit, a display panel, and a display device, aiming to improve the light emission effect of the light-emitting device.
[0005] In a first aspect, an embodiment of the present application provides a pixel circuit, and the circuit includes:
[0006] A first reset module, a data writing module, a driving module, a threshold compensation module, a voltage stabilizing module, a control module, and a first capacitor;
[0007] A first end of the first reset module is respectively connected to a first end of the data writing module, a first end of the voltage stabilizing module, and a first end of the first capacitor. A first end of the driving module is respectively connected to a second end of the first capacitor, a first end of the threshold compensation module, and a second end of the voltage stabilizing module. A second end of the driving module is respectively connected to a second end of the threshold compensation module and a first end of the control module. A second end of the control module is connected to the positive electrode of the light-emitting device;
[0008] The first reset module is configured to reset the first end of the first capacitor to a voltage value corresponding to a first reference voltage signal in a first stage;
[0009] A voltage stabilization module, configured to reset the voltage of the second end of the first capacitor to the voltage value corresponding to the first reference voltage signal in the first stage;
[0010] A threshold compensation module, configured to provide a compensation voltage signal to the first end of the driving module in the second stage;
[0011] A data writing module, configured to transmit a data voltage signal to the first end of the first capacitor in the third stage;
[0012] A driving module, configured to generate a driving current in the fourth stage; the driving current is determined by the voltage value corresponding to the data voltage signal and the voltage value corresponding to the compensation voltage signal; the first stage, the second stage, the third stage, and the fourth stage belong to different stages of the pixel update cycle of the light-emitting device;
[0013] A control module, configured to operate according to a control voltage signal in the fourth stage, and drive the light-emitting device to operate according to the driving current.
[0014] In a second aspect, an embodiment of the present application further provides a pixel circuit driving method, which is applied to the pixel circuit described in any embodiment of the first aspect of the present application. The method includes:
[0015] In the first stage, through the first reset module and the voltage stabilization module, respectively reset the voltage of the first end of the first capacitor and the voltage of the second end of the first capacitor to the voltage value corresponding to the first reference voltage;
[0016] In the second stage, provide a compensation voltage signal to the first end of the driving module through the threshold compensation module;
[0017] In the third stage, transmit the data voltage signal to the first end of the first capacitor through the data writing module;
[0018] In the fourth stage, transmit the control voltage signal to the control module, so that the control module operates according to the control voltage signal, and drives the light-emitting device to operate according to the driving current generated by the driving module.
[0019] In a third aspect, an embodiment of the present application further provides a display panel, which includes the pixel circuit described in any embodiment of the first aspect of the present application.
[0020] In a fourth aspect, an embodiment of the present application further provides a display device, which includes the display panel described in any embodiment of the third aspect of the present application.
[0021] The pixel circuit, pixel circuit driving method, display panel, and display device provided by the embodiments of the present application. The pixel circuit includes: a first reset module, a data writing module, a driving module, a threshold compensation module, a voltage stabilizing module, a control module, and a first capacitor. The first reset module is configured to reset the first end of the first capacitor to the voltage magnitude corresponding to the first reference voltage signal in the first stage. The voltage stabilizing module is configured to reset the second end of the first capacitor to the voltage magnitude corresponding to the first reference voltage signal in the first stage. The threshold compensation module is configured to provide a compensation voltage signal to the first end of the driving module in the second stage. The data writing module is configured to transmit a data voltage signal to the first end of the first capacitor in the third stage. The driving module is configured to generate a driving current in the fourth stage. The control module is configured to operate according to a control voltage signal in the fourth stage and drive a light-emitting device to operate according to the driving current. By adopting the pixel circuit provided by this embodiment, on the one hand, the introduction of the first capacitor enables the writing operation of the data voltage signal to be completed quickly in a short time. On the other hand, based on the pixel circuit structure with a specific design and in combination with a pixel update period with a specific design, the threshold voltage compensation operation of the driving module and the writing operation of the data voltage signal can be respectively performed in two different stages. Thus, it is ensured that the threshold voltage compensation operation can be fully carried out and the complete writing of the data voltage signal is ensured, which can significantly improve the light-emitting effect of the light-emitting device. Description of the Drawings
[0022] Figure 1 It is a schematic structural diagram of a high-frequency pixel circuit and its corresponding timing control diagram;
[0023] Figure 2 It is a schematic structural diagram of a pixel circuit provided by an embodiment of the present application;
[0024] Figure 3 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0025] Figure 4 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0026] Figure 5 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0027] Figure 6 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0028] Figure 7 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0029] Figure 8 It is a schematic structural diagram of another pixel circuit provided by an embodiment of the present application;
[0030] Figure 9 Schematic diagram of another pixel circuit provided by an embodiment of the present application;
[0031] Figure 10 Schematic diagram of another pixel circuit provided by an embodiment of the present application;
[0032] Figure 11 Schematic diagram of another pixel circuit provided by an embodiment of the present application and its corresponding timing control diagram;
[0033] Figure 12 Flow chart of a pixel circuit driving method provided by an embodiment of the present application;
[0034] Figure 13 Schematic diagram of a display device provided by an embodiment of the present application. Detailed implementation manners
[0035] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant drawings. The preferred embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the understanding of the disclosure of the present application more thorough and comprehensive.
[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0037] When describing the positional relationship, unless otherwise specified, when an element such as a layer, film or substrate is referred to as being "on" another element, it can be directly on the other element or there can also be intermediate elements. Further, when a layer is referred to as being "under" another layer, it can be directly below or there can be one or more intermediate elements. It can also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or there can also be one or more intermediate elements.
[0038] When using "including", "having" and "comprising" described herein, unless a clear limiting term such as "only", "consisting of", etc. is used, another component can also be added. Unless otherwise mentioned, terms in the singular form can include the plural form and should not be understood as having a quantity of one.
[0039] It should be understood that although terms such as "first" and "second" may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present application, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element.
[0040] It should also be understood that when interpreting an element, although not explicitly described, the element is interpreted to include an error range, which should be within the acceptable deviation range of a specific value determined by those skilled in the art. For example, "about", "approximately" or "substantially" may mean within one or more standard deviations, which is not defined herein.
[0041] In addition, in the specification, the phrase "schematic diagram of planar distribution" refers to the drawing when observing the target part from above, and the phrase "schematic diagram of cross-section" refers to the drawing when observing the cross-section intercepted by vertically cutting the target part from the side.
[0042] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the various elements are only drawn by way of example in the drawings and not necessarily to the true scale.
[0043] This application is made by the inventors based on the understanding and research of the following problems:
[0044] As described in the background art section, with the rapid development of display technology, high-frequency pixel circuits have been widely used. As shown in (a) of Figure 1 , the existing high-frequency pixel circuits are usually 7T (i.e., seven switching devices) pixel circuits, and as shown in (b) of Figure 1 is the timing control diagram of the existing high-frequency pixel circuit. As people gradually pursue higher-frequency display effects and higher-resolution display effects, then, the pixel update period of the high-frequency pixel circuit will become shorter and shorter. Consequently, the time that can be spent writing the data voltage signal into the high-frequency pixel circuit is also getting shorter and shorter. Specifically, in (b) of Figure 1 , that is, the time when the scan signal scan1 is at a low level and the time when the scan signal scan2 is at a low level are both getting shorter and shorter.
[0045] On the one hand, the short writing time of the data voltage signal may cause the data voltage signal not to be completely written into the high-frequency pixel circuit within the specified time, resulting in the magnitude of the driving current used by the high-frequency pixel circuit to drive the light-emitting device to be affected by the data voltage signal that is not completely written into the high-frequency pixel circuit. Furthermore, it will cause abnormal display effects such as uneven emission brightness, deviation in emission color, flickering phenomenon or pixel missing phenomenon when the light-emitting device emits light. On the other hand, in the existing high-frequency pixel circuit, the writing operation of the data voltage signal and the threshold voltage compensation operation for the driving transistor used to drive the light-emitting device are carried out simultaneously. Due to the increasingly short pixel update cycle, it may also lead to insufficient threshold voltage compensation operation, resulting in a decrease in the driving ability of the driving transistor for the light-emitting device. This phenomenon will further increase the possibility of abnormal display effects occurring in the light-emitting device. Obviously, the existing high-frequency pixel circuit is difficult to improve the light-emitting effect of the light-emitting device. Furthermore, it will lead to a lower display effect of the display panel using the high-frequency pixel circuit.
[0046] Based on the above technical problems, the inventors have found through research that by introducing a coupling capacitor into the pixel circuit, the time required for the data voltage signal to be written into the pixel circuit can be reduced. Thus, it is possible to improve the phenomenon that the existing high-frequency pixel circuit is prone to incomplete writing of the data voltage signal, resulting in a poor light-emitting effect of the light-emitting device. Based on this, the inventors have further developed the technical solution of the embodiment of the present application. Specifically, the pixel circuit provided by the embodiment of the present application includes a first reset module, a data writing module, a driving module, a threshold compensation module, a voltage stabilizing module, a control module, and a first capacitor. Based on the specific designed pixel circuit structure provided by the embodiment of the present application in cooperation with a specific designed pixel update cycle, on the one hand, based on the first capacitor, the data voltage signal can be quickly written into the pixel circuit. On the other hand, the threshold voltage compensation operation for the driving module and the writing operation of the data voltage signal can be carried out separately in two different stages. Thus, it is ensured that the threshold voltage compensation operation can be fully carried out and the complete writing of the data voltage signal is ensured, which can significantly improve the light-emitting effect of the light-emitting device.
[0047] The above is the core idea of the present application. Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.
[0048] Figure 2 The structural schematic diagram of a pixel circuit provided by an embodiment of the present application is as Figure 2 shown. The pixel circuit provided by the embodiment of the present application includes:
[0049] The first reset module 10, data writing module 12, driving module 14, threshold compensation module 16, voltage stabilizing module 18, control module 20, and first capacitor C1.
[0050] The first end of the first reset module 10 is respectively connected to the first end of the data writing module 12, the first end of the voltage stabilizing module 18, and the first end of the first capacitor C1. The first end of the driving module 14 is respectively connected to the second end of the first capacitor C1, the first end of the threshold compensation module 16, and the second end of the voltage stabilizing module 18. The second end of the driving module 14 is respectively connected to the second end of the threshold compensation module 16 and the first end of the control module 20. The second end of the control module 20 is connected to the positive electrode of the light emitting device D.
[0051] The first reset module 10 is configured to reset the voltage magnitude corresponding to the first reference voltage signal Vref1 at the first end of the first capacitor C1 in the first stage.
[0052] The voltage stabilizing module 18 is configured to reset the voltage magnitude corresponding to the first reference voltage signal Vref1 at the second end of the first capacitor C1 in the first stage.
[0053] The threshold compensation module 16 is configured to provide a compensation voltage signal to the first end of the driving module 14 in the second stage;
[0054] The data writing module 12 is configured to transmit the data voltage signal Data to the first end of the first capacitor C1 in the third stage.
[0055] The driving module 14 is configured to generate a driving current in the fourth stage; the driving current is determined by the voltage magnitude corresponding to the data voltage signal Data and the voltage magnitude corresponding to the compensation voltage signal; the first stage, the second stage, the third stage, and the fourth stage belong to different stages of the pixel update cycle of the light emitting device D.
[0056] The control module 20 is configured to operate according to the control voltage signal EM in the fourth stage and drive the light emitting device D to operate according to the driving current.
[0057] Among them, the pixel circuit refers to the basic unit circuit for controlling the light emission of a single light emitting device D (i.e., a single pixel on the display panel) and ensuring that the single light emitting device D can emit light stably and uniformly according to the input data voltage signal Data.
[0058] Optionally, the first reset module 10, data writing module 12, driving module 14, threshold compensation module 16, voltage stabilizing module 18, and control module 20 each include a switching device; optionally, the first reset module 10, data writing module 12, threshold compensation module 16, and voltage stabilizing module 18 may each include one or more switching devices. Optionally, the switching devices included in the first reset module 10, data writing module 12, driving module 14, threshold compensation module 16, voltage stabilizing module 18, and control module 20 may be P-type thin film transistors (TFTs).
[0059] The first stage refers to the reset stage of the pixel circuit. In the first stage, the pixel circuit resets both the first end and the second end of the first capacitor C1 to the initial voltage state (i.e., the voltage magnitude corresponding to the first reference voltage signal Vref1), so that the pixel circuit is prepared for the subsequent second stage to fourth stage.
[0060] The second stage refers to the threshold voltage compensation stage of the pixel circuit. In the second stage, the pixel circuit compensates the threshold voltage of the driving module 14 to ensure that the driving current generated by the driving module 14 in the fourth stage is not affected by the threshold voltage of the driving module 14, thereby ensuring that the light-emitting device D can operate in a stable and uniform light-emitting state under the action of the driving current in the fourth stage.
[0061] The third stage refers to the data voltage signal Data writing stage of the pixel circuit. In the third stage, the pixel circuit receives the data voltage signal Data provided by the data voltage signal source, writes the data voltage signal Data into some key nodes in the pixel circuit, and uses the coupling effect of the first capacitor C1 to transfer the voltage change to the second end of the first capacitor C1 to ensure that the data signal can be written quickly and completely.
[0062] The fourth stage refers to the light-emitting stage where the pixel circuit drives the light-emitting device D to work. In the fourth stage, the pixel circuit makes the control module 20 work by controlling the voltage signal EM, so that the control module 20 can provide a stable driving current for the light-emitting device D, thereby being able to drive the light-emitting device D to work in a stable and uniform light-emitting state.
[0063] The pixel update period refers to the time taken for the pixel circuit to complete the work of the first stage, the second stage, the third stage, and the fourth stage completely. In other words, it refers to the time taken for the pixel circuit to complete a complete operation (i.e., reset, threshold voltage compensation, data voltage signal Data writing, and light emission). The pixel update period corresponds to the refresh rate of the display panel provided by this embodiment.
[0064] Optionally, when the pixel circuit is a high-frequency pixel circuit applied to a high-frequency display panel, the pixel update period is less than or equal to a preset update period. Optionally, the preset update period is a relatively short period that can meet the requirements of refresh rates such as 60HZ, 120HZ, 240HZ, 360HZ, 480HZ, 1000HZ, or even higher refresh rates. Exemplarily, the preset update period can be 1ms to 20ms.
[0065] Optionally, the light-emitting device D can be a light-emitting diode (LED), an OLED, or other devices with a light-emitting function. The negative electrode of the light-emitting device D is connected to the second voltage source PVEE, and the second voltage source PVEE is used to provide a stable second voltage signal to the negative electrode of the light-emitting device D, that is, to provide a negative voltage to ensure that the light-emitting device D has a correct bias voltage when emitting light, thereby ensuring the light-emitting effect of the light-emitting device D.
[0066] The control voltage signal EM is a key voltage signal for controlling the operation of the light-emitting device D. The change time node of the control voltage signal EM determines when the light-emitting device D emits light, and the low-level maintenance time of the control voltage signal EM determines the duration of the light emission of the light-emitting device D.
[0067] Specifically, since the first end of the voltage regulator module 18 is connected to the first end of the first capacitor C1 and the second end of the voltage regulator module 18 is connected to the second end of the first capacitor C1, and the first capacitor C1 is a coupling capacitor, thus, when the first reset module 10 resets the first end of the first capacitor C1 to the voltage value corresponding to the first reference voltage signal Vref1 in the first stage, the first capacitor C1 will couple the voltage value corresponding to the first reference voltage signal Vref1 at its first end to its second end. Furthermore, under the action of the voltage regulator module 18, the second end of the first capacitor C1 will be reset to the voltage value corresponding to the first reference voltage signal Vref1 simultaneously with the first end of the first capacitor C1. Obviously, based on the voltage coupling effect of the first capacitor C1 as a coupling capacitor, the efficiency of writing the data voltage signal Data into the pixel circuit is ensured, so that the pixel circuit can ensure the complete writing of the data voltage signal Data even in application scenarios with high-frequency refresh rates or high-frequency resolutions to improve the light-emitting effect of the light-emitting device D.
[0068] The above pixel circuit includes: a first reset module, a data writing module, a driving module, a threshold compensation module, a voltage stabilizing module, a control module, and a first capacitor; the first reset module is configured to reset the first end of the first capacitor to the voltage corresponding to the first reference voltage signal in the first stage; the voltage stabilizing module is configured to reset the second end of the first capacitor to the voltage corresponding to the first reference voltage signal in the first stage; the threshold compensation module is configured to provide a compensation voltage signal to the first end of the driving module in the second stage; the data writing module is configured to transmit a data voltage signal to the first end of the first capacitor in the third stage; the driving module is configured to generate a driving current in the fourth stage; the control module is configured to operate according to a control voltage signal in the fourth stage and drive a light-emitting device to operate according to the driving current. By using the pixel circuit provided in this embodiment, on the one hand, the introduction of the first capacitor enables the writing of the data voltage signal to be completed quickly in a short time. On the other hand, based on the pixel circuit structure with a specific design and a specific pixel update period, the threshold voltage compensation for the driving module and the writing of the data voltage signal can be carried out separately in two different stages. Thus, it ensures that the threshold voltage compensation work can be fully carried out and the data voltage signal can be completely written, and can significantly improve the light-emitting effect of the light-emitting device.
[0069] In an exemplary embodiment, as Figure 3 shown, the above circuit further includes a second capacitor C2;
[0070] The first end of the second capacitor C2 is connected to the first end of the first reset module 10, and the second end of the second capacitor C2 is connected to the third end of the driving module 14.
[0071] Among them, the second capacitor C2 is a storage capacitor.
[0072] The second end of the second capacitor C2 is respectively connected to the third end of the driving module 14 and the first voltage source PVDD.
[0073] In this embodiment, the second capacitor as the storage capacitor has an energy storage characteristic. Therefore, after the first end of the first capacitor is reset to the voltage corresponding to the first reference voltage signal in the first stage, the second capacitor can make the voltage of the first end of the first capacitor quickly stabilize at the voltage corresponding to the first reference voltage signal. Based on this, in the first stage, the second capacitor can not only ensure that the first stage in different pixel update cycles corresponds to the same reset result, but also enable the first end of the first capacitor to be quickly reset. Furthermore, the setting of the second capacitor can enable the pixel circuit to further reduce the time required for the first stage.
[0074] In this embodiment, the second capacitor serving as the storage capacitor has an energy storage characteristic. Therefore, when the data voltage signal is transmitted to the first end of the first capacitor in the third stage, the second capacitor can quickly stabilize the voltage magnitude at the first end of the first capacitor to the voltage magnitude corresponding to the data voltage signal. Based on this, in the third stage, the second capacitor can ensure that the data voltage signal is quickly and completely written into the first end of the first capacitor, improving the writing efficiency of the data voltage signal. Furthermore, the setting of the second capacitor can enable the pixel circuit to further reduce the time required for the third stage.
[0075] In an exemplary embodiment, as Figure 4 shown, the above circuit further includes a second reset module 22.
[0076] The first end of the second reset module 22 is connected to the second end of the control module 20.
[0077] The second reset module 22 is configured to reset the second end of the control module 20 to the voltage magnitude corresponding to the second reference voltage signal Vref2 in the first stage.
[0078] Wherein, the voltage magnitude corresponding to the second reference voltage signal Vref2 is a low-level voltage signal. Resetting the second end of the control module 20 to the voltage magnitude corresponding to the second reference voltage signal Vref2 in the first stage is to ensure that the positive electrode of the light-emitting device D is also reset to the low-level voltage signal when the light-emitting device D does not need to emit light. Thus, it is ensured that the light-emitting device D does not emit light and work in other stages except the fourth stage.
[0079] In an exemplary embodiment, the above first reset module 10 includes at least one first switching device.
[0080] As Figure 5 shown in (a) of, when the first reset module 10 includes a first switching device T11, the first end of the first switching device T11 is connected to the first scan line signal source, the second end of the first switching device T11 is connected to the first reference voltage signal source for outputting the first reference voltage signal Vref1, and the third end of the first switching device T11 is connected to the first end of the data writing module 12.
[0081] As Figure 5As shown in (b), when the first reset module 10 includes at least two first switching devices (T11 and T12), the first ends of the first switching devices are respectively connected to the first scan line signal source, the second ends of the first switching devices are connected to the third ends of adjacent first switching devices, the second end of one first switching device T12 is connected to the first reference voltage signal source, and the third end of one first switching device T11 is connected to the first end of the data writing module 12.
[0082] Among them, the first switching device can be a P-TFT transistor.
[0083] Optionally, for the first switching device, the first end can be the gate, the second end can be the source, and the third end can be the drain.
[0084] The first scan line signal source is used to output the first scan line signal S1. The first scan line signal S1 is used to cooperate with the first reference voltage signal Vref1 to achieve the voltage reset operation of the first end of the first capacitor C1.
[0085] When the first reset module 10 includes one first switching device, the first end of the first switching device is the second end of the first reset module 10, and the second end of the first switching device is the third end of the first reset module 10.
[0086] When the first reset module 10 includes at least two first switching devices, the first ends of the first switching devices are the second end of the first reset module 10, and the second end of one first switching device connected to the first reference voltage signal source is the third end of the first reset module 10.
[0087] Optionally, when the first reset module 10 includes at least two first switching devices, the first ends of the first switching devices are respectively connected to the first scan line signal source, which can mean that the first ends of the first switching devices are respectively and independently connected to the first scan line signal source, or it can mean that the first ends of the first switching devices are connected in parallel and then connected to the first scan line signal source.
[0088] When the number of the first switching devices is at least two, compared with having only one first switching device, it can improve the speed of resetting the voltage magnitude corresponding to the first reference voltage signal Vref1 at the first end of the first capacitor C1 in the first stage. That is to say, based on the pixel circuit structure with the specific design provided in this embodiment, there is a negative correlation between the number of the first switching devices included in the first reset module 10 and the time required for resetting the second end of the first capacitor C1 in the first stage. In specific implementation, it is necessary to consider the spatial size and cost of the pixel circuit to determine the number of the first switching devices included in the first reset module 10.
[0089] It should be noted that althoughFigure 5 The embodiment will be described with the first reset module 10 including one or two first switching devices. However, in a specific implementation, the first reset module 10 may include more than two first switching devices, and the number of first switching devices in the first reset module 10 is not limited in this embodiment.
[0090] In an exemplary embodiment, the data writing module 12 includes at least one second switching device.
[0091] As Figure 6 shown in (a) of [], when the data writing module 12 includes a second switching device T21, the first end of the second switching device T21 is connected to the second scan line signal source, the second end of the second switching device T21 is connected to the data voltage signal source for outputting the data voltage signal Data, and the third end of the second switching device T21 is connected to the first end of the first reset module 10.
[0092] As Figure 6 shown in (a) of [], when the data writing module 12 includes at least two second switching devices (T21 and T22), the first ends of the second switching devices are respectively connected to the second scan line signal source, the second ends of the second switching devices are connected to the third ends of the adjacent second switching devices, there is a second end of a second switching device T22 connected to the data voltage signal source, and there is a third end of a second switching device T21 connected to the first end of the first reset module 10.
[0093] Wherein, the second switching device may be a P-TFT transistor.
[0094] Optionally, for the second switching device, the first end may be the gate, the second end may be the source, and the third end may be the drain.
[0095] The second scan line signal source is used to output a second scan line signal. The second scan line signal is used to cooperate with the data voltage signal Data to transmit the data voltage signal Data to the first end of the first capacitor in the third stage, so as to complete the writing of the data voltage signal Data.
[0096] When the data writing module 12 includes a second switching device, the first end of the second switching device is the second end of the data writing module 12, and the second end of the second switching device is the third end of the data writing module 12.
[0097] When the data writing module 12 includes at least two second switching devices, the first ends of the second switching devices are the second end of the data writing module 12, and the second end of the second switching device connected to the first reference voltage signal source is the third end of the data writing module 12.
[0098] Optionally, when the data writing module 12 includes at least two second switching devices, the first ends of the second switching devices are respectively connected to the second scan line signal source, which may mean that the first ends of the second switching devices are respectively and independently connected to the second scan line signal source, or may mean that the first ends of the second switching devices are connected in parallel and then connected to the second scan line signal source.
[0099] When the number of the second switching devices is at least two, compared with only one second switching device, the speed of transmitting the data voltage signal Data to the first end of the first capacitor in the third stage can be increased. That is to say, based on the pixel circuit structure with the specific design provided in this embodiment, the number of the second switching devices included in the data writing module 12 and the time required for the third stage are negatively correlated. In specific implementation, it is necessary to consider the spatial size and cost of the pixel circuit to determine the number of the second switching devices included in the data writing module 12.
[0100] It should be noted that although Figure 6 the embodiments are described with the data writing module 12 including one or two second switching devices, however, in specific implementation, the second reset module 10 may include more than two second switching devices, and the number of the second switching devices in the data writing module 12 is not limited in this embodiment.
[0101] In an exemplary embodiment, as Figure 7 shown, the above driving module 14 includes a third switching device T3.
[0102] The first end of the third switching device T3 is connected to the second end of the first capacitor C1, the second end of the third switching device T3 is connected to the first voltage source, and the third end of the third switching device T3 is connected to the second end of the threshold compensation module 16.
[0103] Among them, the third switching device T3 may be a P-TFT transistor. The third switching device T3 is used to generate a driving current in the fourth stage, so that the control module can drive the light-emitting device D to work according to the driving current in the fourth stage.
[0104] Optionally, for the third switching device T3, the first end may be the gate, the second end may be the source, and the third end may be the drain.
[0105] The second end of the third switching device T3 is the third end of the driving module 14.
[0106] A first voltage source for providing a first voltage signal PVDD to a third terminal of the driving module 14. The first voltage signal PVDD is written to a first terminal of the driving module 14 in a second stage until the voltage magnitude at the first terminal of the driving module 14 reaches the sum of the voltage magnitude of the first voltage signal PVDD and the threshold voltage Vth of the third switching device T3, at which point the threshold compensation operation is completed.
[0107] Since the driving module 14 includes a third switching device T3, and there is a threshold voltage Vth when the third switching device T3 is a P-TFT. The threshold voltage Vth determines the minimum voltage required for the third switching device T3 to transition from the cut-off state to the conducting state. The magnitude of the driving current used to drive the light-emitting device D is related to the voltage Vgs between the gate and the source of the third switching device T3 and the threshold voltage Vth. By providing a compensation voltage signal to the first terminal of the driving module 14 by the threshold compensation module 16 in the second stage to compensate for the threshold voltage Vth of the third switching device T3, the stability of the driving current can be ensured to ensure the light-emitting effect of the light-emitting device D.
[0108] In an exemplary embodiment, the above-mentioned threshold compensation module 16 includes at least one fourth switching device.
[0109] As Figure 8 shown in (a) of , when the threshold compensation module 16 includes a fourth switching device T41, the first terminal of the fourth switching device T41 is connected to the third scan line signal source, the second terminal of the fourth switching device T41 is connected to the first terminal of the driving module 14, and the third terminal of the fourth switching device T41 is connected to the second terminal of the driving module 14.
[0110] As Figure 8 shown in (b) of , when the threshold compensation module 16 includes at least two fourth switching devices (T41 and T42), the first terminals of the respective fourth switching devices are respectively connected to the third scan line signal source, the second terminals of the respective fourth switching devices are connected to the third terminals of the adjacent fourth switching devices, there is a second terminal of a fourth switching device T41 connected to the first terminal of the driving module 14, and there is a third terminal of a fourth switching device T42 connected to the second terminal of the driving module 14.
[0111] Among them, the fourth switching device can be a P-TFT transistor.
[0112] Optionally, the fourth switching device can have its first terminal as the gate, the second terminal as the source, and the third terminal as the drain.
[0113] A third scan line signal source is configured to output a third scan line signal S3. The third scan line signal S3 is used to turn on the threshold compensation module 16 so that the threshold compensation module 16 provides a compensation voltage signal to the first end of the driving module 14 in the second stage to complete the threshold voltage compensation work for the driving module 14.
[0114] When the threshold compensation module 16 includes a fourth switching device, the first end of the fourth switching device is the third end of the threshold compensation module 16.
[0115] When the threshold compensation module 16 includes at least two fourth switching devices, the first end of each fourth switching device is the third end of the threshold compensation module 16.
[0116] Optionally, when the threshold compensation module 16 includes at least two fourth switching devices, the first ends of the fourth switching devices are respectively connected to the third scan line signal source, which may mean that the first ends of the fourth switching devices are respectively and independently connected to the third scan line signal source, or may mean that the first ends of the fourth switching devices are connected in parallel and then connected to the third scan line signal source.
[0117] When the number of the fourth switching devices is at least two, compared with having only one fourth switching device, a plurality of fourth switching devices can jointly provide a compensation voltage signal to the first end of the driving module 14, improving the speed at which the compensation voltage signal is transmitted to the first end of the driving module 14. Moreover, a plurality of fourth switching devices can also more stably maintain the voltage at the first end of the driving module 14 to ensure the stability of the driving current. That is to say, based on the pixel circuit structure with a specific design provided in this embodiment, the number of fourth switching devices included in the threshold compensation module 16 is negatively correlated with the time required for the second stage. In specific implementation, it is necessary to consider the spatial size and cost of the pixel circuit to determine the number of fourth switching devices included in the threshold compensation module 16.
[0118] It should be noted that although Figure 8 the embodiments are described with the threshold compensation module 16 including one or two fourth switching devices, however, in specific implementation, the threshold compensation module 16 may include more than two fourth switching devices, and the number of fourth switching devices in the threshold compensation module 16 is not limited in this embodiment.
[0119] In an exemplary embodiment, the above voltage stabilizing module 18 includes at least one fifth switching device.
[0120] Such as Figure 9As shown in (a) thereof, when the voltage stabilizing module 18 includes a fifth switching device T51, the first end of the fifth switching device T51 is connected to the fourth scan line signal source, the second end of the fifth switching device T51 is connected to the first end of the first reset module 10, and the third end of the fifth switching device T51 is connected to the first end of the driving module 14.
[0121] As Figure 9 As shown in (b) thereof, when the voltage stabilizing module 18 includes at least two fifth switching devices (T51 and T52), the first ends of the respective fifth switching devices are respectively connected to the fourth scan line signal source, the second ends of the respective fifth switching devices are connected to the third ends of the adjacent fifth switching devices, the second end of one fifth switching device T51 is connected to the first end of the first reset module 10, and the third end of one fifth switching device T52 is connected to the first end of the driving module 14.
[0122] Among them, the fifth switching device may be a P-TFT transistor.
[0123] Optionally, for the fifth switching device, the first end may be the gate, the second end may be the source, and the third end may be the drain.
[0124] The fourth scan line signal source is used to output a fourth scan line signal S4. In this embodiment, the fourth scan line signal S4 is used to turn on the voltage stabilizing module 18, so that the voltage stabilizing module 18 resets the second end of the first capacitor C1 to the voltage value corresponding to the first reference voltage signal Vref1 in the first stage.
[0125] When the voltage stabilizing module 18 includes a fifth switching device, the first end of the fifth switching device is the third end of the voltage stabilizing module 18.
[0126] When the voltage stabilizing module 18 includes at least two fifth switching devices, the first ends of the respective fifth switching devices are the third end of the voltage stabilizing module 18.
[0127] Optionally, when the voltage stabilizing module 18 includes at least two fifth switching devices, that the first ends of the fifth switching devices are respectively connected to the fourth scan line signal source may mean that the first ends of the respective fifth switching devices are respectively and independently connected to the fourth scan line signal source, or may mean that the first ends of the respective fifth switching devices are connected in parallel and then connected to the fourth scan line signal source.
[0128] When the number of the fifth switching devices is at least two, compared with the case where there is only one fifth switching device, the speed at which the first end and the second end of the first capacitor C1 are reset to the voltage corresponding to the first reference voltage signal Vref1 in the first stage can be increased. That is to say, based on the pixel circuit structure with the specific design provided in this embodiment, there is a negative correlation between the number of the fifth switching devices included in the voltage stabilizing module 18 and the time required for the first stage. In a specific implementation, it is necessary to consider the spatial size and cost of the pixel circuit to determine the number of the fifth switching devices included in the voltage stabilizing module 18.
[0129] It should be noted that although Figure 9 the embodiments are described with the voltage stabilizing module 18 including one or two fifth switching devices, however, in a specific implementation, the voltage stabilizing module 18 may include more than two fifth switching devices, and the number of the fifth switching devices in the voltage stabilizing module 18 is not limited in this embodiment.
[0130] In an exemplary embodiment, as Figure 7 shown, the above control module 20 includes a sixth switching device T6.
[0131] The first end of the sixth switching device T6 is connected to a control voltage source for outputting a control voltage signal EM, the second end of the sixth switching device T6 is connected to the second end of the first capacitor C1, and the third end of the sixth switching device T6 is connected to the positive electrode of the light emitting device D.
[0132] Among them, the sixth switching device T6 can be a P-TFT transistor.
[0133] Optionally, for the sixth switching device T6, the first end can be the gate, the second end can be the source, and the third end can be the drain.
[0134] The first end of the sixth switching device T6 is the third end of the control module 20.
[0135] In this embodiment, the control module includes a sixth switching device, so that the control module will only receive the control voltage signal from the control voltage source in the fourth stage, work according to the control voltage signal, and drive the light emitting device to work according to the driving current. Therefore, based on the cooperation of the sixth switching device and the control voltage source, it can be ensured that the light emitting device will only emit light in the fourth stage, and when the light emitting device does not need to emit light, the control module does not respond to the control voltage signal to avoid mis-triggering the light emitting device to work.
[0136] In an exemplary embodiment, the above second reset module 22 includes at least one seventh switching device.
[0137] As Figure 10As shown in (a) thereof, when the second reset module 22 includes a seventh switching device T71, the first end of the seventh switching device T71 is connected to the fourth scan line signal source, the second end of the seventh switching device T71 is connected to the second reference voltage signal source for outputting the second reference voltage signal Vref2, and the third end of the seventh switching device T71 is connected to the second end of the control module 20.
[0138] As Figure 10 As shown in (b) thereof, when the second reset module 22 includes at least two seventh switching devices (T71 and T72), the first ends of the seventh switching devices are respectively connected to the fourth scan line signal source, the second ends of the seventh switching devices are connected to the third ends of the adjacent seventh switching devices, the second end of one seventh switching device T72 is connected to the second reference voltage signal source of the second reference voltage signal Vref2, and the third end of one seventh switching device T71 is connected to the second end of the control module 20.
[0139] Among them, the seventh switching device can be a P-TFT transistor.
[0140] Optionally, for the seventh switching device, the first end can be the gate, the second end can be the source, and the third end can be the drain.
[0141] In this embodiment, the fourth scan line signal is used to turn on the second reset module 22, so that the second reset module 22 resets the second end of the control module 20 to the voltage value corresponding to the second reference voltage signal Vref2 in the first stage, thereby improving the driving ability of the pixel circuit for the light-emitting device D and ensuring that the light-emitting device D can work correctly in the fourth stage.
[0142] When the second reset module 22 includes a seventh switching device, the first end of the seventh switching device is the second end of the second reset module 22, and the second end of the seventh switching device is the third end of the second reset module 22.
[0143] When the second reset module 22 includes at least two seventh switching devices, the first ends of the seventh switching devices are the second end of the second reset module 22, and the second end of one seventh switching device connected to the second reference voltage signal source of the second reference voltage signal Vref2 is the third end of the second reset module 22.
[0144] Optionally, when the second reset module 22 includes at least two seventh switching devices, the first ends of the seventh switching devices are respectively connected to the fourth scan line signal source, which can mean that the first ends of the seventh switching devices are respectively and independently connected to the fourth scan line signal source, or can mean that the first ends of the seventh switching devices are connected in parallel and then connected to the fourth scan line signal source.
[0145] When the number of the seventh switching devices is at least two, compared with the case where there is only one seventh switching device, the speed of resetting the second end of the control module 20 to the voltage corresponding to the second reference voltage signal Vref2 in the first stage can be increased. That is to say, based on the pixel circuit structure with the specific design provided in this embodiment, the number of the seventh switching devices included in the second reset module 22 is negatively correlated with the time required for resetting the second end of the control module 20 in the first stage. In specific implementation, it is necessary to consider the spatial size and cost of the pixel circuit to determine the number of the seventh switching devices included in the second reset module 22.
[0146] It should be noted that although Figure 10 the embodiment is described with the second reset module 22 including one or two seventh switching devices, however, in specific implementation, the second reset module 22 may include more than two seventh switching devices, and the number of the seventh switching devices in the second reset module 22 is not limited in this embodiment.
[0147] The application process of the above pixel circuit is described below with a detailed embodiment as follows:
[0148] As Figure 11 shown in (a) of, the pixel circuit includes a first reset module 10, a data writing module 12, a driving module 14, a threshold compensation module 16, a voltage stabilizing module 18, a control module 20, a second reset module 22, a first capacitor C1, and a second capacitor C2.
[0149] The first end of the first reset module 10 is respectively connected to the first end of the data writing module 12, the first end of the voltage stabilizing module 18, the first end of the first capacitor C1, and the first end of the second capacitor C2. The second end of the first reset module 10 is connected to the first scan line signal source, and the third end of the first reset module 10 is connected to the first reference voltage signal source.
[0150] The first end of the driving module 14 is respectively connected to the second end of the first capacitor C1, the first end of the threshold compensation module 16, and the second end of the voltage stabilizing module 18. The second end of the driving module 14 is respectively connected to the second end of the threshold compensation module 16 and the first end of the control module 20. The third end of the driving module 14 is connected to the second end of the second capacitor C2 and the first voltage source.
[0151] The second end of the control module 20 is connected to the positive electrode of the light emitting device D, and the third end of the control module 20 is connected to the control voltage signal source.
[0152] The second end of the data writing module 12 is connected to the second scan line signal source, and the third end of the data writing module 12 is connected to the data voltage signal source.
[0153] The third terminal of the voltage stabilizing module 18 is connected to the fourth scan line signal source.
[0154] The third terminal of the threshold compensation module 16 is connected to the third scan line signal source.
[0155] The second terminal of the second reset module 22 is connected to the fourth scan line signal source, and the third terminal of the second reset module 22 is connected to the second reference voltage signal source.
[0156] Define the first terminal of the first capacitor C1 as the first node N1, the second terminal of the first capacitor C1 as the second node N2, and the second terminal of the control module 20 as the third node N3. As Figure 11 shown, in the first stage P1, the first scan line signal S1 transmitted from the first scan line signal source to the second terminal of the first reset module 10 is at a low level, and the fourth scan line signal S4 transmitted from the fourth scan line signal source to the third terminal of the voltage stabilizing module 18 is at a low level. Thus, in the pixel circuit at this time, the first reset module 10, the voltage stabilizing module 18, and the second reset module 22 are turned on, and the voltages of the first node N1 and the second node N2 are simultaneously reset to the voltage value corresponding to the first reference voltage signal Vref1, and the voltage of the third node N3 is reset to the voltage value corresponding to the second reference voltage signal Vref2.
[0157] As Figure 11 shown in (b) of the figure, in the second stage P2, the first scan line signal S1 transmitted from the first scan line signal source to the second terminal of the first reset module 10 is at a low level, and the third scan line signal S3 transmitted from the third scan line signal source to the third terminal of the threshold compensation module 16 is at a low level. Thus, in the pixel circuit at this time, the first reset module 10 and the threshold compensation module 16 are turned on, the voltage of the first node N1 continues to be reset to the voltage value corresponding to the first reference voltage signal Vref1, and the threshold compensation module 16 performs threshold voltage compensation on the driving module 14, so that the first voltage signal PVDD provided by the first voltage source is written to the first terminal of the driving module 14. Based on the first voltage signal PVDD and the compensation voltage signal provided by the threshold compensation module 16 to the driving module 14, the voltage at the first terminal of the driving module 14 increases until the voltage value at the first terminal of the driving module 14 is the sum of the voltage value of the first voltage signal PVDD and the threshold voltage Vth of the third switching device. At this time, the voltage of the second node N2 = PVDD + Vth, that is, the voltage magnitude Vgs of the gate of the third switching device in the driving module 14 relative to the source is the threshold voltage Vth magnitude of the third switching device, then the threshold compensation work is completed. At this time, the driving module 14 is in the off state.
[0158] As Figure 11As shown, in the third stage P3, the second scan line signal S2 transmitted by the second scan line signal source to the second end of the data writing module 12 is at a low level, the data writing module 12 is turned on, the data voltage signal Data transmitted by the data voltage signal source to the second end of the data writing module 12 is written into the first node N1 through the data writing module 12, and the voltage of the first node N1 jumps from the voltage value corresponding to the first reference voltage signal Vref1 to the voltage value corresponding to the data voltage signal Data. At this time, the voltage of the first node N1 is coupled to the second node N2 through the first capacitor C1, so that the voltage of the second node N2 jumps to the sum value among the voltage value corresponding to the first voltage signal PVDD, the voltage value corresponding to the threshold voltage Vth, and the voltage increment ΔV. At this time, the voltage of the second node N2 = PVDD + Vth + ΔV. Among them, the voltage increment ΔV is determined by the first coefficient β, the voltage value corresponding to the data voltage signal Data, and the voltage value corresponding to the first reference voltage signal Vref1. Specifically, the voltage increment ΔV is the product of the difference between the voltage value corresponding to the data voltage signal Data and the voltage value corresponding to the first reference voltage signal Vref1 and the first coefficient β, that is, ΔV = β×(Data - Vref1).
[0159] As Figure 11 shown, in the fourth stage P4, the control voltage signal transmitted by the control voltage signal source to the third end of the control module 20 is at a low level, the control module 20 enters the conducting state in response to the control voltage signal. At this time, the voltage at the first end of the driving module 14, that is, the voltage Vgs of the gate of the third switching device in the driving module 14 relative to the source = (PVDD + Vth + ΔV) - PVDD = Vth + ΔV, and the driving current I generated by the driving module 14 is transmitted to the light-emitting device D through the control module 20, so that the light-emitting device D works and emits light under the driving of the driving current I. Among them, the magnitude of the driving current I for driving the light-emitting device D to work is determined by the first coefficient β, the second coefficient K, the voltage value corresponding to the data voltage signal Data, and the voltage value corresponding to the first reference voltage signal Vref1. Specifically, when the third switching device is a P-TFT transistor, the driving current I is proportional to the square of the difference between the voltage Vgs of the gate of the third switching device relative to the source and the threshold voltage Vth, that is, the driving current I = K×(Vgs - Vth) 2 = K×β×(Data - Vref1) 2 .
[0160] Among them, the magnitudes of the first coefficient β and the second coefficient K are determined in advance by one or more of the voltage magnitudes corresponding to the first scan line signal S1, the voltage magnitude corresponding to the second scan line signal S2, the voltage magnitude corresponding to the third scan line signal S3, the voltage magnitude corresponding to the fourth scan line signal S4, the first voltage signal PVDD, the first voltage signal PVEE, the first capacitor C1, and the second capacitor C2.
[0161] Based on the same inventive concept, an embodiment of the present application also provides a pixel circuit driving method, which is applied to a pixel circuit, as Figure 12 shown. The method includes the following steps 1202 to 1208:
[0162] Step 1202, in the first stage, through the first reset module and the voltage stabilizing module, the voltage at the first end of the first capacitor and the voltage at the second end of the first capacitor are respectively reset to the voltage magnitude corresponding to the first reference voltage.
[0163] Step 1204, in the second stage, through the threshold compensation module, a compensation voltage signal is provided to the first end of the driving module.
[0164] Step 1206, in the third stage, through the data writing module, the data voltage signal is transmitted to the first end of the first capacitor.
[0165] Step 1208, in the fourth stage, the control voltage signal is transmitted to the control module, so that the control module operates according to the control voltage signal and drives the light-emitting device to operate according to the driving current generated by the driving module.
[0166] It should be noted that the implementation solution provided by this pixel circuit driving method for solving problems is similar to the implementation solution described in the above pixel circuit. Therefore, the specific limitations in one or more of the above-provided embodiments of the pixel circuit driving method can be referred to the limitations on the pixel circuit in the above text, and will not be elaborated here.
[0167] In an exemplary embodiment, the above step 1202 is specifically as follows: in the first stage, control the first scan line signal source to output a low-level first scan line signal, and control the fourth scan line signal source to output a low-level fourth scan line signal, so as to respectively reset the voltage at the first end of the first capacitor and the voltage at the second end of the first capacitor to the voltage magnitude corresponding to the first reference voltage through the first reset module and the voltage stabilizing module.
[0168] In an exemplary embodiment, the above step 1204 is specifically as follows: in the second stage, control the first scan line signal source to output a low-level first scan line signal, and control the third scan line signal source to output a low-level third scan line signal, so as to provide a compensation voltage signal to the first end of the driving module through the threshold compensation module.
[0169] In an exemplary embodiment, step 1206 above specifically is that, in the third stage, the second scan line signal source is controlled to output a second scan line signal with a low level, so that a data voltage signal is transmitted to the first end of the first capacitor through the data writing module.
[0170] In an exemplary embodiment, step 1208 above specifically is that, in the fourth stage, the control voltage signal source is controlled to output a control voltage signal with a low level, and the control voltage signal is transmitted to the control module, so that the control module operates according to the control voltage signal, and drives a light-emitting device to operate according to the driving current generated by the driving module.
[0171] The above pixel circuit driving method is applied to any of the above pixel circuit embodiments. Thus, based on a pixel circuit structure with a specific design and a pixel update period with a specific design, on the one hand, the writing operation of the data voltage signal can be quickly completed in a short time, and on the other hand, the threshold voltage compensation operation of the driving module and the writing operation of the data voltage signal can be respectively performed in two different stages. Thus, it is ensured that the threshold voltage compensation operation can be fully performed, and the complete writing of the data voltage signal is ensured, and the light-emitting effect of the light-emitting device can be significantly improved.
[0172] In an exemplary embodiment, a display panel is further provided, including the pixel circuit in any of the above pixel circuit embodiments.
[0173] Based on the same application concept, an embodiment of the present application further provides a display device. Figure 13 For the structural schematic diagram of the display device 132 provided by the embodiment of the present application, as Figure 13 shown, the display device 132 includes the display panel 134 in any of the above embodiments. Exemplarily, as Figure 13 shown, the display device 132 includes the display panel 134. Therefore, the display device 132 also has the beneficial effects of the display panel 134 in the above embodiments. The same parts can be understood by referring to the explanation of the display panel 134 above, and will not be repeated hereinafter.
[0174] The display device 132 provided by the embodiment of the present application can be any electronic product with a display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, smart bracelet, smart glasses, vehicle-mounted display, industrial control equipment, medical display screen, touch interaction terminal, etc. The embodiment of the present application does not make special limitations thereto.
[0175] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the various technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.
[0176] The above-described embodiments merely represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.
Claims
1. A pixel circuit, characterized in that: The circuit comprises: A first reset module, a data writing module, a driving module, a threshold compensation module, a voltage stabilizing module, a control module and a first capacitor; The first end of the first reset module is respectively connected to the first end of the data writing module, the first end of the voltage stabilizing module and the first end of the first capacitor, the first end of the driving module is respectively connected to the second end of the first capacitor, the first end of the threshold compensation module and the second end of the voltage stabilizing module, the second end of the driving module is respectively connected to the second end of the threshold compensation module and the first end of the control module, and the second end of the control module is connected to the positive electrode of the light-emitting device; The first resetting module is used to reset the first end of the first capacitor to a voltage corresponding to a first reference voltage signal in a first stage; The voltage stabilizing module is used to reset the second end of the first capacitor to a voltage corresponding to the first reference voltage signal in the first stage; The threshold compensation module is used to provide a compensation voltage signal to the first end of the driving module in the second stage; The data writing module is used to transmit the data voltage signal to the first end of the first capacitor in the third stage; The driving module is used to generate a driving current in the fourth stage; the driving current is determined by the voltage corresponding to the data voltage signal and the voltage corresponding to the compensation voltage signal; the first stage, the second stage, the third stage and the fourth stage belong to different stages of the pixel update cycle of the light emitting device; The control module is used to operate according to the control voltage signal in the fourth stage, and drive the light emitting device to operate according to the driving current.
2. The circuit according to claim 1, characterized in that The circuit also includes a second capacitor; The first end of the second capacitor is connected to the first end of the first reset module, and the second end of the second capacitor is connected to the third end of the driving module.
3. The circuit according to claim 1, characterized in that The circuit also includes a second reset module; The first end of the second reset module is connected to the second end of the control module; The second resetting module is used to reset the second end of the control module to a voltage corresponding to a second reference voltage signal in the first stage.
4. The circuit according to claim 1, characterized in that The first reset module includes at least one first switch device; In the case where the first reset module includes a first switch device, a first end of the first switch device is connected to a first scan line signal source, a second end of the first switch device is connected to a first reference voltage signal source for outputting the first reference voltage signal, and a third end of the first switch device is connected to a first end of the data writing module; In the case where the first reset module includes at least two first switching devices, the first end of each of the first switching devices is respectively connected to the first scan line signal source, the second end of each of the first switching devices is interconnected with the third end of the adjacent first switching device, there is a first switching device whose second end is connected to the first reference voltage signal source, and there is a first switching device whose third end is connected to the first end of the data writing module.
5. The circuit according to claim 1, characterized in that The data writing module includes at least one second switching device; In the case where the data writing module includes a second switch device, a first end of the second switch device is connected to a second scan line signal source, a second end of the second switch device is connected to a data voltage signal source for outputting the data voltage signal, and a third end of the second switch device is connected to a first end of the first reset module; In the case where the data writing module includes at least two second switching devices, the first end of each second switching device is respectively connected to the second scan line signal source, the second end of each second switching device is interconnected with the third end of the adjacent second switching device, there is a second switching device whose second end is connected to the data voltage signal source, and there is a second switching device whose third end is connected to the first end of the first reset module.
6. The circuit according to claim 1, characterized in that The driving module includes a third switching device; The first end of the third switch device is connected to the second end of the first capacitor, the second end of the third switch device is connected to the first voltage source, and the third end of the third switch device is connected to the second end of the threshold compensation module.
7. The circuit according to claim 1, characterized in that The threshold compensation module includes at least one fourth switch device; In the case where the threshold compensation module includes a fourth switch device, a first end of the fourth switch device is connected to the third scan line signal source, a second end of the fourth switch device is connected to the first end of the driving module, and a third end of the fourth switch device is connected to the second end of the driving module; In the case where the threshold compensation module includes at least two fourth switching devices, the first end of each of the fourth switching devices is respectively connected to the third scan line signal source, the second end of each of the fourth switching devices is interconnected with the third end of an adjacent fourth switching device, there is a fourth switching device whose second end is connected to the first end of the driving module, and there is a fourth switching device whose third end is connected to the second end of the driving module.
8. The circuit according to claim 1, characterized in that The voltage stabilizing module includes at least one fifth switching device; In the case where the voltage stabilizing module includes a fifth switch device, a first end of the fifth switch device is connected to a fourth scan line signal source, a second end of the fifth switch device is connected to a first end of the first reset module, and a third end of the fifth switch device is connected to a second end of the driving module; In the case where the voltage stabilizing module includes at least two fifth switching devices, the first end of each of the fifth switching devices is respectively connected to the fourth scan line signal source, the second end of each of the fifth switching devices is interconnected with the third end of an adjacent fifth switching device, there is a fifth switching device whose second end is connected to the first end of the first reset module, and there is a fifth switching device whose third end is connected to the first end of the driving module.
9. The circuit according to claim 1, characterized in that The control module includes a sixth switch device; The first end of the sixth switch device is connected to a control voltage source for outputting the control voltage signal, the second end of the sixth switch device is connected to the second end of the first capacitor, and the third end of the sixth switch device is connected to the positive electrode of the light emitting device.
10. The circuit according to claim 3, characterized in that The second reset module includes at least one seventh switch device; In the case where the second reset module includes a seventh switch device, a first end of the seventh switch device is connected to a fourth scan line signal source, a second end of the seventh switch device is connected to a second reference voltage signal source for outputting the second reference voltage signal, and a third end of the seventh switch device is connected to a second end of the control module; In the case where the second reset module includes at least two seventh switch devices, the first end of each of the seventh switch devices is respectively connected to the fourth scan line signal source, the second end of each of the seventh switch devices is interconnected with the third end of the adjacent seventh switch device, the second end of a seventh switch device is connected to the second reference voltage signal source of the second reference voltage signal, and the third end of a seventh switch device is connected to the second end of the control module.
11. A pixel circuit driving method, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 10, the method comprises: In the first stage, the voltage at the first end of the first capacitor and the voltage at the second end of the first capacitor are reset to voltages corresponding to the first reference voltage respectively through the first reset module and the voltage stabilizing module; In the second stage, a compensation voltage signal is provided to the first end of the driving module through the threshold compensation module; In the third stage, the data voltage signal is transmitted to the first end of the first capacitor through the data writing module; In the fourth stage, the control voltage signal is transmitted to the control module, so that the control module operates according to the control voltage signal and drives the light emitting device to operate according to the driving current generated by the driving module.
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