Power module, power supply system, vehicle and photovoltaic system

Abstract

The invention provides a power module, a power supply system, a vehicle and a photovoltaic system, the power module comprises a first metal layer-coated substrate, a plurality of chips and a first connecting sheet, a first electrode of each chip is electrically connected with a first metal layer of the first metal layer-coated substrate, the first connecting sheet comprises a first main body part and a plurality of first contact parts, and the first main body part is electrically connected with the plurality of first contact parts. The second electrode of each chip in the plurality of chips is in contact with at least one first contact part, and a part of the first main body part is arranged between at least one pair of adjacent first contact parts. Current flowing out of the chips can directly flow into the first main body part through the first contact parts, current flowing paths are reduced, the chips are connected in parallel through the first connecting pieces, the parasitic inductance of the power module can be reduced, and the current sharing performance of the power module can be improved.

Description

[0001] This application is a divisional application. The application number of the original application is 202210542672.X, the original application date is May 18, 2022, and the entire content of the original application is incorporated herein by reference. Technical Field

[0002] This application relates to the field of semiconductor technology, and particularly to a power module, a power supply system, a vehicle, and a photovoltaic system. Background Art

[0003] With the development of power electronics technology, power modules have attracted more and more attention. The electrical connection of semiconductor chips in a power module is mainly achieved by aluminum wire bonding technology. The gates and sources of semiconductor chips are connected to the copper layer on the surface of the substrate through aluminum wires. However, when there are a relatively large number of chips arranged in the power module, the number of aluminum wires will also increase accordingly. A large number of aluminum wires will increase the parasitic inductance of the power module. And when multiple chips are connected in parallel, the multi-aluminum wire connection will cause the current among the multiple parallel chips to be uneven. The uneven current will cause the heat generation of the parallel chips to be uneven, and serious local heating will affect the performance of the chips, thus affecting the performance of the power module. Summary of the Invention

[0004] This application provides a power module that can reduce parasitic inductance and improve current sharing performance.

[0005] In a first aspect, this application provides a power module. The power module includes a first metal-clad substrate, multiple chips, and a first connecting piece. The first metal-clad substrate includes a first insulating substrate and a first metal layer on one side of the first insulating substrate. The first metal layer includes a first surface facing away from the first insulating substrate. The chips include a first electrode and a second electrode. The multiple chips are located on the side of the first metal layer away from the first insulating substrate, and the first electrode of each chip in the multiple chips is electrically connected to the first metal layer. At least two of the multiple chips are arranged at intervals in a first direction, and at least two of the multiple chips are arranged at intervals in a second direction. The second direction and the first direction are both parallel to the first surface and intersect. The first connecting piece is located on the side of the multiple chips away from the first insulating substrate. The first connecting piece includes a first main body portion and multiple first contact portions. The second electrode of each chip in the multiple chips is in contact with at least one of the first contact portions, and there is a part of the first main body portion between at least a pair of adjacent first contact portions. The first main body portion is insulated and spaced from the first metal layer.

[0006] Among them, the power module includes a plurality of chips arranged along a first direction and a second direction. A plurality of chips are connected in parallel through a first connecting piece. Generally, inductance is generated when a plurality of chips are connected in parallel. In the present application, there is a part of the first main body between at least a pair of adjacent first contact parts. Since the current flow path of the first main body is wider than the current flow path in the first contact part, the current flowing out from the second electrode of the chip directly flows into the first main body, strengthening the connection between the plurality of chips arranged in the first direction and the second direction, improving the consistency of parasitic parameters between the parallel chips, and further optimizing the dynamic current sharing among the plurality of parallel chips. Moreover, the first connecting piece can also increase the structural reliability of the interconnection of the plurality of chips in the first direction and the second direction, ensuring the stability of current transmission.

[0007] In a possible implementation manner, along the thickness direction of the chip, the first main body is isolated from the second electrode of the chip. The first connecting piece includes one or more grooves, and the grooves protrude from the first main body toward the first surface, and the bottom of the groove is the first contact part. The first main body is isolated from the second electrode of the chip, and the groove protrudes from the first main body toward the first surface, so that the first main body is above the second electrode of the chip, thereby improving the electrical insulation between the first main body and the first metal layer.

[0008] In a possible implementation manner, the first connecting piece includes one or more bending structures, and the bending structures include the first contact parts that contact the second electrodes of the chips. The bending structure refers to a structure that bends toward the first surface. One end of the bending structure far from the first main body protrudes toward the first surface, and the first contact part is a part of the protrusion. The first contact part contacts the second electrode, so that the first main body is located above the second electrode, thereby improving the electrical insulation between the first main body and the first metal layer.

[0009] In a possible implementation manner, the first connecting piece is an integrally formed structure. The integrally formed structure can improve the smoothness of current flow, reduce the resistance of current flow, improve current sharing and reduce inductance, and can also improve the reliability of the first connecting piece.

[0010] In a possible implementation manner, there is a part of the first main body between each pair of adjacent first contact parts. This enables each first contact part to be directly connected to the first main body, so that the current flowing out from the second electrode of each chip directly flows into the first main body through the first contact part, strengthening the connection between the plurality of chips arranged in the first direction and the second direction, improving the consistency of parasitic parameters between the parallel chips, and further optimizing the dynamic current sharing among the plurality of parallel chips.

[0011] In a possible implementation, the first contact parts are distributed on the edge of the first main body part. The distribution area of the edge of the first main body part is large, and more first contact parts can be distributed, so that more chips can be connected in parallel, thereby improving the power density of the power module.

[0012] In a possible implementation, the power module includes two first chip subgroups arranged at intervals in a first direction. Each first chip subgroup includes at least two chips arranged at intervals in a second direction. The first main body part includes a first main trunk and a plurality of first branches. The first main trunk extends in the second direction. The first branches are located on both sides of the first main trunk in the first direction and are connected to the first main trunk. In the first direction, the first main trunk is located between two adjacent first chip subgroups. In the second direction, the first branches are located between two adjacent first contact parts, and the first branches are connected to two adjacent first contact parts in the second direction. The first main trunk is electrically connected to the second metal layer. In this implementation, there are two first chip subgroups, and each first chip subgroup has at least two chips. The first connection piece connects the chips in the two first chip subgroups to connect the chips in the two first chip subgroups in parallel. Among them, the first branches connect the first contact parts on two adjacent chips arranged in the second direction, and at least part of the current coming out of these two first contact parts can flow into the first main trunk through the first branches. The first branches are directly connected between the two first contact parts, which can shorten the parallel path of two adjacent chips and improve the current sharing performance.

[0013] In a possible implementation, at least part of the first contact parts are spaced apart from the first main trunk. For example, the first contact parts on the chips at both ends of the first chip subgroup can be spaced apart from the first main trunk, which can reduce the weight of the first connection piece.

[0014] In a possible implementation, the power module further includes a second metal layer. The first metal layer and the second metal layer are located on the same side of the first insulating substrate, and the orthographic projections of the first metal layer and the second metal layer on the first insulating substrate are spaced apart. The first connection piece further includes a second contact part, and the second contact part is electrically connected to the second metal layer. The current after the first main body part converges can flow into the second metal layer through the second contact part. The current flow direction is in turn: input end, first metal layer, first electrode of the chip, second electrode of the chip, first contact part, first main body part, second contact part, second metal layer.

[0015] In a possible implementation, the first contact part adjacent to the second contact part is also connected to the second contact part. This enables the current flowing out of the first contact part to directly flow into the second contact part without detouring, reducing the current resistance and shortening the current flow path, thereby reducing the inductance.

[0016] In a possible implementation, the first contact portion adjacent to the second contact portion is also connected to the first main body. The first contact portion is connected to the first main body without a gap therebetween, such that the current flowing out of the first contact portion can directly flow into the first main body without detouring, reducing the current resistance and shortening the current flow path, thereby reducing the inductance. In this embodiment, the first contact portion is connected to both the second contact portion and the first main body, further reducing the inductance and improving the current sharing performance.

[0017] In a possible implementation, the first contact portion, the second contact portion, and the first main body portion are of an integrally formed structure. The second contact portion is a groove or a bent structure formed by the first connecting piece protruding from the first main body portion towards the second metal layer. The integrally formed structure improves the reliability of the first connecting piece and reduces the current flow resistance between the first contact portion, the second contact portion, and the first main body portion, thereby reducing the inductance and improving the current sharing performance.

[0018] In a possible implementation, the first connecting piece is of an integrally formed rectangular sheet-like structure. The first contact portion is a groove or a bent structure formed by the first main body portion protruding towards the chip, and the second contact portion is a groove or a bent structure formed by the first main body portion protruding towards the second metal layer. The integrally formed rectangular sheet-like structure can make the chips in the two first chip sub-groups arranged more closely, improving the current sharing performance between the parallel chips and effectively reducing the parasitic inductance.

[0019] In a possible implementation, the power module includes two sets of serially connected chip groups, namely the first chip group and the second chip group. The first chip group is located on the side of the first metal layer away from the first insulating substrate, and the second chip group is located on the side of the second metal layer away from the first insulating substrate. The power module further includes a second connecting piece located on the side of the second chip group away from the first insulating substrate, and multiple chips in the second chip group are connected in parallel through the second connecting piece. The two sets of serially connected chip groups can improve the power density of the power module.

[0020] In a possible implementation, the power module further includes a second metal-coated layer substrate and electronic components. The second metal-coated layer substrate is located on the first surface, and the electronic components are located on the side of the second metal-coated layer substrate away from the first metal-coated layer substrate and are electrically connected to the second metal-coated layer substrate.

[0021] Since the sizes of electronic components are generally relatively small, if the electronic components are directly soldered onto the first metal-coated substrate, it is necessary to open insulating grooves in the metal layer of the first metal-coated substrate, and electrically connect the two electrodes of the electronic component to the metal layers on both sides of the insulating groove. Opening insulating grooves in the first metal-coated substrate will reduce the chip layout space, and since there are many chips on the first metal-coated substrate, etching and grooving in the metal layer of the first metal-coated substrate may damage the pre-arranged chips or other electronic devices. In this implementation, the electronic components are transferred through the second metal-coated substrate, making the electronic component soldering process simple. Compared with directly soldering the electronic components onto the metal layer of the first metal-coated substrate, the step of opening insulating grooves in the metal layer of the first metal-coated substrate can be saved, making the circuit design on the first metal-coated substrate simpler. Insulating grooves can be provided on the second metal-coated substrate in advance according to the size of the electronic component and the positions of the two electrodes of the electronic component. Etching insulating grooves on the second metal-coated substrate will not affect the performance of the chips on the first metal-coated substrate, and then the electronic components are electrically connected to the second metal-coated substrate.

[0022] In a possible implementation, the chip further includes a third electrode, the electronic component is a gate resistor, the second metal-coated substrate is located on the first surface, the second metal-coated substrate includes a fourth electrode and a fifth electrode that are insulated from each other, and both ends of the gate resistor are electrically connected to the fourth electrode and the fifth electrode respectively. The fourth electrode is used to receive a driving current, and the fifth electrode is electrically connected to the third electrode of the chip through a first wire. Using the second metal-coated substrate to transfer the gate resistor makes the process of soldering the gate resistor simple.

[0023] In a possible implementation, in the first metal-coated substrate, the first metal layer is connected to the first insulating substrate through a metal soldering layer; the second metal-coated substrate further includes a second insulating substrate, and the fourth electrode and the fifth electrode are attached to the surface of the second insulating substrate.

[0024] In the first metal-clad substrate, along the third direction, on the side of the first insulating substrate facing the chip, there are two metal layers, namely the metal welding layer and the first metal layer. If electronic components are directly welded onto the first metal-clad substrate, since the electronic components need to conduct current, two insulatingly spaced sixth electrodes and seventh electrodes need to be provided on the first metal-clad substrate. It is necessary to remove the two metal layers, namely the partial fourth metal layer and the partial metal welding layer, between the sixth electrode and the seventh electrode through an etching process. The size of the etching along the third direction is large, which will increase the aperture of the second trench, or rather, the larger the size between the sixth electrode and the seventh electrode. However, the size of the electronic components (such as gate resistors) is small and cannot be welded onto the sixth electrode and the seventh electrode, or it will result in poor welding reliability. Based on this, the electronic components are transferred through the second metal-clad substrate, where the metal on the second metal-clad substrate is directly bonded to the second insulating substrate, such that the formed fourth electrode and fifth electrode are also directly attached to the surface of the second insulating substrate. There is no metal welding layer between the fourth electrode and the fifth electrode and the second insulating substrate. When etching and grooving to form the fourth electrode and the fifth electrode, it is not necessary to etch the metal welding layer, making the size between the fourth electrode and the fifth electrode controllably smaller, which is beneficial for welding electronic components (such as gate resistors).

[0025] In one embodiment, the first metal-clad substrate is an active metal welding substrate. An active metal welding substrate refers to a metal layer such as a copper layer or an aluminum layer being welded to the two side surfaces of an insulating substrate through a metal solder. Among them, the first metal layer, the second metal layer, the first end metal layer, the terminal metal layer, etc., which are required for the power module, can be formed by etching the copper layer. The material of the first insulating substrate in the first metal-clad substrate can be iN or AlN, making the welding reliability between the first insulating substrate and the metal plates on both sides stronger, and having good thermal conductivity, which can improve the heat dissipation effect of the power module.

[0026] In one embodiment, the second metal-clad substrate is a copper-clad ceramic substrate. The second insulating substrate is an Al 2 O 3 ceramic substrate or an AlN ceramic substrate, and the metal layer (such as copper foil) is directly bonded to the second insulating substrate at high temperature. Exemplarily, the copper foil is directly bonded to the Al 2 O 3 ceramic substrate at high temperature, and then the copper foil is formed into the fourth electrode and the fifth electrode as needed. There is no other metal layer between the copper foil and the Al 2 O 3 ceramic substrate, which can make the interval size between the fourth electrode and the fifth electrode smaller, being beneficial for welding the gate resistor.

[0027] In a possible implementation, in the first metal-clad substrate, the thicknesses of the first metal layer and the second metal layer are greater than or equal to 0.6 mm. When the thickness of the first metal layer is within the above range, the first metal layer has a relatively high power density and can quickly transmit current to multiple parallel chips. When the thickness of the second metal layer is within the above range, it can also provide the heat conduction ability of the first metal-clad substrate, thereby improving the heat dissipation effect of the power module. The second metal layer can have a relatively high power density and can quickly transmit current to multiple parallel chips in the second chip group. The larger the thicknesses of the first metal layer and the second metal layer, the better the heat dissipation effect and the greater the power density. However, the thicker the first metal layer and the second metal layer, the larger the size of the insulating trench during etching. Since the size of electronic components (such as gate resistors) is small, welding the electronic components across the trench to the two electrodes will increase the process difficulty. Based on this, when improving the power density of the power module, the process difficulty of welding electronic components can be reduced by setting the second metal-clad substrate.

[0028] In a possible implementation, the first metal-clad substrate is an insulating metal substrate. The insulating metal substrate includes an insulating resin layer and metal layers on both sides of the insulating resin layer. One of the metal layers is etched into the required circuit according to the electrical interconnection requirements, including forming the first metal layer and the second metal layer. When the thickness of the metal layer is greater than or equal to 0.6 mm, the power module has a relatively high power density. The process difficulty of welding electronic components can be reduced by setting the second metal-clad substrate to transfer the electronic components.

[0029] In a possible implementation, the electronic component is a thermistor. The second metal-clad substrate is located on the side of the first metal layer away from the first insulating substrate and is adjacent to the chip. The thermistor is used to monitor the temperature of the chip. The second metal-clad substrate for transferring the thermistor and the chip are located on the first metal layer, which can improve the accuracy of detecting the chip temperature.

[0030] In a possible implementation, the power module further includes a heat sink located on the side of the first metal-clad substrate away from the chip, and a plurality of spaced support components are provided between the heat sink and the first metal-clad substrate. To improve the heat dissipation effect, the heat sink can be welded to the side of the first metal-clad substrate away from the chip by a seventh solder. Compared with the method of bonding the heat sink to the first metal-clad substrate using thermal conductive silicone, the heat conduction effect of the welding material is better than that of thermal conductive silicone. Generally, when welding the heat sink and the first metal-clad substrate, pressure needs to be applied to the heat sink and the first metal-clad substrate. The support components can prevent the seventh solder between the first metal-clad substrate and the heat sink from being extruded due to the applied pressure during welding, resulting in an overly thin thickness of the seventh solder and causing failure. Before welding, the support components can be bonded to the surface of the heat sink facing the first metal-clad substrate, or the support components can be bonded to the surface of the first metal-clad substrate facing the heat sink. The support components can be metal wires or metal strips. The support components can also be used to control the thickness of the seventh solder, and the thickness of the support components can be designed according to requirements to make the seventh solder meet the requirements.

[0031] In a possible implementation, the support component includes two support bars arranged in parallel, and each support bar includes at least two support segments. Adjacent two support segments are arranged and spaced along the extension direction of the support bar. When the seventh solder is filled between the two support bars arranged in parallel, it is not easily extruded during pressure welding of the seventh solder, but air bubbles will be generated during high-temperature welding. If the air bubbles do not overflow, pores will be formed in the welding layer, affecting the welding reliability. By spacing the support segments, the overflow of air bubbles can be promoted and the pores can be reduced. In addition, the two support bars arranged in parallel can be used to enhance the support strength for the first metal-clad substrate and the heat sink.

[0032] In a second aspect, the present application provides a power supply system, which includes a power supply, an electrical device, and a power module as described in any one of the above. The power supply is connected to the input end of the power module, the electrical device is connected to the output end of the power module, and the power module is used to convert the direct current output by the power supply into alternating current and transmit the alternating current to the electrical device. Among them, the power module is a semiconductor device that transforms the voltage, current, frequency, etc. of the direct current output by the power supply, and is the core device for power conversion in the power supply system. For example, this power supply system can be used as the core device for DC-AC conversion of the motor control unit of an electric vehicle, output direct current from the battery of the electric vehicle, or convert direct current into alternating current required for vehicle operation, etc.

[0033] In a third aspect, the present application provides a vehicle, which includes a vehicle body and the power supply system as described above, and the power supply system is installed on the vehicle body. In some embodiments, the power supply system includes an inverter, and the inverter is provided with a power module and a control circuit. The control circuit is electrically connected to the power module, and the control circuit can control the performance parameters of the alternating current output by the power module to the motor according to the needs of the vehicle, such as voltage, current, cycle number, frequency, etc.

[0034] In a fourth aspect, the present application provides a photovoltaic system, which is characterized by including a photovoltaic module and the power module as described in any one of the above, the photovoltaic module is electrically connected to the power module, and the direct current generated by the photovoltaic module is converted into alternating current through the power module. Description of the Drawings

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be described below.

[0036] Figure 1 It is a schematic structural diagram of a power supply system provided by an embodiment of the present application;

[0037] Figure 2 It is a schematic structural diagram of a vehicle provided by an embodiment of the present application;

[0038] Figure 3 It is a schematic structural diagram of a photovoltaic system provided by an embodiment of the present application;

[0039] Figure 4 It is a schematic structural diagram of a power module provided by an embodiment of the present application;

[0040] Figure 5 It is a sectional view of a power module provided by an embodiment of the present application;

[0041] Figure 6 It is a sectional view of a chip and a first metal-clad substrate in a power module provided by an embodiment of the present application;

[0042] Figure 7 It is a schematic structural diagram of a power module with the first connecting piece removed provided by an embodiment of the present application;

[0043] Figure 8 It is a schematic structural diagram of a first connecting piece provided by an embodiment of the present application;

[0044] Figure 9 It is a schematic structural diagram of a first connecting piece provided by an embodiment of the present application;

[0045] Figure 10 It is a schematic structural diagram of a first connecting piece provided by an embodiment of the present application;

[0046] Figure 11 It is a schematic structural diagram of a first connecting piece provided by an embodiment of the present application;

[0047] Figure 12 It is a schematic structural diagram of a power module provided by an embodiment of the present application;

[0048] Figure 13 It is a schematic structural diagram of a second connecting piece provided by an embodiment of the present application;

[0049] Figure 14 It is a schematic structural diagram of a power module provided by an embodiment of the present application;

[0050] Figure 15 It is a schematic structural diagram of a power module provided by an embodiment of the present application;

[0051] Figure 16 It is the present application Figure 15 A partial enlarged view of part M in the present application;

[0052] Figure 17 It is a partial sectional view of a power module provided by an embodiment of the present application;

[0053] Figure 18 It is a schematic structural diagram of a second metal-clad substrate and a first metal-clad substrate in a power module provided by an embodiment of the present application;

[0054] Figure 19 It is a schematic structural diagram of directly soldering a gate resistor onto a first metal-clad substrate provided by an embodiment of the present application;

[0055] Figure 20 It is the present application Figure 15 A partial enlarged view of part N in the present application;

[0056] Figure 21 It is a partial sectional view of a power module provided by an embodiment of the present application;

[0057] Figure 22 It is a schematic structural diagram of directly soldering a thermistor onto a first metal-clad substrate provided by an embodiment of the present application;

[0058] Figure 23a It is a schematic structural diagram of a radiator and a support assembly provided by an embodiment of the present application;

[0059] Figure 23b It is a schematic structural diagram of a radiator and a support assembly provided by an embodiment of the present application;

[0060] Figure 24 It is a 3D-x-ray diagram of a soldering surface between a radiator and a first metal-clad substrate in a power module provided by an embodiment of the present application;

[0061] Figure 25 is a flowchart of a method for manufacturing a power module provided by an embodiment of the present application;

[0062] Figure 26 is a schematic diagram of the process of mounting a chip on a first metal-clad substrate provided by an embodiment of the present application;

[0063] Figure 27 is a schematic diagram of the process of mounting a chip on a first metal-clad substrate provided by an embodiment of the present application;

[0064] Figure 28 is a schematic diagram of the structure of a pressure head and a chip provided by an embodiment of the present application;

[0065] Figure 29 is a schematic diagram of the structure of a welding jig and a power module provided by an embodiment of the present application;

[0066] Figure 30 is a schematic diagram of the structure of a power module provided by an embodiment of the present application. Detailed implementation manners

[0067] Next, the technical solutions in the embodiments of the present application will be described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments.

[0068] In this article, terms such as "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, unless otherwise stated, the meaning of "a plurality" is two or more.

[0069] In addition, in this article, orientation terms such as "upper" and "lower" are defined relative to the orientation of the structural schematic diagram in the accompanying drawings. It should be understood that these directional terms are relative concepts, which are used for relative description and clarification, and they may change accordingly with the change of the orientation where the structure is placed.

[0070] For the convenience of understanding, first, the English abbreviations and related technical terms involved in the embodiments of the present application will be explained and described below.

[0071] MOSFET: Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide semiconductor field effect transistor.

[0072] IGBT: Insulated Gate Bipolar Transistor, an insulated gate bipolar transistor.

[0073] The present application provides a power module, including a first metal-clad substrate, a plurality of chips, and a first connection piece. The first metal-clad substrate includes a first insulating substrate and a first metal layer located on one side of the first insulating substrate. The first metal layer includes a first surface facing away from the first insulating substrate. The chips include a first electrode and a second electrode. The plurality of chips are located on the side of the first metal layer away from the first insulating substrate, and the first electrode of each chip in the plurality of chips is electrically connected to the first metal layer. At least two chips in the plurality of chips are arranged at intervals along a first direction, and at least two chips in the plurality of chips are arranged at intervals along a second direction. The second direction and the first direction are both parallel to the first surface and intersect. The first connection piece is located on the side of the plurality of chips away from the first insulating substrate. The first connection piece includes a first main body portion and a plurality of first contact portions. The second electrode of each chip in the plurality of chips is in contact with at least one of the first contact portions. There is a part of the first main body portion between at least a pair of adjacent first contact portions. The first main body portion is insulated and spaced apart from the first metal layer. By arranging a part of the first main body portion between the first contact portions connected to the chips, the current flowing out from the second electrode of the chip can directly flow into the first main body portion through the first contact portion, reducing the current flow path. By connecting the chips in parallel through the first connection piece, the winding length can be reduced when the chips are interconnected, thereby reducing the parasitic inductance of the power module. Moreover, the first connection piece can be connected to each chip, and the current flow path of the first connection piece is wide and the current flow resistance is small, which can improve the current sharing performance among the chips of the power module.

[0074] Please refer to Figure 1 , an embodiment of the present application provides a power supply system 1. The power supply system 1 includes a power module 10, a power supply 11, and an electrical device 12. The power supply 11 is connected to the input terminal 101 of the power module 10, and the electrical device 12 is connected to the output terminal 102 of the power module 10. The power module 10 is used to convert the direct current output by the power supply 11 into alternating current and transmit the alternating current to the electrical device 12. Among them, the power module 10 is a semiconductor device that transforms the voltage, current, frequency, etc. of the direct current output by the power supply 11, and is the core device for power conversion of the power supply system 1. For example, the power supply system 1 can be used as the core device for converting direct current to alternating current in the motor control unit of an electric vehicle, output direct current from the battery of the electric vehicle, or convert direct current into alternating current required for vehicle operation, etc.

[0075] Please refer to Figure 2 , Figure 2One embodiment of the present application provides a vehicle 2, which includes a vehicle body 21 and the power supply system 1 as described above. The power supply system 1 is installed on the vehicle body 21. The power supply system 1 provides a power source for the vehicle 2. The power supply system 1 in the present application has a high power density, and its application in the vehicle 2 can improve the power performance of the vehicle 2. The vehicle 2 includes an automobile (such as Figure 2 shown). In other embodiments, the vehicle 2 includes an electric vehicle or a special operation vehicle. The electric vehicle includes a two-wheel, three-wheel or four-wheel electric vehicle. The special operation vehicle includes various vehicles with specific functions, such as an engineering rescue vehicle, a sprinkler truck, a sewage suction truck, a cement mixer truck, a crane truck, and a medical vehicle. In this embodiment, the power supply 11 is a battery in the vehicle 2, and the electrical equipment 12 is a motor in the vehicle 2. In some embodiments, the power supply system 1 includes an inverter (not shown in the figure). The inverter is provided with a power module 10 and a control circuit (not shown in the figure). The control circuit is electrically connected to the power module 10. The control circuit can control the performance parameters of the alternating current output by the power module 10 to the motor according to the needs of the vehicle 2, such as voltage, current, cycle number, frequency, etc.

[0076] Please refer to Figure 3 , the power module 10 of the present application can also be applied in the photovoltaic system 3. Figure 3 One embodiment of the present application provides a photovoltaic system 3, which includes a photovoltaic module 31 and a power module 10. The photovoltaic module 31 is electrically connected to the power module 10. The direct current generated by the photovoltaic module 31 is converted into alternating current by the power module 10. The alternating current output by the power module 10 is transmitted to electrical equipment, such as a base station, a data center, etc.

[0077] Among them, the photovoltaic module 31 includes at least one photovoltaic panel 32, and the photovoltaic panel 32 is connected to the power module 10. In one embodiment, the photovoltaic module 31 includes a plurality of serially connected photovoltaic panels 32. Through the serial connection method, the direct current of the plurality of photovoltaic panels 32 is collected and then connected to the power module 10 through a connector. In some embodiments, the photovoltaic system 3 includes an inverter (not shown in the figure). The inverter is provided with a power module 10 and a control circuit (not shown in the figure). The control circuit is electrically connected to the power module 10. The control circuit can control the performance parameters of the alternating current output by the power module 10 according to the needs of the electrical equipment, such as voltage, current, cycle number, frequency, etc.

[0078] Next, the power module 10 provided by the present application will be specifically described in conjunction with the drawings and specific embodiments.

[0079] Please refer to Figure 4 and Figure 5 , Figure 4 which is a schematic structural diagram of the power module 10 provided by one embodiment of the present application. Figure 5A cross-sectional view of a power module 10 provided by an embodiment of the present application. The power module 10 includes a first metal-clad substrate 100, a plurality of chips 200, and a first connection piece 300. The first metal-clad substrate 100 includes a first insulating substrate 110, and a first metal layer 120 and a second metal layer 130 located on the same side of the first insulating substrate 110. The first metal layer 120 and the second metal layer 130 are located on the same side of the first insulating substrate 110, and the first metal layer 120 and the second metal layer 130 are insulated and spaced apart. The first metal layer 120 includes a first surface 121 facing away from the first insulating substrate 110.

[0080] Among them, the chip 200 includes a first electrode 210 and a second electrode 220 (as Figure 6 shown). A plurality of chips 200 are located on the side of the first metal layer 120 away from the first insulating substrate 110. The first electrode 210 of each chip 200 among the plurality of chips 200 is electrically connected to the first metal layer 120. At least two of the plurality of chips 200 are arranged at intervals along the first direction X (as Figure 4 shown). At least two of the plurality of chips 200 are arranged at intervals along the second direction Y. The second direction Y and the first direction X are both parallel to the first surface 121 and intersect.

[0081] Among them, the first connection piece 300 is located on the side of the plurality of chips 200 away from the first insulating substrate 110. The first connection piece 300 includes a first main body portion 310 and a plurality of first contact portions 320. Among them, the first contact portion 320 is electrically connected to the first main body portion 310. The second electrode 220 of each chip 200 among the plurality of chips 200 is in contact with at least one first contact portion 320. There is a part of the first main body portion 310 between at least a pair of adjacent first contact portions 320; the first main body portion 310 is insulated and spaced apart from the first metal layer 120.

[0082] Among them, the first metal-clad substrate 100 includes a first insulating substrate 110 and metal layers located on both sides of the first insulating substrate 110. The metal layers on both sides are insulated by the first insulating substrate 110. The first metal layer 120 and the second metal layer 130 described above are included in the metal layers located on the same side of the first insulating substrate 110.

[0083] The first metal layer 120 and the second metal layer 130 are located on the same side of the first insulating substrate 110, and the orthographic projections of the first metal layer 120 and the second metal layer 130 on the first insulating substrate 110 are spaced apart, so that the first metal layer 120 and the second metal layer 130 are insulated and spaced apart. Exemplarily, the first metal layer 120 and the second metal layer 130 can be insulated and spaced by a first trench 105 (as Figure 4As shown, the current transmission between the first metal layer 120 and the second metal layer 130 is blocked; for example, in order to better insulate the first metal layer 120 and the second metal layer 130, an insulating medium can be filled in the first trench 105. The first main body portion 310 is also electrically connected to the second metal layer 130 to transmit the current flowing into the first main body portion 310 to the second metal layer 130, or transmit the current in the second metal layer 130 to the chip 200 through the first connecting piece 300.

[0084] The sizes and setting positions of the first metal layer 120 and the second metal layer 130 can be set as needed. In this embodiment, a plurality of chips 200 are provided on the first metal layer 120. Generally, the area of the first metal layer 120 is relatively large, occupying most of the area of the first metal-clad substrate 100. The second metal layer 130 is used to connect the connection terminals of the power module 10, and the second metal layer 130 can be arranged at the edge position of the first metal-clad substrate 100.

[0085] Please refer to Figure 6 , where the chip 200 includes a first electrode 210, a second electrode 220, a third electrode 230, and a chip body 240. The first electrode 210, the second electrode 220, and the third electrode 230 are located on the chip body 240. When the chip 200 is a MOSFET, the first electrode 210 of the chip 200 is the drain of the MOSFET, the second electrode 220 of the chip 200 is the source of the MOSFET, and the third electrode 230 of the chip 200 is the gate of the MOSFET. When the chip 200 is an IGBT, the first electrode 210 of the chip 200 is the collector of the IGBT, the second electrode 220 of the chip 200 is the emitter of the IGBT, and the third electrode 230 of the chip 200 is the gate of the IGBT. Taking the chip 200 as a MOSFET as an example, when the third electrode 230 (gate) receives a driving signal, it controls the conduction between the first electrode 210 (drain) and the second electrode 220 (source). In this application, the first electrode 210 of the chip 200 is electrically connected to the first metal layer 120, so that the current of the first metal layer 120 can be transmitted to the inside of the chip body 240 through the first electrode 210 and then transmitted to the second electrode 220. In this embodiment, the first electrode 210 is located on the surface of the chip body 240 adjacent to the first metal layer 120, the second electrode 220 is located on the surface of the chip body 240 away from the first metal layer 120, and the third electrode 230 and the second electrode 220 are arranged on the side of the chip body 240 away from the first metal layer 120, and the third electrode 230 and the second electrode 220 are insulated and spaced apart.

[0086] In one embodiment, the material of the chip body 240 is SIC (silicon carbide). SIC can increase the operating frequency of the chip 200. When the same operating frequency is satisfied, the volume of the chip 200 can be reduced, so that more space can be reserved on the first metal-coated substrate 100 for installing electronic components of the power module 10, such as thermistors, gate resistors, etc. Moreover, the higher the operating frequency of the chip 200, the smaller the volume of the electronic devices around the power module 10, such as capacitors, coils, etc. However, the higher the operating frequency of the chip 200, the worse the current sharing among multiple chips 200 in the power module 10 is to control, and there is a risk of causing the failure of the power module 10. For this reason, a first connecting piece 300 capable of improving the current sharing of the power module 10 is provided in this application.

[0087] Please continue to refer to Figure 4 , the first connecting piece 300 in this application includes a first main body portion 310 and a plurality of first contact portions 320 electrically connected to the first main body portion 310. Multiple chips 200 in the power module 10 are connected in parallel through the first connecting piece 300. A pair of adjacent first contact portions 320 refers to two adjacent first contact portions 320. At least a part of the first main body portion 310 is provided between at least a pair of adjacent first contact portions 320, so that the current flowing out from the first contact portion 320 can directly flow into the first main body portion 310, reducing the current flow path to reduce the inductance. In one embodiment, a part of the first main body portion 310 is provided between each pair of adjacent first contact portions 320, so that the current flowing out from each first contact portion 320 can directly flow into the first main body portion 310, further reducing the current flow path to reduce the inductance.

[0088] In a specific embodiment, a part of the first main body portion 310 is provided between two first contact portions 320 arranged along the first direction X, which can make the current flowing out from the two first contact portions 320 arranged along the first direction X directly flow into the first main body portion 310, reducing the current flow path. Exemplarily, the second electrode of the chip 200a is in contact with the first contact portion 320a, and the second electrode of the chip 200b is in contact with the first contact portion 320b. The first contact portion 320a and the first contact portion 320b are a pair of adjacent first contact portions. A part of the first main body portion 310 is provided between the first contact portion 320a and the first contact portion 320b, so that the current flowing out from the chip 200a directly flows into the first main body portion 310 through the first contact portion 320a, and the current flowing out from the chip 200b directly flows into the first main body portion 310 through the first contact portion 320b, reducing the current flow paths of the chip 200a and the chip 200b.

[0089] There is a partial first main body portion 310 between two first contact portions 320 arranged along the second direction Y, which can make the current flowing out from the two first contact portions 320 arranged along the second direction Y directly flow into the first main body portion 310, reducing the current flow path. Exemplarily, the second electrode of chip 200a contacts the first contact portion 320a, and the second electrode of chip 200c contacts the first contact portion 320c. The first contact portion 320a and the first contact portion 320c are a pair of adjacent first contact portions. There is a partial first main body portion 310 between the first contact portion 320a and the first contact portion 320c, such that the current flowing out from chip 200a directly flows into the first main body portion 310 through the first contact portion 320a, and the current flowing out from chip 200c directly flows into the first main body portion 310 through the first contact portion 320c, reducing the current flow paths of chip 200a and chip 200c.

[0090] Since the first main body portion 310 has a relatively wide flow path, when the current flowing out from each chip 200 directly flows into the first main body portion 310, the flow path is short, which can reduce the parasitic inductance. Each chip 200 is connected in parallel to the first connection piece 300, making the chips 200 concentratedly distributed, which can improve the current sharing performance among the chips 200.

[0091] In this embodiment, the power module 10 further includes an input terminal 101 and an output terminal 102 (as Figure 4 shown). The input terminal 101 is used for inputting current, and the input terminal 101 is electrically connected to the first metal layer 120. When the input terminal 101 inputs current as needed, the current flows into the chip 200 through the first metal layer 120. After the current in the chip 200 flows from the first electrode 210 to the second electrode 220, the first contact portion 320 is used to collect the current of the second electrode 220 into the first main body portion 310. The first main body portion 310 is used to transmit the collected current to the second metal layer 130, and flow out through the second metal layer 130 into the output terminal 102, and flow out of the power module 10 through the output terminal 102. The current flow direction is in sequence: input terminal 101, first metal layer 120, first electrode 210 of chip 200, second electrode 220 of chip 200, first contact portion 320, first main body portion 310, second metal layer 130, output terminal 102.

[0092] If the first main body part 310 is not provided, and the current of each chip 200 is directly connected to the second metal layer 130 through the first contact part 320, it is necessary to increase the length of each first contact part 320 to connect the first contact part 320 with the second metal layer 130. However, increasing the length of each first contact part 320 will increase the wiring of multiple first contact parts 320, enhancing the parasitic inductance. Multiple parallel chips 200 can only be connected together through the second metal layer 130, resulting in poor consistency of parasitic parameters among multiple chips 200 and poor current sharing among individual chips 200. If an aluminum wire is used to connect the first contact part 320 and the second metal layer 130, the parasitic inductance of the aluminum wire is stronger, and the current sharing among multiple parallel chips 200 is even worse. If the same connecting piece is used to connect two or more than two chips 200 along the second direction Y and the connecting piece is connected to the second metal layer 130, compared with the method of using an aluminum wire connection, the parasitic inductance can be reduced. However, each chip 200 is connected to a different position of the connecting piece, and the distance between each chip 200 and the second metal layer 130 is different. The current flowing out of the chip 200 farthest from the second metal layer 130 still needs to flow through a part of the connecting piece on the adjacent chip 200 along the second direction Y, increasing the current flow resistance of the chip 200 adjacent to the second metal layer 130, also increasing the parasitic inductance, and the current sharing among parallel chips 200 will also deteriorate.

[0093] In the present application, the current does not need to flow through the first contact part 320 on the second electrode 220 of each chip 200. Since the current flow path of the first main body part 310 is wider than the current flow path in the first contact part 320, the current flowing out of the second electrode 220 of each chip 200 directly converges onto the first main body part 310, strengthening the connection between multiple chips 200 arranged in the first direction X and the second direction Y, improving the consistency of parasitic parameters among parallel chips 200, and further optimizing the dynamic current sharing among multiple parallel chips 200. Moreover, the first connecting piece 300 can also increase the structural reliability of the interconnection of multiple chips 200 along the first direction X and the second direction Y, ensuring the stability of current transmission.

[0094] To save the space of the power module 10 and make the arrangement of components on the power module 10 more concise, in the present embodiment, the first direction X is the length direction of the power module 10, and the second direction Y is the width direction of the power module 10. In some embodiments, the first direction X is the width direction of the power module 10, and the second direction Y is the length direction of the power module 10. To adapt to the arrangement of components in the power module 10, in some embodiments, the first direction X intersects with the width direction of the power module 10, and the second direction Y intersects with the length direction of the power module 10.

[0095] Please continue to refer to Figure 4, in a possible implementation, along the thickness direction of the chip 200, the first main body portion 310 is isolated from the second electrode 220 of the chip 200. The first connecting piece 300 includes one or more grooves 301. The grooves 301 protrude from the first main body portion 310 towards the first surface 121, and the bottom of the groove 301 is the first contact portion 320. Wherein, the thickness direction of the chip 200 is the third direction Z, and the third direction Z is perpendicular to both the first direction X and the second direction Y. The first main body portion 310 is isolated from the second electrode 220 of the chip 200, and the grooves 301 protrude from the first main body portion 310 towards the first surface 121, so that the first main body portion 310 is above the second electrode 220 of the chip 200, thereby improving the electrical insulation between the first main body portion 310 and the first metal layer 120. In an embodiment, the first contact portion 320 can be entirely the bottom of the groove 301.

[0096] It should be noted that, in a possible implementation, the peripheral wall of the groove can be complete, that is, the cross-section of the peripheral wall of the groove can be a complete ring structure. In another possible implementation, the peripheral wall of the groove can also be incomplete, that is, the cross-section of the peripheral wall of the groove is an open structure, such as Figure 4 shown by the first contact portions 320a or 320b in, the specific implementation forms of the first contact portions 320a or 320b are both grooves, but the cross-section of the peripheral wall of the groove is a U-shaped structure. It should be known that when the cross-section of the peripheral wall of the groove is an open structure, the open structure can specifically also be in an L shape or a V shape, etc.

[0097] , in a possible implementation, along the thickness direction of the chip 200, the first main body portion 310 is isolated from the second electrode 220 of the chip 200. The first connecting piece 300 includes one or more bending structures 302. The bending structure 302 includes a first contact portion 320 that contacts the second electrode 220 of the chip 200. Wherein the bending structure 302 refers to a structure that bends towards the first surface 121. One end of the bending structure 302 away from the first main body portion 310 protrudes towards the first surface 121, and the first contact portion 320 is the protruding part. The first contact portion 320 contacts the second electrode 220, so that the first main body portion 310 is located above the second electrode 220, thereby improving the electrical insulation between the first main body portion 310 and the first metal layer 120. In an embodiment, the first contact portion 320 can be entirely the part where the bending structure 302 contacts the second electrode 220 of the chip 200. In an embodiment, part of the first contact portion 320 can be the bottom of the groove 301, and part of the first contact portion 320 can be the part where the bending structure 302 contacts the second electrode 220 of the chip 200.

[0098] In a possible implementation, the first contact portions 320 are distributed on the edge of the first main body portion 310. The distribution area of the edge of the first main body portion 310 is large, and more first contact portions 320 can be distributed, so that more chips 200 can be connected in parallel, thereby improving the power density of the power module 10.

[0099] Please refer to Figure 4 、 Figure 7 and Figure 8 , Figure 7 for Figure 4 the structural schematic diagram of removing the first connecting piece 300 in Figure 8 and Figure 7 is the structural schematic diagram of the first connecting piece 300. In a possible implementation, the power module 10 includes two first chip sub - groups 203 arranged at intervals along the first direction X (as Figure 8 shown), at least two chips 200 arranged at intervals along the second direction Y are included in the first chip sub - group 203, the first main body portion 310 includes a first main trunk 311 and a plurality of first branches 312 (as Figure 8 shown), the first main trunk 311 extends along the second direction Y, the first branches 312 are located on both sides of the first main trunk 311 along the first direction X and are connected to the first main trunk 311; in the first direction X, the first main trunk 311 is located between two adjacent first chip sub - groups 203, in the second direction Y, the first branches 312 are located between two adjacent first contact portions 320, and the first branches 312 are connected to two adjacent first contact portions 320 along the second direction Y, and the first main trunk 311 is electrically connected to the second metal layer 130.

[0100] In Figure 4 and Figure 7 the shown embodiment, there are two first chip sub - groups 203, and each first chip sub - group 203 has three chips 200. The first connecting piece 300 connects the chips 200 in the two first chip sub - groups 203 to connect the chips 200 in the two first chip sub - groups 203 in parallel. Among them, the first branch 312 connects the first contact portions 320 on two adjacent chips 200 arranged along the second direction Y, and at least part of the current coming out of these two first contact portions 320 can flow into the first main trunk 311 through the first branch 312. The first branch 312 is directly connected between the two first contact portions 320, which can shorten the parallel path of two adjacent chips 200 and improve the current sharing performance.

[0101] In an embodiment, at least part of the first contact portions 320 are spaced from the first main trunk 311. For example, the first contact portions 320 on the chips 200 at both ends of the first chip sub - group 203 can be spaced from the first main trunk 311, which can reduce the weight of the first connecting piece 300.

[0102] Please continue to refer to Figure 4, in one embodiment, the first connecting piece 300 further includes a second contact portion 330. The second contact portion 330 is located on the side of the second metal layer 130 away from the first insulating substrate 110 and is electrically connected to the second metal layer 130. In the second direction Y, the second contact portion 330 is located at one end of the first main body portion 310 and is connected to the first main body portion 310. Specifically, the second contact portion 330 is located at one end of the first main branch 311 (as Figure 8 shown), and the input terminal 101 is located on the side of the first main branch 311 away from the second contact portion 330. In one embodiment, the second contact portion 330 is connected to the second metal layer 130 by welding. The current after the first main body portion 310 converges can flow into the second metal layer 130 through the second contact portion 330. The current flow direction is in sequence: input terminal 101, first metal layer 120, first electrode 210 of the chip 200, second electrode 220 of the chip 200, first contact portion 320, first main body portion 310, second contact portion 330, second metal layer 130.

[0103] In Figure 4 , in order to meet the specific design requirements of the circuit in the power module 10, the first contact portion 320c adjacent to the second contact portion 330 can be spaced apart from the first main branch 311.

[0104] Please refer to Figure 9 , in a possible implementation manner, the first contact portion 320c adjacent to the second contact portion 330 is also connected to the second contact portion 330. The current flowing out of the first contact portion 320c can directly flow into the second contact portion 330 without detouring, reducing the current resistance and shortening the current flow path, thereby reducing the inductance. In the embodiment shown in Figure 9 , the first contact portion 320c is spaced apart from the first main branch 311 by a gap J.

[0105] Please continue to refer to Figure 10 , in a possible implementation manner, the first contact portion 320c adjacent to the second contact portion 330 is also connected to the first main branch 311. The first contact portion 320c is connected to the first main branch 311 without a gap therebetween, so that the current flowing out of the first contact portion 320c can directly flow into the first main branch 311 without detouring, reducing the current resistance and shortening the current flow path, thereby reducing the inductance. In this embodiment, the first contact portion 320c is connected to both the second contact portion 330 and the first main branch 311, further reducing the inductance and improving the current sharing performance.

[0106] Please continue to refer to Figure 8, in a possible implementation, the first contact portion 320, the second contact portion 330 and the first main body portion 310 are integrally formed structures. The first contact portion 320 protrudes from the first main body portion 310 towards the chip 200, and the second contact portion 330 protrudes from the first main body portion 310 towards the second metal layer 130.

[0107] In this embodiment, the first connecting piece 300 is an integrally formed structure. A part of the first connecting piece 300 located on the side of the chip 200 away from the first insulating substrate 110 protrudes towards the chip 200 to form the first contact portion 320, and a part of the first connecting piece 300 located on the side of the second metal layer 130 away from the first insulating substrate 110 protrudes towards the first insulating substrate 110 to form the second contact portion 330. The part of the first connecting piece 300 other than the first contact portion 320 and the second contact portion 330 is the first main body portion 310. In this embodiment, the first contact portion 320, the second contact portion 330 and the first main body portion 310 are integrally formed structures, and the first contact portion 320, the second contact portion 330 and the first main body portion 310 can be formed by stamping process or die-casting process. Compared with using other components to connect the first contact portion 320, the second contact portion 330 and the first main body portion 310 to form the first connecting piece 300, the first contact portion 320, the second contact portion 330 and the first main body portion 310 being integrally formed structures can improve the smoothness of current flow, reduce the resistance of current flow, improve the current sharing performance and reduce the inductance. On the other hand, the reliability of the first connecting piece 300 can be improved.

[0108] Please refer to Figure 11 , in a possible implementation, the first connecting piece 300 is an integrally formed rectangular sheet-like structure. The first contact portion 320 is a groove or a bending structure protruding from the first main body portion 310 towards the chip 200, and the second contact portion 330 is a groove or a bending structure protruding from the first main body portion 310 towards the second metal layer 130. The integrally formed rectangular sheet-like structure can make the chips 200 in the two first chip subgroups 203 arranged more closely, improve the current sharing performance between the parallel chips 200, and can effectively reduce the parasitic inductance.

[0109] Please refer to Figure 12 , in a possible implementation, the power module 10 includes two sets of serially arranged chip groups, namely the first chip group 201 and the second chip group 202. The first chip group 201 is located on the side of the first metal layer 120 away from the first insulating substrate 110, and the second chip group 202 is located on the side of the second metal layer 130 away from the first insulating substrate 110. The power module 10 further includes a second connecting piece 400. The second connecting piece 400 is located on the side of the second chip group 202 away from the first insulating substrate 110, and multiple chips 200 in the second chip group 202 are connected in parallel through the second connecting piece 400.

[0110] AsFigure 13 As shown, the second connection piece 400 includes a second connection body 410, and a plurality of third connection structures 420 and fourth connection structures 430 that are electrically connected to the second connection body 410. The plurality of third connection structures 420 are respectively electrically connected to a plurality of chips 200 in the second chip group 202. Part of the second connection body 410 is located between two third connection structures 420 arranged along the first direction X, and part of the second connection body 410 is located between two third connection structures 420 arranged along the second direction Y. The second connection body 410 is insulated and spaced from the second metal layer 130. The fourth connection structure 430 is electrically connected to the output end 102 of the power module 10. In this embodiment, the second connection piece 400 is arranged in the opposite direction to the first connection piece 300, and the output end 102 and the input end 101 are located at the same end of the power module 10. In this embodiment, the second connection body 410 includes a second main branch and second branches, and the structure of the second main branch and second branches in the second connection piece 400 is the same as that of the first connection piece 300. Among them, the various realizable ways of the first connection piece 300 are also applicable to the second connection piece 400, and will not be elaborated here.

[0111] In this embodiment, the power module 10 further includes a first end metal layer 140. The first end metal layer 140 is insulated and spaced from the first metal layer 120 and the second metal layer 130. The fourth connection structure 430 is electrically connected to the output end 102 through the first end metal layer 140. The fourth connection structure 430 is fixedly connected to the first end metal layer 140, and the first end metal layer 140 is connected to the output end 102.

[0112] In this embodiment, when a current is input from the input end 101, the flow direction of the current is: input end 101, first metal layer 120, first chip group 201, first connection piece 300, second metal layer 130, second chip group 202, second connection piece 400, first end metal layer 140, output end. Among them, the chips 200 in the first chip group 201 are connected in parallel through the first connection piece 300, and the chips 200 in the second chip group 202 are connected in parallel through the second connection piece 400.

[0113] In some embodiments, the power module 10 can set the number of chip groups as needed, and set the number of chips 200 in each chip group. The way of connecting the chip groups in series or in parallel can be set as needed.

[0114] Please refer to Figure 14, in a possible implementation, the power module 10 includes two sets of chip groups arranged in series, namely the first chip group 201 and the second chip group 202. The first chip group 201 is located on the side of the first metal layer 120 away from the first insulating substrate 110, and the second chip group 202 is located on the side of the second metal layer 130 away from the first insulating substrate 110. The power module 10 further includes a first connecting piece 300 and a second connecting piece 400. The first connecting piece 300 is located on the side of the first chip group 201 away from the first insulating substrate 110. Multiple chips 200 in the first chip group 201 are connected in parallel through the first connecting piece 300. The second connecting piece 400 is located on the side of the second chip group 202 away from the first insulating substrate 110. Multiple chips 200 in the second chip group 202 are connected in parallel through the second connecting piece 400. In this embodiment, the structural form of the first connecting piece 300 adopts the structural form of the first connecting piece 300 as shown in Figure 11 , and the second connecting piece 400 has the same structure as the first connecting piece 300.

[0115] This application is for the purpose of explaining Figure 12 the superiority of the structures of the first connecting piece 300, the second connecting piece 400 and Figure 14 in the shown embodiment. For the shown embodiments of Figure 12 and Figure 14 , simulation tests are carried out and it is found that Figure 14 the parasitic inductance of the power module 10 shown in Figure 12 is less than the parasitic inductance of the power module 10 shown in Figure 14 . This indicates that the first connecting piece 300 and the second connecting piece 400 in Figure 12 adopt an integrally formed rectangular sheet structure, which can effectively improve the current sharing among the parallel chips 200 and can effectively reduce the parasitic inductance. This application also conducts simulation tests on the shown embodiment in Figure 12 and the method of connecting each chip 200 in parallel with a conducting wire, and it is found that Figure 12 the shown embodiment can effectively improve the current sharing among the parallel chips 200 and can effectively reduce the parasitic inductance.

[0116] Please continue to refer to Figure 5, in one embodiment, the first contact portion 320 can be soldered to the second electrode 220 of the chip 200 through the first solder S1, and the second contact portion 330 can be soldered to the second metal layer 130 through the second solder S2. The first solder S1 and the second solder S2 can be selected from at least one of tin solder and lead solder, wherein the tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforcement, and SnSb10. The materials of the first solder S1 and the second solder S2 can be selected as needed, and the first solder S1 and the second solder S2 can be the same or different. Among them, SnSb5 means that the Sb element with a weight percentage of 5% is contained in the Sn element, SnSb8 means that the Sb element with a weight percentage of 8% is contained in the Sn element, SnSb10 means that the Sb element with a weight percentage of 10% is contained in the Sn element, and SAC in SAC306 represents the three metal elements of Sn, Ag, and Cu, indicating that this product is composed of three metal components of Sn (tin), Ag (silver), and Cu (copper). Among them, 3 represents 3% of Ag, and 05 represents 0.5% of Cu. SAC multi-reinforcement also includes other metal components in the three metal components of Sn (tin), Ag (silver), and Cu (copper) to enhance the reliability of the solder.

[0117] Please continue to refer to Figure 5 , in a possible implementation, the chip 200 is connected to the first metal layer 120 through a sintering material SJ. Exemplarily, the sintering material SJ can be formed by silver paste, copper paste, or silver film. In a specific embodiment, the silver paste can include at least one of micrometer silver particle paste and nanometer silver particle paste. Among them, the micrometer silver paste refers to a silver paste made of micrometer silver particles and organic solvents, which has low cost and is safe. Generally, it is sintered under pressure, the sintering material SJ has high density, the bonding at the interface of the bonded body is firm, and the bonding reliability is high.

[0118] Optionally, in order to improve the reliability of the sintering bond and reduce costs, the sintering material SJ of the present application can be formed by micrometer silver particle paste.

[0119] To improve the reliability of sintered joints, the elastic modulus, coefficient of thermal expansion (CTE), etc. of the sintering material SJ can be adjusted by adding materials to the sintering material SJ. Exemplarily, the sintering material SJ includes a main material and fillers filled in the main material; wherein the main material includes at least one of silver paste, copper paste or silver film, the filler is formed of a material with good bonding property to the main material, and the coefficient of thermal expansion of the filler is less than that of the main material, thereby improving the bonding reliability of sintering.

[0120] Taking the main material as micron silver paste as an example, fillers are added to the micron silver paste to reduce the coefficient of thermal expansion of the micron silver paste and reduce the bonding stress, thereby improving the bonding reliability of silver soldering. Exemplarily, the filler can include at least one of nickel (Ni), Ni alloy, copper (Cu), nickel-plated copper, titanium (Ti), Ti alloy, iron (Fe), Fe alloy, Kovar (iron-nickel-cobalt alloy 4J29), and SiC powder, etc., which is not limited herein.

[0121] The present application does not limit the shape of the filler. Exemplarily, the length of the filler can be controlled between 20 μm and 100 μm, and the size of the filler in the direction perpendicular to the length direction can be controlled between 20 nm and 30 μm. The cross-section along the length direction can be circular, oval, polygonal, etc.

[0122] In the present application, the first metal layer 120 is generally copper. When the sintering material SJ is silver paste or silver film, in order to improve the bonding performance between the sintering material SJ and the first metal layer 120, the first metal layer 120 can be silver-plated at the sintering position, that is, the first metal layer 120 is covered with a silver-plated layer in the area corresponding to the sintering material. Exemplarily, the thickness of the silver-plated layer can be controlled between 0.1 μm and 30 μm. If the bonding performance between the sintering material SJ itself and the first metal-clad substrate is relatively good, silver plating may not be required. For example, when the sintering material is copper paste, the first metal-clad substrate 100 does not need to be silver-plated at the sintering position.

[0123] Please refer to Figure 5 、 Figure 15 and Figure 16 , Figure 15 which is a schematic structural diagram of the power module 10 provided in an embodiment of the present application. Figure 16 It is Figure 15 a partial enlarged view of part M in Figure 16As shown, the second metal-clad substrate 500 is located on the surface of the metal layer of the first metal-clad substrate 100. The electronic component 600 is located on the side of the second metal-clad substrate 500 away from the first metal-clad substrate 100 and is electrically connected to the second metal-clad substrate 500. Among them, the metal layer of the first metal-clad substrate 100 includes the first metal layer 120, the second metal layer 130 or other metal layers. The second metal-clad substrate 500 can be located on the surface of the first metal layer 120 or the second metal layer 130. In Figure 16 the embodiment shown, the electronic component 600 is located on the first surface 121 of the first metal layer 120. In some embodiments, the electronic component 600 is located on the second metal layer 130. It should be noted that, in order to represent the structural relationship between the second metal-clad substrate 500 and the electronic component 600, the structure of the first connecting piece 300 in Figure 15 is simplified, and the structure of the first connecting piece 300 in Figure 15 is only for illustration. For the structure of the first connecting piece 300 and the connection relationship between the first connecting piece 300 and the chip 200, please refer to the relevant descriptions in Figures 3 to 14 and other figures.

[0124] Since the size of the electronic component 600 is generally relatively small, if the electronic component 600 is directly soldered on the metal layer of the first metal-clad substrate 100, it is necessary to open an insulating trench on the metal layer of the first metal-clad substrate 100 and electrically connect the two electrodes of the electronic component 600 to the metal layers on both sides of the insulating trench. Opening an insulating trench on the first metal-clad substrate 100 will reduce the layout space of the chip 200, and since there are many chips 200 provided on the first metal-clad substrate 100, etching and grooving in the metal layer of the first metal-clad substrate 100 may damage the pre-arranged chips 200 or other electronic devices. In this embodiment, the electronic component 600 is transferred through the second metal-clad substrate 500, making the soldering process of the electronic component 600 simple. Compared with directly soldering the electronic component 600 on the metal layer of the first metal-clad substrate 100, the step of opening an insulating trench on the metal layer of the first metal-clad substrate 100 can be saved, making the circuit design on the first metal-clad substrate 100 simpler. Insulating trenches can be provided on the second metal-clad substrate 500 in advance according to the size of the electronic component 600 and the positions of the two electrodes of the electronic component 600. Etching the insulating trenches on the second metal-clad substrate 500 will not affect the performance of the chips 200 on the first metal-clad substrate 100, and then the electronic component 600 is electrically connected to the second metal-clad substrate 500.

[0125] Among them, the second metal-coated substrate 500 includes a second insulating substrate 510 and metal layers located on both sides of the second insulating substrate 510, and the electronic component 600 is electrically connected to the metal layer on one side of the second insulating substrate 510.

[0126] In a possible implementation, the electronic component 600 is a gate resistor 610 (as Figure 16 shown), the second metal-coated substrate 500 is located on the first surface 121, the second metal-coated substrate 500 includes a fourth electrode 520 and a fifth electrode 530 that are insulated from each other, and both ends of the gate resistor 610 are electrically connected to the fourth electrode 520 and the fifth electrode 530 respectively. The fourth electrode 520 is used to receive the drive current, and the fifth electrode 530 is electrically connected to the third electrode 230 of the chip 200 through the first wire 710. Using the second metal-coated substrate 500 to transfer the gate resistor 610 makes the process of soldering the gate resistor 610 simple.

[0127] Among them, the fourth electrode 520 and the fifth electrode 530 are partial metal layers on the second insulating substrate 510, and the insulating part between the fourth electrode 520 and the fifth electrode 530 is set according to the size of the gate resistor 610, so that the fourth electrode 520 and the fifth electrode 530 are insulated from each other.

[0128] Exemplarily, there is a fourth trench 550 between the fourth electrode 520 and the fifth electrode 530, and the fourth electrode 520 and the fifth electrode 530 are insulated from each other through the fourth trench 550. Among them, the fourth electrode 520, the fifth electrode 530 and the fourth trench 550 can be formed by etching the metal layer on one side surface of the second metal-coated substrate 500.

[0129] In this embodiment, the power module 10 further includes a second wire 720 and a first connection terminal 731 (as Figure 15 shown), the fourth electrode 520 is connected to the first connection terminal 731 through the second wire 720, the external control circuit sends the drive current to the first connection terminal 731, after the fourth electrode 520 receives the drive current, please refer to Figure 15 and Figure 16 , the drive current sequentially passes through the first connection terminal 731, the second wire 720, the fourth electrode 520, the gate resistor 610, the fifth electrode 530 and the first wire 710 and flows into the third electrode 230 of the chip 200. Among them, the third electrode 230 can be a gate or a grid. After the third electrode 230 receives the drive current, it can drive the conduction between the first electrode 210 and the second electrode 220. The gate resistor 610 is used to improve the switching performance of the chip 200 and can suppress the high-frequency oscillation generated when multiple chips 200 are connected in parallel. Among them, the first wire 710 is a transmission line, such as an aluminum wire, a copper wire, etc.

[0130] Please refer to Figure 17 The second metal - clad substrate 500 further includes a third metal layer 540 on a side of the second insulating substrate 510 away from the fourth electrode 520 and the fifth electrode 530. The third metal layer 540 is soldered to the first metal layer 120 on the surface of the first metal - clad substrate 100 through a third solder S3. The third solder S3 can be selected from at least one of tin - based solders and lead - based solders. Among them, the tin - based solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi - element strengthening, SnSb10. The third solder S3 can be the same as or different from the first solder S1, and the third solder S3 can be the same as or different from the second solder S2.

[0131] Among them, the gate resistor 610 can be soldered to the fourth electrode 520 and the fifth electrode 530 through a fourth solder S4. The fourth solder S4 can be selected from at least one of tin - based solders and lead - based solders. Among them, the tin - based solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi - element strengthening, SnSb10. The fourth solder S4 can be the same as or different from the first solder S1, and the fourth solder S4 can be the same as or different from the second solder S2.

[0132] Among them, the first connection terminal 731 can be soldered to the terminal metal layer 1010 at the edge of the first metal - clad substrate 100 through an eighth solder S8. The eighth solder S8 can be selected from at least one of tin - based solders and lead - based solders. Among them, the tin - based solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi - element strengthening, SnSb10.

[0133] In an embodiment, when there is one gate resistor 610 and one second metal - clad substrate 500 respectively, the third electrodes 230 of multiple chips 200 in the first chip group 201 are electrically connected to the gate resistor 610 of the same second metal - clad substrate 500 through conductive wires. That is, one gate resistor 610 controls the conduction or cut - off of the first electrode 210 and the second electrode 220 in multiple chips 200.

[0134] In an embodiment, when there are multiple gate resistors 610 and multiple second metal - clad substrates 500, and each gate resistor 610 is arranged on a second metal - clad substrate 500, the third electrode 230 of each chip 200 is electrically connected to the gate resistor 610 of one of the second metal - clad substrates 500 through a conductive wire. That is, one gate resistor 610 controls the conduction or cut - off of the first electrode 210 and the second electrode 220 in one chip 200.

[0135] In this embodiment, the chip 200 is located on the first metal layer 120. Welding the second metal-clad substrate 500 to the surface of the first metal layer 120 can make the component distribution more compact. In some embodiments, the second metal-clad substrate 500 can also be welded to the surface of the second metal layer 130.

[0136] Please refer to Figure 18 , Figure 18 which is a schematic structural diagram of the first metal-clad substrate 100 and the second metal-clad substrate 500. In a possible implementation, in the first metal-clad substrate 100, the first metal layer 120 and the second metal layer 130 are connected to the first insulating substrate 110 through a metal welding layer SH; in the second metal-clad substrate 500, the fourth electrode 520 and the fifth electrode 530 are attached to the surface of the second insulating substrate 510.

[0137] In this embodiment, in the first metal-clad substrate 100, along the third direction Z, on the side of the first insulating substrate 110 facing the chip 200, there are two metal layers, which are the metal welding layer SH and the first metal layer 120 respectively. If the electronic component 600 is directly welded to the first metal-clad substrate 100, since the electronic component 600 needs to conduct current, two sixth electrodes 103 and seventh electrodes 104 with insulating intervals need to be provided on the first metal-clad substrate 100. Please refer to Figure 19, for example, a part is etched in the first metal layer 120 as the fourth metal layer 150. The fourth metal layer 150 is arranged at an insulating interval from other parts of the first metal layer 120. The second trench 151 is etched on the fourth metal layer 150 to form the sixth electrode 103 and the seventh electrode 104. At this time, a part of the fourth metal layer 150 and a part of the metal solder layer SH between the sixth electrode 103 and the seventh electrode 104 need to be removed through an etching process. A larger size etched along the third direction Z will cause an increase in the aperture of the second trench 151, or in other words, a larger size between the sixth electrode 103 and the seventh electrode 104. However, the size of the electronic component 600 (such as the gate resistor 610) is smaller and cannot be welded on the sixth electrode 103 and the seventh electrode 104, or the welding reliability will be poor. Based on this, in the present embodiment, the electronic component 600 is transferred through the second metal-clad substrate 500. The metal on the second metal-clad substrate 500 is directly bonded to the second insulating substrate 510, so that the formed fourth electrode 520 and fifth electrode 530 are also directly attached to the surface of the second insulating substrate 510. There is no metal solder layer between the fourth electrode 520 and the fifth electrode 530 and the second insulating substrate 510. When etching and grooving to form the fourth electrode 520 and the fifth electrode 530, there is no need to etch the metal solder layer, so that the size between the fourth electrode 520 and the fifth electrode 530 can be controlled to be smaller, which is beneficial to welding the electronic component 600 (such as the gate resistor 610).

[0138] In one embodiment, the first metal-clad substrate 100 is an active metal solder substrate. The active metal solder substrate refers to a metal layer such as a copper layer or an aluminum layer welded on both side surfaces of an insulating substrate through a metal solder. The first metal layer 120, the second metal layer 130, the first end metal layer 140, the terminal metal layer 1010, etc. required for the power module 10 can be formed by etching the copper layer. The material of the first insulating substrate 110 in the first metal-clad substrate 100 can be Si 3 N 4 or AlN, so that the welding reliability between the first insulating substrate 110 and the metal plates on both sides is stronger, and it has good thermal conductivity, which can improve the heat dissipation effect of the power module 10.

[0139] In one embodiment, the second metal-clad substrate 500 is a copper-clad ceramic substrate. The second insulating substrate 510 is an Al 2 O 3 ceramic substrate or an AlN ceramic substrate. The metal layer (such as a copper foil) is directly bonded to the second insulating substrate 510 at a high temperature. Exemplarily, the copper foil is directly bonded to the Al 2 O 3 ceramic substrate at a high temperature, and then the copper foil is formed into the fourth electrode 520 and the fifth electrode 530 as needed. Between the copper foil and the Al 2O 3 There is no other metal layer between the ceramic substrates, which can make the interval dimension between the fourth electrode 520 and the fifth electrode 530 smaller, facilitating the soldering of the gate resistor 610.

[0140] In a possible implementation, in the first metal-clad substrate 100, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 0.6 mm. When the thickness of the first metal layer 120 is within the above range, the first metal layer 120 has a high power density and can quickly transmit current to multiple parallel chips 200. When the thickness of the second metal layer 130 is within the above range, it can also provide the heat conduction ability of the first metal-clad substrate 100, thereby improving the heat dissipation effect of the power module 10. The second metal layer 130 can have a high power density and can quickly transmit current to multiple parallel chips 200 in the second chip group 202. The larger the thickness of the first metal layer 120 and the second metal layer 130, the better the heat dissipation effect and the greater the power density. However, the thicker the first metal layer 120 and the second metal layer 130, the larger the size of the insulating trench during etching. Since the size of the electronic component 600 (such as the gate resistor 610) is small, welding the electronic component 600 across the trench to the two electrodes will increase the process difficulty. Based on this, when improving the power density of the power module 10, by setting the second metal-clad substrate 500, the process difficulty of soldering the electronic component 600 is reduced.

[0141] Exemplarily, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 0.8 mm.

[0142] Exemplarily, the thickness of the first metal layer 120 and the second metal layer 130 is greater than or equal to 1.2 mm.

[0143] In a possible implementation, the first metal-clad substrate 100 is an insulating metal substrate. The insulating metal substrate includes an insulating resin layer and metal layers on both sides of the insulating resin layer. One of the metal layers is etched into the required circuit according to the electrical interconnection requirements, including forming the first metal layer 120 and the second metal layer 130. When the thickness of the metal layer is greater than or equal to 0.6 mm, the power module 10 has a high power density. The electronic component 600 can be transferred by setting the second metal-clad substrate 500 to reduce the process difficulty of soldering the electronic component 600.

[0144] Please continue to refer to Figure 15, in a possible implementation, the power module 10 includes two second metal-clad layer substrates. One of the second metal-clad layer substrates 500 is used for soldering the gate resistor 610, and the other second metal-clad layer substrate 500a is used for soldering the thermistor 620. In some embodiments, only one second metal-clad layer substrate may be used for soldering the thermistor 620.

[0145] Please refer to Figure 20 and Figure 21 , Figure 20 is Figure 15 a partial enlarged view of the N part in Figure 21 is a cross-sectional view of the part including the thermistor 620 in the power module 10. In this embodiment, the electronic component 600 is the thermistor 620. The second metal-clad layer substrate 500a is located on the side of the second metal layer 130 away from the first insulating substrate 110 and is disposed adjacent to the chip 200 on the second metal layer 130. The thermistor 620 is used to monitor the temperature of the chip 200. In some embodiments, the electronic component 600 is the thermistor 620. The second metal-clad layer substrate 500a is located on the side of the first metal layer 120 away from the first insulating substrate 110 and is disposed adjacent to the chip 200 on the first metal layer 120. The thermistor 620 is used to monitor the temperature of the chip 200. That is, the second metal-clad layer substrate 500 for connecting the thermistor 620 and the chip 200 are located on the same metal layer, for example, both on the first metal layer 120 or both on the second metal layer 130. In other embodiments, according to the design requirements of the power module 10, the second metal-clad layer substrate 500 for connecting the thermistor 620 and the chip 200 are both disposed on other metal layers.

[0146] Please refer to Figure 20 and Figure 21 , in this embodiment, the second metal-clad layer substrate 500a includes a fourth electrode 520a and a fifth electrode 530a that are insulated from each other. Two ends of the thermistor 620 are electrically connected to the fourth electrode 520a and the fifth electrode 530a respectively. The power module 10 further includes a second connection terminal 732 and a third connection terminal 733 (as shown in Figure 20 ). The fourth electrode 520a and the fifth electrode 530a are electrically connected to the second connection terminal 732 and the third connection terminal 733 respectively. The second connection terminal 732 and the third connection terminal 733 are connected to an external control circuit, and the temperature of the chip 200 is monitored through the thermistor 620. The thermistor 620 can be a negative temperature coefficient thermistor or a positive temperature coefficient thermistor. The second connection terminal 732 and the third connection terminal 733 can be soldered on the terminal metal layer, and the terminal metal layers under each connection terminal are insulated from each other.

[0147] In this embodiment, the power module 10 further includes a third conductive wire 170 and a fourth conductive wire 180, the fourth electrode 520a and the second connection terminal 732 are connected via the third conductive wire 170, and the fifth electrode 530a and the third connection terminal 733 are connected via the fourth conductive wire 180. The third conductive wire 170 and the fourth conductive wire 180 may be aluminum wires or copper wires.

[0148] In this embodiment, the thermistor 620 is disposed on the second metal-clad substrate 500a, and the second metal-clad substrate 500a is disposed on the second metal layer 130, and the thermistor 620 is disposed adjacent to the chip 200, so that the temperature measurement is more accurate. If the thermistor 620 is directly welded on the second metal layer 130, the thermistor 620 needs to be welded in the groove between the second metal layer 130 and other metal layers. Figure 22 , exemplarily, the power module 10 further includes a second end metal layer 160, a third groove 106 is provided between the second metal layer 130 and the second end metal layer 160, both ends of the thermistor 620 are arranged on the second metal layer 130 and the second end metal layer 160, only one end of the thermistor 620 is connected to the second metal layer 130, the chip 200 is located on the second metal layer 130, when the chip 200 generates heat after operation, the temperature of the chip 200 is directly transmitted to the second metal layer 130, so that the temperature of the second metal layer 130 is close to the temperature of the chip 200, when only one end of the thermistor 620 is connected to the second metal layer 130, the temperature of the second metal layer 130 is close to the temperature of the chip 200, When the second metal layer 130 is connected, and the other end of the thermistor 620 is connected to the second end metal layer 160, the second end metal layer 160 and the second metal layer 130 are separated by the third groove 106, so that the heat of the second metal layer 130 cannot be transferred to the second end metal layer 160, and the temperature difference between the second end metal layer 160 and the second metal layer 130 is large, so that the temperature of one end of the thermistor 620 connected to the second end metal layer 160 is lower than the temperature of one end of the thermistor 620 connected to the second metal layer 130, so that the overall temperature monitoring accuracy of the thermistor 620 with respect to the chip 200 is deteriorated. In this embodiment, the second metal-clad substrate 500a is located in the second metal layer 130, and the thermistor 620 is welded on the second metal-clad substrate 500a (such as Figure 21 As shown in FIG. 1 , the temperatures of the two ends of the thermistor 620 are close to each other, and the second metal-clad substrate 500a is disposed on the first metal layer 120 and adjacent to the chip 200, so that the monitoring accuracy of the temperature of the chip 200 can be improved.

[0149] It should be understood that when the second metal-clad substrate 500 for transferring the thermistor 620 and the chip 200 are both located on the first metal layer 120 , the monitoring accuracy of the temperature of the chip 200 can also be improved.

[0150] Among them, the thermistor 620 can be soldered to the fourth electrode 520a and the fifth electrode 530a through the fifth solder S5. The fifth solder S5 can be selected from at least one of tin solder and lead solder. The tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-element strengthening, and SnSb10. The fifth solder S5 can be the same as or different from the first solder S1, and the fifth solder S5 can be the same as or different from the second solder S2.

[0151] Among them, the second metal-clad substrate 500a can be soldered to the surface of the first metal layer 120 facing away from the first insulating substrate 110 through the sixth solder S6. The sixth solder S6 can be selected from at least one of tin solder and lead solder. The tin solder can be selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-element strengthening, and SnSb10. The sixth solder S6 can be the same as or different from the first solder S1, and the sixth solder S6 can be the same as or different from the second solder S2.

[0152] In this embodiment, the first metal-clad substrate 100 is one of an active metal soldering substrate and an insulating metal substrate, and the second metal-clad substrate 500a is a copper-clad ceramic substrate.

[0153] In some embodiments, the metal layer on the second metal-clad substrate 500 can be used as a signal trace, which is beneficial to improving the flexibility of the line distribution of the power module 10. Among them, some lines can be made of the metal layer on the first metal-clad substrate 100, and some lines can be made of the metal layer on the second metal-clad substrate 500, making the line distribution more flexible.

[0154] Please continue to refer to Figure 5 , in a possible implementation manner, the power module 10 further includes a heat sink 800. The heat sink 800 is located on the side of the first metal-clad substrate 100 away from the chip 200. A plurality of spaced-apart support components 900 are provided between the heat sink 800 and the first metal-clad substrate 100. The heat sink 800 can be a water-cooled heat sink, which is not limited here, and is used to dissipate heat from the power module 10 and improve the power density of the power module 10. In this embodiment, in order to improve the heat dissipation effect, the heat sink 800 can be soldered to the side of the first metal-clad substrate 100 away from the chip 200 through the seventh solder S7. Compared with the method of bonding the heat sink 800 to the first metal-clad substrate 100 using thermal conductive silicone, the thermal conductivity of the soldering material is better than that of thermal conductive silicone.

[0155] Among them, the first metal-clad substrate 100 includes a fifth metal layer 190 on one side of the first insulating substrate 110 away from the first metal layer 120. The heat sink 800 is welded to the fifth metal layer 190 through a seventh solder S7. The heat sink 800 includes a heat sink bottom plate 810 and a heat sink cover plate 820. Heat dissipation teeth 811 are provided on the heat sink bottom plate 810. Channels are formed between the heat dissipation teeth 811, and a cooling medium can flow through the channels to achieve heat dissipation through the cooling medium.

[0156] Generally, when welding the heat sink 800 and the first metal-clad substrate 100, pressure needs to be applied to the heat sink 800 and the first metal-clad substrate 100. Among them, the support assembly 900 can prevent the seventh solder S7 between the first metal-clad substrate 100 and the heat sink 800 from being extruded due to the applied pressure during welding, resulting in an overly thin thickness of the seventh solder S7 and causing failure. Before welding, the support assembly 900 can be bonded to the surface of the heat sink 800 facing the first metal-clad substrate 100, or the support assembly 900 can be bonded to the surface of the first metal-clad substrate 100 facing the heat sink 800. The support assembly 900 can be a metal wire or a metal strip. The support assembly 900 can also be used to control the thickness of the seventh solder S7, and the thickness of the support assembly 900 can be designed as needed to make the seventh solder S7 meet the requirements.

[0157] Please refer to Figure 23a , in a possible implementation, the support assembly 900 includes two support bars 910 arranged in parallel. The support bars 910 include at least two support segments 911. Adjacent two support segments 911 are arranged along the extending direction of the support bars 910 and are spaced apart. When the seventh solder S7 is filled between the two support bars 910 arranged in parallel, the seventh solder S7 is not easily extruded during pressure welding, but bubbles will be generated during high-temperature welding. If the bubbles do not overflow, pores will be formed in the welding layer, affecting the welding reliability. By spacing the support segments 911 apart, the overflow of bubbles can be promoted and the pores can be reduced. In addition, the two support bars 910 arranged in parallel can be used to enhance the support strength for the first metal-clad substrate 100 and the heat sink 800.

[0158] Please refer to Figure 23b , in some embodiments, the support assembly 900 can be formed on the surface of the heat sink 800 facing the first metal-clad substrate 100 by stamping. The support assembly is in the shape of a boss, as shown by 900a in Figure 23b ; or the support assembly is in the shape of a dot, as shown by 900b in Figure 23b ; or the support assembly is in the shape of a crater, as shown by Figure 23bas shown by 900c in [the figure]. In other embodiments, the support component 900 can also be of other shapes. In some embodiments, the boss-shaped, dot-shaped, or volcano-shaped support components 900 on the surface of the radiator 800 can be one or more combinations. In some embodiments, the boss-shaped, dot-shaped, or volcano-shaped support components 900 can be one or more respectively, which can be specifically set according to needs.

[0159] Please refer to Figure 24 , Figure 24 is a 3D-x-ray diagram of the welding surface between the radiator 800 and the first metal-clad substrate 100 in the power module 10 provided by an embodiment of the present application, where Figure 24 Figure (a) in [the figure] is a 3D-x-ray diagram of the welding surface between the seventh solder S7 and the first metal-clad substrate 100, Figure 24 Figure (b) in [the figure] is a 3D-x-ray diagram of the welding surface between the seventh solder S7 and the radiator 800. In this embodiment, the support component 900 in the embodiment shown by Figure 23a is adopted, and the SnSb5 solder is used as the seventh solder S7 to solder the radiator 800 and the first metal-clad substrate 100, and the power module 10 is subjected to a temperature shock test. The temperature shock test conditions are: maintaining at -40°C (low temperature) for 15 minutes and at 125°C (high temperature) for 15 minutes. One low temperature and one high temperature count as one cycle, and 1000 cycles are carried out. It can be seen from Figure 24 that there is no white color in the edge corner area in the figure, indicating that the welding surface between the seventh solder S7 and the radiator 800 has not peeled off, and the welding surface between the seventh solder S7 and the first metal-clad substrate 100 has not peeled off, indicating that adopting the support component 900 shown by Figure 23a can improve the welding reliability between the radiator 800 and the first metal-clad substrate 100.

[0160] In one embodiment, the seventh solder S7 is selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, SAC multi-reinforcement, lead-based high-temperature solder, SnSb10, hypereutectic Sn-Sb, Sn-Sb-X, where the lead-based high-temperature solder refers to a solder with a lead content greater than or equal to 85%, which requires a relatively high temperature to melt, and Sn-Sb-X refers to doping other elements such as nickel, bismuth, and copper in Sn and Sb. The welding temperature can be set according to the specific material of the seventh solder S7 during welding. For example, when using a lead-based high-temperature solder, the welding temperature can be set to be greater than or equal to 300°C; for another example, when using SAC305, the welding temperature can be set to 260°C.

[0161] In some embodiments, in order to save welding time and welding process, each component in the power module 10 and the heat sink 800 are welded by a single reflow soldering process; or by two reflow soldering processes, the first reflow soldering process is used to weld each component on the first metal-clad substrate 100, and the second reflow soldering process is used to weld the heat sink 800 on the side of the first metal-clad substrate 100 away from the chip 200. The components include the first connecting piece 300, the second connecting piece 400, the thermistor 620, the gate resistor 610, and the connecting terminals.

[0162] Please continue reading Figure 5 , exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 is selected from at least one of SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforced solders, since SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforced solders are medium-temperature solders, and the maximum temperature that the thermistor 620 can withstand is 260°C, the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 can be completed through a single reflow soldering process, and the temperature of the reflow soldering process is set to 260°C.

[0163] Exemplarily, when the solder material used by the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 is selected from at least one of SnSb5, SAC305, and SAC multi-reinforced, and the solder material used by the seventh solder S7 is selected from at least one of lead-based high-temperature solder, SnSb10, peritectic Sn-Sb, and Sn-Sb-X, since the seventh solder S7 is a high-temperature solder, it needs to be melted at a higher temperature to achieve welding, and the maximum welding temperature resistance of each component is low. For example, the maximum welding temperature resistance of the thermistor 620 is 260°C, and at this time, two reflow soldering processes are required. The temperature of the first reflow soldering process is set to 300°C (or greater than 300°C), the seventh solder S7 is soldered, the heat sink 800 is soldered to the side of the first metal-clad substrate 100 away from the chip 200, and then the second reflow soldering process is performed. The temperature of the second reflow soldering process is set to 260°C. At this time, the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 are soldered, and the first connecting piece 300, the thermistor 620, the gate resistor 610, the first connecting terminal 731 and other components corresponding to each solder are soldered to the first metal-clad substrate 100.

[0164] Exemplarily, when the solder materials of the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 are selected from at least one of lead-based high-temperature solders, SnSb10, hypereutectic Sn-Sb, and Sn-Sb-X, the thermistor 620 can select a thermistor with a maximum solder-resistant temperature greater than 300 °C, so that the power module 10 can be completed by a single reflow soldering process.

[0165] Exemplarily, when the solder materials of the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8 are selected from at least one of Sn-Sb-X, SnSb5, SnSb8, SnSbAg, SAC305, and SAC multi-reinforcement, and the seventh solder S7 uses a lead-based high-temperature solder, SnSb10, and hypereutectic Sn-Sb, since the soldering temperature of the seventh solder S7 is higher than that of the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8, a two-step reflow soldering process can be used to complete it. In this embodiment, the temperature settings of the two-step reflow soldering process are greater than or equal to 300 °C, but the temperatures of the two-step reflow soldering process are not the same. The temperature during soldering of the seventh solder S7 is higher than that of the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, and the eighth solder S8.

[0166] In some embodiments, to increase the soldering reliability between the first metal-clad substrate 100 and the heat sink 800, or to increase the soldering reliability of each component on the first metal-clad substrate 100, the solder can be selected according to the materials of the surfaces that are not easily soldered.

[0167] Please refer to Figure 25 , in one embodiment, the present application also provides a method for manufacturing a power module 10, including step S100, step S200, step S300, and step S400. The detailed steps are as follows.

[0168] Step S100, mount the chip 200 on one side of the first metal-clad substrate 100 through the sintering material SJ.

[0169] Exemplarily, the first metal-clad substrate 100 is an active metal layer substrate, including a first insulating substrate 110 and a copper layer welded to one side of the first insulating substrate 110. The first insulating substrate 110 is a SiN ceramic substrate, and the thickness of the copper layer is 0.8 mm. The copper layer is etched as needed to form the first metal layer 120, the second metal layer 130, the first end metal layer 140, etc. In some embodiments, the thickness of the copper layer can be set as needed.

[0170] Optionally, the first metal-coated substrate 100 may also be an insulated metal substrate.

[0171] In the chip 200 (as shown in Figure 6 ), the first electrode 210 is located on the side of the chip body 240 facing the first metal layer 120, where the first electrode 210 includes Ti / Ni / Au, and Ti / Ni / Au means that Ti, Ni, and Au are sequentially welded to one side of the chip body 240 (as shown in Figure 6 ). Optionally, the first electrode 210 may also be one of Ti / Ni / Ag, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, or Ni(P) / Ag, where Ni(P) represents doping P element in Ni element, and NiV refers to an alloy of Ni element and V element. Optionally, the second electrode 220 is one of Ti / Ni / Au, Ti / Ni / Ag, Ti / NiV / Ag, Ti / NiV / Au, Ni(P) / Pd / Au, Ni(P) / Pd / Ag, Ni(P) / Au, or Ni(P) / Ag.

[0172] Optionally, in order to improve the electrical performance of the chip 200, a NiSi layer may also be provided between the first electrode 210 and the chip body 240.

[0173] Exemplarily, when the sintering material SJ is copper paste or silver paste, please refer to Figure 26 , the chip 200 can be mounted on the first metal-coated substrate 100 through the following steps:

[0174] Step S101a, printing the sintering material SJ on the first metal-coated substrate.

[0175] In specific implementation, as shown in steps a and b in Figure 26 , the steel mesh 41 printing process or the screen printing process can be used to print the sintering material SJ (silver paste) on the corresponding sintering area of the first metal-coated substrate 100 through the squeegee 42. Since the steel mesh 41 printing process has lower cost and is simpler to manufacture than the screen printing process. Therefore, optionally, the present application uses the steel mesh printing process to print copper paste or silver paste on the corresponding sintering area of the first metal-coated substrate 100.

[0176] In one embodiment, the side of the opening 43 of the stencil 41 can be set to be narrower at the top and wider at the bottom, an inclined surface or an inclined curved surface, so that the thickness of the sintered material at the edge of the opening 43 is thinner, to reduce the edge protrusion of the sintered material SJ after printing, improve the printing quality, and reduce the stress risk of the chip 200. If the edge of the opening 43 is set to be of the same thickness as the middle part, then the sintered material SJ filled at the edge of the opening 43 is thicker. When the stencil is removed after printing, the stencil will pull up the sintered material adjacent to the edge of the opening, causing the edge protrusion of the sintered material SJ. If the edge of the side opening 43 is set to be narrower at the top and wider at the bottom, so that the sintered material SJ filled at the edge of the opening 43 is reduced, the problem of the edge protrusion of the sintered material SJ can be avoided.

[0177] Exemplarily, the thickness of the printed copper paste or silver paste can be controlled between 30 μm and 160 μm, and can be specifically designed according to

[0178] the actual product, and no limitation is made here.

[0179] In one embodiment, the area of the printed copper paste or silver paste can be set to be larger than the area of the corresponding sintering area on the chip 200 to absorb the alignment error between the chip 200 and the sintered material SJ. The boundary of the copper paste or silver paste can extend 20 μm to 300 μm outward from the target boundary (the sintering area boundary of the chip in the ideal state).

[0180] Step S102a, perform pre-drying treatment on the printed sintered material SJ.

[0181] In specific implementation, the purpose of performing pre-drying treatment on the printed copper paste or silver paste is to prevent the sintered material from collapsing during pressure sintering.

[0182] Exemplarily, as Figure 26 shown in step c, the sintered material SJ (copper paste or silver paste) printed on the first metal-clad substrate 100 can be pre-dried at a temperature of 100 °C to 180 °C for 5 min to 40 min in an N2 atmosphere.

[0183] Step S103a, mount the chip 200 on the sintered material SJ of the first metal-clad substrate 100 and apply pressure.

[0184] In specific implementation, as Figure 26 shown in step d, the chip 200 can be first vacuum-adsorbed by the metal nozzle 44 to lift the chip 200, and then through the image recognition system, the sintered material SJ (copper paste or silver paste) is aligned, and then the chip 200 is fixed on the dried sintered material SJ (copper paste or silver paste) and pressure is applied.

[0185] Exemplarily, the chip 200 mounting conditions may be: the temperature is controlled at 100°C to 180°C, the pressure is controlled at 0.1 MPa to 10 MPa, and the time is controlled at 10 ms to 999 ms. That is, a pressure of 0.1 MPa to 10 MPa is applied to the chip 200 mounted on the first metal-clad substrate 100 for at least 10 ms in an environment where the temperature is 100°C to 180°C.

[0186] In some embodiments, a silver film may be used as the sintering material.

[0187] Exemplarily, when the sintering material SJ is the silver film SJ01, please refer to Figure 27 and the chip 200 can be mounted on the first metal-clad substrate 100 through the following steps:

[0188] Step S101b, adhere the silver film SJ01 on the side of the chip 200 facing the first metal-clad substrate 100.

[0189] In a specific implementation, as shown in step a in Figure 27 , the chip 200 can be adsorbed by the metal nozzle 44, and the temperature of the metal nozzle 44 is 80°C to 200°C. Then the chip 200 is pressed on a large piece of silver film SJ01, and a pressure of 0.1 MPa to 5 MPa is applied for a pressurization time of 1 ms to 10,000 ms. In this way, the silver film SJ01 under the chip 200 is compressed and semi-sintered and adhered to the chip 200. There is a silver film support layer 45 under the silver film SJ01. After the chip 200 is attached to the silver film SJ01, the silver film support layer 45 is removed, and then the silver film SJ01 is attached to the first metal layer 120 or the second metal layer 130 of the first metal-clad substrate 100.

[0190] In an embodiment, the surface of the first metal-clad substrate 100 can be bare copper or silver-plated. To enhance the bonding force, it is generally silver-plated, and the thickness of the silver-plated layer is about 0.1 - 30 μm, and then the silver film is attached to the silver-plated layer.

[0191] Step S102b, mount the chip 200 with the adhered silver film SJ01 on the first metal-clad substrate 100 and apply pressure.

[0192] In a specific implementation, as shown in step b in Figure 27 , the chip 200 can be lifted by vacuum adsorption first, then the first metal-clad substrate 100 is aligned through the image recognition system, and then the chip 200 with the adhered silver film SJ01 is fixed on the first metal-clad substrate 100 and pressurized.

[0193] Exemplarily, the chip mounting conditions for the chip 200 can be: the temperature is controlled at 100°C to 180°C, the pressure is controlled at 0.1 MPa to 10 MPa, and the time is controlled at 10 ms to 999 ms. That is, a pressure of 0.1 MPa to 10 MPa is applied to the chip 200 mounted on the first metal-clad substrate 100 for at least 10 ms in an environment where the temperature is 100°C to 180°C.

[0194] Please refer to Figure 28 , in one embodiment, the second electrode 220 and the third electrode 230 in the chip 200 are lower than the part of the chip body 240 around the second electrode 220 and the third electrode 230, so that a pressure-resistant ring 241 higher than the second electrode 220 and the third electrode 230 is formed around the second electrode 220 and the third electrode 230. The pressure-resistant ring 241 is a part of the chip body 240, the material of the pressure-resistant ring 241 is SiC, and the height of the pressure-resistant ring 241 is 10 μm higher than the height of the second electrode 220 and the third electrode 230, so that when the chip 200 is pressurized, the pressure head 46 contacts the pressure-resistant ring 241 without damaging the second electrode 220 and the third electrode 230.

[0195] After the chip 200 is mounted, step S104 is executed.

[0196] Step S104, pressure sintering is performed on the chip 200 mounted on the first metal-clad substrate 100.

[0197] Pressure sintering means applying pressure to the bonded body at high temperature to increase the density of the sintered body, promote the atomic diffusion between the sintered material particles and at the interface between the sintered material and the bonded body, and enhance the bonding strength and bonding reliability. The present application does not limit the process of pressure sintering adopted, and any known method can be used.

[0198] In specific implementation, as Figure 26 in step e and Figure 27 in step c shown, the pressure head 46 can be used to perform pressure sintering on the chip 200 mounted on the first metal-clad substrate 100. Taking the area of the pressure head as 50 mm * 50 mm as an example, the parallelism of the pressure head 46 can be set to ≤ 5 μm to reduce the warping of the sintered product.

[0199] Exemplarily, the sintering conditions for pressure sintering are: the sintering temperature is controlled at 200°C to 300°C, the applied pressure is controlled at 5 MPa to 30 MPa, and the sintering time is controlled at 1 min to 10 min.

[0200] In specific implementation, the pressure sintering process can be carried out in an air environment. To prevent product oxidation, pressure sintering is performed on the chip 200 mounted on the first metal-clad substrate 100 in a protective atmosphere or a vacuum environment. The protective atmosphere can be a reducing atmosphere or an inert atmosphere. Exemplarily, the protective atmosphere can be N2, a mixed gas of N2 and H2, Ar, He, etc., which is not limited herein.

[0201] To prevent damage to the chip 200 by the pressure head 46 during the sintering process, as Figure 27 shown in step c of Figure 26 and step e of

[0202] when pressure sintering the chip 200 mounted on the first metal-clad substrate 100, a removable stress relief film 47 can also be placed between the chip 200 and the pressure head 46. Thus, during pressure sintering, the stress relief film 47 can prevent the direct contact between the pressure head 46 and the chip 200 and reduce the damage caused by stress concentration of the pressure head 46 to the chip 200. After the pressure sintering is completed, the stress relief film 47 can be removed.

[0202] Exemplarily, the thickness of the stress relief film 47 can be set to 50μm - 90μm, which is not limited herein.

[0203] Exemplarily, the stress relief film 47 can be an organic film such as a Teflon film, which is not limited herein.

[0204] Step S105, cooling the product after pressure sintering.

[0205] In one embodiment, after sintering is completed, the product can be cooled in a protective atmosphere and under pressure to control the warpage of the sintered product. As Figure 26 shown in step f of Figure 27 and step d of

[0206] to enhance cooling, it can be cooled by circulating cooling water 48 or using nitrogen cooling.

[0206] Step S200, welding each component and the radiator 800 on one side of the first metal-clad substrate 100.

[0207] Before welding the power module 10, each component and the corresponding solder are attached to the preset positions, and the radiator 800 is set at the bottom of the first metal-clad substrate 100. Please refer to Figure 29, the welding jig 1100 can be used to position each component of the power module 10 and the heat sink 800, where the components include the first connection piece 300, the second connection piece 400, the thermistor 620, the gate resistor 610, or the lead frame 1000. The lead frame 1000 can be cut as needed to form connection terminals, such as the first connection terminal 731, the second connection terminal 732, and the third connection terminal 733, etc. After welding, the excess part of the lead frame 1000 is cut off as needed to form the first connection terminal 731, the second connection terminal 732, and the third connection terminal 733. Among them Figure 29 For illustration only, it does not represent the structure of the power module 10 and the structure shape of the welding jig in a specific embodiment.

[0208] Among them, the welding jig 1100 includes an upper jig 1101 and a lower jig 1102. The upper jig 1101 and the lower jig 1102 are provided with positioning holes. The first metal-clad substrate 100 with chips 200, electronic components 600 and corresponding solder, and the lead frame 1000 are placed between the upper jig 1101 and the lower jig 1102 and positioned as needed. In order to adjust the warpage of the first metal-clad substrate and ensure the warpage of the lead frame 1000 during reflow soldering, the upper jig 1101 and the lower jig 1102 are pressed tightly by bolts. Exemplarily, spring grooves and high-temperature springs can be provided on the upper pressure plate, and the first metal-clad substrate 100 and the lead frame 1000 can be flattened by the spring force. After the product and the reflow soldering jig 1100 are fixedly installed, they are placed in a vacuum reflow furnace for reflow soldering. The bottom reflow jig has an opening position so that the heat dissipation teeth 811 on the heat sink bottom plate 810 in the heat sink 800 can be placed.

[0209] In one embodiment, in order to prevent the solder between the first metal-clad substrate 100 and the heat sink 800 from being extruded due to the applied pressure during reflow soldering, resulting in too thin solder thickness and failure, a support assembly 900 is pre-implanted on the welding surface of the heat sink 800 by ultrasonic waves. Exemplarily, the support assembly 900 is a broken metal wire, such as a copper wire or an aluminum wire. As Figure 23a shown, these metal wire segments can not only be used to support the first metal-clad substrate 100, but also promote the escape of bubbles during reflow soldering, avoiding the generation of pores and affecting the welding reliability.

[0210] In one embodiment, the heat sink 800, the thermistor 620, the gate resistor 610, the second metal-clad substrate 500, and the lead frame 1000 can be set with the material of the solder to achieve one-time reflow soldering or multiple reflow soldering, which can be specifically set according to needs. The form of each corresponding solder can be a solder sheet or solder paste.

[0211] In one embodiment, when the solder is a solder tab, formic acid vapor vacuum reflow is used. Using a pick-and-place machine, the solder tab is placed in the corresponding position. Then, the second metal-clad substrate 500, the thermistor 620, the gate resistor 610, the first connecting piece 300, and the lead frame 1000 are placed on the corresponding solder tab by the pick-and-place equipment. The gate resistor 610 and the thermistor 620 can be soldered onto the second metal-clad substrate 500, or after the second metal-clad substrate 500 is placed on the solder tab on the first metal-clad substrate 100.

[0212] In one embodiment, when the solder is solder paste, the solder paste is applied to the position to be soldered by 3D printing or dispensing. The second metal-clad substrate 500, the thermistor 620, the gate resistor 610, the first connecting piece 300, and the lead frame 1000 are placed on the corresponding solder paste by the pick-and-place equipment. The fixing bolts are tightened and placed in a vacuum reflow oven for soldering.

[0213] Step S300, form conductive wires between the components as needed.

[0214] Internal interconnection in the power module 10 is achieved through the conductive wires, where the conductive wires are aluminum wires or copper wires. For example, a third conductive wire 170 connects between the fourth electrode 520a in the second metal-clad substrate 500a under the thermistor 620 and the second connection terminal 732 (as Figure 20 shown), and a fourth conductive wire 180 connects between the fifth electrode 530a and the third connection terminal 733. For another example, a second conductive wire 720 connects between the fourth electrode 520 in the second metal-clad substrate 500 under the gate resistor 610 and the first connection terminal 731 (as Figure 16 shown).

[0215] In one embodiment, when the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 are solder tabs, since the solder tabs are in a solid state, during the reflow soldering in step S200, the product surface is relatively clean and does not need to be cleaned, and the conductive wires can be directly formed.

[0216] In one embodiment, when the first solder S1, the second solder S2, the third solder S3, the fourth solder S4, the fifth solder S5, the sixth solder S6, the seventh solder S7, and the eighth solder S8 are solder paste, since the solder paste is in a solid state, during the reflow soldering in step S200, the solder paste will splash onto the product surface or metal layers such as the first metal layer 120 and the second metal layer 130, so that the electronic components 600, other components, or the first metal layer 120, the second metal layer 130, etc. have solder paste, organic substances in the solder paste, or flux, and it is necessary to clean them before forming the conductive wires.

[0217] Step S400: Form a molding layer 1200 on the first metal-clad substrate 100 and components.

[0218] After completing step S300, place the product in a molding die for molding, and seal the first metal-clad substrate 100 and the electronic component 600 between the molding layer 1200 and the heat sink 800 (as Figure 30 shown).

[0219] To increase the bonding property of the molding layer 1200 with components such as the first metal-clad substrate 100 and the electronic component 600 in the power module 10, and the surface of the reflow soldering side, an interface stress reliever is used to enhance the bonding strength of the molding layer 1200. The interface bonding enhancer can be an organic substance, which can be sprayed or immersed, and a stress relief film is formed after drying treatment. An organic substance containing copper can also be formed on the surface of the metal layer (such as a copper layer) of the first metal-clad substrate 100, and this organic substance increases the bonding force between the molding layer 1200 and the metal copper layer.

[0220] In some embodiments, suitable module molding can be achieved by selecting and optimizing the material of the molding layer 1200 and improving the molding interface.

[0221] To prevent delamination between the molding compound and the molding interface and improve the reliability of the power module, a low-modulus molding compound is used. Exemplarily, the molding compound can be formed of a material with an elastic modulus between 0.5 GPa and 20 GPa, such as an epoxy molding compound, etc., which is not limited herein.

[0222] In some embodiments, the manufacturing method of the power module 10 further includes, after molding is completed, cutting the lead frame 1000 to form corresponding connection terminals, such as a first connection terminal, a second connection terminal, and a third connection terminal, and electroplating the connection terminals to prevent corrosion of the connection terminals and increase the installation performance and soldering wettability.

[0223] Please continue to refer to Figure 30 , in some embodiments, the heat sink 800 includes a heat sink bottom plate 810 and a heat sink cover plate 820. First, the heat sink bottom plate 810 can be pre-welded to the side of the first metal-clad substrate 100 away from the chip 200, and after the molding step is completed, the heat sink cover plate 820 is sealed on the heat sink bottom plate 810 through a sealing ring 830. A channel is formed between the heat sink bottom plate 810 and the heat sink cover plate 820 for the cooling medium to flow through.

[0224] In some embodiments, the heat sink cover plate 820 and the heat sink bottom plate 810 can be welded by solder to hermetically weld between the heat sink cover plate 820 and the heat sink bottom plate 810.

[0225] The above has introduced in detail the power module, power supply system, vehicle and photovoltaic system provided by the embodiments of the present application. Specific examples are used in this article to elaborate on the principles and embodiments of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific embodiments and application scopes. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A power module, characterized in that, the power module comprises: a first metal-clad substrate, including a first insulating substrate and a first metal layer on one side of the first insulating substrate, the first metal layer including a first surface facing away from the first insulating substrate; a plurality of chips, the chips including a first electrode and a second electrode, the plurality of chips being located on the side of the first metal layer away from the first insulating substrate, and the first electrode of each chip in the plurality of chips being electrically connected to the first metal layer, and the second electrodes of each chip in the plurality of chips being connected to each other; a second metal-clad substrate and electronic components, the second metal-clad substrate being located on the first surface, the electronic components being located on the side of the second metal-clad substrate away from the first metal-clad substrate and being electrically connected to the second metal-clad substrate, the second metal-clad substrate being provided with insulating grooves, and the two electrodes of the electronic components being respectively electrically connected to the metal layers on both sides of the insulating grooves.

2. The power module according to claim 1, characterized in that, the distance between the second metal-clad substrate and one of the chips is greater than the groove width of the insulating groove.

3. The power module according to claim 1, characterized in that, the distance between the second metal-clad substrate and one of the chips is less than the width of the one chip.

4. The power module according to claim 1, characterized in that, the second metal-clad substrate includes a second insulating substrate and metal layers on both sides of the second insulating substrate, the metal layer on one side of the second insulating substrate includes the insulating groove, and the two electrodes of the electronic components are respectively electrically connected to the metal layers on both sides of the insulating groove on the one side of the second insulating substrate.

5. The power module according to claim 4, characterized in that, the second metal-clad substrate further includes a third metal layer on the side of the second insulating substrate away from the insulating groove, and the third metal layer is welded to the first metal layer on the surface of the first metal-clad substrate by a third solder.

6. The power module according to claim 1, characterized in that, the power module includes a first connecting piece, the first connecting piece being located on the side of the plurality of chips away from the first insulating substrate, the first connecting piece including a first main body portion and a plurality of first contact portions, the second electrode of each chip in the plurality of chips being in contact with at least one of the first contact portions, and there being a part of the first main body portion between at least a pair of adjacent first contact portions; the first main body portion is insulated and spaced from the first metal layer.

7. The power module according to claim 6, characterized in that, at least two of the plurality of chips are arranged at intervals in a first direction, at least two of the plurality of chips are arranged at intervals in a second direction, and the second direction and the first direction are both parallel to the first surface and intersect; Along the thickness direction of the chip, the first main body portion is isolated from the second electrode of the chip. The first connecting piece includes one or more grooves that protrude from the first main body portion toward the first surface, and the bottom of the groove is the first contact portion. The first connecting piece includes one or more bending structures, and the bending structure includes the first contact portion that contacts the second electrode of the chip. There is a part of the first main body portion between each pair of adjacent first contact portions. The first contact portions are distributed on the edge of the first main body portion.

8. The power module according to claim 6 or 7, wherein, the power module further includes a second metal layer. The first metal layer and the second metal layer are on the same side of the first insulating substrate, and the orthographic projections of the first metal layer and the second metal layer on the first insulating substrate are spaced apart. The first connecting piece is also electrically connected to the second metal layer.

9. The power module according to any one of claims 1-7, wherein, the chip further includes a third electrode. The electronic component is a gate resistor. The second metal-clad substrate is located on the first surface. The second metal-clad substrate includes a fourth electrode and a fifth electrode that are insulated and spaced apart. Two ends of the gate resistor are electrically connected to the fourth electrode and the fifth electrode respectively. The fourth electrode is used to receive a driving current, and the fifth electrode is electrically connected to the third electrode of the chip through a first wire.

10. The power module according to claim 9, wherein, in the first metal-clad substrate, the first metal layer is connected to the first insulating substrate through a metal welding layer; the second metal-clad substrate further includes a second insulating substrate, and the fourth electrode and the fifth electrode are attached to the surface of the second insulating substrate.

11. The power module according to any one of claims 1-7, wherein, the electronic component is a thermistor. The second metal-clad substrate is located on a side of the first metal layer away from the first insulating substrate and is adjacent to the chip. The thermistor is used to monitor the temperature of the chip.

12. The power module according to any one of claims 1-7, wherein, the power module further includes a radiator. The radiator is located on a side of the first metal-clad substrate away from the chip, and there are a plurality of spaced support components between the radiator and the first metal-clad substrate.

13. The power module according to claim 12, wherein, the support component includes two parallel support bars, and the support bar includes at least two support segments. Adjacent two support segments are arranged along the extending direction of the support bar and are spaced apart.

14. An inverter, wherein, the inverter includes a control circuit and the power module according to any one of claims 1-13. The control circuit is electrically connected to the power module, and the control circuit is used to control the power module to output alternating current.

15. A photovoltaic system, wherein, Comprising a photovoltaic module and a power module as described in any one of claims 1-12, the photovoltaic module is electrically connected to the power module, and the direct current generated by the photovoltaic module is converted into alternating current by the power module.

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