Video processing equipment and signal transmission method

Abstract

The embodiment of the invention provides video processing equipment and a signal transmission method, and relates to the technical field of signal transmission, in the video processing equipment, an interface mapping relation of an analog-to-digital conversion module is configured as a first mapping relation; the time sequence mode of the output interface in the first mapping relation is a first time sequence mode, and the time sequence mode of the specified input interface is a second time sequence mode; the analog-to-digital conversion module is configured to receive and analyze an analog signal sent by a signal source through the input interface of the first mapping relation to obtain media data; outputting one path of data stream to a first specified input interface through a first specified output interface of the first mapping relationship; and the main control module is configured to receive the path of data stream through the first specified input interface, collect the path of data stream according to a second time sequence mode to obtain media data, and process the obtained media data. According to the scheme, the maximum access capability of the video processing equipment about the analog signal can be improved.

Description

Technical Field

[0001] This application relates to the technical field of signal transmission, and in particular, to a video processing device and a signal transmission method. Background Art

[0002] For video processing devices such as video recording devices, there are an analog-to-digital conversion module and a main control module in the video processing device. Any output interface of the analog-to-digital conversion module can be connected to an input interface of the main control module to form a transmission channel for media data. In order to make full use of the transmission channel between an output interface of the analog-to-digital conversion module and an input interface of the main control module in the video processing device and reduce the transmission cost of analog signals, the transmission channel can usually be multiplexed. Specifically, the media data corresponding to each analog signal accessed by multiple input interfaces of the analog-to-digital conversion module is combined, and the combined data stream is output through the output interface of the analog-to-digital conversion module to the input interface of the main control module to achieve multiplexing of the transmission channel.

[0003] In order to multiplex the transmission channel, an interface mapping relationship is set for the analog-to-digital conversion module. This interface mapping relationship indicates the mapping relationship between the output interface of the analog-to-digital conversion module and the input interfaces of the analog-to-digital conversion module that need to be mapped (that is, the multiple input interfaces where the analog signals of the analog-to-digital conversion module are combined), so as to form a multiplexing mode, that is, the second mode, through this interface mapping relationship. However, since the clock frequency (also called the communication bandwidth) of the transmission channel is fixed, and the number of input interfaces mapped by an output interface of the analog-to-digital conversion module in the second mode is fixed (that is, the number of each input interface indicated by this mapping relationship is fixed), the maximum access capacity of the input interfaces of each analog-to-digital conversion module is fixed, that is, the maximum access capacity of the video processing device for analog signals is fixed.

[0004] However, users may have a need to transmit analog signals exceeding the maximum access capacity.

[0005] It can be seen that how to improve the maximum access capacity of the video processing device for analog signals is an urgent problem to be solved. Summary of the Invention

[0006] The purpose of the embodiments of this application is to provide a video processing device and a signal transmission method to improve the maximum access capacity of the video processing device for analog signals, so that the video processing device can access and process analog signals with a larger data volume. The specific technical solutions are as follows:

[0007] In a first aspect, the embodiments of this application provide a video processing device, including a main control module and an analog-to-digital conversion module;

[0008] In response to a first type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module is configured as a first mapping relationship that matches the first mode indicated by the first type of mode selection instruction; wherein, the first type of mode selection instruction is used to select a mode for enhancing signal access capability, the interface mapping relationship of the analog-to-digital conversion module is a mapping relationship regarding the output interfaces and input interfaces of the analog-to-digital conversion module, the interface mapping relationship of the analog-to-digital conversion module is default configured as a second mapping relationship that matches the second mode, the first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship, the first ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated in the first mapping relationship, and the second ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated in the second mapping relationship;

[0009] And, in response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship is configured as: a first timing mode that matches the first mapping relationship, and the timing mode of the designated input interface of the main control module is configured as: a second timing mode that matches the first mapping relationship; wherein, the designated input interface of the main control module is the input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and both the first timing mode and the second timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted through the input interface of the analog-to-digital conversion module indicated in the first mapping relationship;

[0010] The analog-to-digital conversion module is configured to receive the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated in the first mapping relationship, parse the analog signal sent by the signal source, and obtain the media data corresponding to the received analog signal; and output a data stream that includes the media data corresponding to the received analog signal and whose included media data conforms to the first timing mode to the first designated input interface of the main control module that is connected to the first designated output interface of the analog-to-digital conversion module through the first designated output interface of the analog-to-digital conversion module that is mapped to the input interface of the analog-to-digital conversion module that receives the analog signal and indicated in the first mapping relationship;

[0011] The master control module is configured to receive this one-way data stream through a first designated input interface of the master control module that is connected to a first designated output interface of the analog-to-digital conversion module, collect this one-way data stream according to the second timing mode, obtain media data corresponding to an analog signal transmitted by an input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and process the obtained media data.

[0012] This application can configure the interface mapping relationship of the analog-to-digital conversion module, and through the configuration that enhances the signal access capability, it can be made that the access capability of the input interface indicated by the configured interface mapping relationship of the analog-to-digital conversion module is improved, and according to the input interface with the improved access capability, a larger amount of analog signals can be accessed and processed; it can be seen that this application can improve the maximum access capability of the video processing device for analog signals, so that the video processing device can access a larger amount of analog signals and process them.

[0013] Of course, it is not necessary for any product or method implementing this application to achieve all the above-mentioned advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application, and those of ordinary skill in the art can also obtain other embodiments according to these drawings.

[0015] Figure 1 A schematic diagram of a video processing device provided by an embodiment of the present application;

[0016] Figure 2 A schematic diagram of the interface mapping relationship of the analog-to-digital conversion module in the second mode provided by an embodiment of the present application;

[0017] Figure 3 A schematic diagram of the interface mapping relationship of the analog-to-digital conversion module in the first mode provided by an embodiment of the present application;

[0018] Figure 4 Another schematic diagram of the interface mapping relationship of the analog-to-digital conversion module in the first mode provided by an embodiment of the present application;

[0019] Figure 5 Another schematic diagram of the interface mapping relationship of the analog-to-digital conversion module in the first mode provided by an embodiment of the present application;

[0020] Figure 6 A schematic diagram of the connection relationship between an analog signal and a video processing device in the default second mode provided by an embodiment of the present application;

[0021] Figure 7 Schematic diagram of the hardware connection relationship of a video processing device provided by an embodiment of the present application;

[0022] Figure 8 Schematic diagram of the process of transmitting four-channel analog signals provided by an embodiment of the present application;

[0023] Figure 9 Another schematic diagram of the process of transmitting four-channel analog signals provided by an embodiment of the present application;

[0024] Figure 10 Schematic diagram of the process of transmitting 16-channel analog signals provided by an embodiment of the present application;

[0025] Figure 11 Schematic diagram of the four-channel composite BT656 timing provided by an embodiment of the present application;

[0026] Figure 12 Schematic diagram of the process of transmitting two-channel analog signals provided by an embodiment of the present application;

[0027] Figure 13 Another schematic diagram of the process of transmitting two-channel analog signals provided by an embodiment of the present application;

[0028] Figure 14 Schematic diagram of the two-channel composite BT656 timing provided by an embodiment of the present application;

[0029] Figure 15 Schematic diagram of the process of transmitting one-channel analog signals provided by an embodiment of the present application;

[0030] Figure 16 Another schematic diagram of the process of transmitting one-channel analog signals provided by an embodiment of the present application;

[0031] Figure 17 Schematic diagram of the one-channel mode BT656 timing provided by an embodiment of the present application. Detailed implementation manners

[0032] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art based on the present application belong to the protection scope of the present application.

[0033] For easy understanding, the professional terms involved in the present application will be introduced first below.

[0034] Channel Multiplexing: By using a multiplexer (MUX) or in a software-based manner, one or more analog signals are selected from multiple analog input signals and forwarded, and the different selected analog signals are combined into a data stream and output to the same transmission channel. The purpose of channel multiplexing is to make full use of the capacity of the communication channel (transmission channel) and greatly reduce the cost of analog signal transmission. For example, for the BT656 (ITU-R BT.656, ITU (International Telecommunication Union), R (Radiocommunications sector), BT (Broadcasting Service television, referring to the broadcast television service)) interface, the clock frequency of its transmission channel is generally above 148.5 MHz, while for standard-definition signals, the clock frequency of each standard-definition signal is generally limited to below 37.125 MHz, that is, the maximum communication bandwidth for analog signals that can be accessed by each input interface is 37.125 MHz. In this case, the capacity of the aforementioned transmission channel is much larger than the information transmission volume of one analog signal. Therefore, analog signal transmission can be carried out through channel multiplexing. For DVR (Digital Video Recorder) devices, the analog-to-digital conversion module (AD, Analog-to-Digital Converter) realizes channel multiplexing to improve the utilization efficiency of the transmission channel.

[0035] Channel Demultiplexing: By using a multiplexer (MUX) or in a software-based manner, multiple analog signals can share one transmission channel; multiplexers are always used in pairs with demultiplexers. The multiplexer is connected to the signal source, and the demultiplexer is connected to the main control module or is set within the main control module; the demultiplexer is used to separate the data of the received composite data stream according to the input interfaces of the analog signals of the received signal source and send the separated multiple data to the corresponding output lines. For DVR devices, the signal acquisition unit on the main control module SOC (System on a Chip) realizes channel demultiplexing.

[0036] Generally, the maximum access capacity of each input interface of a video processing device is fixed. For example, the clock frequency of the transmission channel between an output interface of an analog-to-digital conversion module and an input interface of a main control module is 148.5 MHZ. In the multiplexing mode, the maximum communication bandwidth for the four input interfaces corresponding to the target output interface (an output interface of the analog-to-digital conversion module) to access analog signals is 37.125 MHZ. According to the maximum amount of data that can be transmitted in 1 s with a communication bandwidth of 37.125 MHZ, the maximum access capacity of each input interface is an analog signal of 720P30 (i.e., a resolution of 1280×720 and a frame rate of 30). Taking a Digital Video Recorder (DVR) as an example, the analog signal access capacity of the DVR is fixed. For example, for a DVR that transmits four analog signals, its maximum access capacity is an analog signal of 720P30. It uses four-channel multiplexing (i.e., multiplexing of four analog signals, simply referred to as 4MUX), that is, 4-channel multiplexing. The number of input interfaces corresponding to a target output interface of the analog-to-digital conversion module is 4, and each input interface can support a maximum analog signal with a resolution of 720P and a frame rate of 30. For a DVR that transmits two analog signals, its maximum access capacity is an analog signal of 1080P30. It uses two-channel multiplexing (i.e., multiplexing of two analog signals, simply referred to as 2MUX), that is, 2-channel multiplexing. The number of input interfaces corresponding to a target output interface of the analog-to-digital conversion module is 2; each input interface can support a maximum analog signal with a resolution of 1080P and a frame rate of 30 for transmitting a single analog signal. For a DVR that transmits one analog signal, the maximum access capacity of one of its input interfaces is an analog signal of 4MP30. Without multiplexing, that is, the number of input interfaces corresponding to a target output interface of the analog-to-digital conversion module is 1, and this input interface can support a maximum analog signal with a resolution of 4M and a frame rate of 30.

[0037] Currently, in the known video processing devices, the transmission channel multiplexing mode and the maximum access capacity of the analog signal of each input interface are both fixed. The input interface of the video processing device cannot access analog signals exceeding the maximum access capacity. For example, if a user purchases a DVR that transmits 4 analog signals, according to the previous example, the device purchased by the user cannot access an analog signal of 1080P30. However, users may have a need to transmit analog signals exceeding the maximum access capacity. It can be seen that how to improve the maximum access capacity of the video processing device (especially the video processing device with a large number of transmission channels) for analog signals is an urgent problem to be solved.

[0038] Based on this, the embodiments of the present application provide a video processing device and a signal transmission method to improve the maximum access capacity of the video processing device for analog signals, so that the video processing device can access and process analog signals with a larger amount of data.

[0039] The following introduces a video processing device provided by an embodiment of the present application.

[0040] Among them, a video processing device provided by an embodiment of the present application includes a main control module and an analog-to-digital conversion module. The main control module is connected to the analog-to-digital conversion module. The main control module can collect and process the received video signals. The analog-to-digital conversion module is connected to the signal source end. One input interface included in the analog-to-digital conversion module can access an analog signal transmitted by one signal source and not exceeding the maximum access capacity of the input interface. If the number of input interfaces is one, the analog-to-digital conversion module can perform analog-to-digital conversion on the received analog signal and transmit the media data of the converted digital signal to the main control module for processing; if the number of input interfaces is multiple, the analog-to-digital conversion module can perform analog-to-digital conversion and multiplexing on the received multiple analog signals to generate a multiplexed data stream and transmit the multiplexed data stream to the main control module for processing. The video processing device can be understood as an electronic device with functions such as parsing and encoding, for example: encoder, video recorder, live broadcast host, etc.

[0041] Among them, the analog-to-digital conversion module can be a module in the video processing device for implementing the analog-to-digital conversion function, such as: an analog-to-digital converter. The main control module can be a module in the video processing device for implementing the control function, such as a controller. In addition, it should be noted that the main control module or the analog-to-digital conversion module included in the video processing device described in the embodiments of the present application does not limit that the video processing device must physically include the described hardware components. The term "module" in the embodiments of the present application can be a hardware component, a software program, or a necessary carrier for the software program to run. With the evolution of technology, the steps to be executed or the functions to be assumed by these "modules" (for example, the steps described after "for" in a certain module) may use hardware, software, or a combination of hardware and software. As long as it can execute the steps required by the "module", the hardware, software, or a combination of hardware and software can be considered as the "module" in the embodiments of the present application.

[0042] In addition, the analog signal transmitted by the signal source should be in a format supported by the input interface of the analog-to-digital conversion module of the video processing device. Exemplarily, the input interface can be a BNC (Bayonet Nut Connector) port, which is a standard professional video device input and output port; the input interface can also be HDMI (High Definition Multimedia Interface), VGA (Video Graphics Array, a standard display interface), and Type-c (USB Type-C interface, a hardware interface form of a universal serial bus), etc. The formats supported by at least one input interface corresponding to a target output interface of the analog-to-digital conversion module are the same. For example, all of the at least one input interfaces are BNC ports.

[0043] Next, with reference to the accompanying drawings, a video processing device provided by an embodiment of the present application will be introduced.

[0044] As Figure 1 shown, the video processing device provided by the embodiment of the present application includes a main control module 110 and an analog-to-digital conversion module 120;

[0045] In response to a first type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module 120 is configured as a first mapping relationship that matches the first mode indicated by the first type of mode selection instruction; wherein, the first type of mode selection instruction is used to select a mode for enhancing the signal access capability, and the interface mapping relationship of the analog-to-digital conversion module 120 is the mapping relationship between the output interfaces and the input interfaces of the analog-to-digital conversion module 120. The interface mapping relationship of the analog-to-digital conversion module 120 is default configured as a second mapping relationship that matches the second mode. The first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship. The first ratio is the ratio of the number of input interfaces of the analog-to-digital conversion module 120 indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module 120 indicated in the first mapping relationship, and the second ratio is the ratio of the number of input interfaces of the analog-to-digital conversion module 120 indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module 120 indicated in the second mapping relationship;

[0046] In addition, in response to the interface mapping relationship of the analog-to-digital conversion module 120 being configured as a first mapping relationship, the timing pattern of the output interface of the analog-to-digital conversion module 120 indicated in the first mapping relationship is configured to: match a first timing pattern of the first mapping relationship, and the timing pattern of the specified input interface of the main control module 110 is configured to: match a second timing pattern of the first mapping relationship; wherein, the specified input interface of the main control module 110 is the input interface connected to the output interface of the analog-to-digital conversion module 120 indicated in the first mapping relationship, and both the first timing pattern and the second timing pattern are timing patterns for data transmission of the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module 120 indicated in the first mapping relationship.

[0047] The analog-to-digital conversion module 120 is configured to receive an analog signal sent by a signal source through the input interface of the analog-to-digital conversion module 120 indicated by the first mapping relationship, analyze the analog signal sent by the signal source, and obtain media data corresponding to the received analog signal; and output a data stream including the media data corresponding to the received analog signal and whose included media data conforms to the first timing pattern to the first specified input interface of the main control module 110 connected to the first specified output interface of the analog-to-digital conversion module 120 through the first specified output interface of the analog-to-digital conversion module 120 mapped to the input interface of the analog-to-digital conversion module 120 that receives the analog signal and indicated by the first mapping relationship.

[0048] The main control module 110 is configured to receive the data stream through the first specified input interface of the main control module 110 connected to the first specified output interface of the analog-to-digital conversion module 120, collect the data stream according to the second timing pattern, obtain media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module 120 indicated by the first mapping relationship, and process the obtained media data.

[0049] The embodiment of the present application is to improve the maximum access capacity of a video processing device for analog signals and implement the processing of analog signals; the present application adds a mode for enhancing the signal access capacity in the video processing device. For example, a user can issue a first type of mode selection instruction for enhancing the signal access capacity on a mode selection interface according to requirements, or other devices can send a first type of mode selection instruction for enhancing the signal access capacity to the video processing device. The video processing device can respond to the first type of mode selection instruction, determine the first mode indicated by the first type of mode selection instruction, and configure the interface mapping relationship of the analog-to-digital conversion module as a first mapping relationship matching the first mode indicated by the first type of mode selection instruction, so that the video processing device adapts to the first mode for signal transmission.

[0050] Among them, the interface mapping relationship of the analog-to-digital conversion module is the mapping relationship regarding the output interfaces and input interfaces of the analog-to-digital conversion module. The analog-to-digital conversion module may have multiple input interfaces and multiple output interfaces, and the number of input interfaces and the number of output interfaces may be the same or different; moreover, in the interface mapping relationship of the analog-to-digital conversion module, some or all of the input interfaces may be indicated, and some or all of the output interfaces may be indicated; in different modes, the mapping relationship between the input interfaces and the output interfaces in the interface mapping relationship may be different; the input interfaces indicated in different interface mapping relationships may be the same, or the output interfaces indicated in different interface mapping relationships may be the same, and the present application does not make any limitations on this.

[0051] It should be noted that the video processing device may currently be in the second mode, or in a mode that has been enhanced. In this case, a first type of mode selection instruction for enhancing the signal access capability can be issued to the video processing device; that is, when the video processing device is currently in the second mode, the video processing device can be switched to the first mode indicated by the first type of mode selection instruction; or, when the video processing device is currently in a mode that has been enhanced, the video processing device can also be switched to the first mode indicated by the first type of mode selection instruction. The first mode indicated by the first type of mode selection instruction and the enhanced mode are both modes for enhancing the signal access capability relative to the second mode, but the interface mapping relationships of the analog-to-digital conversion module are different in the first mode indicated by the first type of mode selection instruction and the enhanced mode (the enhancement intensity can be the same or different at this time).

[0052] To facilitate understanding of the solution, the following introduces various exemplary contents of the first mapping relationship matching the first mode and the second mapping relationship matching the second mode:

[0053] Exemplarily, the interface mapping relationship of the analog-to-digital conversion module is default configured as Figure 2 the second mapping relationship matching the second mode as shown: input interfaces 1-4 correspond to output interface 1, and input interfaces 5-8 correspond to output interface 3 (output interfaces 2 and 4 are not used).

[0054] In one implementation, in order to improve the maximum access capability of the input interfaces of the analog-to-digital conversion module, the first mapping relationship of the analog-to-digital conversion module matching the first mode indicated by the first type of mode selection instruction is as Figure 3 shown: input interfaces 1-2 correspond to output interface 1, and input interfaces 5-6 correspond to output interface 3 (input interfaces 3-4, input interfaces 7-8, output interfaces 2 and 4 are not used).

[0055] In another implementation, to improve the maximum access capacity of the input interface of the analog-to-digital conversion module, the first mapping relationship of the analog-to-digital conversion module that matches the first mode indicated by the first type of mode selection instruction is as follows Figure 4 shown: Input interface 3-4 corresponds to output interface 2, and input interface 7-8 corresponds to output interface 4 (input interfaces 1-2, input interfaces 5-6, output interface 1, and output interface 3 are not used).

[0056] In yet another implementation, to improve the maximum access capacity of the input interface of the analog-to-digital conversion module, the first mapping relationship of the analog-to-digital conversion module that matches the first mode indicated by the first type of mode selection instruction is as follows Figure 5 shown: Input interface 1-2 corresponds to output interface 1, input interface 3-4 corresponds to output interface 2, input interface 5-6 corresponds to output interface 3, and input interface 7-8 corresponds to output interface 4.

[0057] As Figure 3 - 5 shown, the first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship. As Figure 2 shown, the second ratio is: 8:2 = 4; as Figure 3 shown, the first ratio is: 4:2 = 2; as Figure 4 shown, the first ratio is: 4:2 = 2; as Figure 5 shown, the first ratio is: 8:4 = 2. It can be seen that to improve the maximum access capacity of the input interface, compared with the second mapping relationship in this application, the number of input interfaces decreases when the output interface remains unchanged, or the number of input interfaces decreases when the output interface changes but the number of output interfaces remains unchanged, or the number of output interfaces increases when the input interface remains unchanged (or both the number of input interfaces and the number of output interfaces change, but the ratio of the changed number of input interfaces to the number of output interfaces is smaller than the second ratio).

[0058] Moreover, since the clock frequency of the transmission channel is fixed, in the first mode, the ratio of the number of input interfaces to the number of output interfaces indicated by the interface mapping relationship of the analog-to-digital conversion module is reduced compared to the second mode. For example, when the number of output interfaces remains unchanged and the number of input interfaces decreases, the input interfaces can allocate greater access capabilities according to the fixed clock frequency; or, when the number of output interfaces changes but the number of output interfaces remains unchanged and the number of input interfaces decreases, the input interfaces can allocate greater access capabilities according to the fixed clock frequency; or, when the number of input interfaces remains unchanged and the number of output interfaces increases, by increasing the number of output interfaces, the overall clock frequency of each transmission channel can be increased, and the input interfaces can allocate greater access capabilities according to the increased clock frequency. Therefore, the maximum access capabilities of the input interfaces of the analog-to-digital conversion module in the first mode are improved.

[0059] Exemplarily, in one implementation, in response to the interface mapping relationship of the analog-to-digital conversion module being configured as a first mapping relationship, the maximum access capabilities of the input interfaces of the analog-to-digital conversion module indicated by the first mapping relationship are configured as: the access capabilities matching the first mapping relationship;

[0060] Among them, the access capabilities matching the first mapping relationship are determined according to the clock frequency of the target transmission channel corresponding to the output interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the number of input interfaces of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship; the target transmission channel corresponding to any output interface of the analog-to-digital conversion module is the transmission channel between the output interface of the analog-to-digital conversion module and the input interface connected to the main control module; the determination method for the maximum access capabilities of the input interfaces of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship includes:

[0061] Dividing the clock frequency of the target transmission channel of this output interface by the number of input interfaces of the analog-to-digital conversion module corresponding to this output interface to obtain a target clock frequency, and determining the maximum data volume that can be transmitted per unit time under the communication frequency band of this target clock frequency as a first data volume, and determining the target transmission parameter corresponding to the largest transmission data volume among each transmission parameter whose corresponding transmission data volume is not greater than this first data volume as the maximum access capabilities allocated to the input interfaces of the analog-to-digital conversion module corresponding to this output interface; among them, any transmission parameter includes frame rate and resolution;

[0062] Alternatively, determine the maximum data volume that can be transmitted per unit time within the communication frequency band of the clock frequency of the target transmission channel as the second data volume, divide the second data volume by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain a third data volume, and determine the target transmission parameter corresponding to the maximum transmission data volume among the transmission parameters whose corresponding transmission data volumes do not exceed the third data volume as the maximum access capacity allocated to the input interface of the analog-to-digital conversion module corresponding to the output interface.

[0063] In the embodiments of the present application, when the interface mapping relationship of the analog-to-digital conversion module is configured as the first mapping relationship, the maximum access capacity of the input interface of the analog-to-digital conversion module indicated by the first mapping relationship is matched with the first mapping relationship, that is, the maximum access capacity of the input interface indicated by the first mapping relationship is configured as: determined according to the clock frequency of the target transmission channel corresponding to the output interface of the analog-to-digital conversion module indicated by the first mapping relationship and the number of input interfaces corresponding to the same output interface in the mapping relationship. For example: the number of output interfaces in the first mapping relationship is 1, the number of input interfaces is 4, and the clock frequency of the target transmission channel is 148.5 MHZ, then the maximum access capacity of each input interface can be allocated according to 148.5 MHZ, and the sum of the maximum access capacities of the four input interfaces does not exceed 148.5 MHZ; Another example: the number of output interfaces in the first mapping relationship is 1, the number of input interfaces is 2, and the clock frequency of the target transmission channel is 148.5 MHZ, then the maximum access capacity of each input interface can be allocated according to 148.5 MHZ, and the sum of the maximum access capacities of the two input interfaces does not exceed 148.5 MHZ.

[0064] Exemplarily, in one implementation, for the same output interface, the clock frequency of the target transmission channel of the output interface can be divided by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain the target clock frequency. This clock frequency can be understood as the maximum clock frequency that any input interface of the analog-to-digital conversion module mapped by the output interface can occupy. Then, determine the maximum amount of data that can be transmitted per unit time under the communication frequency band of the target clock frequency for any one of the input interfaces as the first data volume; the first data volume is the maximum amount of data that can be transmitted by any one of the input interfaces per unit time. The maximum access capability of any one of the input interfaces can be determined based on the first data volume: the target transmission parameter corresponding to the largest transmission data volume among the various transmission parameters whose corresponding transmission data volume is not greater than the first data volume is used as the maximum access capability allocated for any one of the input interfaces; among them, the maximum access capabilities allocated for each input interface of the analog-to-digital conversion module mapped by the output interface are the same; the maximum amount of data that can be transmitted per unit time under the communication frequency band of the target clock frequency can be the maximum amount of data during double-edge (rising edge and falling edge) data transmission. For example: the clock frequency of the target transmission channel of the output interface is 148.5 MHZ, and the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface is 4, then the target clock frequency is 37.125 MHZ. If the unit time is 1 s, then the first data volume is: 37.125×2×10^6×8 bit (bytes). Converting the bit volume to MB (megabytes), the value of the first data volume is approximately 71 MB. The target transmission parameter corresponding to the largest transmission data volume among the various transmission parameters whose corresponding transmission data volume is not greater than the first data volume is 720P30 (the maximum amount of data of the YUV422 format that can be transmitted per unit time is: 1280×720×30×4 / 2 = 52 MB), that is, the maximum access capabilities allocated for each input interface of the analog-to-digital conversion module corresponding to the output interface are all 720P30. It should be noted that among the transmission parameters greater than the target transmission parameter 720P30, the value of the maximum transmission data volume corresponding to 1080P30 is the smallest. The maximum amount of data of the YUV422 format that can be transmitted per unit time is: 1920×1080×30×4 / 2 = 124416000 = 119 MB, but its corresponding transmission data volume is greater than the above first data volume of 71 MB. Therefore, 1080P30 and transmission parameters with a transmission data volume greater than 1080P30 do not meet the selection conditions of the target transmission parameters.

[0065] Exemplarily, in another implementation, for the same output interface, the maximum data volume that can be transmitted per unit time within the communication frequency band of the clock frequency of the target transmission channel can also be used as the second data volume, and the second data volume is divided by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain the third data volume; the third data volume is the maximum data volume that can be transmitted per unit time by any input interface of the analog-to-digital conversion module corresponding to the output interface (the third data volume is the same as the first data volume); when determining the maximum access capacity of any input interface according to the third data volume, the target transmission parameter corresponding to the maximum transmission data volume among the various transmission parameters whose corresponding transmission data volume does not exceed the third data volume can be used as the maximum access capacity allocated to any input interface; for example: the clock frequency of the target transmission channel of the output interface is 148.5 MHZ. If the unit time is 1 s, then the second data volume is: 148.5×2×10^6×8 bit. Converting the bit volume to MB (megabytes), the value of the second data volume is approximately 284 MB. The number of input interfaces of the analog-to-digital conversion module corresponding to the output interface is 4, so the third data volume is 71 MB. The target transmission parameter corresponding to the maximum transmission data volume among the various transmission parameters whose corresponding transmission data volume does not exceed the third data volume is 720P30 (the maximum data volume of the YUV422 format that can be transmitted per unit time is: 1280×720×30×4 / 2 = 52 MB), that is, the maximum access capacity allocated to each input interface of the analog-to-digital conversion module corresponding to the output interface is 720P30.

[0066] In addition, it should be emphasized that on the premise that the access capacity of the input interface indicated by the first mapping relationship of the analog-to-digital conversion module is improved, the maximum data volume that can be transmitted per unit time within the communication frequency band of the target clock frequency can also be the maximum data volume during single-edge (i.e., data is transmitted only through the rising edge or falling edge) data transmission. Moreover, in the first timing mode that matches the first mapping relationship, the clock signal of any output interface can be configured to transmit data in a single edge. In the second timing mode that matches the first mapping relationship, for the input interface of the main control module connected to any output interface, the received clock signal can be configured for single-edge data acquisition. Exemplarily: When performing factory settings, the clock signal output by the output interface of the analog-to-digital conversion module is set to transmit data only in a single edge. Then, the clock signals of the output interface indicated by the first mapping relationship and the output interface indicated by the second mapping relationship can both transmit data in a single edge. Since the first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship, the access capacity of the input interface indicated by the first mapping relationship can also be improved.

[0067] The maximum access capacity of the current transmission channel is fixed, and the number of input interfaces is fixed. In the present application, in any first mode for enhancing the signal access capacity, the ratio of the number of input interfaces indicated by the interface mapping relationship to the number of output interfaces is decreased relative to the second mode. Thus, under the first mapping relationship, through the fixed clock frequency of each transmission channel, the maximum access capacity allocated to the input interface corresponding to the outgoing channel is increased, and the maximum access capacity of the input interface is improved. It can be seen that the maximum access capacity of the video processing device for analog signals can be improved through the present application.

[0068] In the present application, the number of modes for enhancing the signal access capacity is one or more;

[0069] In the case where the number of modes for enhancing the signal access capacity is multiple, for the interface mapping relationship of the analog-to-digital conversion module, in different modes for enhancing the signal access capacity, the first ratios corresponding to the matching first mapping relationships are different.

[0070] In the present application, when the first ratio is decreased relative to the second ratio, the modulus for enhancing the signal access capacity is not limited. As in the above embodiment, in the present application, the number of modes for enhancing the signal access capacity is one or more; and, in the case of multiple modes, for the interface mapping relationship of the analog-to-digital conversion module, in different modes with enhanced signal access capacity, the first ratios corresponding to the matching first mapping relationships are different; and, in the modes with the same enhanced signal access capacity, the output interfaces of the analog-to-digital conversion module in the first mapping relationship may be different from the input interfaces of the analog-to-digital conversion module, but the first ratios corresponding to the first mapping relationships are the same. For example: Figure 3 The first ratio shown, Figure 4 The first ratio shown, and Figure 5 The first ratio shown are all 2. Although the corresponding first mapping relationships are different, since the corresponding first ratios are the same, the enhanced signal access capacities are the same.

[0071] The present application supports one or more enhancement modes to enhance the maximum access capacity of the video processing device for analog signals as required. And, since the maximum signal access capacity of the input interface is determined according to the clock frequency of the transmission channel, in different modes for enhancing the signal access capacity, the first ratios corresponding to the matching first mapping relationships are different.

[0072] In addition, the number of input interfaces indicated by the interface mapping relationship of the analog-to-digital conversion module and mapped to the same output interface of the analog-to-digital conversion module is one or more, and when the number is multiple, the signal access capacities of the multiple input interfaces are the same.

[0073] In this application, in the interface mapping relationship of the analog-to-digital conversion module, the number of input interfaces for the same output interface can be one or more. Moreover, when the number is multiple, the maximum access capacity of the input interfaces of the analog-to-digital conversion module can be evenly distributed according to the corresponding output interface of the analog-to-digital conversion module, that is, the signal access capabilities of the multiple input interfaces are the same. For example, the number of input interfaces for the same output interface is 2, and the clock frequency of the transmission channel of this output interface is 148.5 MHZ. Each input interface can support the transmission of analog signals with a resolution of 1080P and a frame rate of 30 at most.

[0074] In this application, the number of input interfaces for the same output interface of the analog-to-digital conversion module is one or more to support the transmission of analog signals for different requirements. Moreover, when the number of input interfaces corresponding to the same output interface is multiple, the signal access capabilities of the multiple input interfaces are the same, so as to support the transmission and data processing of multiple analog signals with the same data volume.

[0075] Exemplarily, in one implementation, the interface mapping relationship of the analog-to-digital conversion module is specifically: the mapping relationship between the target output interface of the analog-to-digital conversion module and the existing input interfaces of the analog-to-digital conversion module;

[0076] And, the first mode is: the mode in which the corresponding signal access capability has a target ratio with the signal access capability corresponding to the second mode; where the target ratio is the ratio of the number of input interfaces indicated in the second mapping relationship to the number of input interfaces indicated in the first mapping relationship; the signal access capability corresponding to the first mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated in the first mapping relationship, and the signal access capability corresponding to the second mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated in the second mapping relationship.

[0077] Taking the target output interface as an example, the interface mapping relationship of the analog-to-digital conversion module in this application is specifically the mapping relationship between the target output interface and the existing input interfaces of the analog-to-digital conversion module; in the case of evenly distributing the access capabilities for the corresponding input interfaces according to the clock frequency of the same output interface (when the total access capabilities of the input interfaces in the interface mapping relationship do not exceed the clock frequency of the transmission channel, the access capabilities of the output interfaces can also be different to adapt to different signal source ends), the signal access capabilities corresponding to the first mode and the second mode have a target ratio, and the target ratio can be the ratio of the signal access capability of each input interface in the first mode to the signal access capability of each input interface in the second mode.

[0078] Exemplarily, the number of input interfaces corresponding to the target output interface in the first mode is 2, and the number of input interfaces corresponding to the target output interface in the second mode is 4. When the clock frequency corresponding to the target output interface remains unchanged and the maximum access capabilities of each input interface are the same, the target ratio of the signal access capabilities in the first mode to those in the second mode is 4:2.

[0079] The focus of this application is that, compared with the second mode, fewer input interfaces are used to replace the existing input interfaces with higher maximum access capabilities; the number of enhanced modes of signal access capabilities is one or more, and when the number of enhanced modes of signal access capabilities is multiple, the number of input interfaces corresponding to different enhanced modes is different (that is, in different modes of enhancing signal access capabilities, the first ratios corresponding to the first mapping relationships are different); for example: in the second mode, the target output interface corresponds to 4 input interfaces, and in the first mode, the target output interface corresponds to 3 input interfaces, 2 input interfaces, or 1 input interface, that is, the enhanced modes may include a first enhanced mode (corresponding to 3 input interfaces), a second enhanced mode (corresponding to 2 input interfaces), and a third enhanced mode (corresponding to 1 input interface).

[0080] It should be emphasized that for different first modes of signal access capabilities, compared with the second mode, the number of input interfaces is reduced, that is, the number of input interfaces corresponding to the target output interface (taking the output interface of the analog-to-digital conversion module as the target output interface as an example) in any first mode is less than the number of input interfaces in the second mode, so that in any enhanced mode, the signal access capabilities of the existing input interfaces are improved.

[0081] For example: the clock frequency of the target transmission channel is 148.5 MHZ. In the second mode, in the interface mapping relationship of the analog-to-digital conversion module, the target output interface corresponds to 4 input interfaces. In the first mode, the target output interface corresponds to 2 input interfaces, or the target output interface corresponds to 1 input interface; among them, in the second mode, the maximum access capability of each input interface is an analog signal of 720P30. If the target output interface in the first mapping relationship corresponds to 2 input interfaces, compared with the second mode, the number of input interfaces is reduced by 1 / 2. Correspondingly, for the remaining 2 input interfaces corresponding to the target output interface, the maximum access capability of each input interface is increased by 2 times, and the maximum access capability is an analog signal of 1080P30; if the target output interface in the first mapping relationship corresponds to 1 input interface, compared with the second mode, the number of input interfaces is reduced by 1 / 4. Correspondingly, for the remaining 1 input interface corresponding to the target output interface, the maximum access capability of this input interface is increased by 4 times, and the maximum access capability is an analog signal of 4MP30.

[0082] It should be noted that in the interface mapping relationship in the second mode, the number of input interfaces corresponding to the target output interface is multiple (so as to enhance the maximum access capacity of the remaining input interfaces by reducing the number of input interfaces), for example: 2, 4, 8, 16, etc., and the present application does not limit this.

[0083] Among them, when the maximum access capacity is an analog signal of 720P30, it means that the resolution of the analog signal that can be processed is 1280×720, and the frame rate is 30 frames per second; when the maximum access capacity is an analog signal of 1080P30, it means that the resolution of the analog signal that can be processed is 1920×1080, and the frame rate is 30 frames per second; when the maximum access capacity is an analog signal of 4MP30, it means that the resolution of the analog signal that can be processed is 2560×1440, and the frame rate is 30 frames per second.

[0084] In the present application, for the interface mapping relationship of the analog-to-digital conversion module in different modes, the mode content of the first timing mode and the mode content of the second timing mode are also configured correspondingly (the mode content of the first timing mode is that the clock signal output by the output interface transmits data on both edges, and the parameter content with the transmission order being the target transmission order; the mode content of the second mode is that the clock signal received by the input interface performs dual-edge data acquisition, and the data acquisition order is the parameter content of the target transmission order). Exemplarily, configuring the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and configuring the timing mode of the specified input interface of the main control module includes:

[0085] Through the driver software layer, write the mode content of the first timing mode into the register of the analog-to-digital conversion module;

[0086] In response to the mode content of the first timing mode being written into the register of the analog-to-digital conversion module, obtain the mode content written into the register of the analog-to-digital conversion module, and write the obtained mode content as the mode content of the second timing mode into the signal acquisition unit of the main control module; wherein, the signal acquisition unit is used to perform data acquisition on the data stream accessed through the specified input interface to obtain media data.

[0087] In addition, regardless of whether the mode content of the first timing mode is written into the register of the analog-to-digital conversion module, it is reasonable to directly write the mode content of the second timing mode into the signal acquisition unit of the main control module. Among them, the driver software layer can be called through the integrated circuit bus I2C in the video processing device to write the mode content of the first timing mode into the register of the analog-to-digital conversion module.

[0088] Of course, the main control module can also configure the mapping relationship between the target input interface and the output channel of the main control module according to the first mapping relationship, so as to further transmit the media data, that is, perform image processing on the obtained media data, such as transmission, scaling, etc. For example, in the first mapping relationship, the target output interface corresponds to input interface 1 and input interface 2, the first mapping relationship indicates that the target input interface corresponds to output channel 1 and output channel 2, and the media data corresponding to the analog signal received by input interface 1 is output through output channel 1, and the media data corresponding to the analog signal received by input interface 2 is output through output channel 2.

[0089] It should be noted that the first timing mode and the second timing mode are only used to distinguish the timing modes configured for the target output interface and the specified input interface (the input interface in the main control module connected to the target output interface). The first timing mode is the timing mode configured for the target output interface to generate a data stream according to the analog signal received by the input interface and matching the first mapping relationship; the second timing mode is the timing mode for the specified input interface to collect the generated data stream to obtain the media data corresponding to the input interfaces existing in the first mapping relationship respectively. That is, the first timing mode is a mode for performing signal composite processing on the input interfaces in the first mapping relationship, and the second timing mode is a mode for performing signal de - composite on the signal after signal composite processing. The present application does not limit this.

[0090] Exemplarily, the first timing mode matching the first mapping relationship is: for any output interface of the analog - to - digital conversion module indicated by the first mapping relationship, the clock signal output by this output interface is configured to transmit data in both edges and the transmission order is configured as the target transmission order; wherein, the target transmission order is the transmission order of the media data corresponding to the signals received by the respective input interfaces corresponding to this output interface indicated in the first mapping relationship;

[0091] The second timing mode matching the first mapping relationship is: for the input interface of the main control module connected to any output interface of the analog - to - digital conversion module indicated by the first mapping relationship, the clock signal received by this input interface is configured for dual - edge data acquisition and the order of the collected media data is the target transmission order.

[0092] Specifically, it is necessary to use a clock signal with the clock frequency of the target transmission channel to multiplex the target transmission channel to achieve the transmission of analog signals; the first timing pattern that matches the first mapping relationship is: for any output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal output by this output interface is configured to transmit data on both edges (i.e., transmit data on both the rising edge and the falling edge), and the transmission order is configured to be the target transmission order of the media data corresponding to the signals received by each input interface corresponding to this output interface indicated in the first mapping relationship. That is, for the media data corresponding to the signals received by each input interface corresponding to this output interface indicated in the first mapping relationship, according to the target transmission order (such as the arrangement order of the input interfaces), time-division multiplexing is performed on the clock signal output by this output interface to merge each path of media data (the media data corresponding to the signal received by one input interface is one path of media data) into one path of media data, generating one data stream. This one data stream is the clock signal output by this output interface, and each path of media data is continuously transmitted on the rising edge and the falling edge of the clock signal; for example: in the first mapping relationship, this output interface corresponds to input interface 1 and input interface 2, analog signal 1 is input to input interface 1, and analog signal 2 is input to input interface 2. According to the predetermined arrangement order of input interface 1 and input interface 2, the media data corresponding to analog signal 1 is time-division multiplexed to the rising edge of the clock signal, and the media data corresponding to analog signal 2 is time-division multiplexed to the falling edge adjacent to the rising edge where the media data corresponding to analog signal 1 is multiplexed in the clock signal; thus, the media data corresponding to analog signal 1 and the media data corresponding to analog signal 2 are respectively time-division multiplexed to the rising edge and the falling edge of the clock signal, and then output through this output interface, that is, the time-division multiplexed media data on each path in the clock signal is output in turn.

[0093] Among them, the target transmission order is the transmission order of the media data corresponding to the signals received by each input interface corresponding to this output interface indicated in the first mapping relationship. This target transmission order can be the order of each input interface, that is, the media data corresponding to analog signal 1 is time-division multiplexed to the rising edge of the clock signal, and the media data corresponding to analog signal 2 is time-division multiplexed to the falling edge adjacent to the rising edge where the media data corresponding to analog signal 1 is multiplexed in the clock signal; or, this target transmission order can be any order. For example: the media data corresponding to analog signal 2 is time-division multiplexed to the rising edge of the clock signal, and the media data corresponding to analog signal 1 is time-division multiplexed to the falling edge adjacent to the rising edge where the media data corresponding to analog signal 2 is multiplexed in the clock signal; this application does not limit the target transmission order.

[0094] Correspondingly, the second timing pattern that matches the first mapping relationship is: for any input interface of the master control module connected to an output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal received by this input interface is configured for dual-edge data acquisition, and the order of the acquired media data is the target transmission order. Among them, data acquisition can be performed on both the rising edge and the falling edge of the clock signal received by this input interface, and the media data corresponding to the analog signal input through the input interface indicated by the first mapping relationship is sequentially acquired. Moreover, the order of the acquired media data corresponds to the target transmission order. For example, the data corresponding to analog signal 1 is time-division multiplexed to the rising edge in the clock signal, and the data corresponding to analog signal 2 is time-division multiplexed to the falling edge adjacent to the rising edge where the media data corresponding to analog signal 1 is multiplexed in the clock signal. Then, data acquisition is performed on the rising edge of the clock signal received by this input interface to obtain the media data corresponding to analog signal 1, and data acquisition is performed on the falling edge adjacent to the rising edge of the clock signal of this input interface to obtain the media data corresponding to analog signal 2. Of course, the acquired media data can also be output to the output channels corresponding to each input interface (during data acquisition, data separation can be performed first, and then data acquisition is performed on the multiple separated data streams respectively. The process of data separation can be understood as the process of demultiplexing this one data stream). For example, through a counter, the data on the rising edge and the falling edge of the clock signal are separated, the data on the rising edge is separated to output channel 1, and the data on the falling edge is separated to output channel 2. Then, data acquisition is performed on the data of each output channel to sequentially obtain the media data corresponding to the analog signal input through the input interface in the first mapping relationship, that is, the media data corresponding to analog signal 1 and the media data corresponding to analog signal 2 are obtained.

[0095] In addition, it should be noted that when data transmission is performed on the media data corresponding to the received analog signal, it is transmitted in parallel according to the clock and the data, that is, it is transmitted through the clock line and the data line in parallel. The clock signal that conforms to the clock frequency is transmitted through the clock line, and a data stream containing the media data corresponding to the received analog signal is transmitted through the data line. During the transmission process, time-division multiplexing of the clock signal is performed for multiple input interfaces (it may also be one input interface) according to a predetermined arrangement order. The master control module performs data acquisition on both the rising edge and the falling edge of the clock signal to sequentially obtain the data input through the input interface in the first mapping relationship according to the predetermined order. For different enhancement modes, the corresponding first mapping relationships are different, and the methods of time-division multiplexing the clock signal and data acquisition are different. Under different target enhancement modes, the master control module can selectively perform data acquisition on the clock signal according to the corresponding enhancement mode to obtain the data input through the input interface in the first mapping relationship in this enhancement mode.

[0096] It should be noted that the clock signal that meets the clock frequency can be understood as the clock signal after analog-to-digital conversion and combined with digital signals. When the number of input interfaces in the first mapping relationship is different (taking the output interface in the first mapping relationship as the target output interface as an example), the time-division multiplexing of the clock signal for multiple input interfaces and the data acquisition method are different.

[0097] Among them, taking the clock frequency of the target transmission channel as 148.5 MHZ as an example, when data is collected for a single edge of 148.5 MHZ (rising edge or falling edge), the amount of data collected in 1 second is: 148.5×10^6×8 bit. Converting bit to MB, the value is approximately 142 MB. In the YUV422 format, the data volume of 1080P30 is: 1920×1080×30×4 / 2 = 124416000 = 119 MB; to ensure that the sum of the data volumes of each output channel (that is, each output channel corresponding to each input interface to which the media data is output after collection) is not greater than the data volume of the target transmission channel. If the number of output channels is 2, that is, the number of input interfaces is 2, then the data volume of each output channel is: the data volume of a single edge of 148.5 MHZ = the data volume of 1080P30 (that is, the data volume of 1080P30 is not greater than the data volume of a single edge of 148.5 MHZ); if the number of output channels is 1, that is, the number of input interfaces is 1, then the data volume of the output channel is: the data volume of a double edge of 148.5 MHZ (rising edge and falling edge) = the data volume of 4MP30 (8MP15) (that is, the data volume of 4MP30 (8MP15) is not greater than the data volume of a double edge of 148.5 MHZ); if the number of output channels is 4, that is, the number of input interfaces is 4, then the data volume of the output channel is: the data volume of a single edge of 74.25 MHZ = the data volume of 720P30 (that is, the data volume of 720P30 is not greater than the data volume of a single edge of 74.25 MHZ); if the number of output channels is 8, that is, the number of input interfaces is 8, then the data volume of the output channel is: the data volume of a single edge of 37.125 MHZ = the data volume of CVBS (Composite Video Broadcast Signal) P30.

[0098] In one implementation, the first mode is an enhancement mode for multiple signals;

[0099] Correspondingly, the first mapping relationship is the mapping relationship between the target output interface and a specified number of input interfaces; the value of the specified number is the number of the multiple signals, and the maximum access capabilities of each input interface in the first mapping relationship are the same.

[0100] The first mode can be an enhancement mode for multiple signals, where the number of paths of the multiple signals is less than the number of input interfaces in the second mode; correspondingly, the first mapping relationship is the mapping relationship between the target output interface and a specified number of input interfaces, and the maximum access capacity of each input interface in the first mapping relationship is the same.

[0101] Exemplarily, taking the clock frequency of the target transmission channel as 148.5 MHZ as an example, in the second mode, the number of input interfaces is 4. According to the clock frequency of the target transmission channel, the maximum access capacity of each input interface is allocated, and the maximum access capacity of each input interface is the same, and all are 720P30; the first mode is an enhancement mode for 2 signals, and the first mapping relationship is the mapping relationship between the target output interface and 2 input interfaces. According to the clock frequency of the target transmission channel, the maximum access capacity of these 2 input interfaces is allocated, and the maximum access capacity of each input interface is the same, and all are 1080P30. Of course, in the enhancement mode of multiple signals, the sum of the maximum access capacities of each input interface is not greater than the clock frequency of the target transmission channel.

[0102] It should be emphasized that the value of the specified number is the number of paths of the multiple signals. The number of paths of the multiple signals can be any number less than the number of input interfaces in the second mode. For example, the default number of input interfaces in the second mode can be 4, then the number of paths of the multiple signals can be 3 or 2, and this application does not make any limitations.

[0103] In another implementation manner, the first mode is an enhancement mode for a single signal;

[0104] Correspondingly, the first mapping relationship is the mapping relationship between the target output interface and one input interface.

[0105] The target enhancement mode can also be an enhancement mode for a single signal. The number of input interfaces in the first mapping relationship is 1, that is, the first mapping relationship is the mapping relationship between the target output interface and one input interface, and the maximum access capacity of this one input interface is not greater than the clock frequency of the target transmission channel; compared with the enhancement mode of multiple signals, since the number of input interfaces is further reduced to 1, in the enhancement mode of a single signal, the enhancement intensity of the maximum access capacity of one input interface is higher, and in order to transmit analog signals, the number of this one input interface cannot be further reduced, and the enhancement mode of this single signal has the greatest enhancement intensity for the maximum access capacity of the input interface.

[0106] Exemplarily, taking the clock frequency of the target transmission channel as 148.5 MHZ as an example, in the second mode, the number of input interfaces is 4, and the maximum access capacity of each input interface is allocated according to the clock frequency of the target transmission channel. The maximum access capacity of each input interface is the same and is 720P30; the first mode is an enhancement mode for single-channel signals, and the first mapping relationship is the mapping relationship between the target output interface and 1 input interface. The maximum access capacity of this 1 input interface is allocated according to the clock frequency of the target transmission channel. The maximum access capacity of each input interface is the same and is 4MP30. Of course, the maximum access capacity of this one input interface is not greater than the bandwidth capacity of the target transmission channel. It should be noted that if the number of existing input interfaces is multiple, such as 2, the maximum access capacity of each input interface can also be different. The maximum access capacity of each input interface can be set according to user needs. For example: The user can also select the maximum access capacity requirements of each input interface in the first mode based on the mode selection interface, and can set the maximum access capacity of each input interface according to the clock frequency of the target transmission channel and the maximum access capacity requirements of each input interface selected by the user.

[0107] Due to the increase in the maximum access capacity of the input interface, it is also necessary to re-allocate memory for the input interfaces existing in the first mapping relationship, so as to store the media data corresponding to the input interfaces existing in the first mapping relationship subsequently. Memory space can be allocated for the input interfaces existing in the first mapping relationship;

[0108] The media data corresponding to the input interfaces existing in the first mapping relationship can also be saved to the memory allocated for this input interface.

[0109] Memory space can also be allocated for the input interfaces existing in the first mapping relationship; for example, for media data in YUV420 format, if the maximum access capacity of the input interface is 720P30, the memory required for each frame of image with a resolution of 720P is: 1280×720×3 / 2 = 1.3MB, that is, 1.3MB of memory space can be allocated for this input interface; if the maximum access capacity of the input interface is 1080P30, the memory required for each frame of image with a resolution of 1080P is: 1920×1080×3 / 2 = 2.97MB, that is, 2.97MB of memory space can be allocated for this input interface. For media data in YUV422 format, if the maximum access capacity of the input interface is 1080P30, the memory required for each frame of image with a resolution of 1080P is: 1920×1080×4 / 2 = 3.96MB, that is, 3.96MB of memory space can be allocated for this input interface. That is, for each frame of media data in YUV420 format, the required memory space is: height of the resolution × width of the resolution × 3 / 2; for each frame of media data in YUV422 format, the required memory space is height of the resolution × width of the resolution × 4 / 2.

[0110] Correspondingly, the analog-to-digital conversion module is further configured to, for the input interfaces in the first mapping relationship, receive, through the input interfaces, analog signals sent by a signal source, and transcode the received analog signals into media data belonging to digital signals (the process of transcoding the analog signals into media data belonging to digital signals can be understood as the process of the analog-to-digital conversion module parsing the received analog signals);

[0111] After allocating the memory space, the media data corresponding to the input interfaces existing in the first mapping relationship can be saved to the memory allocated for the input interfaces.

[0112] To achieve data transmission, the analog-to-digital conversion module can perform time-division multiplexing of multiple input interfaces on the clock signal that meets the clock frequency, and perform data transmission on both the rising edge and the falling edge of the clock signal that meets the clock frequency, so as to output a data stream containing the media data corresponding to the received analog signal and the media data included conforms to the first timing pattern, which will not be elaborated here.

[0113] After the interface mapping relationship of the analog-to-digital conversion module is configured as the first mapping relationship, there may be remaining input interfaces in the analog-to-digital conversion module, and the specified interface of the analog-to-digital conversion module is configured to be in a disabled state; wherein, the specified interface is: some or all of the input interfaces of the analog-to-digital conversion module other than the input interfaces indicated by the first mapping relationship. In this application, after the interface mapping relationship of the analog-to-digital conversion module is configured as the first mapping relationship, some or all of the input interfaces (i.e., the specified input interfaces) outside the first mapping relationship in the analog-to-digital conversion module are configured to be in a disabled state, so as to transmit analog signals only through the input interfaces with improved maximum access capacity in the first mapping relationship, and at the same time prevent other analog signals from being input to the specified input interface, but the input analog signals cannot be transmitted, resulting in invalid input of analog signals.

[0114] Specifically, the register of the analog-to-digital conversion module can be configured to set the input regarding the specified interface in the register of the analog-to-digital conversion module to a high-impedance state; wherein, the input of any interface being set to a high-impedance state indicates that the interface does not receive analog signals.

[0115] Of course, since there is no corresponding output interface for the specified interface, even if an analog signal is received through the specified interface (the specified interface may not be disabled), the analog-to-digital conversion module will not process the analog signal received by the specified interface.

[0116] The main control module can receive a data stream output by the analog-to-digital conversion module through its specified input interface, and collect the data stream according to the second timing mode. For example: separate the data at the rising edge and falling edge of the clock signal that conforms to the clock frequency of the data stream, and then collect the data of each output channel after separation to obtain the media data corresponding to the input interfaces existing in the first mapping relationship.

[0117] After obtaining the media data corresponding to the input interfaces existing in the first mapping relationship, the obtained media data can also be written into the memory, and the memory is the memory space allocated above.

[0118] It should be noted that the input interfaces in the first mapping relationship are the input interfaces used in the first mode. Each input interface can receive analog signals sent by the same or different signal sources and matching the maximum access capacity of the input interface. The analog signals received by different input interfaces can be the same or different. The signal source and the input interface of the video processing device can be connected through BNC ports, or HDMI (High Definition Multimedia Interface) interfaces, Type-C interfaces, DP (DisplayPort) interfaces, etc. After the signal source is connected to the video processing device through any connection method or communication method, the analog signal transmitted by the signal source does not exceed the maximum access capacity of the corresponding input interface, and after format conversion, it is adapted to the main control module (the format adapted by the main control module can be BT656, BT1120, or MIPI (Mobile Industry Processor Interface)). The solution of this application does not limit the signal format of the signal source, the connection method with the video processing device, etc.

[0119] In the technical solution of this application, operations such as obtaining, storing, using, processing, transmitting, providing, and disclosing each mapping relationship, timing mode, analog signal, data stream, etc. involved are all carried out under the condition of obtaining user authorization.

[0120] Next, a specific embodiment will be used as an example to introduce the output interface of the analog-to-digital conversion module as the target output interface.

[0121] Exemplarily, in one implementation manner, the interface mapping relationship of the analog-to-digital conversion module is specifically: the mapping relationship between the target output interface of the analog-to-digital conversion module and the input interfaces existing in the analog-to-digital conversion module;

[0122] The specified input interface of the main control module is specifically the input interface connected to the target output interface of the analog-to-digital conversion module;

[0123] In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the target output interface of the analog-to-digital conversion module indicated in the first mapping relationship is specifically configured as: the first timing mode matching the first mapping relationship, and the timing mode of the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module is configured as: the second timing mode matching the first mapping relationship;

[0124] The analog-to-digital conversion module is specifically configured to receive an analog signal sent by a signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, parse the analog signal sent by the signal source, and obtain media data corresponding to the received analog signal; and output a data stream including the media data corresponding to the received analog signal and conforming to the first timing pattern to the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module through the target output interface of the analog-to-digital conversion module.

[0125] The main control module is configured to receive the data stream through the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module, collect the data stream according to the second timing pattern, obtain media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and process the obtained media data.

[0126] In this application, taking the output interface of the analog-to-digital conversion module as the target output interface as an example, the interface mapping relationship of the analog-to-digital conversion module is the mapping relationship between the target output interface and the input interfaces existing in the analog-to-digital conversion module (the input interfaces in this mapping relationship may be all or part of the input interfaces of the analog-to-digital conversion module, and this application does not make any limitations on this); and the specified input interface of the main control module is the input interface connected to the target output interface of the analog-to-digital conversion module.

[0127] In this embodiment, from the perspective of the target output interface, when the interface mapping relationship of the analog-to-digital conversion module is configured as the first mapping relationship (the mapping relationship corresponding to the target output interface), the timing pattern of the target output interface indicated in the first mapping relationship matches the timing pattern of the first mapping relationship, and the timing pattern of the input interface of the main control module connected to the target output interface is configured to match the second timing pattern of the first mapping relationship.

[0128] Furthermore, the analog-to-digital conversion module specifically outputs a data stream to the input interface connected to the main control module through the target output interface; and the main control module receives the data stream through the input interface connected to the target output interface.

[0129] Taking the output interface of the analog-to-digital conversion module as the target output interface as an example in the embodiment of this application, the interface mapping relationship, the specified input interface, the timing pattern, the analog-to-digital conversion module, and the main control module of the analog-to-digital conversion module are all related to the target output interface. Through this target output interface, a data stream can be transmitted when the access capability of the corresponding input interface is improved, and data processing is performed through the input interface corresponding to the target output interface in the main control module.

[0130] Optionally, in another embodiment of the present invention, in response to a second type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module 120 is configured to be a second mapping relationship that matches the second mode indicated by the second type of mode selection instruction; wherein, the second type of mode selection instruction is an instruction for selecting the second mode;

[0131] And, in response to the interface mapping relationship of the analog-to-digital conversion module 120 being configured to be the second mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module 120 indicated in the second mapping relationship is configured to be: a third timing mode that matches the second mapping relationship, and the timing mode of the target input interface of the main control module 110 is configured to be: a fourth timing mode that matches the second mapping relationship; wherein, the target input interface of the main control module 110 is: the input interface connected to the output interface of the analog-to-digital conversion module 120 indicated in the second mapping relationship; both the third timing mode and the fourth timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module 120 indicated in the second mapping relationship;

[0132] The analog-to-digital conversion module 120 is configured to receive the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module 120 indicated in the second mapping relationship, parse the analog signal sent by the signal source, and obtain the media data corresponding to the received analog signal; through the second designated output interface indicated in the second mapping relationship and mapped to the input interface of the analog-to-digital conversion module 120 that receives the analog signal, output a data stream that contains the media data corresponding to the received analog signal and the media data included conforms to the third timing mode to the second designated input interface of the main control module 110 that is connected to the second designated output interface of the analog-to-digital conversion module 120;

[0133] The main control module 110 is configured to receive the data stream through the second designated input interface of the main control module 110 that is connected to the second designated output interface of the analog-to-digital conversion module 120, collect the data stream according to the fourth timing mode, obtain the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module 120 indicated in the second mapping relationship, and process the obtained media data.

[0134] When the video processing device is currently in the first mode of enhancing the signal access capability, if the user does not have a need to transmit analog signals exceeding the default second maximum access capability, but instead needs the number of signal channels in the default second mode, the user or other devices can also issue a second type of mode selection instruction for selecting the second mode to switch the video processing device back from the first mode to the second mode; in response to this selection instruction, the device configures the interface mapping relationship of the analog-to-digital conversion module to a second mapping relationship that matches the second mode; and, in the case where the interface mapping relationship of the analog-to-digital conversion module is configured as the second mapping relationship, configures the timing mode of the output interface of the analog-to-digital conversion module indicated in the second mapping relationship to a third timing mode that matches the second mapping relationship, and configures the timing mode of the target input interface of the main control module to a fourth timing mode that matches the second mapping relationship. The analog-to-digital conversion module receives the analog signal sent by the signal source through the input interface in the second mapping relationship, analyzes the analog signal sent by the signal source, and obtains the media data corresponding to the received analog signal; and outputs a data stream including the media data corresponding to the received analog signal and whose included media data conforms to the third timing mode to the second designated input interface of the main control module through the second designated output interface; the main control module receives this data stream through the second designated input interface connected to the second designated output interface, collects this data stream according to the fourth timing mode that matches the second mapping relationship to obtain media data, and performs processing such as displaying, transmitting, or scaling adjustment on the obtained media data.

[0135] It can be seen that the present application can also, according to requirements, switch back the first mode of enhancing the signal access capability to the second mode to meet different access capability requirements, channel number requirements, or usage requirements for analog signals.

[0136] Next, a specific embodiment is used to introduce a video processing device provided by the present application.

[0137] The embodiment of the present application provides a solution that can improve the maximum access capability of a video processing device, providing a choice for the user to enable the first mode of enhancing the signal access capability, which can improve the maximum access capability (2 times or 4 times) of the input interface (the input interface corresponding to the target output interface in the interface mapping relationship of the analog-to-digital conversion module) for analog signals, and the corresponding number of access channels will decrease (that is, the number of input interfaces that the video processing device can use will decrease, reduced to 1 / 2 or 1 / 4).

[0138] Exemplarily, a video processing device that transmits 16-channel analog signals supports the access of 16-channel 720P30 analog signals. If the first mode of 2x signal enhancement is enabled, the maximum access capacity of the input interface is increased to 1080P30 analog signals, and the maximum number of access channels is reduced to 8 channels; if the first mode of 4x signal enhancement is enabled, the maximum access capacity of the input interface is increased to 4MP30 analog signals, and the maximum number of access channels is reduced to 4 channels; of course, the user can turn off the first mode that enhances the signal access capacity and restore the default analog signal access capacity and number of channels, that is, switch the video processing device back to the second mode.

[0139] In this application, by switching the composite mode of the output interface of the video processing device, the access capacity is exchanged for the number of access channels, that is, by reducing the number of input interfaces, the maximum access capacity of the input interfaces used is increased.

[0140] The following introduces the default multiplexing mode. Taking the DVR as an example, the number of input interfaces in the default multiplexing mode is 4, and the connection relationship between the analog signals and the video processing device is as Figure 6 shown:

[0141] Four-channel analog signals are respectively input into the analog-to-digital conversion module through four input interfaces VIN1 (input interface 1), VIN2 (input interface 2), VIN3 (input interface 3), and VIN4 (input interface 4). The analog-to-digital conversion module multiplexes the four-channel analog signals and outputs a single data stream through the target output interface. The main control module receives the single data stream through the target input interface and demultiplexes the single data stream. The demultiplexed data is respectively output to output channel 1, output channel 2, output channel 3, and output channel 4. (In this embodiment, the target output interface of the analog-to-digital conversion module is taken as an example, and the input interface connected to the target output interface in the main control module is the target input interface)

[0142] The BNC connector is used to connect the coaxial cable to an analog camera (with the signal source being the analog camera). The BNC connector is physically connected to the VIN (video in) port of the analog-to-digital conversion module (AD) (i.e., the video input port) (each analog-to-digital conversion module (AD) has 4 input interfaces). Depending on its model, the analog-to-digital conversion module (AD) generally has 2 or 4 target output interfaces. The interface mapping relationship from the VIN port to the target output interfaces inside the analog-to-digital conversion module (AD) (i.e., the interface mapping relationship of the analog-to-digital conversion module is the interface mapping relationship regarding the target output interfaces), namely the composite mode, is configured at the software driver layer (the composite mode is the interface mapping relationship of the target output interfaces, and the timing mode used to indicate signal transmission corresponding to the interface mapping relationship of the target output interfaces is configured at the software driver layer). The target output interfaces of the analog-to-digital conversion module (AD) are connected to the target input interfaces of the main control module SOC using the BT656 interface for hardware wiring.

[0143] As Figure 6 shown, the connection relationship from the four VIN ports of the analog-to-digital conversion module (AD) to the target output interfaces and the connection relationship from the target output interfaces to the output channels of the main control module generally adopt a sequential manner. The four analog signals are input into the analog-to-digital conversion module through VIN1, VIN2, VIN3, and VIN4. The analog-to-digital conversion module AD multiplexes the four analog signals and outputs a BT656 data stream to the main control module SOC through the target output interfaces. The main control module SOC demultiplexes the BT656 data stream. The media data corresponding to the analog signal of VIN1 is output through output channel 1, the media data corresponding to the analog signal of VIN2 is output through output channel 2, the media data corresponding to the analog signal of VIN3 is output through output channel 3, and the media data corresponding to the analog signal of VIN4 is output through output channel 4.

[0144] Through the connection relationship, it can be determined the index number of the analog-to-digital conversion module (AD) corresponding to the BNC channel between the signal source and the video processing device, the VIN number of the input interface corresponding to the corresponding analog-to-digital conversion module (AD), the signal acquisition unit VIDEV of the main control module SOC corresponding to the BNC channel (the signal acquisition unit of the main control module), and the output channel number of the corresponding main control module.

[0145] The output port of the analog-to-digital conversion module (AD) is connected to the input interface of the signal acquisition unit of the main control module SOC using the BT656 interface. The four analog signals are multiplexed through the four input interfaces into the analog-to-digital conversion module to generate a composite data stream, which is output to the target input interface of the main control module SOC through the target output interfaces. The signal acquisition unit of the main control module SOC demultiplexes the composite data stream.

[0146] The hardware connection relationship of a video processing device provided by an embodiment of the present application is as follows Figure 7 shown. 32 BNCs support 32 analog signals for video input, which are multiplexed into data streams through an analog-to-digital conversion module (AD) and transmitted to the main control module for demultiplexing and acquisition to obtain media data, and then output to the panel for display. In addition to the main control module and the analog-to-digital conversion module, the main board in the video processing device also includes a power supply inlet connected to the power supply; of course, the video can also be output to other devices, and the output video format is HDMI / VGA / CVBS, etc. The video processing device also supports audio processing, and both audio input and audio output are in RCA format (Radio Corporation of American, the format of the decoded audio signal).

[0147] It should be noted that the above description of the hardware connection relationship of the video processing device is only an example and should not constitute a limitation to the present application.

[0148] Taking a video processing device that transmits four analog signals as an example, the process of transmitting four analog signals is as follows Figure 8 、 Figure 9 shown. Four analog signals VIDEO1 (video signal 1), VIDEO2 (video signal 2), VIDEO3 (video signal 3), and VIDEO4 (video signal 4) are transmitted through the BNC signal source and respectively connected to VIN1, VIN2, VIN3, and VIN4 of the analog-to-digital conversion module (AD). The analog-to-digital conversion module internally analyzes them, and then performs four-way multiplexing of the analog signals, and outputs a BT656 signal (a multiplexed data stream) from the target output interface 1. The target output interface 2 is not used. The main control module is configured in a 148.5MHZ dual-edge acquisition mode (that is, data acquisition is performed on both the rising edge and the falling edge). The target input interface VI7 (target input interface 7, that is, the input interface in the main control module connected to the target input interface 1 is the target input interface 7) of the main control module (SOC) receives the BT656 signal. The VIDEOV (signal acquisition unit) of the main control module demultiplexes the analog signals for the data stream transmitted by the target input interface into four video data, way1 (video data 1), way2 (video data 2), way3 (video data 3), and way4 (video data 4), and outputs them to four output channels chn1 (output channel 1), chn2 (output channel 2), chn3 (output channel 3), and chn4 (output channel 4) in sequence. The output data is in YUV format ("Y" represents luminance, and "U" and "V" represent chrominance and concentration).

[0149] Specifically, the schematic diagram of 16-channel analog signal transmission is as follows Figure 10 Shown in the figure, taking a video processing device that transmits 16-channel analog signals as an example, the video processing device has 16 BNC ports and can access 16 front-end cameras (i.e., 16 signal sources). There are 4 analog-to-digital conversion modules, and each analog-to-digital conversion module can parse 4-channel analog signals and perform 4-channel multiplexing. The 16-channel analog signals transmitted by the BNC signal source are divided into four groups, namely VIDEO[1:4] (video signals 1-4), VIDEO[5:8] (video signals 5-8), VIDEO[9:12] (video signals 9-12), and VIDEO[13:16] (video signals 13-16), which are respectively connected to the corresponding analog-to-digital conversion modules through VIN[1:4] (input interfaces 1-4), VIN[5:8] (input interfaces 5-8), VIN[9:12] (input interfaces 9-12), and VIN[13:16] (input interfaces 13-16), and output BT656 signals (a multiplexed data stream) through their respective target output interfaces 1. The output BT656 signals are configured in a 148.5MHZ clock double-edge mode (i.e., data acquisition is performed on both the rising edge and the falling edge); VI7 (target input interface 7), VI6 (target input interface 6), VI5 (target input interface 5), and VI4 (target input interface 4) of the main control module respectively receive the BT656 signals of the corresponding target output interface 1 and perform 4-channel demultiplexing. Among them, VI3 (target input interface 3), VI2 (target input interface 2), VI1 (target input interface 1), and VI0 (target input interface 0) are not used, and the target output interface 2 of the four analog-to-digital conversion modules is also not used.

[0150] Among them, the BT656 interface timing of the four-channel multiplexing of analog signals is as follows:

[0151] The analog-to-digital conversion module and the main control module support the BT656 timing of 4-channel analog signal multiplexing. The data of the four-channel analog signals share the same BT656 interface through the time-division multiplexing mode. Among them, the data of each analog signal is an independent BT656 timing, and the data of the four-channel analog signals are alternately output to the target output interface. The BT656 timing of the four-channel multiplexing is as follows Figure 11 Shown in the figure, taking the BT656 timing of 4MUX as an example, CH1 / CH2 / CH3 / CH4 respectively represent the data corresponding to the four different BT656 timing analog signals. The clock is 148.5MHZ double-edge, and the rising edge and the falling edge of the clock are respectively sampled once, and the video data corresponding to the 4-channel analog signals are sequentially sampled.

[0152] Each video signal is in the YcbCr format (where Y represents luminance, and Cb and Cr represent the core concepts of color difference components). The data format for each line can include timing reference codes, line blanking areas, valid pixels, etc. The specific content is similar to the prior art and will not be elaborated here. Through the main control module for de-multiplexing, the video data of 4 analog signals is obtained, and the maximum number of analog signals is equivalent to the data volume of 1280×720P30.

[0153] The following introduces the switching from the 4MUX mode to the 2MUX mode (i.e., the switching from the four-channel multiplexing mode (the second mode) to the two-channel multiplexing mode (the first mode)).

[0154] When the user needs to access analog signals with higher resolution (or frame rate), the user can choose to enable the first mode. Configure the multiplexing mode of the analog-to-digital conversion module (AD) and the de-multiplexing mode of the main control module SOC to switch 4MUX to 2MUX. The number of access channels decreases, but the access capacity increases. For example, in the 4-channel multiplexing mode, each analog-to-digital conversion module AD can access 4 analog signals of 720P30 and multiplex them into 1 BT656 multiplexed data stream output (with a clock of 148.5MHZ double-edge). When switched to the 2-channel multiplexing mode, each analog-to-digital conversion module AD can only access 2 analog signals of 1080P30 and multiplex them into 1 BT656 multiplexed data stream output (with a clock of 148.5MHZ double-edge). The signal acquisition unit VIDEV hardware device of the main control module performs de-multiplexing to acquire 2 YUV data, that is, two-channel video data.

[0155] The process of transmitting 2 analog signal inputs is as Figure 12 、 Figure 13As shown in the figure, the analog signals transmitted by the BNC signal source, namely the four analog signals VIDEO1, VIDEO2, VIDEO3, and VIDEO4, are respectively connected to VIN1, VIN2, VIN3, and VIN4 of the analog-to-digital conversion module (AD). (Only the mapping relationships between VIN1 and VIN2 and the target output interface 1 are configured, that is, in the first mode, the input interfaces of the analog-to-digital conversion module indicated by the first mapping relationship are VIN1 and VIN2, and the output interface of the analog-to-digital conversion module indicated is the target output interface 1; although VIDEO3 and VIDEO4 can be connected to VIN3 and VIN4, subsequent processing cannot be performed, and the dashed lines in the figure indicate that the signals cannot be processed.) Inside the analog-to-digital conversion module AD, the analog signals are combined, and the BT656 signal (combined data stream) after combining VIDEO1 and VIDEO2 is output from the target output interface 1. The main control module is configured in a 148.5MHZ dual-edge acquisition mode, and the target input interface VI7 of the main control module (SOC) receives the BT656 signal. The VIDEOV (signal acquisition unit) of the main control module performs analog signal de-combination, decomposes it into two channels of video data way1 and way2, and outputs them to two channels chn1 and chn2 in sequence, outputting in YUV data format.

[0156] Among them, the main reason for the reduction in the number of access channels is that the resolution of the accessed analog signals has increased, and the memory required for video processing has increased accordingly. Video processing includes one or more combinations of video acquisition, video encoding, video decoding, image pre-processing, etc. Taking the memory occupied by a frame of YUV420 format image as an example, the 720P resolution occupies memory, 1280×720×3 / 2 = 1.3MB; the 1080p resolution occupies memory, 1920×1080×3 / 2 = 2.97MB; in addition, the hardware processing performance is also a restrictive factor, such as the codec hardware performance, scaling processing performance, etc.

[0157] Among them, the BT656 interface timing for the combination of two analog signals is as follows: The analog-to-digital conversion module and the main control module support the BT656 timing for the combination of two analog signals. The data of the two analog signals share the same BT656 interface (that is, the target output interface of the analog-to-digital conversion module) through the time-division multiplexing mode, and the data of each analog signal is an independent BT656 timing. The BT656 timing for the combination of two signals is as Figure 14 shown. Taking the BT656 timing of 2MUX as an example, CH1 / CH2 respectively represent the data corresponding to the two different BT656 timing analog signals. The clock is 148.5MHZ dual-edge, and the rising edge and falling edge of the clock are each sampled once, sequentially sampling the video data corresponding to the two analog signals.

[0158] The following introduces the switching from the four-channel combination mode (i.e., the four-channel combination mode (the second mode) is switched to the single-channel mode (the first mode)).

[0159] In the 1-channel mode, each analog-to-digital conversion module (AD) can only access 1-channel of 2560×1440P30 analog signal without need for composition. The main control module does not need to de-compose.

[0160] The main reason for the reduction in the number of channels is similar to the above-mentioned switching from the 4MUX mode to the 2MUX mode, which will not be elaborated here.

[0161] The process of transmitting 1-channel analog signal input is as Figure 15 、 Figure 16 shown. The analog signal transmitted by the BNC signal source, the 4-channel analog signals VIDEO1, VIDEO2, VIDEO3, and VIDEO4 are respectively connected to VIN1, VIN2, VIN3, and VIN4 of the analog-to-digital conversion module (AD) (only the mapping relationship between VIN1 and the target output interface 1 is configured, that is, the input interface of the analog-to-digital conversion module indicated by the first mapping relationship in the first mode is VIN1, and the indicated analog-to-digital conversion module output interface is the target output interface 1; although VIDEO2, VIDEO3, and VIDEO4 can be connected to VIN2, VIN3, and VIN4, subsequent processing cannot be performed, and the dotted line in the figure indicates that the signal cannot be processed). The analog-to-digital conversion module AD internally composes the analog signal and outputs the BT656 signal (uncomposed single-channel data stream) of VIDEO1 from the target output interface 1. The main control module is configured in a 148.5MHZ dual-edge acquisition mode, and the target input interface VI7 of the main control module (SOC) receives the BT656 signal. The VIDEOV (signal acquisition unit) of the main control module parses it to obtain 1-channel video data way1 and outputs it to channel chn1 in sequence, outputting the YUV data format.

[0162] Among them, the BT656 timing of the 1-channel mode is as follows:

[0163] In the 1-channel mode, the analog-to-digital conversion module and the main control module have an uncomposed BT656 timing, and the single-channel analog signal exclusively uses the BT656 interface. The timing is as Figure 17 shown. Taking the BT656 timing of the 1-channel mode as an example, CH1 represents the data corresponding to the analog signal of the BT656 timing of this channel. The clock is 148.5MHZ dual-edge. The rising edge and the falling edge of the clock are each sampled once to sample the data of this single channel.

[0164] The video processing device provided by the embodiment of the present application adds a mode selection interface. When the user selects the first mode, the maximum access and processing capabilities of the video processing device for analog signals can be improved. The steps are as follows:

[0165] 1. The video processing device is restarted (optional, that is, the video processing device can be restarted or not restarted);

[0166] 2. Through the software driver layer, configure the second mode to the newly selected first mode by the user. That is, set the interface mapping relationship of the analog-to-digital conversion module to the first mapping relationship that matches the first mode; and, according to the set first mapping relationship, through the software driver layer, write the mode content of the first timing mode corresponding to the first mode into the register of the analog-to-digital conversion module (AD); and write the mode content of the second timing mode corresponding to the first mode into the signal acquisition unit of the main control module to configure the transmission timing of the analog signal in the first mode. Among them, this application also supports switching from 4-channel composite to 2-channel composite; or, switching from 4-channel composite to 1-channel mode; or, switching from 2-channel composite to 1-channel mode;)

[0167] 3. Initialize the target input interface and the signal acquisition unit of the main control module, and configure the second mode to the newly selected first mode (corresponding to the composite mode of the analog-to-digital conversion module (AD)).

[0168] 4. Disable some analog channels (that is, disable some or all of the input interfaces other than the input interface of the analog-to-digital conversion module indicated by the first mapping relationship).

[0169] 5. The main control module allocates memory resources according to the newly selected first mode by the user. 6. Other initialization processes.

[0170] The user can also close the first mode and switch the first mode back to the default second mode. The steps are as follows:

[0171] 1. The video processing device automatically restarts (optional) 2. The registers of the analog-to-digital conversion module (AD) and the signal acquisition unit of the main control module are configured according to the default second mode. That is, set the interface mapping relationship of the analog-to-digital conversion module to the second mapping relationship that matches the second mode; and configure the timing of the registers of the analog-to-digital conversion module (AD) and the signal acquisition unit of the main control module according to the second mapping relationship. 4. Cancel the disabling of the analog channels (that is, cancel the disabling of the input interfaces); 5. The main chip allocates memory resources according to the multi-channel composite mode. 6. Other initialization processes.

[0172] In addition, based on the above device embodiment, the embodiment of this application also provides a signal transmission method. The method is applied to a video processing device, and the method may include the following steps:

[0173] Step A1, in response to a first type of mode selection instruction, determine the first mode indicated by the first type of mode selection instruction;

[0174] Step A2: Set the interface mapping relationship of the analog-to-digital conversion module of the video processing device to a first mapping relationship that matches the first mode indicated by the first type of selection instruction, so as to improve the maximum access capacity of the input interface indicated by the interface mapping relationship of the analog-to-digital conversion module of the video processing device.

[0175] Among them, the first type of mode selection instruction is used to select a mode for enhancing the signal access capacity. The interface mapping relationship of the analog-to-digital conversion module is the mapping relationship between the output interface of the analog-to-digital conversion module and the input interface of the analog-to-digital conversion module. The interface mapping relationship of the analog-to-digital conversion module is default configured to a second mapping relationship that matches the second mode. The first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship. The first ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated. The second ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated.

[0176] In addition, the output interface of the analog-to-digital conversion module indicated by the interface mapping relationship is connected to the input interface of the main control module. Optionally, the clock frequency of the transmission channel between the output interface of the analog-to-digital conversion module indicated by the interface mapping relationship and the input interface of the connected main control module remains unchanged.

[0177] It can be seen that when the interface mapping relationship of the analog-to-digital conversion module is configured to a first mapping relationship that matches the first mode, the analog-to-digital conversion module enters the first mode. The ratio of the number of input interfaces to the number of output interfaces indicated by the interface mapping relationship of the analog-to-digital conversion module is smaller than that in the second mode. Since the clock frequency of the transmission channel is fixed, the maximum access capacity of the input interface of the analog-to-digital conversion module in the first mode is improved. For the relevant introduction about the clock frequency, reference can be made to the corresponding content in the above embodiments, which will not be elaborated here.

[0178] Optionally, the signal transmission method may further include the following steps:

[0179] In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, configure the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship to match the first timing mode of the first mapping relationship, and configure the timing mode of the specified input interface of the main control module to match the second timing mode of the first mapping relationship; wherein, the specified input interface of the main control module is the input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and both the first timing mode and the second timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated in the first mapping relationship.

[0180] Output a data stream that contains the media data corresponding to the received analog signal and whose contained media data conforms to the first timing mode, to the first specified input interface connected to the first specified output interface, through the first specified output interface indicated by the first mapping relationship and mapped to the input interface receiving the analog signal.

[0181] Receive the data stream through the first specified input interface connected to the first specified output interface, collect the data stream according to the second timing mode, obtain the media data corresponding to the analog signal transmitted by the input interface indicated by the first mapping relationship, and process the obtained media data.

[0182] This application can configure the interface mapping relationship of the analog-to-digital conversion module, and through the configuration that enhances the signal access capability, it can be made that the access capability of the input interface indicated by the interface mapping relationship after the analog-to-digital conversion module is set is improved, and according to the input interface with improved access capability, a larger amount of analog signals are accessed and processed; it can be seen that this application can improve the maximum access capability of the video processing device for analog signals, so that the video processing device can access a larger amount of analog signals and process them.

[0183] For the implementation manners of the respective steps in this embodiment, reference may be made to the corresponding content of the above device embodiment, and details are not described herein again.

[0184] Based on the above device embodiment, this application further provides a signal transmission method, and the method includes the following steps:

[0185] In response to a first type of mode selection instruction, determine the first mode indicated by the first type of mode selection instruction, and set the interface mapping relationship of the analog-to-digital conversion module to a first mapping relationship that matches the first mode indicated by the first type of selection instruction, so that the analog-to-digital conversion module receives an analog signal sent by a signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and analyzes the analog signal sent by the signal source to obtain media data corresponding to the received analog signal; wherein, the first type of mode selection instruction is used to select a mode for enhancing signal access capability, the interface mapping relationship of the analog-to-digital conversion module is a mapping relationship between the output interfaces and the input interfaces of the analog-to-digital conversion module, the interface mapping relationship of the analog-to-digital conversion module is default configured to a second mapping relationship that matches a second mode, the first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship, the first ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated, and the second ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated;

[0186] In response to the interface mapping relationship of the analog-to-digital conversion module being configured to the first mapping relationship, configure the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship to a first timing mode that matches the first mapping relationship, and configure the timing mode of the designated input interface of the main control module to a second timing mode that matches the first mapping relationship; wherein, the designated input interface of the main control module is the input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and both the first timing mode and the second timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted through the input interface of the analog-to-digital conversion module indicated in the first mapping relationship.

[0187] Output a data stream that contains the media data corresponding to the received analog signal and whose contained media data conforms to the first timing mode, to the first designated input interface connected to the first designated output interface, through the first designated output interface indicated by the first mapping relationship and mapped to the input interface that received the analog signal;

[0188] Receive the data stream through the first designated input interface connected to the first designated output interface, collect the data stream according to the second timing mode to obtain the media data corresponding to the analog signal transmitted through the input interface indicated by the first mapping relationship, and process the obtained media data.

[0189] The signal transmission method provided by the embodiments of the present application. In order to improve the maximum access capacity of a video processing device for analog signals, the present application responds to a first type of mode selection instruction for enhancing the signal access capacity, and configures the interface mapping relationship of the analog-to-digital conversion module to a first mapping relationship; moreover, the interface mapping relationship of the analog-to-digital conversion module is default-configured to a second mapping relationship, and a first ratio corresponding to the first mapping relationship is smaller than a second ratio corresponding to the second mapping relationship, that is, in the first mode, the ratio of the number of input interfaces to the number of output interfaces indicated by the interface mapping relationship of the analog-to-digital conversion module is smaller than that in the second mode. Since the clock frequency of the transmission channel is fixed, the maximum access capacity of the input interfaces of the analog-to-digital conversion module in the first mode is improved. And, in the first mapping relationship, the timing mode of the output interfaces of the analog-to-digital conversion module is configured to a first timing mode, and the timing mode of the specified input interfaces of the main control module is configured to a second timing mode, so as to adapt to the data transmission of the media data corresponding to the analog signals transmitted through the input interfaces of the first mapping relationship. Then, through the input interfaces indicated by the first mapping relationship with enhanced signal access capacity, the analog signals sent by the signal source end are received and parsed to obtain media data, and, through a first specified output interface indicated by the first mapping relationship, a data stream is output, and this data stream contains media data and conforms to the first timing mode; and, through the first specified input interface, this data stream is received and the data stream is collected according to the second timing mode to obtain media data, and the obtained media data is processed. The present application can configure the interface mapping relationship of the analog-to-digital conversion module, and through the configuration for enhancing the signal access capacity, it can be made that the access capacity of the input interfaces indicated by the configured interface mapping relationship of the analog-to-digital conversion module is improved, and according to the input interfaces with enhanced access capacity, analog signals with a larger data volume are accessed and processed; it can be seen that the present application can improve the maximum access capacity of the video processing device for analog signals, so that the video processing device can access analog signals with a larger data volume and process them.

[0190] Optionally, the method further includes: in response to the interface mapping relationship of the analog-to-digital conversion module being configured as a first mapping relationship, configuring the maximum access capability of the input interface indicated by the first mapping relationship as an access capability matching the first mapping relationship; wherein, the access capability matching the first mapping relationship is determined according to the clock frequency of the target transmission channel corresponding to the output interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the number of input interfaces of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship; the target transmission channel corresponding to any output interface of the analog-to-digital conversion module is the transmission channel between the output interface of the analog-to-digital conversion module and the input interface of the main control module connected thereto; the determining method for the maximum access capability of the input interface of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship includes:

[0191] Dividing the clock frequency of the target transmission channel of this output interface by the number of input interfaces of the analog-to-digital conversion module corresponding to this output interface to obtain a target clock frequency, and determining the maximum amount of data that can be transmitted per unit time in the communication frequency band of this target clock frequency as a first data amount, and determining the target transmission parameter corresponding to the largest transmission data amount among the various transmission parameters whose corresponding transmission data amounts are not greater than this first data amount as the maximum access capability allocated to the input interface of the analog-to-digital conversion module corresponding to this output interface; wherein, any transmission parameter includes frame rate and resolution;

[0192] Alternatively, determining the maximum amount of data that can be transmitted per unit time in the communication frequency band of the clock frequency of this target transmission channel as a second data amount, dividing this second data amount by the number of input interfaces of the analog-to-digital conversion module corresponding to this output interface to obtain a third data amount, and determining the target transmission parameter corresponding to the largest transmission data amount among the various transmission parameters whose corresponding transmission data amounts are not greater than this third data amount as the maximum access capability allocated to the input interface of the analog-to-digital conversion module corresponding to this output interface.

[0193] Optionally, the interface mapping relationship of the analog-to-digital conversion module is specifically: the mapping relationship between the target output interface of the analog-to-digital conversion module and the existing input interfaces of the analog-to-digital conversion module; the specified input interface of the main control module is specifically the input interface connected to the target output interface of the analog-to-digital conversion module;

[0194] In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, configuring the timing pattern of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship to match the first timing pattern of the first mapping relationship, and configuring the timing pattern of the specified input interface of the main control module to match the second timing pattern of the first mapping relationship includes:

[0195] In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, configuring the timing pattern of the target output interface of the analog-to-digital conversion module indicated in the first mapping relationship to match the first timing pattern of the first mapping relationship, and configuring the timing pattern of the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module to match the second timing pattern of the first mapping relationship;

[0196] Outputting, through the first designated output interface indicated by the first mapping relationship and mapped to the input interface receiving the analog signal, a data stream including the media data corresponding to the received analog signal and conforming to the first timing pattern to the first designated input interface connected to the first designated output interface, includes:

[0197] Outputting, through the target output interface, a data stream including the media data corresponding to the received analog signal and conforming to the first timing pattern to the input interface connected to the target output interface;

[0198] Receiving, through the first designated input interface connected to the first designated output interface, the data stream, collecting the data stream according to the second timing pattern to obtain the media data corresponding to the analog signal transmitted by the input interface indicated by the first mapping relationship, and processing the obtained media data, includes:

[0199] Receiving, through the input interface connected to the target output interface, the data stream, collecting the data stream according to the second timing pattern to obtain the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and processing the obtained media data.

[0200] Optionally, the number of modes for enhancing the signal access capability is one or more; in the case where the number of modes for enhancing the signal access capability is multiple, for the interface mapping relationship of the analog-to-digital conversion module, the first ratio corresponding to the first mapping relationship that matches is different in different modes of enhancing the signal access capability.

[0201] Optionally, the number of input interfaces mapped to the same output interface of the analog-to-digital conversion module as indicated by the interface mapping relationship of the analog-to-digital conversion module is one or more, and when the number is multiple, the signal access capabilities of the multiple input interfaces are the same.

[0202] Optionally, the interface mapping relationship of the analog-to-digital conversion module is specifically: the mapping relationship between the target output interface of the analog-to-digital conversion module and the existing input interfaces of the analog-to-digital conversion module; and, the first mode is: the mode in which the corresponding signal access capability has a target ratio with the signal access capability corresponding to the second mode; wherein, the target ratio is the ratio of the number of input interfaces indicated in the second mapping relationship to the number of input interfaces indicated in the first mapping relationship; the signal access capability corresponding to the first mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated in the first mapping relationship, and the signal access capability corresponding to the second mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated in the second mapping relationship.

[0203] Optionally, the first timing mode matching the first mapping relationship is: for any output interface of the analog-to-digital conversion module indicated in the first mapping relationship, the clock signal output by this output interface is configured to transmit data on both edges and the transmission order is configured to be the target transmission order; wherein, the target transmission order is the transmission order of the media data corresponding to the signals received by the respective input interfaces corresponding to this output interface indicated in the first mapping relationship;

[0204] The second timing mode matching the first mapping relationship is: for the input interface of the main control module connected to any output interface of the analog-to-digital conversion module indicated in the first mapping relationship, the clock signal received by this input interface is configured for dual-edge data acquisition and the order of the acquired media data is the target transmission order.

[0205] Optionally, the method further includes: configuring the specified interface of the analog-to-digital conversion module to a disabled state; wherein, the specified interface is: some or all of the input interfaces other than the input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship.

[0206] Optionally, the method further includes:

[0207] In response to a second type of mode selection instruction, determine the second mode indicated by the second type of mode selection instruction, and configure the interface mapping relationship of the analog-to-digital conversion module to a second mapping relationship that matches the second mode indicated by the second type of mode selection instruction; so that the analog-to-digital conversion module receives an analog signal sent by a signal source through the input interface of the analog-to-digital conversion module indicated by the second mapping relationship, and analyzes the analog signal sent by the signal source to obtain media data corresponding to the received analog signal; wherein, the second type of mode selection instruction is an instruction for selecting a second mode.

[0208] In response to the interface mapping relationship of the analog-to-digital conversion module being configured to a second mapping relationship, configure the timing mode of the output interface of the analog-to-digital conversion module indicated in the second mapping relationship to a third timing mode that matches the second mapping relationship, and configure the timing mode of the target input interface of the main control module to a fourth timing mode that matches the second mapping relationship; wherein, the target input interface of the main control module is an input interface connected to the output interface of the analog-to-digital conversion module indicated in the second mapping relationship; both the third timing mode and the fourth timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted through the input interface of the analog-to-digital conversion module indicated in the second mapping relationship.

[0209] Output a data stream that includes the media data corresponding to the received analog signal and whose included media data conforms to the third timing mode to a second specified input interface connected to the second specified output interface through the second specified output interface indicated by the second mapping relationship and mapped to the input interface that received the analog signal.

[0210] Receive the data stream through the second specified input interface connected to the second specified output interface, collect the data stream according to the fourth timing mode to obtain the media data corresponding to the analog signal transmitted through the input interface indicated by the second mapping relationship, and process the obtained media data.

[0211] In addition, an embodiment of the present application further provides a video processing device, including a main control module and an analog-to-digital conversion module.

[0212] In response to a first type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module is configured to a first mapping relationship that matches the first mode indicated by the first type of mode selection instruction to improve the maximum access capacity of the input interface indicated by the interface mapping relationship of the analog-to-digital conversion module.

[0213] Among them, the first type of mode selection instruction is used to select a mode for enhancing signal access capability. The interface mapping relationship of the analog-to-digital conversion module is the mapping relationship between the output interfaces and the input interfaces of the analog-to-digital conversion module. The output interface of the analog-to-digital conversion module indicated by the interface mapping relationship is connected to the input interface of the main control module.

[0214] The interface mapping relationship of the analog-to-digital conversion module is default configured as a second mapping relationship that matches the second mode. The first ratio corresponding to the first mapping relationship is smaller than the second ratio corresponding to the second mapping relationship. The first ratio is the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces indicated. The second ratio is the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces indicated.

[0215] Among them, for the detailed introduction of the analog-to-digital conversion module above, the corresponding description content in the above embodiments can be referred to. For the structural schematic diagram of the video processing device provided in this embodiment, it can be referred to Figure 1 .

[0216] Optionally, the clock frequency of the transmission channel between the output interface of the analog-to-digital conversion module indicated by the interface mapping relationship and the input interface of the connected main control module remains unchanged. It can be seen that when the interface mapping relationship of the analog-to-digital conversion module is configured as the first mapping relationship that matches the first mode, the analog-to-digital conversion module enters the first mode. In this way, the ratio of the number of input interfaces to the number of output interfaces indicated by the interface mapping relationship of the analog-to-digital conversion module is smaller than that in the second mode. Since the clock frequency of the transmission channel is fixed, the maximum access capability of the input interfaces of the analog-to-digital conversion module in the first mode is improved. For the relevant introduction of the clock frequency, the corresponding content in the above embodiments can be referred to, and details are not elaborated here.

[0217] In addition, after the interface mapping relationship of the analog-to-digital conversion module is configured to be a first mapping relationship that matches the first mode indicated by the first type of mode selection instruction, in response to the interface mapping relationship of the analog-to-digital conversion module being configured to be the first mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship is configured to be: a first timing mode that matches the first mapping relationship, and the timing mode of the specified input interface of the main control module is configured to be: a second timing mode that matches the first mapping relationship; wherein, the specified input interface of the main control module is the input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and both the first timing mode and the second timing mode are timing modes for data transmission of the media data corresponding to the analog signal transmitted through the input interface of the analog-to-digital conversion module indicated in the first mapping relationship.

[0218] The analog-to-digital conversion module is configured to receive an analog signal sent by a signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, parse the analog signal sent by the signal source, and obtain media data corresponding to the received analog signal; and output a data stream that contains the media data corresponding to the received analog signal and whose contained media data conforms to the first timing mode to the first specified input interface of the main control module that is connected to the first specified output interface of the analog-to-digital conversion module through the first specified output interface of the analog-to-digital conversion module that is mapped to the input interface of the analog-to-digital conversion module that received the analog signal and indicated by the first mapping relationship.

[0219] The main control module is configured to receive the data stream through the first specified input interface of the main control module that is connected to the first specified output interface of the analog-to-digital conversion module, collect the data stream according to the second timing mode, obtain media data corresponding to the analog signal transmitted through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and process the obtained media data.

[0220] For the specific functional implementations of the main control module and the analog-to-digital conversion module, reference can be made to the relevant description content in the above embodiments, which will not be elaborated here.

Claims

1. A video processing device, characterized in that: Including main control module and analog-to-digital conversion module; In response to a first type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module is configured as a first mapping relationship that matches the first mode indicated by the first type of mode selection instruction; wherein the first type of mode selection instruction is used to select a mode for enhancing signal access capability, the interface mapping relationship of the analog-to-digital conversion module is a mapping relationship between an output interface of the analog-to-digital conversion module and an input interface of the analog-to-digital conversion module, the interface mapping relationship of the analog-to-digital conversion module is configured by default as a second mapping relationship that matches the second mode, a first ratio corresponding to the first mapping relationship is reduced relative to a second ratio corresponding to the second mapping relationship, the first ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated, and the second ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated; And, in response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship is configured to: match the first timing mode of the first mapping relationship, and the timing mode of the designated input interface of the main control module is configured to: match the second timing mode of the first mapping relationship; wherein the designated input interface of the main control module is an input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and the first timing mode and the second timing mode are both timing modes for data transmission of media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated in the first mapping relationship; The analog-to-digital conversion module is configured to receive the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, parse the analog signal sent by the signal source, and obtain media data corresponding to the received analog signal; output a data stream containing media data corresponding to the received analog signal and containing media data conforming to the first timing mode to the first designated input interface of the main control module connected to the first designated output interface of the analog-to-digital conversion module through the first designated output interface of the analog-to-digital conversion module indicated by the first mapping relationship and mapped to the input interface of the analog-to-digital conversion module that receives the analog signal; The main control module is configured to receive the data stream through the first designated input interface of the main control module connected to the first designated output interface of the analog-to-digital conversion module, collect the data stream according to the second timing mode, obtain the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and process the obtained media data.

2. The video processing device according to claim 1, characterized in that In response to the interface mapping relationship of the analog-to-digital conversion module being configured as a first mapping relationship, the maximum access capability of the input interface of the analog-to-digital conversion module indicated by the first mapping relationship is configured as: an access capability matching the first mapping relationship; Among them, the access capability matched with the first mapping relationship is determined according to the clock frequency of the target transmission channel corresponding to the output interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the number of input interfaces of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship; the target transmission channel corresponding to any output interface of the analog-to-digital conversion module is the transmission channel between the output interface of the analog-to-digital conversion module and the connected input interface of the main control module; The method for determining the maximum access capacity of the input interface of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship includes: The target clock frequency of the target transmission channel of the output interface is divided by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain the target clock frequency, and the maximum amount of data that can be transmitted per unit time under the communication frequency band of the target clock frequency is determined as the first data amount, and the target transmission parameter corresponding to the maximum transmission data amount among the transmission parameters corresponding to the transmission data amount not greater than the first data amount is determined as the maximum access capacity allocated to the input interface of the analog-to-digital conversion module corresponding to the output interface; wherein any transmission parameter includes a frame rate and a resolution; Alternatively, determine the maximum amount of data that can be transmitted per unit time in the communication frequency band of the clock frequency of the target transmission channel as the second data amount, divide the second data amount by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain a third data amount, and determine the target transmission parameter corresponding to the maximum transmission data amount among the transmission parameters corresponding to the transmission data amount not greater than the third data amount as the maximum access capacity allocated to the input interface of the analog-to-digital conversion module corresponding to the output interface.

3. The video processing device according to claim 1 or 2, characterized in that: The interface mapping relationship of the analog-to-digital conversion module is specifically: a mapping relationship between a target output interface of the analog-to-digital conversion module and an input interface existing in the analog-to-digital conversion module; The designated input interface of the main control module is specifically an input interface connected to the target output interface of the analog-to-digital conversion module; In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the target output interface of the analog-to-digital conversion module indicated in the first mapping relationship is specifically configured to match the first timing mode of the first mapping relationship, and the timing mode of the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module is configured to match the second timing mode of the first mapping relationship; The analog-to-digital conversion module is specifically configured to receive the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, parse the analog signal sent by the signal source, and obtain the media data corresponding to the received analog signal; and output a data stream containing the media data corresponding to the received analog signal and containing the media data in accordance with the first timing mode to the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module through the target output interface of the analog-to-digital conversion module; The main control module is configured to receive the data stream through the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module, collect the data stream according to the second timing mode, obtain the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and process the obtained media data.

4. The video processing device according to claim 1 or 2, characterized in that: The number of modes for enhancing the signal access capability is one or more; In the case where there are multiple modes for enhancing the signal access capability, for the interface mapping relationship of the analog-to-digital conversion module, in different modes for enhancing the signal access capability, the first ratios corresponding to the matching first mapping relationships are different.

5. The video processing device according to claim 1 or 2, characterized in that: The number of input interfaces mapped to the same output interface of the analog-to-digital conversion module indicated by the interface mapping relationship of the analog-to-digital conversion module is one or more, and when the number is multiple, the signal access capabilities of the multiple input interfaces are the same.

6. The video processing device according to claim 5, characterized in that: The interface mapping relationship of the analog-to-digital conversion module is specifically: a mapping relationship between a target output interface of the analog-to-digital conversion module and an input interface existing in the analog-to-digital conversion module; And, the first mode is a mode in which the corresponding signal access capability has a target ratio with the signal access capability corresponding to the second mode; wherein the target ratio is the ratio of the number of input interfaces indicated in the second mapping relationship to the number of input interfaces indicated in the first mapping relationship; the signal access capability corresponding to the first mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the signal access capability corresponding to the second mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated by the second mapping relationship.

7. The video processing device according to claim 1 or 2, characterized in that: The first timing mode matching the first mapping relationship is: for any output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal output by the output interface is configured as a mode of dual-edge data transmission and the transmission sequence is configured as a target transmission sequence; wherein the target transmission sequence is the transmission sequence of media data corresponding to the signals received by each input interface corresponding to the output interface indicated in the first mapping relationship; The second timing mode that matches the first mapping relationship is: for the input interface of the main control module connected to any output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal received by the input interface is configured as a dual-edge data acquisition mode and the order of the collected media data is the target transmission order.

8. The video processing device according to claim 1 or 2, characterized in that: The designated interface of the analog-to-digital conversion module is configured to be in a disabled state; wherein the designated interface is: part or all of the input interfaces of the analog-to-digital conversion module except the input interface of the analog-to-digital conversion module indicated by the first mapping relationship.

9. The video processing device according to claim 1 or 2, characterized in that: In response to the second type of mode selection instruction, the interface mapping relationship of the analog-to-digital conversion module is configured as a second mapping relationship matching the second mode indicated by the second type of mode selection instruction; wherein the second type of mode selection instruction is an instruction for selecting the second mode; And, in response to the interface mapping relationship of the analog-to-digital conversion module being configured as a second mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the second mapping relationship is configured to: match the third timing mode of the second mapping relationship, and the timing mode of the target input interface of the main control module is configured to: match the fourth timing mode of the second mapping relationship; wherein the target input interface of the main control module is: an input interface connected to the output interface of the analog-to-digital conversion module indicated in the second mapping relationship; the third timing mode and the fourth timing mode are both timing modes for data transmission of media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the second mapping relationship; The analog-to-digital conversion module is configured to receive the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated by the second mapping relationship, parse the analog signal sent by the signal source, and obtain media data corresponding to the received analog signal; output a data stream containing media data corresponding to the received analog signal and containing media data conforming to the third timing mode to the second designated input interface of the main control module connected to the second designated output interface of the analog-to-digital conversion module through the second designated output interface indicated by the second mapping relationship and mapped to the input interface of the analog-to-digital conversion module that receives the analog signal; The main control module is configured to receive the data stream through the second designated input interface of the main control module, which is connected to the second designated output interface of the analog-to-digital conversion module, collect the data stream according to the fourth timing mode, obtain the media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the second mapping relationship, and process the obtained media data.

10. A signal transmission method, characterized in that: The method comprises: In response to a first type of mode selection instruction, a first mode indicated by the first type of mode selection instruction is determined, and an interface mapping relationship of the analog-to-digital conversion module is set to a first mapping relationship that matches the first mode indicated by the first type of selection instruction, so that the analog-to-digital conversion module receives the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, parses the analog signal sent by the signal source, and obtains media data corresponding to the received analog signal; wherein the first type of mode selection instruction is used to select a mode for enhancing the signal access capability, and the interface mapping relationship of the analog-to-digital conversion module is about the analog-to-digital conversion module. The mapping relationship between the output interface of the block and the input interface of the analog-to-digital conversion module, the interface mapping relationship of the analog-to-digital conversion module is configured as a second mapping relationship matching the second mode by default, a first ratio corresponding to the first mapping relationship is reduced relative to a second ratio corresponding to the second mapping relationship, the first ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the first mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated, and the second ratio is: the ratio of the number of input interfaces of the analog-to-digital conversion module indicated in the second mapping relationship to the number of output interfaces of the analog-to-digital conversion module indicated; In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship is configured to match the first timing mode of the first mapping relationship, and the timing mode of the designated input interface of the main control module is configured to match the second timing mode of the first mapping relationship; wherein the designated input interface of the main control module is an input interface connected to the output interface of the analog-to-digital conversion module indicated in the first mapping relationship, and the first timing mode and the second timing mode are both timing modes for data transmission of media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated in the first mapping relationship; Outputting a data stream including media data corresponding to the received analog signal and conforming to the first timing pattern to a first designated input interface connected to the first designated output interface through a first designated output interface indicated by the first mapping relationship and mapped to the input interface receiving the analog signal; The data stream is received through the first designated input interface connected to the first designated output interface, and the data stream is collected according to the second timing mode to obtain media data corresponding to the analog signal transmitted by the input interface indicated by the first mapping relationship, and the obtained media data is processed.

11. The method according to claim 10, characterized in that The method further includes: in response to the interface mapping relationship of the analog-to-digital conversion module being configured as a first mapping relationship, configuring the maximum access capability of the input interface indicated by the first mapping relationship to an access capability matching the first mapping relationship; Among them, the access capability matched with the first mapping relationship is determined according to the clock frequency of the target transmission channel corresponding to the output interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the number of input interfaces of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship; the target transmission channel corresponding to any output interface of the analog-to-digital conversion module is the transmission channel between the output interface of the analog-to-digital conversion module and the connected input interface of the main control module; The method for determining the maximum access capacity of the input interface of the analog-to-digital conversion module corresponding to the same output interface of the analog-to-digital conversion module indicated by the first mapping relationship includes: The target clock frequency of the target transmission channel of the output interface is divided by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain the target clock frequency, and the maximum amount of data that can be transmitted per unit time under the communication frequency band of the target clock frequency is determined as the first data amount, and the target transmission parameter corresponding to the maximum transmission data amount among the transmission parameters corresponding to the transmission data amount not greater than the first data amount is determined as the maximum access capacity allocated to the input interface of the analog-to-digital conversion module corresponding to the output interface; wherein any transmission parameter includes a frame rate and a resolution; Alternatively, determine the maximum amount of data that can be transmitted per unit time in the communication frequency band of the clock frequency of the target transmission channel as the second data amount, divide the second data amount by the number of input interfaces of the analog-to-digital conversion module corresponding to the output interface to obtain a third data amount, and determine the target transmission parameter corresponding to the maximum transmission data amount among the transmission parameters corresponding to the transmission data amount not greater than the third data amount as the maximum access capacity allocated to the input interface of the analog-to-digital conversion module corresponding to the output interface.

12. The method according to claim 10 or 11, characterized in that: The interface mapping relationship of the analog-to-digital conversion module is specifically: a mapping relationship between a target output interface of the analog-to-digital conversion module and an input interface existing in the analog-to-digital conversion module; The designated input interface of the main control module is specifically an input interface connected to the target output interface of the analog-to-digital conversion module; In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, configuring the timing mode of the output interface of the analog-to-digital conversion module indicated in the first mapping relationship to match the first timing mode of the first mapping relationship, and configuring the timing mode of the designated input interface of the main control module to match the second timing mode of the first mapping relationship includes: In response to the interface mapping relationship of the analog-to-digital conversion module being configured as the first mapping relationship, the timing mode of the target output interface of the analog-to-digital conversion module indicated in the first mapping relationship is configured to match the first timing mode of the first mapping relationship, and the timing mode of the input interface of the main control module connected to the target output interface of the analog-to-digital conversion module is configured to match the second timing mode of the first mapping relationship; The first designated output interface indicated by the first mapping relationship and mapped to the input interface receiving the analog signal outputs a data stream including media data corresponding to the received analog signal and the media data including the media data conforming to the first timing mode to the first designated input interface connected to the first designated output interface, including: Outputting, through the target output interface, a data stream including media data corresponding to the received analog signal and conforming to the first timing pattern to an input interface connected to the target output interface; The receiving the data stream through the first designated input interface connected to the first designated output interface, collecting the data stream according to the second timing mode, obtaining media data corresponding to the analog signal transmitted by the input interface indicated by the first mapping relationship, and processing the obtained media data, including: The data stream is received through an input interface connected to the target output interface, and the data stream is collected according to the second timing mode to obtain media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the obtained media data is processed.

13. The method according to claim 10 or 11, characterized in that: The number of modes for enhancing the signal access capability is one or more; In the case where there are multiple modes for enhancing the signal access capability, for the interface mapping relationship of the analog-to-digital conversion module, in different modes for enhancing the signal access capability, the first ratios corresponding to the matching first mapping relationships are different.

14. The method according to claim 10 or 11, characterized in that: The number of input interfaces mapped to the same output interface of the analog-to-digital conversion module indicated by the interface mapping relationship of the analog-to-digital conversion module is one or more, and when the number is multiple, the signal access capabilities of the multiple input interfaces are the same.

15. The method according to claim 14, characterized in that The interface mapping relationship of the analog-to-digital conversion module is specifically: a mapping relationship between a target output interface of the analog-to-digital conversion module and an input interface existing in the analog-to-digital conversion module; And, the first mode is a mode in which the corresponding signal access capability has a target ratio with the signal access capability corresponding to the second mode; wherein the target ratio is the ratio of the number of input interfaces indicated in the second mapping relationship to the number of input interfaces indicated in the first mapping relationship; the signal access capability corresponding to the first mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated by the first mapping relationship, and the signal access capability corresponding to the second mode is the signal access capability of each input interface of the analog-to-digital conversion module indicated by the second mapping relationship.

16. The method according to claim 10 or 11, characterized in that The first timing mode matching the first mapping relationship is: for any output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal output by the output interface is configured as a mode of dual-edge data transmission and the transmission sequence is configured as a target transmission sequence; wherein the target transmission sequence is the transmission sequence of media data corresponding to the signals received by each input interface corresponding to the output interface indicated in the first mapping relationship; The second timing mode that matches the first mapping relationship is: for the input interface of the main control module connected to any output interface of the analog-to-digital conversion module indicated by the first mapping relationship, the clock signal received by the input interface is configured as a dual-edge data acquisition mode and the order of the collected media data is the target transmission order.

17. The method according to claim 10 or 11, characterized in that: The method further comprises: The designated interface of the analog-to-digital conversion module is configured to be in a disabled state; wherein the designated interface is: part or all of the input interfaces of the analog-to-digital conversion module except the input interface of the analog-to-digital conversion module indicated by the first mapping relationship.

18. The method according to claim 10 or 11, characterized in that The method further comprises: In response to the second type of mode selection instruction, the second mode indicated by the second type of mode selection instruction is determined, and the interface mapping relationship of the analog-to-digital conversion module is configured as a second mapping relationship that matches the second mode indicated by the second type of mode selection instruction; so that the analog-to-digital conversion module receives the analog signal sent by the signal source through the input interface of the analog-to-digital conversion module indicated by the second mapping relationship, parses the analog signal sent by the signal source, and obtains media data corresponding to the received analog signal; wherein the second type of mode selection instruction is an instruction for selecting the second mode; In response to the interface mapping relationship of the analog-to-digital conversion module being configured as a second mapping relationship, the timing mode of the output interface of the analog-to-digital conversion module indicated in the second mapping relationship is configured to match the third timing mode of the second mapping relationship, and the timing mode of the target input interface of the main control module is configured to match the fourth timing mode of the second mapping relationship; wherein the target input interface of the main control module is an input interface connected to the output interface of the analog-to-digital conversion module indicated in the second mapping relationship; the third timing mode and the fourth timing mode are both timing modes for data transmission of media data corresponding to the analog signal transmitted by the input interface of the analog-to-digital conversion module indicated by the second mapping relationship; outputting a data stream including media data corresponding to the received analog signal and conforming to the third timing pattern to a second designated input interface connected to the second designated output interface through a second designated output interface indicated by the second mapping relationship and mapped to the input interface receiving the analog signal; The data stream is received through the second designated input interface connected to the second designated output interface, and the data stream is collected according to the fourth timing mode to obtain media data corresponding to the analog signal transmitted by the input interface indicated by the second mapping relationship, and the obtained media data is processed.

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