Pixel-defined package barrier layer for RGB color patterning

Abstract

Examples disclosed herein relate to an apparatus. The device includes a substrate, a plurality of adjacent pixel defining layer (PDL) structures disposed over the substrate, and a plurality of sub-pixels. The PDL structure has a top surface coupled to an adjacent sidewall of the PDL structure. The plurality of sub-pixels is defined by a PDL structure. Each sub-pixel includes an anode, an organic light emitting diode (OLED), a cathode, and an encapsulation layer. An organic light emitting diode (OLED) material is disposed over the anode. The OLED material extends over the top surface of the PDL structure beyond the adjacent sidewalls. The cathode is disposed over the OLED material. A cathode extends over the top surface of the PDL structure beyond the adjacent sidewalls. An encapsulation layer is disposed over the cathode. The packaging layer is provided with a first side wall and a second side wall.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to displays. More specifically, embodiments described herein relate to sub-pixel circuits that can be utilized in displays such as organic light-emitting diode (OLED) displays and methods of forming the sub-pixel circuits. Background Art

[0002] Input devices including display devices can be used in various electronic systems. An organic light-emitting diode (OLED) is a type of light-emitting diode (LED) in which an emissive electroluminescent layer is an organic compound film that emits light in response to an electric current. If the emitted light passes through a transparent or semi-transparent bottom electrode and a substrate on which a panel is fabricated, the OLED device is classified as a bottom emission device. A top emission device is classified according to whether the light emitted from the OLED device exits through a lid added after the fabrication of the device. Nowadays, OLEDs are used to fabricate display devices in many electronic products. Current electronic manufacturers are pushing for these display devices to be reduced in size while providing a higher resolution than a few years ago.

[0003] OLED pixel patterning is currently based on a process that limits panel size, pixel resolution, and substrate size. Photolithography is used, rather than using a fine metal mask, to pattern the pixels. Currently, OLED pixel patterning requires the lift off of organic materials after the patterning process. When lifted off, the organic materials leave particulate problems that degrade OLED performance. Therefore, there is a need in the art for sub-pixel circuits that can be utilized in displays such as organic OLED displays and methods of forming the sub-pixel circuits. Summary of the Invention

[0004] In one embodiment, a device is provided. The device includes: a substrate, a plurality of adjacent pixel-defining layer (PDL) structures disposed above the substrate, and a plurality of sub-pixels defined by the PDL structures. The PDL structures have top surfaces that couple to adjacent sidewalls of the PDL structures. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode, and an encapsulation layer. The organic light-emitting diode (OLED) material is disposed above the anode. The OLED material has a first OLED end and a second OLED end that extend above the top surface of the PDL structure beyond the adjacent sidewalls. The cathode is disposed above the OLED material. The cathode has a first cathode end and a second cathode end that extend above the top surface of the PDL structure beyond the adjacent sidewalls. The encapsulation layer is disposed above the cathode. The encapsulation layer has a first sidewall and a second sidewall, wherein the first sidewall and the second sidewall extend beyond the first OLED end, the second OLED end, the first cathode end, and the second cathode end.

[0005] In another embodiment, a method of forming a device is provided. The method includes positioning a substrate. The substrate includes: a first opening of a first sub-pixel defined by a plurality of adjacent pixel-defining layer (PDL) structures disposed above the substrate, and a first anode defined by an adjacent PDL structure. The method further includes: depositing an OLED material, a cathode, and an encapsulation layer of the first sub-pixel above the substrate, forming a resist in a well of the first sub-pixel, removing the encapsulation layer of the first sub-pixel exposed by the resist of the first sub-pixel, and removing the OLED material and the cathode of the first sub-pixel exposed by the resist of the first sub-pixel. The method further includes positioning the substrate, which further includes: a second opening of a second sub-pixel defined by a plurality of PDL structures disposed above the substrate, and a second anode defined by an adjacent PDL structure. The method then includes: depositing an OLED material, a cathode, and an encapsulation layer of the second sub-pixel above the substrate, forming a resist in a well of the second sub-pixel, removing the encapsulation layer of the second sub-pixel exposed by the resist, removing the OLED material and the cathode of the second sub-pixel exposed by the resist, and removing the resist of the second sub-pixel.

[0006] In another embodiment, a device is provided. The device includes: a substrate, a plurality of adjacent pixel definition layer (PDL) structures disposed above the substrate, and a plurality of sub-pixels defined by the PDL structures. The PDL structures have top surfaces coupled to adjacent sidewalls of the PDL structures. Each sub-pixel includes an anode, an organic light-emitting diode (OLED) material, a cathode disposed above the anode, a plug, and a encapsulation layer disposed above the plug. The OLED material has a first OLED end and a second OLED end, and the first OLED end and the second OLED end extend above the top surface of the PDL structure beyond the adjacent sidewalls. The cathode has a first cathode end and a second cathode end, and the first cathode end and the second cathode end extend above the top surface of the PDL structure beyond the adjacent sidewalls. The plug is disposed above the cathode. The encapsulation layer is disposed above the plug. The encapsulation layer has a first sidewall and a second sidewall. The first sidewall and the second sidewall extend beyond the first OLED end, the second OLED end, the first cathode end, and the second cathode end.

[0007] In another embodiment, a method of forming a device is provided. The method includes positioning a substrate. The substrate includes: a first opening of a first sub-pixel defined by a plurality of adjacent pixel definition layer (PDL) structures disposed above the substrate, and a first anode defined by adjacent PDL structures. The method further includes: depositing an OLED material, a cathode, and an encapsulation layer of the first sub-pixel above the substrate, forming a plug in a well of the first sub-pixel, the plug having a first plug transmittance that matches or substantially matches the OLED transmittance of the OLED material of the first sub-pixel, removing the encapsulation layer of the first sub-pixel exposed by the plug of the first sub-pixel, removing the OLED material and the cathode of the first sub-pixel exposed by the plug of the first sub-pixel, depositing a second encapsulation layer above the plug and the first encapsulation layer of the first sub-pixel, and removing a portion of the second encapsulation layer disposed above the second sub-pixel. The method further includes positioning the substrate. The substrate further includes: a second opening of a second sub-pixel defined by a plurality of PDL structures disposed above the substrate, and a second anode defined by adjacent PDL structures. The method further includes: depositing an OLED material, a cathode, and an encapsulation layer of the second sub-pixel above the substrate, forming a plug in a well of the second sub-pixel, the plug having a first plug transmittance that matches or substantially matches the OLED transmittance of the OLED material of the first sub-pixel, removing the first encapsulation layer of the second sub-pixel exposed by the plug of the second sub-pixel, removing the OLED material and the cathode of the second sub-pixel exposed by the plug of the second sub-pixel, depositing a second encapsulation layer above the plug and the first encapsulation layer of the second sub-pixel, and removing a portion of the second encapsulation layer disposed above the first sub-pixel. Description of the Drawings

[0008] In order to understand the above features of the present disclosure in a manner that can be detailed, a more specific description of the present disclosure, which has been briefly summarized above, can be obtained by referring to the embodiments. Some of the embodiments are illustrated in the accompanying drawings. However, it should be noted that the drawings only show exemplary embodiments and should not be considered as limiting the scope of the present disclosure, and the present disclosure may allow other equivalent embodiments.

[0009] Figure 1A FIG. is a schematic cross-sectional view of a sub-pixel circuit having a plugless arrangement according to an embodiment.

[0010] Figure 1B FIG. is a schematic cross-sectional view of a sub-pixel circuit having a plug arrangement according to an embodiment.

[0011] Figure 1C FIG. is a schematic top cross-sectional view of a sub-pixel circuit having a dot-type architecture according to an embodiment.

[0012] Figure 1D FIG. is a schematic cross-sectional view of a sub-pixel circuit having a line-type architecture according to an embodiment.

[0013] Figure 2 FIG. is a flowchart of a method for forming a sub-pixel circuit according to an embodiment.

[0014] Figures 3A to 3P FIG. is a schematic cross-sectional view of a substrate during a method for forming a sub-pixel circuit according to an embodiment.

[0015] Figure 4 FIG. is a flowchart of a method for forming a sub-pixel circuit according to an embodiment.

[0016] Figures 5A to 5P FIG. is a schematic cross-sectional view of a substrate during a method for forming a sub-pixel circuit according to the embodiments described herein.

[0017] For the sake of facilitating understanding, the same component symbols are used to denote the same components common in the drawings whenever possible. It is contemplated that the components and features of one embodiment may be beneficially incorporated into other embodiments without further recitation. DETAILED DESCRIPTION

[0018] The embodiments described herein generally relate to displays. More specifically, the embodiments described herein relate to sub-pixel circuits and methods for forming sub-pixel circuits that can be utilized in displays such as organic light emitting diode (OLED) displays.

[0019] Figure 1A FIG. is a schematic cross-sectional view of a sub-pixel circuit 100 having a plugless arrangement 101A. Figure 1A The cross-sectional view is along Figure 1C andFigure 1D taken along cross-sectional line 1”-1”. Figure 1B is a schematic cross-sectional view of a sub-pixel circuit 100 having a plug arrangement 101B. Figure 1B The cross-sectional view is taken along Figure 1C and Figure 1D cross-sectional line 1”-1”.

[0020] The sub-pixel circuit 100 includes a substrate 102. A metal-containing layer 104 may be patterned on the substrate 102 and is defined by adjacent pixel defining layer (PDL) structures 126 disposed on the substrate 102. In one embodiment, the metal-containing layer 104 is pre-patterned on the substrate 102. For example, the substrate 102 is a pre-patterned indium tin oxide (ITO) glass substrate. The metal-containing layer 104 is configured as the anode of each sub-pixel. In one embodiment, the metal-containing layer 104 is a layer stack of: a first transparent conductive oxide (TCO) layer, a second metal-containing layer disposed on the first TCO layer, and a third TCO layer disposed on the second metal-containing layer. The metal-containing layer 104 includes, but is not limited to, chromium, titanium, gold, silver, copper, aluminum, ITO, combinations thereof, or other suitable conductive materials.

[0021] The PDL structure 126 is disposed on the substrate 102. The PDL structure includes a top surface 126A coupled to two adjacent sidewalls 126B. The PDL structure 126 includes one of an organic material, an organic material having an inorganic coating thereon, or an inorganic material. The organic material of the PDL structure 126 includes, but is not limited to, polyimide. The inorganic material of the PDL structure 126 includes, but is not limited to, silicon oxide (SiO 2 ), silicon nitride (Si 3 N 4 ), silicon oxynitride (Si 2 N 2 O), magnesium fluoride (MgF 2 ), or combinations thereof. Adjacent PDL structures 126 define corresponding sub-pixels and expose the anodes (i.e., the metal-containing layer 104) of the corresponding sub-pixels of the sub-pixel circuit 100.

[0022] The sub-pixel circuit 100 has a plurality of sub-pixels 106, which at least include a first sub-pixel 108A and a second sub-pixel 108B. Although the drawings depict the first sub-pixel 108A and the second sub-pixel 108B, the sub-pixel circuit 100 of the embodiments described herein may include three or more sub-pixels 106, such as a third sub-pixel and a fourth sub-pixel. Each sub-pixel 106 has an organic light-emitting diode (OLED) material 112, which is configured to emit white light, red light, green light, blue light, or light of other colors when powered on. For example, the OLED material 112 of the first sub-pixel 108A emits red light when powered on, the OLED material of the second sub-pixel 108B emits green light when powered on, the OLED material of the third sub-pixel emits blue light when powered on, and the OLED materials of the fourth sub-pixel and the fifth sub-pixel emit light of another color when powered on. In one embodiment, the OLED material is different from the material of the PDL structure 126. The OLED material 112 is disposed above the PDL structure 126. In one embodiment, the OLED material 112 is disposed on the top surface 126A of the PDL structure 126. In one embodiment, the OLED material has a first end 112A and a second end 112B that are disposed above the top surface 126A of the adjacent PDL structure 126 and extend beyond the endpoints of the metal-containing layer 104. In another embodiment, the first end 112A of the OLED material 112 extends beyond the corresponding sidewall 126B of the PDL structure 126, and the second end 112B of the OLED material 112 extends beyond another corresponding sidewall 126B of the PDL structure 126.

[0023] The cathode 114 is disposed above the OLED material 112. In one embodiment, the cathode 114 is disposed on the OLED material 112. The cathode comprises a conductive material, such as a metal or a metal alloy. For example, the cathode 114 comprises, but is not limited to, chromium, titanium, aluminum, ITO, or a combination thereof. In one embodiment, the material of the cathode 114 is different from the materials of the OLED material 112 and the PDL structure 126. In one embodiment, the cathode 114 contacts an auxiliary cathode (not shown). In another embodiment, the cathode 114 contacts a busbar (not shown) outside the active region of the sub-pixel circuit 100. The cathode further comprises a first end 114A and a second end 114B. The first end 114A and the second end 114B are disposed above the top surface 126A of the adjacent PDL structure 126. In one embodiment, the first end 112A and the second end 112B of the OLED material extend further above the top surface 126A of the adjacent PDL structure 126 than the first end 114A and the second end 114B of the cathode. In one embodiment, the first end 114A and the second end 114B of the cathode 114 extend beyond the endpoints of the metal-containing layer 104. In another embodiment, the first end 114A of the cathode 114 extends beyond the corresponding sidewall 126B of the PDL structure 126, and the second end 114B of the cathode 114 extends beyond the other corresponding sidewall 126B of the PDL structure 126.

[0024] Each sub-pixel 106 comprises a passivation layer 116. The passivation layer 116 may be or correspond to a local passivation layer. The passivation layer 116 of the corresponding sub-pixel is disposed above the cathode 114 (and the OLED material 112) having the passivation layer 116. The passivation layer 116 comprises a first sidewall 116A and a second sidewall 116B. The first sidewall 116A and the second sidewall 116B of the passivation layer 116 extend beyond the first end 112A and the second end 112B of the OLED material 112. The first sidewall 116A and the second sidewall 116B of the passivation layer 116 extend beyond the first end 114A and the second end 114B of the cathode 114. The passivation layer 116 contacts the first end 112A, the second end 112B, the first end 114A, the second end 114B, and the top surface 126A. In one embodiment, a gap G separates the second sidewall 116B of the passivation layer 116 of the first pixel 108A from the first sidewall 116A of the passivation layer 116 of the second pixel 108B. The passivation layer 116 can be changed using the deposition thickness. For example, the passivation layer 116 may have a thickness of 0.1 μm and 2 μm. The passivation layer 116 comprises a non-conductive inorganic material, such as a silicon-containing material. The silicon-containing material may comprise a material containing Si 3 N 4 material. In one embodiment, the material of the passivation layer 116 is different from the materials of the cathode 114, the OLED material 112, and the PDL structure 126.

[0025] In embodiments including one or more capping layers, the capping layers are disposed between the cathode 114 and the encapsulation layer 116. For example, a first capping layer and a second capping layer are disposed between the cathode 114 and the encapsulation layer 116. Each of the embodiments described herein may include one or more capping layers disposed between the cathode 114 and the encapsulation layer 116. The first capping layer may include an organic material. The second capping layer may include an inorganic material, such as lithium fluoride. The first capping layer and the second capping layer may be deposited by evaporation. The via-less arrangement 101A and the via arrangement 101B of the sub-pixel circuit 100 further include a global passivation layer 121. The global passivation layer 121 is disposed above the encapsulation layer 116. In one embodiment, the global passivation layer 121 is disposed above a portion of the top surface 126A of the PDL structure 126 in the gap G and the first sidewall 116A and the second sidewall 116B of the encapsulation layer 116. In another embodiment, the global passivation layer 121 is disposed on the top surface 126A of the PDL structure 126 in the gap G. In yet another embodiment, the global passivation layer 121 may include an intermediate layer 118 and a passivation layer 120. In one embodiment, the intermediate layer 118 is disposed above a portion of the top surface 126A of the PDL structure 126 in the gap G and the first sidewall 116A and the second sidewall 126B. In another embodiment, the intermediate layer 118 is disposed on the top surface 126A of the PDL structure 126 in the gap G. In another embodiment, the global passivation layer 121, the intermediate layer 118, and the passivation layer 120 do not contact the OLED material 112 or the cathode 114. The intermediate layer 118 may include an inkjet material, such as an acrylic material.

[0026] The plug arrangement 101B includes plugs 122 disposed within the encapsulation layer 116. Each plug 122 is disposed in a respective sub-pixel 106 of the sub-pixel circuit 100. The plugs 122 may have additional passivation layers disposed thereon. The plugs include, but are not limited to, photoresist, color filter, or photosensitive monomer. The plugs 122 have a plug transmittance that matches or substantially matches the OLED transmittance of the OLED material 112. Each of the plugs 122 may be of the same material and match the OLED transmittance. The plugs 122 may be of different materials that match the OLED transmittance of each respective sub-pixel among the plurality of sub-pixels 106. The matching or substantially matching plug transmittance and the OLED transmittance allow the plugs 122 to remain above the sub-pixels 106 without blocking the emitted light from the OLED material 112. The plugs 122 are capable of maintaining their original positions, and thus no stripping process is required to remove them from the sub-pixel circuit 100. Because the plugs 122 are maintained, no additional patterned photoresist material disposed above the formed sub-pixels 106 is required in subsequent operations. Eliminating the need for a stripping process for the plugs and the need for additional patterned photoresist material on the sub-pixel circuit 100 increases the production yield.

[0027] Figure 1C FIG. is a schematic top cross-sectional view of a sub-pixel circuit 100 having a dot pattern architecture 101C. Figure 1D FIG. is a schematic cross-sectional view of a sub-pixel circuit 100 having a line pattern architecture 101D. Figure 1C and Figure 1D Each of the top cross-sectional views of is taken along cross-sectional line 1'-1' of Figure 1A and Figure 1B The dot pattern architecture 101C includes a plurality of pixel openings 124A from adjacent PDL structures 126. Each of the pixel openings 124A defines each of the sub-pixels 106 of the dot pattern architecture 101C. The line pattern architecture 101D includes a plurality of pixel openings 124B from adjacent PDL structures 126. Each of the pixel openings 124B defines each of the sub-pixels 106 of the line pattern architecture 101D.

[0028] Figure 2 FIG. is a flow chart of a method 200 for forming a sub-pixel circuit 100 having a plugless arrangement 101A. Figures 3A to 3P FIG. is a schematic cross-sectional view of a substrate 102 during the method 200 for forming a sub-pixel circuit 100 having a plugless arrangement 101A.

[0029] In operation 201, as Figure 3AAs shown, an OLED material 112, a cathode 114, and a first encapsulation layer 116A of the first sub-pixel 108A are deposited above a substrate 102. The OLED material 112, the cathode 114, and the first encapsulation layer 116A are disposed above a PDL structure 126 and a metal-containing layer 104. In an embodiment including an overcoat layer, the overcoat layer is deposited between the cathode 114 and the first encapsulation layer 116A. The overcoat layer can be deposited by evaporation. In one embodiment, the OLED material 112 and the cathode 114 are deposited by evaporation.

[0030] In operation 202, as Figure 3B shown, a photoresist 302 is formed in a well of the first sub-pixel 108A. The photoresist 302 is disposed above the first encapsulation layer 116A. The photoresist 302 has a width W 1 . The photoresist 302 is a positive photoresist or a negative photoresist. The portions of the positive photoresist-containing photoresist, when exposed to electromagnetic radiation, are respectively soluble in a photoresist developer applied to the photoresist after the pattern is written into the photoresist using electromagnetic radiation. The portions of the negative photoresist-containing photoresist, when exposed to electromagnetic radiation, are respectively insoluble in a photoresist developer applied to the photoresist after the pattern is written into the photoresist using electromagnetic radiation. The chemical composition of the photoresist 302 determines whether the photoresist is a positive photoresist or a negative photoresist. The photoresist 302 is patterned to form one of a pixel opening 124A of a dot-type architecture 101C or a pixel opening 124B of a line-type architecture 101D of the first sub-pixel 108A. The patterning is one of a photolithography, a digital lithography process, or a laser ablation process.

[0031] In operation 203, as Figure 3C shown, the first encapsulation layer 116A exposed by the photoresist 302 is removed. The first encapsulation layer 116A exposed by the photoresist 302 can be removed by a dry etching process. In operation 204, as Figure 3D shown, the cathode 114 and the OLED material 112 exposed by the photoresist 302 are removed. The cathode 114 and the OLED material 112 exposed by the photoresist 302 can be removed by a dry etching process. The dry etching processes of operation 203 and operation 204 are anisotropic or substantially anisotropic. The width W of the photoresist 302 1 A buffer layer 303 is formed above the PDL structure 126. Any residual isotropic etching occurring during the dry etching process is limited by the buffer layer 303. This results in limited damage to the OLED material 112 and the cathode 114 of the first sub-pixel 108A.

[0032] In operation 205, as Figure 3EAs shown, a second encapsulation layer 116B is deposited. The second encapsulation layer 116B is disposed over the photoresist 302 and the first encapsulation layer 116A. In an optional operation 206, as Figure 3F shown, a photoresist 304 is formed over the second encapsulation layer in the well of the first sub-pixel 108A. In one embodiment, the width W of the photoresist 304 2 is greater than the width W of the photoresist 302 1 . The photoresist 304 is a positive photoresist or a negative photoresist.

[0033] In an optional operation 207, as Figure 3G shown, the second encapsulation layer 116B exposed by the photoresist 304 is removed. The second encapsulation layer 116B exposed by the photoresist 304 can be removed by a dry etching process. The dry etching process is anisotropic or substantially anisotropic. The width W of the photoresist 304 2 forms a buffer zone 305 over the PDL structure 126. Any residual isotropic etching that occurs during the dry etching process is limited by the buffer zone 305. This results in a residual thickness t of the second encapsulation layer 116B between the photoresist 302 and the photoresist 304 and adjacent to the first encapsulation layer 116A 1 . The residual thickness t of the second encapsulation layer 116B 1 isolates the cathode 114 and the OLED material 112 from being exposed to the etchant in further etching operations. The residual thickness t of the first encapsulation layer 116A and the second encapsulation layer 116B 1 results in Figure 1A the encapsulation layer 116.

[0034] In operation 208, as Figure 3H shown, the photoresist 302, the optional photoresist 304, and the second encapsulation layer 116B between the photoresist 302 and the photoresist 304 are removed, thereby forming the first sub-pixel 108A.

[0035] In operation 209, as Figure 3I shown, the OLED material 112, the cathode 114, and the first encapsulation layer 116A of the second sub-pixel 108B are deposited over the substrate 102. The OLED material 112, the cathode 114, and the first encapsulation layer 116A are disposed over the PDL structure 126 and the metal-containing layer 104. In embodiments that include a cover layer, the cover layer is deposited between the cathode 114 and the first encapsulation layer 116A. The cover layer can be deposited by evaporation. In one embodiment, evaporation is used to deposit the OLED material 112 and the cathode 114.

[0036] In operation 210, as Figure 3JAs shown, a photoresist 306 is formed in the well of the second sub-pixel 108B. The photoresist 306 is disposed above the first encapsulation layer 116A. The photoresist 306 has a width W 3 . The photoresist 306 is a positive photoresist or a negative photoresist. The photoresist 306 is patterned to form one of the pixel openings 124A of the dot-type architecture 101C or the pixel openings 124B of the line-type architecture 101D of the second sub-pixel 108B. The patterning is one of a photolithography, a digital lithography process, or a laser ablation process

[0037] In operation 211, as Figure 3K shown, the first encapsulation layer 116A exposed by the photoresist 306 is removed. The first encapsulation layer 116A exposed by the photoresist 306 can be removed by a dry etching process. In operation 212, as Figure 3L shown, the cathode 114 and the OLED material 112 exposed by the photoresist 306 are removed. The cathode 114 and the OLED material 112 exposed by the photoresist 306 can be removed by a dry etching process. The dry etching processes of operation 211 and operation 212 are anisotropic or substantially anisotropic. The width W of the photoresist 306 3 A buffer layer 307 is formed above the PDL structure 126. Any residual isotropic etching occurring during the dry etching process is limited by the buffer layer 307. This results in limited damage to the OLED material 112 and the cathode 114 of the second sub-pixel 108B

[0038] In operation 213, as Figure 3M shown, a second encapsulation layer 116B is deposited. The second encapsulation layer 116B is disposed above the photoresist 306 and the first encapsulation layer 116A. In an optional operation 214, as Figure 3N shown, a photoresist 308 is formed in the well of the second sub-pixel 108B above the second encapsulation layer. In one embodiment, the width W of the photoresist 308 4 is greater than the width W of the photoresist 306 3 . The photoresist 308 is a positive photoresist or a negative photoresist

[0039] In an optional operation 215, as Figure 3O shown, the second encapsulation layer 116B exposed by the photoresist 308 is removed. The second encapsulation layer 116B exposed by the photoresist 308 can be removed by a dry etching process. The dry etching process is anisotropic or substantially anisotropic. The width W of the photoresist 308 4 A buffer layer 309 is formed above the PDL structure 126. Any residual isotropic etching occurring during the dry etching process is limited by the buffer layer 309. This results in a residual thickness t of the second encapsulation layer 116B between the photoresist 306 and the photoresist 308 and adjacent to the first encapsulation layer 116A2 The remaining thickness t of the second encapsulation layer 116B 2 isolates the cathode 114 and the OLED material 112 from further etching operations. The remaining thicknesses t of the first encapsulation layer 116A and the second encapsulation layer 116B 2 result in Figure 1A the encapsulation layer 116.

[0040] In operation 216, as Figure 3P shown, the photoresist 306, the optional photoresist 308, and the second encapsulation layer 116B between the photoresist 306 and the photoresist 308 are removed, thereby forming the second sub-pixel 108B.

[0041] Figure 4 FIG. 400 is a flow chart of a method 400 for forming a sub-pixel circuit 100 having a plug arrangement 101B. Figures 5A to 5P FIG. 401 is a schematic cross-sectional view of a substrate 102 during a method 400 for forming a sub-pixel circuit 100 having a plug arrangement 101B.

[0042] In operation 401, as Figure 5A shown, the OLED material 112, the cathode 114, and the first encapsulation layer 116A of the first sub-pixel 108A are deposited over the substrate 102. The OLED material 112, the cathode 114, and the first encapsulation layer 116A are disposed over the PDL structure 126 and the metal-containing layer 104. In embodiments that include a capping layer, the capping layer is deposited between the cathode 114 and the first encapsulation layer 116A. The capping layer can be deposited by evaporation. In one embodiment, the OLED material 112 and the cathode 114 are deposited using evaporation.

[0043] In operation 402, as Figure 5B shown, a plug 122A is formed in the well of the first sub-pixel 108A. The plug 122A is disposed over the first encapsulation layer 116A. The plug 122A has a width W 5The plug 122A includes, but is not limited to, photoresist, color filter, or photosensitive monomer. The plug 122A has a plug transmittance that matches or substantially matches the OLED transmittance of the OLED material 112. Each of the plugs 122A can be the same material and match the OLED transmittance. The plugs 122A can be different materials that match the OLED transmittance of each corresponding sub-pixel among the plurality of sub-pixels 106. The matching or substantially matching plug transmittance and the OLED transmittance allow the plug 122A to remain above the sub-pixel 106 without blocking the emitted light from the OLED material 112. The plug 122A can be maintained in its original position, so there is no need for a stripping process to remove it from the sub-pixel circuit 100. The plug 122A is patterned to form one of the pixel openings 124A of the dot-type architecture 101C or the pixel openings 124B of the line-type architecture 101D of the first sub-pixel 108A.

[0044] In operation 403, as Figure 5C shown, the first encapsulation layer 116A exposed by the plug 122A is removed. The first encapsulation layer 116A exposed by the plug 122A can be removed by a dry etching process. In operation 404, as Figure 5D shown, the cathode 114 and the OLED material 112 exposed by the plug 122A are removed. The cathode 114 and the OLED material 112 exposed by the plug 122A can be removed by a dry etching process. The dry etching processes of operation 403 and operation 404 are anisotropic or substantially anisotropic. The width W of the plug 122A 5 A buffer 503 is formed above the PDL structure 126. Any residual isotropic etching that occurs during the dry etching process is limited by the buffer 503. This results in limited damage to the OLED material 112 and the cathode 114 of the first sub-pixel 108A.

[0045] In operation 405, as Figure 5E shown, a second encapsulation layer 116B is deposited. The second encapsulation layer 116B is disposed above the plug 122A and the first encapsulation layer 116A. In an optional operation 406, as Figure 5F shown, a photoresist 504 is formed in the well of the first sub-pixel 108A. In one embodiment, the width W of the photoresist 504 6 is greater than the width W of the plug 122A 5 . The photoresist 504 is a positive photoresist or a negative photoresist.

[0046] In operation 407, as Figure 5H shown, a portion of the second encapsulation layer 116B is removed. In an embodiment without the photoresist 504, the second encapsulation layer 116B disposed in the well of the first sub-pixel 108A is removed. In an embodiment with the photoresist 504, as Figure 5GAs shown, a portion of the second encapsulation layer 116B exposed by the photoresist 504 is removed. The second encapsulation layer 116B can be removed by a dry etching process. The dry etching process is anisotropic or substantially anisotropic. The width W of the photoresist 504 6 A buffer layer 505 is formed above the PDL structure 126. Any residual isotropic etching that occurs during the dry etching process is limited by the buffer layer 505. This results in a residual thickness t of the second encapsulation layer 116B between the plug 122A and the photoresist 504 and of the first encapsulation layer 116A and the second encapsulation layer 116B adjacent to the cathode 114 and the OLED material 112 3 . The first encapsulation layer 116A and the second encapsulation layer 116B result in Figure 1B the encapsulation layer 116. The residual thickness t of the encapsulation layer 116 3 isolates the cathode 114 and the OLED material 112 from further etching operations. In an optional operation 408, as Figure 5H shown, the photoresist 504 is removed, thereby forming the first sub-pixel 108A

[0047] In operation 409, as Figure 5I shown, the OLED material 112, the cathode 114, and the first encapsulation layer 116A of the second sub-pixel 108B are deposited above the substrate 102. The OLED material 112, the cathode 114, and the first encapsulation layer 116A are disposed above the PDL structure 126 and the metal-containing layer 104. In embodiments that include a capping layer, the capping layer is deposited between the cathode 114 and the first encapsulation layer 116A. The capping layer can be deposited by evaporation deposition. In one embodiment, the OLED material 112 and the cathode 114 are deposited using evaporation deposition

[0048] In operation 410, as Figure 5J shown, a plug 122B is formed in the well of the second sub-pixel 108B. The plug 122B is disposed above the first encapsulation layer 116A. The plug 122B has a width W 7The plug 122B includes, but is not limited to, photoresist, color filter, or photosensitive monomer. The plug 122B has a plug transmittance that matches or substantially matches the OLED transmittance of the OLED material 112. Each of the plugs 122B can be the same material and match the OLED transmittance. The plugs 122B can be different materials that match the OLED transmittance of each corresponding sub-pixel among the plurality of sub-pixels 106. The matching or substantially matching plug transmittance and OLED transmittance allow the plug 122B to remain above the sub-pixel 106 without blocking the emitted light from the OLED material 112. The plug 122B can be maintained in its original position, so no stripping process is required to remove it from the sub-pixel circuit 100. The plug 122B is patterned to form one of the pixel openings 124A of the dot-type architecture 101C or the pixel openings 124B of the line-type architecture 101D of the second sub-pixel 108B.

[0049] In operation 411, as Figure 5K shown, the first encapsulation layer 116A exposed by the plug 122B is removed. The first encapsulation layer 116A exposed by the plug 122B can be removed by a dry etching process. In operation 412, as Figure 5L shown, the cathode 114 and the OLED material 112 exposed by the plug 122B are removed. The cathode 114 and the OLED material 112 exposed by the plug 122B can be removed by a dry etching process. The dry etching processes of operation 411 and operation 412 are anisotropic or substantially anisotropic. The width W of the plug 122B 7 A buffer 507 is formed above the PDL structure 126. Any residual isotropic etching that occurs during the dry etching process is limited by the buffer 507. This results in limited damage to the OLED material 112 and the cathode 114 of the second sub-pixel 108B.

[0050] In operation 413, as Figure 5M shown, a second encapsulation layer 116B is deposited. The second encapsulation layer 116B is disposed above the plug 122B and the first encapsulation layer 116A. In an optional operation 414, as Figure 5N shown, a photoresist 508 is formed in the well of the second sub-pixel 108B. In one embodiment, the width W of the photoresist 508 8 is greater than the width W of the plug 122B 7 . The photoresist 508 is a positive photoresist or a negative photoresist.

[0051] In operation 415, as Figure 5P shown, a portion of the second encapsulation layer is removed. In an embodiment without the photoresist 508, the second encapsulation layer 116B disposed in the well of the second sub-pixel 108A is removed. In an embodiment with the photoresist 508, as Figure 5GAs shown, a portion of the second encapsulation layer 116B exposed by the photoresist 508 is removed. The second encapsulation layer 116B can be removed by a dry etching process. The dry etching process is anisotropic or substantially anisotropic. The width W of the photoresist 508 8 A buffer 509 is formed above the PDL structure 126. Any residual isotropic etching that occurs during the dry etching process is limited to the buffer 509. This results in a residual thickness t of the second encapsulation layer 116B between the plug 122B and the photoresist 508 and of the first and second encapsulation layers 116A and 116B adjacent to the cathode 114 and the OLED material 112 4 . The first and second encapsulation layers 116A and 116B result in Figure 1B the encapsulation layer 116. The residual thickness t of the encapsulation layer 116 4 isolates the cathode 114 and the OLED material 112 from further etching operations. In operation 416, as Figure 5P shown, the photoresist 508 is removed, thereby forming the second sub-pixel 108B.

[0052] In summary, described herein are sub-pixel circuits and methods of forming sub-pixel circuits that can be utilized in a display such as an organic light emitting diode (OLED) display. Adjacent PDL structures use evaporation deposition to define each sub-pixel of the sub-pixel circuit. Evaporation deposition can be used to deposit the OLED material, the cathode, and the encapsulation layer. A photoresist can be deposited to control the two ends of the OLED material, the two ends of the cathode, and the sidewalls of the encapsulation layer so that the OLED material and the cathode are isolated from the etchant during further etching operations. Plugs can be used to enhance the performance of the OLED display.

[0053] Although the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the present disclosure can be designed without departing from the basic scope of the present disclosure, and the scope of the present disclosure is determined by the following claims.

Claims

1. A device, comprising: a substrate; a plurality of adjacent pixel defining layer (PDL) structures disposed above the substrate, the PDL structures having a top surface, the top surface being coupled to adjacent sidewalls of the PDL structures; a plurality of sub-pixels defined by the PDL structures, each sub-pixel comprising: an anode; organic light emitting diode (OLED) material disposed above the anode, the OLED material having a first OLED end and a second OLED end, the first OLED end and the second OLED end extending above the top surface of the PDL structures beyond the adjacent sidewalls; a cathode disposed above the OLED material, the cathode having a first cathode end and a second cathode end, the first cathode end and the second cathode end extending above the top surface of the PDL structures beyond the adjacent sidewalls; and a encapsulation layer disposed above the cathode, wherein the encapsulation layer has a first sidewall and a second sidewall, and wherein the first sidewall and the second sidewall extend beyond the first OLED end, the second OLED end, the first cathode end, and the second cathode end.

2. The device according to claim 1, wherein the anode comprises one or more layers, the one or more layers including transparent conductive oxide material, chromium, titanium, gold, silver, copper, aluminum, ITO, or a combination thereof.

3. The device according to claim 1, wherein: the first OLED end and the second OLED end extend above the top surface of the PDL structures beyond the endpoints of the anode; and the first cathode end and the second cathode end extend above the top surface of the PDL structures beyond the endpoints of the anode.

4. The device according to claim 1, wherein the plurality of sub-pixels comprises a first sub-pixel and a second sub-pixel, and wherein a gap separates the first sidewall of the encapsulation layer of the second sub-pixel from the second sidewall of the encapsulation layer of the first sub-pixel.

5. The device according to claim 4, further comprising an overall passivation layer disposed above the encapsulation layer, wherein the overall passivation layer is disposed above the first sidewall and the second sidewall of the encapsulation layer and above a portion of the top surface of the PDL structures in the gap.

6. The device according to claim 5, wherein the overall passivation layer contacts the first sidewall and the second sidewall of the encapsulation layer and the portion of the top surface of the PDL structures in the gap.

7. A method of forming a device, comprising the steps of: positioning a substrate, the substrate comprising: a first opening of a first sub-pixel, the first opening of the first sub-pixel being defined by a plurality of adjacent pixel defining layer (PDL) structures disposed above the substrate; a first anode defined by the adjacent PDL structures; depositing the OLED material, the cathode, and the encapsulation layer of the first sub-pixel above the substrate; forming a photoresist in the well of the first sub-pixel; Remove the encapsulation layer of the first sub-pixel exposed by the photoresist of the first sub-pixel; Remove the OLED material and the cathode of the first sub-pixel exposed by the photoresist of the first sub-pixel; Position the substrate, the substrate further comprising: A second opening of a second sub-pixel, the second opening of the second sub-pixel being defined by the plurality of PDL structures disposed above the substrate; A second anode, the second anode being defined by adjacent PDL structures; Deposit the OLED material, cathode, and encapsulation layer of the second sub-pixel above the substrate; Form a photoresist in the well of the second sub-pixel; Remove the encapsulation layer of the second sub-pixel exposed by the photoresist; Remove the OLED material and the cathode of the second sub-pixel exposed by the photoresist; and Remove the photoresist of the second sub-pixel.

8. The method according to claim 7, further comprising the steps of: After removing the encapsulation layer, the OLED material, and the cathode of the first sub-pixel exposed by the photoresist of the first sub-pixel, deposit a second encapsulation layer above the photoresist and the encapsulation layer of the first sub-pixel; and Remove a portion of the second encapsulation layer.

9. The method according to claim 8, further comprising the steps of: Form a second photoresist above the second encapsulation layer in the well of the first sub-pixel; and Remove a portion of the second encapsulation layer exposed by the second photoresist.

10. The method according to claim 7, further comprising the steps of: Before the step of positioning the substrate and the step of depositing the OLED material, cathode, and encapsulation layer of the second sub-pixel above the substrate, remove the photoresist from the first sub-pixel.

11. The method according to claim 8, wherein the anode comprises one or more layers, the one or more layers comprising a transparent conductive oxide material, chromium, titanium, gold, silver, copper, aluminum, ITO, or a combination thereof.

12. The method according to claim 8, wherein: The PDL structure has a top surface, the top surface being coupled to adjacent sidewalls of the PDL structure; The OLED material has a first OLED end and a second OLED end, the first OLED end and the second OLED end extending above the top surface of the PDL structure beyond the adjacent sidewalls of the PDL structure; and The cathode has a first cathode end and a second cathode end, the first cathode end and the second cathode end extending above the top surface of the PDL structure beyond the adjacent sidewalls of the PDL structure.

13. The method according to claim 8, further comprising an overall passivation layer disposed above the encapsulation layer, wherein the overall passivation layer contacts a first sidewall and a second sidewall of the encapsulation layer and a portion of the top surface of the PDL structure in the gap.

14. The method according to claim 7, further comprising the steps of: After removing the encapsulation layer, the OLED material, and the cathode of the second sub-pixel exposed by the photoresist of the second sub-pixel, a second encapsulation layer is deposited over the photoresist and the encapsulation layer of the second sub-pixel; and removing a portion of the second encapsulation layer of the second sub-pixel.

15. The method according to claim 14, further comprising the steps of: forming a second photoresist over the second encapsulation layer in the well of the first sub-pixel; and removing a portion of the second encapsulation layer exposed by the second photoresist.

16. The method according to claim 14, further comprising the steps of: before the step of positioning the substrate and the step of depositing the OLED material, the cathode, and the encapsulation layer of the second sub-pixel over the substrate, removing the photoresist from the first sub-pixel.

17. The method according to claim 14, wherein the anode comprises: a first transparent conductive oxide (TCO) layer, a metal-containing layer disposed over the first TCO layer, and a second TCO layer disposed over the metal-containing layer.

18. The method according to claim 14, wherein: the PDL structure has a top surface, the top surface being coupled to adjacent sidewalls of the PDL structure; the OLED material has a first OLED end and a second OLED end, the first OLED end and the second OLED end extending over the adjacent sidewalls of the PDL structure above the top surface of the PDL structure; and the cathode has a first cathode end and a second cathode end, the first cathode end and the second cathode end extending over the adjacent sidewalls of the PDL structure above the top surface of the PDL structure.

19. The method according to claim 14, further comprising an overall passivation layer disposed over the encapsulation layer, wherein the overall passivation layer contacts a first sidewall and a second sidewall of the encapsulation layer and a portion of the top surface of the PDL structure in the gap.

20. An apparatus, comprising: a substrate; a plurality of adjacent pixel defining layer (PDL) structures disposed over the substrate, the PDL structures having a top surface, the top surface being coupled to adjacent sidewalls of the PDL structures; a plurality of sub-pixels defined by the PDL structures, each sub-pixel comprising: an anode; an organic light emitting diode (OLED) material disposed over the anode, the OLED material having a first OLED end and a second OLED end, the first OLED end and the second OLED end extending over the adjacent sidewalls above the top surface of the PDL structure; a cathode disposed over the OLED material, the cathode having a first cathode end and a second cathode end, the first cathode end and the second cathode end extending over the adjacent sidewalls above the top surface of the PDL structure; a plug disposed over the cathode; and An encapsulation layer, the encapsulation layer being disposed above the plug, wherein the encapsulation layer has a first sidewall and a second sidewall, and wherein the first sidewall and the second sidewall extend beyond the first OLED end, the second OLED end, the first cathode end, and the second cathode end.

21. The apparatus of claim 20, wherein the anode comprises one or more layers, the one or more layers including a transparent conductive oxide material, chromium, titanium, gold, silver, copper, aluminum, ITO, or a combination thereof.

22. The apparatus of claim 20, wherein: the first OLED end and the second OLED end extend above the top surface of the PDL structure beyond the end points of the anode; and the first cathode end and the second cathode end extend above the top surface of the PDL structure beyond the end points of the anode.

23. The apparatus of claim 20, wherein the plurality of sub-pixels comprise a first sub-pixel and a second sub-pixel, and wherein a gap separates the first sidewall of the encapsulation layer of the second sub-pixel from the second sidewall of the encapsulation layer of the first sub-pixel.

24. The apparatus of claim 20, further comprising an overall passivation layer, the overall passivation layer being disposed above the encapsulation layer, wherein the overall passivation layer is disposed above the first sidewall and the second sidewall of the encapsulation layer and a portion of the top surface of the PDL structure in the gap.

25. The apparatus of claim 20, further comprising an overall passivation layer, the overall passivation layer being disposed above the encapsulation layer, wherein the overall passivation layer contacts the first sidewall and the second sidewall of the encapsulation layer and a portion of the top surface of the PDL structure in the gap.

26. A method of forming an apparatus, comprising the steps of: positioning a substrate, the substrate comprising: a first opening of a first sub-pixel, the first opening of the first sub-pixel being defined by a plurality of adjacent pixel definition layer (PDL) structures disposed above the substrate; a first anode, the first anode being defined by the adjacent PDL structures; depositing an OLED material, a cathode, and an encapsulation layer of the first sub-pixel above the substrate; forming a plug in a well of the first sub-pixel, the plug having a first plug transmittance that matches or substantially matches the OLED transmittance of the OLED material of the first sub-pixel; removing the encapsulation layer of the first sub-pixel exposed by the plug of the first sub-pixel; removing the OLED material and the cathode of the first sub-pixel exposed by the plug of the first sub-pixel; depositing a second encapsulation layer above the plug and the first encapsulation layer of the first sub-pixel; removing a portion of the second encapsulation layer disposed above the second sub-pixel; positioning the substrate, the substrate further comprising: a second opening of the second sub-pixel, the second opening of the second sub-pixel being defined by the plurality of PDL structures disposed above the substrate; A second anode, the second anode being defined by the adjacent PDL structures; Depositing an OLED material, a cathode, and a passivation layer of the second sub-pixel over the substrate; Forming a plug in the well of the second sub-pixel, the plug having a first plug transmittance that matches or substantially matches the OLED transmittance of the OLED material of the first sub-pixel; Removing the first passivation layer of the second sub-pixel exposed by the plug of the second sub-pixel; and Removing the OLED material and the cathode of the second sub-pixel exposed by the plug of the second sub-pixel; Depositing a second passivation layer over the plug and the first passivation layer of the second sub-pixel; and Removing a portion of the second passivation layer disposed over the first sub-pixel.

27. The method according to claim 26, further comprising the steps of: Forming a photoresist over the second passivation layer in the well of the first sub-pixel; Removing a portion of the second passivation layer exposed by the photoresist; and Removing the photoresist over the second passivation layer in the well of the first sub-pixel.

28. The method according to claim 26, further comprising the steps of: Forming a second photoresist over the second passivation layer in the well of the second sub-pixel; and Removing a portion of the second passivation layer exposed by the second photoresist; and Removing the second photoresist over the second passivation layer in the well of the second sub-pixel.

29. The method according to claim 26, wherein: The PDL structure has a top surface that is coupled to adjacent sidewalls of the PDL structure; The OLED material has a first OLED end and a second OLED end that extend above the top surface of the PDL structure beyond the adjacent sidewalls of the PDL structure; and The cathode has a first cathode end and a second cathode end that extend above the top surface of the PDL structure beyond the adjacent sidewalls of the PDL structure.

30. The method according to claim 29, further comprising an overall passivation layer disposed over the passivation layer, wherein the overall passivation layer contacts a first sidewall and a second sidewall of the passivation layer and a portion of the top surface of the PDL structure in the gap.

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