Intelligent optical computing chip cluster architecture and system

Abstract

The invention relates to the technical field of optical computing, in particular to an intelligent optical computing chip cluster architecture and system. The architecture comprises a plurality of optical computing chips, and an optical path channel is established among the plurality of optical computing chips by utilizing spatial domain phase adjustment modulation light beams; time domain intensity modulation is carried out on an optical path channel, and high-speed optical communication and optical diffraction network calculation are carried out among a plurality of optical calculation chips. By means of the scheme, interconnection calculation of the optical calculation chip in the spatial dimension can be achieved, and information transmission does not depend on electricity.

Description

Technical Field

[0001] The present disclosure relates to the field of optical computing technologies, and in particular, to an intelligent optical computing chip cluster architecture and system. Background Art

[0002] With the rapid development of the fields of artificial intelligence and scientific computing, the complexity and scale of computing requirements are also increasing continuously. However, existing electronic computing technologies are limited by Moore's Law, and their performance is gradually approaching the saturation state, making it difficult to effectively meet the increasingly stringent requirements for computing power and power consumption of large-scale complex algorithms. Light has natural advantages such as high throughput and low latency during propagation. Optical computing technology using photons instead of electrons as the computing carrier is regarded as the key to breaking the existing computing bottleneck. Summary of the Invention

[0003] The present disclosure aims to solve at least one of the technical problems in the related art to some extent.

[0004] To this end, the first object of the present disclosure is to propose an intelligent optical computing chip cluster architecture to achieve interconnected computing of optical computing chips in the spatial dimension without relying on electricity for information transmission.

[0005] The second object of the present disclosure is to propose an intelligent optical computing chip cluster system.

[0006] To achieve the above object, an embodiment of the first aspect of the present disclosure proposes an intelligent optical computing chip cluster architecture, including: A plurality of optical computing chips, and an optical path channel is established between the plurality of optical computing chips by modulating a light beam using spatial domain phase adjustment; Through time-domain intensity modulation of the optical path channel, high-speed optical communication and optical diffraction network calculation are performed between the plurality of optical computing chips.

[0007] Optionally, the optical computing chip includes an on-chip grating emission module and an on-chip grating reception module, and an optical path channel is established between the plurality of optical computing chips by using the on-chip grating emission module and the on-chip grating reception module to modulate a light beam using spatial domain phase adjustment.

[0008] Optionally, when performing optical diffraction network calculation between the plurality of optical computing chips, it is specifically used for: Obtain the task to be calculated; Optimize the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated until a target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, the plurality of optical computing chips form an optical diffraction network corresponding to the task to be calculated, and the task to be calculated is executed based on the optical diffraction network to obtain a calculation result.

[0009] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated includes: Performing Fresnel phase modulation on the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated.

[0010] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated includes: Modeling the initial emission phase of each optical computing chip among the multiple optical computing chips as a trainable parameter; Taking maximizing the signal-to-noise ratio as the optimization goal, training the trainable parameter using a neural network.

[0011] To achieve the above object, an embodiment of the second aspect of the present disclosure proposes an intelligent optical computing chip cluster system, including: Multiple optical computing chips, establishing an optical path channel by modulating a light beam using spatial domain phase adjustment among the multiple optical computing chips; Through time-domain intensity modulation of the optical path channel, high-speed optical communication and optical diffraction network calculation are performed among the multiple optical computing chips.

[0012] Optionally, the optical computing chip includes an on-chip grating emission module and an on-chip grating reception module, and an optical path channel is established among the multiple optical computing chips by modulating a light beam using the on-chip grating emission module and the on-chip grating reception module with spatial domain phase adjustment.

[0013] Optionally, when performing optical diffraction network calculation among the multiple optical computing chips, it is specifically used for: Obtaining the task to be calculated; Optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated until a target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, the multiple optical computing chips form an optical diffraction network corresponding to the task to be calculated, and perform the task to be calculated based on the optical diffraction network to obtain a calculation result.

[0014] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated includes: Performing Fresnel phase modulation on the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated.

[0015] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated includes: Model the initial emission phase of each optical computing chip among the multiple optical computing chips as a trainable parameter; With the goal of maximizing the signal-to-noise ratio, use a neural network to train the trainable parameter.

[0016] In summary, for the intelligent optical computing chip cluster architecture and system provided by the present disclosure, an optical path channel between chips is established by using spatial domain phase modulation to modulate the light beam. After establishing the optical path channel, high-speed optical communication between clusters is carried out through time domain intensity modulation, and the optical path channel can simultaneously support an optical diffraction network for computing. This three-dimensional spatial chip stacking method can support the interconnection and computing of optical computing chips in the spatial dimension without relying on electricity for information transmission.

[0017] Additional aspects and advantages of the present disclosure will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present disclosure. Description of the Drawings

[0018] The above and / or additional aspects and advantages of the present disclosure will become apparent and be readily understood from the following description of the embodiments in conjunction with the drawings, where: Figure 1 is a schematic structural diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure; Figure 2 is an application schematic diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure; Figure 3 is a schematic diagram showing the viewing field range of the interconnection and computing addressing space of an optical computing cluster provided by an embodiment of the present disclosure; Figure 4 is a schematic diagram showing the effective range of the interconnection and computing addressing distance of an optical computing cluster provided by an embodiment of the present disclosure. Detailed Embodiments

[0019] The embodiments of the present disclosure will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present disclosure and should not be construed as limiting the present disclosure.

[0020] With the rapid development of science and technology, in tasks such as deep learning, big data processing, and scientific simulation, the required computing resources have increased sharply. This trend has led to an increasing demand for computing servers, especially in environments such as cloud computing, data centers, and supercomputers. However, simply relying on traditional central processing units (CPUs) and graphics processing units (GPUs) for computing expansion brings a series of problems. For example, although the performance of these hardware components has been gradually improved, their power consumption has also increased accordingly. To meet higher computing demands, more computing chips often need to be stacked, resulting in a sharp increase in the energy consumption of data centers. This not only raises the operating costs but also has a huge impact on the environment. At the same time, traditional computing architectures also face significant bottlenecks when dealing with large-scale computing. The reason is that the bottleneck of traditional architectures mainly lies in the data transmission between storage and computing resources, as well as the limitation of computing density. Even if the hardware performance is continuously optimized, the growth rate of the energy efficiency ratio of computing tasks lags far behind the growth rate of computing demands, making it increasingly difficult to solve current large-scale computing problems through traditional computing models.

[0021] To address these challenges, more and more researchers and enterprises have begun to explore new computing paradigms, such as edge computing, quantum computing, photon computing, and heterogeneous computing architectures. Light has natural physical properties such as high throughput, high speed, and high energy efficiency during propagation. Photonic computing technology, which uses photons instead of electrons as the computing carrier, is regarded as the key to breaking the existing computing bottlenecks. By leveraging the ability of spatial light propagation to achieve high-channel parallel data transmission and using on-chip photonic computing to make the computing more compact, however, due to the inability to simultaneously achieve high computing throughput, computing density, and reconfigurability, so far, no photonic computing system can complete supercomputer-scale computing tasks (commonly including astronomical computing, weather prediction, particle collision data processing, etc.).

[0022] The following will explain the present disclosure in detail with specific embodiments.

[0023] Figure 1 The structural schematic diagram of an intelligent photonic computing chip cluster architecture provided by an embodiment of the present disclosure is as follows. Figure 1 As shown, the intelligent photonic computing chip cluster architecture includes: Multiple photonic computing chips, and optical path channels are established between the multiple photonic computing chips by modulating light beams using spatial domain phase adjustment; Through time-domain intensity modulation of the optical path channels, high-speed optical communication and optical diffraction network computing are performed between the multiple photonic computing chips.

[0024] It should be noted that computing chips continuously communicate with each other and perform local computing to execute large-scale tasks. However, due to the data transmission between storage and computing resources and the limitation of computing density in traditional computing architectures, there is a significant bottleneck that the energy efficiency becomes lower and lower as the scale increases. To address this challenge, the present disclosure establishes an optical path channel between chips by using spatial phase modulation to modulate light beams. After establishing the optical path channel, high-speed optical communication between clusters is performed through time-domain intensity modulation, and the optical path channel can simultaneously support an optical diffraction network for computing. This three-dimensional spatial chip stacking method can support the interconnected computing of optical computing chips in the spatial dimension without relying on electricity for information transmission.

[0025] Secondly, the optical computing chips are stacked in clusters in space, so as to achieve high-density computing throughput. The computing of the cluster is modeled as a diffraction computing network, and through the principle of spatial light transmission computing, that is, the information propagation of light can achieve communication and computing. The architecture itself can complete the integrity of the information link and the computing link, so it meets the conditions of a server cluster.

[0026] Taking a scenario as an example, Figure 2 is an application schematic diagram of an intelligent optical computing chip cluster architecture provided by an embodiment of the present disclosure. As Figure 2 shown, the intelligent optical computing chip cluster architecture provided by the embodiment of the present disclosure can break through the energy efficiency bottleneck of existing supercomputer servers with its single-chip ultra-high computing energy efficiency of 11.8 Peta OPS / W and the linear maintenance of the energy efficiency of a multi-chip cluster with ten thousand cards. At the same time, it can reduce the cost of deploying a computing cluster, and has extremely high application value for scientific computing, and is expected to bring new opportunities for high-performance artificial intelligence large model computing and large-scale scientific computing in the post-Moore era.

[0027] Optionally, the optical computing chip includes an on-chip grating emission module and an on-chip grating reception module. An optical path channel is established between multiple optical computing chips by using the on-chip grating emission module and the on-chip grating reception module to modulate light beams with spatial phase modulation.

[0028] According to some embodiments, in the on-chip grating emission module, the on-chip light can be modulated and then coupled out of the waveguide light through the grating to become spatial light, and the spatial light can be modulated with spatial phase modulation to establish an optical path channel.

[0029] It should be noted that a connection is established between multiple optical computing chips through the on-chip grating emission and reception mode, and all computing will be completed in the physical propagation of light in space. Since no additional electricity is introduced for communication or computing, as the scale increases, there will be no limitation due to data transmission, so the energy consumption increases linearly in synchronization with the computing scale, breaking through the inherent bottleneck that the larger the computing scale, the lower the energy efficiency.

[0030] Optionally, when performing optical diffraction network calculations between multiple optical computing chips, specifically for: Obtain the task to be calculated; Optimize the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated until the target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, multiple optical computing chips form an optical diffraction network corresponding to the task to be calculated, and perform the task to be calculated based on the optical diffraction network to obtain a calculation result.

[0031] According to some embodiments, diffraction patterns at different distances can be corrected by adding a specific Fresnel phase, so that the diffraction reception patterns at short and long distances only change in scale and do not change in relative pattern. The following is a proof that the diffraction phase wavefront that conforms to the Fresnel diffraction condition is At a propagation distance of The diffraction pattern can be written as:

[0032] Among them, Represents the pattern after diffraction. Represents the spatial position. Represents the diffraction coefficient. k Represents the wave vector.

[0033] Similarly, a diffraction phase wavefront that is also At a propagation distance of In the case of, only the additional introduction of the Fresnel phase Modulation can achieve correction, which can be mathematically described as:

[0034] Then, expand the two equations respectively to obtain:

[0035]

[0036]

[0037]

[0038] Among them, the Fresnel phase The modulation satisfies , which can enable the same computing power to be achieved in the case of propagation at different distances, that is:

[0039] Therefore, when optimizing the initial emission phase of each optical computing chip among multiple optical computing chips according to the task to be calculated, Fresnel phase modulation can be performed on the initial emission phase of each optical computing chip among multiple optical computing chips according to the task to be calculated. Thus, the cluster chips are pulled apart in the integrated space, and then the number of optical chip clusters can be increased, and at the same time, the computing ability will not be weakened. The physical properties of the intelligent optical computing chip cluster prove the possibility of more than ten thousand optical computing chip clusters.

[0040] According to some embodiments, when optimizing the initial emission phase of each optical computing chip among multiple optical computing chips according to the task to be calculated, the initial emission phase of each optical computing chip among multiple optical computing chips can also be modeled as a trainable parameter; with the goal of optimizing the maximum signal-to-noise ratio, a neural network is used to train the trainable parameter.

[0041] In some embodiments, the initial emission phase of each optical computing chip among multiple optical computing chips can be modeled as a trainable parameter according to the following formula :

[0042] In some embodiments, with the goal of optimizing the maximum signal-to-noise ratio, when using a neural network to train the trainable parameter, a loss function can be established as the energy of the target point, as shown in the following formula:

[0043] where is the propagation distance, is the lateral position of the receiving plane.

[0044] According to some embodiments, the initial emission phases of all optical computing chips among multiple optical computing chips can form an optical phased array. The on-chip grating emission module of the optical computing chip can complete the pitch angle traversal through wavelength scanning, while the yaw angle can be achieved by modulating the optical phased array. The present disclosure can improve the energy intensity of each optical computing chip by using a neural network to optimize the energy of the phased array to achieve the maximum signal-to-noise ratio.

[0045] In some embodiments, Figure 3 is a schematic diagram showing the field of view range of the optical computing cluster interconnection computing addressing space provided by the embodiment of the present disclosure. Figure 3 The left figure in Figure 3The right figure in [figure number] shows the received energy distribution of the optical computing chip after training optimization. It can be seen that after neural network optimization, the energy intensity has been increased by more than 3 - 5 dB. Finally, it can achieve pitch and yaw angle ranges of 30 degrees. This angle range relative to the physical size of the chip itself enables more than 50 chips to be clustered in the two chip array planes at a distance of 1 m, demonstrating the high-density and large-scale possibilities of clustering optical computing chips in space.

[0046] Taking a scenario as an example, Figure 4 This is a schematic diagram showing the effective range of the interconnection computing addressing distance of an optical computing cluster provided by an embodiment of the present disclosure. As Figure 4 shown, by setting the architecture to optimize the initial emission phase of the optical computing chip, the distance for transmitting calculations between optical computing chips can be adapted to a range from 0.1 m to 1000 m or even larger.

[0047] In summary, the architecture provided in this embodiment can achieve ultra-large-scale computing tasks with extremely high energy efficiency, which is crucial for processing complex AI models and large-scale data sets. This efficient computing power can accelerate research in fields such as new material discovery, genomic analysis, and climate modeling, promoting scientific progress. At the same time, the flexibility of the optical computing architecture enables it to be seamlessly integrated with existing computing systems, facilitating interdisciplinary cooperation and promoting the application and innovation of artificial intelligence technology in various fields. Ultimately, this will enable researchers to obtain insights more quickly and drive the further development of technology.

[0048] To implement the above embodiment, the present disclosure also proposes an intelligent optical computing chip cluster system, including: Multiple optical computing chips, and optical path channels are established between the multiple optical computing chips by using spatial domain phase modulation to modulate light beams; Through time-domain intensity modulation of the optical path channels, high-speed optical communication and optical diffraction network calculation are performed between the multiple optical computing chips.

[0049] Optionally, the optical computing chip includes an on-chip grating emission module and an on-chip grating reception module, and optical path channels are established between the multiple optical computing chips by using the on-chip grating emission module and the on-chip grating reception module to modulate light beams with spatial domain phase.

[0050] Optionally, when performing optical diffraction network calculation between multiple optical computing chips, it is specifically used for: Obtain the task to be calculated; Optimize the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be calculated until the target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, multiple optical computing chips form an optical diffraction network corresponding to the task to be computed, and execute the task to be computed based on the optical diffraction network to obtain a computation result.

[0051] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be computed includes: Performing Fresnel phase modulation on the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be computed.

[0052] Optionally, optimizing the initial emission phase of each optical computing chip among the multiple optical computing chips according to the task to be computed includes: Modeling the initial emission phase of each optical computing chip among the multiple optical computing chips as a trainable parameter; Taking maximizing the signal-to-noise ratio as the optimization goal, training the trainable parameter using a neural network.

[0053] It should be noted that the foregoing explanations of the intelligent optical computing chip cluster architecture also apply to the intelligent optical computing chip cluster system of this embodiment, and will not be elaborated here.

[0054] The collection, storage, use, processing, transmission, provision, and disclosure of the user's personal information involved in this disclosure all comply with the provisions of relevant laws and regulations and do not violate public order and good customs.

[0055] It should be noted that personal information from users should be collected for legal and reasonable purposes and not shared or sold outside of these legal uses. In addition, such collection / sharing should be carried out after obtaining the informed consent of the user, including but not limited to notifying the user to read the user agreement / user notice and signing an agreement / authorization including authorizing the relevant user information before the user uses the function. In addition, any necessary steps should be taken to defend and safeguard access to such personal information data and ensure that others with access to the personal information data comply with their privacy policies and procedures.

[0056] This disclosure anticipates providing embodiments that allow users to selectively block the use or access of personal information data. That is, this disclosure anticipates providing hardware and / or software to prevent or block access to such personal information data. Once personal information data is no longer needed, the risk can be minimized by restricting data collection and deleting the data. In addition, when applicable, personal identifiers are removed from such personal information to protect the privacy of the user.

[0057] In the technical solution of this disclosure, the acquisition, transmission, storage, use, processing, etc. of data all comply with the relevant provisions of national laws and regulations.

[0058] It should be noted that in the embodiments of the present disclosure, some existing solutions in the industry such as certain software, components, models, etc. may be mentioned. They should be regarded as exemplary. The purpose is only to illustrate the feasibility in the implementation of the technical solutions of this application, but it does not mean that the applicant has already or necessarily used this solution.

[0059] In the descriptions of the foregoing embodiments, the descriptions referring to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0060] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present disclosure, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0061] Any process or method description shown in a flowchart or described in other ways herein can be understood as representing a module, segment, or part of code including one or more executable instructions for implementing a customized logic function or process. The scope of the preferred embodiments of the present disclosure includes additional implementations, where the functions may be executed in a manner that is not shown or discussed, including in a substantially simultaneous manner according to the functions involved or in a reverse order, which should be understood by those skilled in the art to which the embodiments of the present disclosure belong.

[0062] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a definitional sequence list of executable instructions for implementing logical functions, which can be embodied in any computer-readable medium for use by an instruction execution system, apparatus, or device (such as a computer-based system, a system including a processor, or other systems that can fetch and execute instructions from the instruction execution system, apparatus, or device), or used in conjunction with these instruction execution systems, apparatus, or devices. For the purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion having one or more wirings (electronic device), a portable computer diskette (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium can even be paper or other suitable media on which a program can be printed, as the program can be obtained electronically, for example, by optically scanning the paper or other media, followed by editing, interpretation, or otherwise processing as appropriate, and then storing it in a computer memory.

[0063] It should be understood that various parts of the present disclosure can be implemented by hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or a combination of the following techniques well known in the art can be used: discrete logic circuits having logic gate circuits for implementing logical functions on data signals, application-specific integrated circuits having appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0064] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried by the methods of the above embodiments can be completed by a program instructing relevant hardware. The program can be stored in a computer-readable storage medium, and when executed, it includes one or a combination of the steps of the method embodiments.

[0065] In addition, each functional unit in various embodiments of the present disclosure may be integrated into one processing module, or each unit may exist physically alone, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0066] The above-mentioned storage medium may be a read-only memory, a magnetic disk, an optical disc, etc. Although the embodiments of the present disclosure have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.

Claims

1. An intelligent optical computing chip cluster architecture, characterized in that: include: A plurality of optical computing chips, wherein the plurality of optical computing chips establish an optical path channel by using a spatial phase modulation light beam; By performing time-domain intensity modulation on the optical path channel, high-speed optical communication and optical diffraction network calculation are performed between the multiple optical computing chips.

2. The architecture according to claim 1, characterized in that The optical computing chip comprises an on-chip grating transmitting module and an on-chip grating receiving module, and the optical path channels are established between the multiple optical computing chips by using the on-chip grating transmitting module and the on-chip grating receiving module to adjust the modulated light beam by using the spatial phase.

3. The architecture according to claim 1, characterized in that When the optical diffraction network calculation is performed between the multiple optical computing chips, it is specifically used for: Get the tasks to be calculated; Optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated until a target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, the multiple optical computing chips constitute an optical diffraction network corresponding to the task to be calculated, and the task to be calculated is executed based on the optical diffraction network to obtain a calculation result.

4. The architecture according to claim 3, characterized in that The optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated includes: Fresnel phase modulation is performed on the initial emission phase of each optical computing chip in the multiple optical computing chips according to the task to be calculated.

5. The architecture according to claim 3, characterized in that: The optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated includes: modeling an initial emission phase of each of the plurality of optical computing chips as a trainable parameter; Taking the maximum signal-to-noise ratio as the optimization goal, a neural network is used to train the trainable parameters.

6. An intelligent optical computing chip cluster system, characterized in that: include: A plurality of optical computing chips, wherein the plurality of optical computing chips establish an optical path channel by using a spatial phase modulation light beam; By performing time-domain intensity modulation on the optical path channel, high-speed optical communication and optical diffraction network calculation are performed between the multiple optical computing chips.

7. The system according to claim 1, characterized in that The optical computing chip comprises an on-chip grating transmitting module and an on-chip grating receiving module, and the optical path channels are established between the multiple optical computing chips by using the on-chip grating transmitting module and the on-chip grating receiving module to adjust the modulated light beam by using the spatial phase.

8. The system according to claim 1, characterized in that When the optical diffraction network calculation is performed between the multiple optical computing chips, it is specifically used for: Get the tasks to be calculated; Optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated until a target emission phase that meets the optimization requirements is obtained; Based on the target emission phase, the multiple optical computing chips constitute an optical diffraction network corresponding to the task to be calculated, and the task to be calculated is executed based on the optical diffraction network to obtain a calculation result.

9. The system according to claim 3, characterized in that The optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated includes: Fresnel phase modulation is performed on the initial emission phase of each optical computing chip in the multiple optical computing chips according to the task to be calculated.

10. The system according to claim 3, characterized in that The optimizing the initial emission phase of each optical computing chip in the plurality of optical computing chips according to the task to be calculated includes: modeling an initial emission phase of each of the plurality of optical computing chips as a trainable parameter; Taking the maximum signal-to-noise ratio as the optimization goal, a neural network is used to train the trainable parameters.

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