Flash memory error correction method based on adaptive learning and readable storage medium

Abstract

The invention discloses a flash memory error correction method based on adaptive learning and a readable storage medium. According to the method, offset step lengths under different bias voltage types are determined according to historical error correction data, then data reading is performed according to reference voltage and the offset step lengths to obtain soft data, and finally the offset step lengths are optimized in real time according to deviation data generated by error correction of the reference data and the soft data, so that dynamic adjustment of the offset step lengths and voltage offset is realized. Compared with a preset fixed step length in a traditional error correction method, the offset step length can be set according to the actual condition of the data, so that the error correction process can flexibly adjust the bias condition according to the actual states of different flash memory units, different application scenes are effectively adapted, and the probability of flash memory data reading errors is effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of memories, and in particular, to a flash memory error correction method based on adaptive learning and a readable storage medium. Background Art

[0002] The NAND flash memory (a non-volatile storage technology) stores data by injecting electrons into the floating gate. Due to the quantum effect, the flash memory cannot precisely control the number of electrons injected into the floating gate. Therefore, the threshold voltage distribution curve of the flash memory is a normal distribution. In an ideal state, there is no overlap in the voltage distributions of two adjacent memory cells. Therefore, the data of the memory cells can be determined through the threshold voltage. However, during use, as the data storage time becomes longer or the environmental noise interferes, the number of electrons in the memory cells will change, and then bit flips will occur, resulting in random errors, causing voltage offsets and broadening. When the voltage distributions of some memory cells exceed the threshold voltage range, misjudgment will occur and read errors will appear; when the voltage distributions of adjacent memory cells overlap, simply adjusting the threshold voltage offset cannot correct the true voltage distribution at the overlap. Therefore, the flash memory usually uses means such as rereading to ensure data integrity.

[0003] In the error correction process of the flash memory, the Read Retry error correction method will be executed first. The Read Retry error correction method corrects the read error caused by the voltage offset of the memory cell by changing the threshold voltage used in the read operation. If the Read Retry error correction fails, the Soft Retry error correction method will be executed. The Soft Retry error correction method corrects errors by reading additional data and combining algorithms. The traditional error correction method Soft Retry only performs bias voltage adjustment on one side of the reference voltage during the error correction process, and the bias voltage step is fixed. This method has a good effect in ordinary scenarios, but in extreme environments such as high temperature and low temperature, the reference voltage of the flash memory will have uncertain left and right biases, and at this time, the error correction ability is poor and the adaptability is poor, resulting in user data errors. Summary of the Invention

[0004] The technical problem to be solved by the present invention is: to provide a flash memory error correction method and a terminal based on adaptive learning, which can adaptively adjust the bias voltage and the step length, and reduce the probability of data read errors.

[0005] To solve the above technical problem, a technical solution adopted by the present invention is: A flash memory error correction method based on adaptive learning, comprising: Obtaining a reference voltage, and performing data reading according to the reference voltage to obtain reference data; Obtain historical error correction data corresponding to the reference data, and respectively determine the offset steps of different bias types according to the historical error correction data; According to the offset step and the reference voltage, perform data reading based on the current reading mode to obtain the soft data of different bias types, and the number of soft data readings is different for each reading mode; Determine whether error correction is successful in the current reading mode according to the soft data and the reference data; If the error correction fails, after switching the current reading mode to the next-priority reading mode, update the offset step according to the deviation data between the reference data and the soft data, and return to execute the step of performing data reading based on the current reading mode according to the offset step and the reference voltage to obtain the soft data of different bias types until the error correction is successful.

[0006] To solve the above technical problems, another technical solution adopted by the present invention is: A computer-readable storage medium, on which a computer program is stored, and the computer program is executed to implement each step in the above-mentioned flash memory error correction method based on adaptive learning.

[0007] The beneficial effects of the present invention are as follows: Data reading is performed according to the reference voltage to obtain reference data, and then the offset steps under different bias types are determined according to the historical error correction data corresponding to the reference data. Thus, data reading is performed according to the reference voltage and the offset step to obtain soft data, and the offset step can be optimized in real time according to the deviation data generated by error correction of the reference data and the soft data, realizing the dynamic adjustment of the offset step and voltage offset. Compared with the preset fixed step in the traditional error correction method, the offset step of the present invention can be set according to the actual situation of the data, so that the error correction process can flexibly adjust the bias situation according to the actual state of different flash memory cells, effectively adapting to different application scenarios. In addition, the soft data reflects the data state under different bias types. Therefore, the soft data can provide more details about the voltage distribution of the storage unit, helping the error correction algorithm to more accurately judge the error position and type. The number of soft data readings characterizes the error correction ability of the current reading mode. Therefore, when the error correction based on the current soft data fails, a reading mode with stronger error correction ability can be selected to improve the error correction success rate, thereby effectively reducing the probability of flash memory data reading errors. Description of the Drawings

[0008] Figure 1 It is a flowchart of the flash memory error correction method based on adaptive learning provided by an embodiment of the present invention; Figure 2 It is a threshold voltage distribution diagram of the existing soft retry error correction method; Figure 3The threshold voltage distribution diagram of the flash memory error correction method based on adaptive learning provided by the embodiments of the present invention. Detailed implementation manners

[0009] To describe the technical content, achieved objectives and effects of the present invention in detail, the following is described in conjunction with the implementation manners and accompanied by the drawings.

[0010] The embodiments of the present invention provide a flash memory error correction method based on adaptive learning, including: Obtain a reference voltage, and perform data reading according to the reference voltage to obtain reference data; Obtain historical error correction data corresponding to the reference data, and respectively determine the offset steps of different bias types according to the historical error correction data; Based on the offset steps and the reference voltage, perform data reading according to the current reading mode to obtain the soft data of different bias types, and the number of reads of the soft data is different in each reading mode; Determine whether the error correction is successful in the current reading mode according to the soft data and the reference data; If the error correction fails, after switching the current reading mode to the next-priority reading mode, update the offset step according to the deviation data between the reference data and the soft data, and return to execute the step of performing data reading according to the offset steps and the reference voltage to obtain the soft data of different bias types until the error correction is successful.

[0011] As can be seen from the above description, the beneficial effects of the present invention are as follows: Data reading is performed according to the reference voltage to obtain reference data, and then the offset steps under different bias types are determined according to the historical error correction data corresponding to the reference data, so that data reading is performed according to the reference voltage and the offset steps to obtain soft data, and the offset step can be optimized in real time according to the deviation data generated by error correction of the reference data and the soft data, realizing the dynamic adjustment of the offset step and the voltage offset. Compared with the preset fixed step in the traditional error correction method, the offset step of the present invention can be set according to the actual situation of the data, so that the error correction process can flexibly adjust the bias situation according to the actual state of different flash memory cells, effectively adapting to different application scenarios. In addition, the soft data reflects the data state under different bias types, so the soft data can provide more details about the voltage distribution of the storage unit, helping the error correction algorithm to more accurately judge the error position and type. The number of reads of the soft data characterizes the error correction ability of the current reading mode. Therefore, in the case of error correction failure based on the current soft data, a reading mode with stronger error correction ability can be selected to improve the error correction success rate, thereby effectively reducing the probability of flash memory data reading errors.

[0012] Further, based on the offset step and the reference voltage, data reading is performed according to the current reading mode to obtain the soft data of different bias voltage types, including: Determine the offset voltages of the reference voltage under different bias voltage types respectively according to the offset step and the current reading mode; Perform data reading according to the offset voltages of different bias voltage types respectively to obtain the soft data of different bias voltage types.

[0013] As can be seen from the above description, the offset voltage is dynamically determined by combining the offset step and the reading mode, ensuring that the corresponding number of soft data can be obtained according to different offset voltages in different reading modes, thereby refining the voltage distribution data of the storage unit, providing a more accurate basis for voltage adjustment, further optimizing the error correction process, and improving the success rate and efficiency of error correction.

[0014] Further, determining the offset voltages of the reference voltage under different bias voltage types respectively according to the offset step and the current reading quantity includes: Determine the reading quantity of the soft data according to the current reading mode; Determine multiple offset voltages of the reference voltage under different bias voltage types respectively according to the offset step, and the number of the multiple offset voltages is the reading quantity.

[0015] As can be seen from the above description, flexibly adjusting multiple offset voltages according to the reading quantity of the soft data and the offset step can explore the voltage adjustment space more meticulously to find a better combination of reading thresholds and improve the overall performance of the system.

[0016] Further, determining the multiple offset voltages of the reference voltage under different bias voltage types respectively according to the offset step includes: Under each bias voltage type, taking the reading quantity as the number of offset times, cumulatively offset the reference voltage according to the offset step corresponding to the bias voltage type, and mark the reference voltage after each cumulative offset as the offset voltage.

[0017] As can be seen from the above description, the offset voltages under each bias voltage type are adjusted based on the offset step corresponding to the bias voltage type, rather than all offset voltages depending on the same step. Different step adjustments for different bias voltage types enable the system to respond in real time to changes in the state of the storage unit, ensuring that the optimal reading threshold can be found under different conditions. And through the way of cumulative offset, the system can gradually explore the optimal reading threshold instead of simply selecting a fixed offset voltage value. This step-by-step adjustment method can more accurately locate the bias voltage most suitable for the current state of the storage unit, thereby improving the accuracy and success rate of error correction.

[0018] Further, the reading mode includes a first mode, a second mode, and a third mode; The priority of the first mode is higher than that of the second mode, and the priority of the second mode is higher than that of the third mode; The number of soft data read in the first mode, the second mode, and the third mode under each voltage offset type is a first value, a second value, and a third value respectively. The first value is less than the second value, and the second value is less than the third value.

[0019] As can be seen from the above description, since a large number of soft data readings can improve the error correction ability, but more reading time is required, dynamically switching multiple reading modes according to the error correction requirements can optimize the error correction efficiency while ensuring the error correction success rate. The low-priority mode is applicable to simple error scenarios, and the high-priority mode is used for complex error scenarios, enabling the system to operate efficiently in different situations and taking into account both performance and resource consumption.

[0020] Further, after successful error correction, it further includes: Storing the characteristic information of the reference data, the updated offset step, and the offset voltage determined based on the updated offset step of the reference voltage as a set of historical error correction data in the historical database.

[0021] As can be seen from the above description, storing successful error correction data as historical experience facilitates quickly calling relevant data for error correction when similar data errors occur in the subsequent flash memory, reducing the time for repeated calculations and attempts, further improving the error correction efficiency, and at the same time providing a richer reference basis for subsequent adaptive adjustments and enhancing the intelligence level of the system.

[0022] Further, determining whether error correction is successful in the current reading mode according to the soft data and the reference data includes: Performing comprehensive decoding verification on the reference data and all the soft data read in the current reading mode; If the decoding is successful, the error correction is successful in the current reading mode; If the decoding fails, the error correction fails in the current reading mode.

[0023] As can be seen from the above description, the soft data is the data read after adjusting the reference voltage, which is different from the reference data under the reference voltage. The soft data can reflect the state change of the storage unit under different voltage conditions. Therefore, the more the number of soft data means that the algorithm has more reference points to judge the correctness of the data, thus improving the error correction success rate.

[0024] Further, obtaining the reference voltage includes: Obtain the preset error correction reference voltage table and the effective error correction voltage table with successful error correction in read retry error correction; Determine the storage unit location for data error correction; Obtain the effective voltage corresponding to the storage unit location from the effective error correction voltage table; If the effective voltage is obtained, determine the effective voltage as the reference voltage; If the effective voltage is not obtained, obtain the reference voltage corresponding to the storage unit location from the error correction reference voltage table.

[0025] As can be seen from the above description, obtaining the reference voltage by combining the effective error correction voltage table and the error correction reference voltage table makes full use of historical successful error correction experience and original factory reference data, can quickly determine a suitable reference voltage in different situations, improve the accuracy and efficiency of error correction, and enhance the stability and reliability of the system.

[0026] Further, updating the offset step according to the deviation data between the reference data and the soft data includes: Update the offset step under different bias voltage types respectively by the adaptive gradient descent method to minimize the deviation data between the reference data and the soft data.

[0027] As can be seen from the above description, adopting the adaptive gradient descent method to dynamically adjust the offset step can optimize the bias voltage adjustment strategy in real time according to the error correction gap between the current reference data and the soft data, quickly adapt to the changes in the storage unit state and the influence of environmental factors, further improve the accuracy and adaptability of error correction, reduce the data reading error rate, and enhance the overall performance of the system.

[0028] Further, before obtaining the reference voltage, it further includes: If a read request is received, perform data reading according to the read request to obtain initial data; Perform decoding verification on the initial data. If the initial data decoding fails, perform error correction processing on the initial data through read retry to obtain initial error correction data; Perform decoding verification on the initial error correction data; If the initial error correction data decoding is successful, return the initial error correction data; If the initial error correction data decoding fails, execute the step of obtaining the reference voltage.

[0029] As can be seen from the above description, read retry will be performed first when data reading errors occur. Since read retry can quickly reduce the error code rate without increasing complex calculations, if data error correction can be completed through read retry, there is no need to enter a more complex data error correction stage, effectively saving computing resources.

[0030] Another embodiment of the present invention provides a computer-readable storage medium, on which a computer program is stored, and the computer program is executed to implement each step in the above-mentioned flash memory error correction method based on adaptive learning.

[0031] As can be seen from the above description, the beneficial effects of the present invention are as follows: The offset step size under different bias types is determined according to historical error correction data, and then soft data is obtained by reading data based on the reference voltage and the offset step size. Finally, the offset step size is optimized in real time according to the deviation data generated by error correction of the reference data and the soft data, realizing the dynamic adjustment of the offset step size and the voltage offset. Compared with the preset fixed step size in the traditional error correction method, the offset step size of the present invention can be set according to the actual situation of the data, so that the error correction process can flexibly adjust the bias situation according to the actual state of different flash memory cells, effectively adapt to different application scenarios, and effectively reduce the probability of flash memory data reading errors.

[0032] The above-mentioned flash memory error correction method and readable storage medium based on adaptive learning of the present invention are applicable to related storage media in some extreme environments such as high temperature or low temperature. When the threshold voltage of the flash memory deviates, it can adaptively adjust the bias and step size for data error correction, thereby reducing the probability of data reading errors. The following is described through specific embodiments: Please refer to Figures 1 to 3 , the first embodiment of the present invention is: As Figure 1 shown, a flash memory error correction method based on adaptive learning includes: S1. Obtain a reference voltage, and read data based on the reference voltage to obtain reference data.

[0033] Specifically, obtaining the reference voltage in step S1 includes: S11. Obtain a preset error correction reference voltage table and an effective voltage table of successful error correction in read retry error correction; S12. Determine the position of the storage unit for data error correction.

[0034] S13. Obtain the effective voltage corresponding to the storage unit position from the effective voltage table.

[0035] S14. If the effective voltage is obtained, determine the effective voltage as the reference voltage.

[0036] S15. If the effective voltage is not obtained, obtain the reference voltage corresponding to the storage unit position from the error correction reference voltage table.

[0037] The error correction valid voltage table is the read retry dynamic table maintained during the use of the flash memory. During the read retry stage, all read voltages with successful error correction will be recorded in this table. In the present invention, when read failures occur at different positions in the same Plane of the flash memory and the read retry error correction fails, the read voltage will be preferentially obtained from the error correction valid voltage table as the reference voltage for subsequent biasing operations.

[0038] The error correction reference voltage table is the original factory reference table tested by the original factory of the flash memory in a large number of application scenarios. However, it is unknown which specific scenarios each group of voltage values in the original factory reference table is applicable to. Therefore, for different application scenarios, it is necessary to try many times to find the voltage values applicable to a specific scenario.

[0039] Specifically, before step S1, it further includes: S101. If a read request is received, perform data reading according to the read request to obtain initial data.

[0040] S102. Decode and verify the initial data. If the initial data decoding fails, perform error correction processing on the initial data through read retry to obtain initial error correction data.

[0041] S103. Decode and verify the initial error correction data.

[0042] S104. If the initial error correction data decoding is successful, return the initial error correction data.

[0043] S105. If the initial error correction data decoding fails, execute the step of obtaining the reference voltage.

[0044] S2. Obtain the historical error correction data corresponding to the reference data, and respectively determine the offset step sizes of different biasing types according to the historical error correction data.

[0045] In some embodiments, the historical error correction data includes the characteristic information of the historical reference data and the historical offset step sizes that can correctly read the data. The characteristic information includes the data characteristics of the reference data, the error correction positions, the states of the storage units, etc. Obtaining the historical error correction data corresponding to the reference data specifically means searching for historical reference data with the same or similar characteristic information, and obtaining the historical offset step sizes corresponding to the historical reference data. Add the historical offset step size to the reference voltage to obtain the upper offset voltage, and subtract the historical offset step size from the reference voltage to obtain the lower offset voltage. In this way, the biasing is adjusted based on the data situation of the historical offset step sizes, effectively coping with the voltage offset problem caused by environmental changes or the aging of storage units, improving the pertinence and effectiveness of error correction, and further enhancing the adaptability and reliability of the system.

[0046] S3. Based on the offset step and the reference voltage, data is read according to the current read mode to obtain the soft data of different bias types, and the number of soft data read in each read mode is different.

[0047] Specifically, the read modes include a first mode, a second mode, and a third mode. The priority of the first mode is higher than that of the second mode, and the priority of the second mode is higher than that of the third mode. The number of soft data read in the first mode, the second mode, and the third mode for each bias type is a first value, a second value, and a third value respectively, the first value is less than the second value, and the second value is less than the third value.

[0048] In some embodiments, the first mode is MODE N4, the second mode is MODE N6, and the third mode is MODE N8. In MODE N4, 1 pen of soft data needs to be read for each bias type. In MODE N6, 2 pens of soft data need to be read for each bias type. In MODE N8, 3 pens of soft data need to be read for each bias type. Therefore, the corresponding first value, second value, and third value are 1 pen, 2 pens, and 3 pens respectively.

[0049] It should be noted that when the reference voltage is first obtained for soft retry error correction, the read mode defaults to the first mode with the highest priority. After the error correction fails in the first mode, it switches to the second mode for error correction; after the error correction fails in the second mode, it switches to the third mode for error correction; if the error correction also fails in the third mode, a prompt message is returned to indicate that the current data cannot be read correctly.

[0050] Specifically, step S3 includes: S31. Determine the offset voltages of the reference voltage for different bias types respectively according to the offset step and the current read mode.

[0051] Specifically, step S31 includes: S311. Determine the number of soft data read according to the current read mode.

[0052] S312. Determine multiple offset voltages of the reference voltage for different bias types respectively according to the offset step, and the number of the multiple offset voltages is the number of soft data read.

[0053] Among them, step S312 is specifically: for each bias type, with the number of soft data read as the number of offset times, the reference voltage is cumulatively offset according to the offset step corresponding to the bias type, and the reference voltage after each cumulative offset is marked as the offset voltage.

[0054] Taking the first mode MODE N4 as an example, in the MODE N4 mode, the reference voltage needs to be upwardly offset by the step of upward offset once to obtain one upward offset voltage, and the reference voltage needs to be downwardly offset by the step of downward offset once to obtain one downward offset voltage. Taking the second mode MODE N6 as an example, in the MODE N6 mode, the reference voltage needs to be upwardly offset by the step of upward offset twice in sequence to obtain two upward offset voltages, and the reference voltage needs to be downwardly offset by the step of downward offset twice in sequence to obtain two downward offset voltages. Specifically, the step of upward offset is i (V), the step of downward offset is j (V), i > j > 0, the reference voltage is M (V), then in the MODE N4 mode, the upward offset voltage is M + i, and the downward offset voltage is M - j; in the MODE N6 mode, the upward offset voltages are M + i and M + 2i respectively, and the downward offset voltages are M - j and M - 2j respectively.

[0055] S32. Read data respectively according to the offset voltages of different bias types to obtain the soft data of different bias types.

[0056] Taking the first mode MODE N4 as an example, in the MODE N4 mode, the upward offset voltage is M + i, and the downward offset voltage is M - j. At this time, in the MODE N4 mode, read data based on the upward offset voltage M + i to obtain one piece of soft data, and at the same time read data based on the downward offset voltage M - j to obtain one piece of soft data, a total of two pieces of soft data are obtained. Taking the second mode MODE N6 as an example, in the MODE N6 mode, the upward offset voltage is M + i, and the downward offset voltage is M - j. At this time, in the MODE N6 mode, read data based on the upward offset voltage M + i to obtain one piece of soft data, read data based on the upward offset voltage M + 2i to obtain one piece of soft data, read data based on the downward offset voltage M - j to obtain one piece of soft data, and read data based on the downward offset voltage M - 2j to obtain one piece of soft data, a total of four pieces of soft data are obtained.

[0057] S4. Determine whether error correction is successful in the current reading mode according to the soft data and the reference data.

[0058] Specifically, step S4 includes: S41. Perform comprehensive decoding verification on the reference data and all the soft data read in the current reading mode.

[0059] In some embodiments, the reference data and the soft data read in the current reading mode are respectively used to form a piece of comprehensive data through exclusive NOR calculation or exclusive OR calculation, and the comprehensive data is decoded and verified.

[0060] S42. If the decoding is successful, then the error correction is successful in the current reading mode.

[0061] S43. If the decoding fails, the error correction fails in the current reading mode.

[0062] S5. If the error correction fails, after switching the current reading mode to the next-priority reading mode, update the offset step according to the deviation data between the reference data and the soft data, and return to execute the step of obtaining the soft data of different bias types by reading data based on the current reading mode according to the offset step and the reference voltage until the error correction is successful.

[0063] Specifically, in step S5, updating the offset step according to the deviation data between the reference data and the soft data includes: updating the offset steps under different bias types respectively by the adaptive gradient descent method to minimize the deviation data between the reference data and the soft data.

[0064] In some embodiments, after the error correction fails, the error correction algorithm determines the gap between the current offset voltage and the ideal offset voltage according to the previous historical error correction data and the deviation data between the current reference data and the soft data, so as to update the offset step. That is, if it is found that there are still many errors in the soft data read under the current offset voltage, the error correction algorithm will adjust the offset step according to the error type and degree of the soft data. For example, the error correction algorithm determines that the current is due to the too low upper offset voltage resulting in some data unable to be read correctly by analyzing the error type and degree of the soft data, so the upward offset step is appropriately increased, thereby increasing the upper offset voltage.

[0065] In some embodiments, the offset steps under each bias type are updated correspondingly according to the deviation data between the reference data and the soft data read under each bias type. In this way, the soft data of each bias type is comprehensively considered to adjust the offset step combination. That is, when the data error situations of the upward-offset soft data and the downward-offset soft data are different, it may be necessary to adjust the upper offset voltage and the lower offset voltage simultaneously to balance the accuracy of data reading. For example, if the errors in the soft data read under the current upper offset voltage are mainly concentrated in certain specific bits, and the errors in the soft data read under the lower offset voltage are mainly concentrated in other bits, the error correction algorithm will appropriately increase the upper offset voltage and appropriately decrease the lower offset voltage to make the overall data error correction effect better.

[0066] After the error correction is successful, the method further includes: S6. Store the characteristic information of the reference data, the updated offset step, and the offset voltage determined based on the updated offset step and the reference voltage as a set of historical error correction data in the historical database.

[0067] In some embodiments, if the soft data read based on a set of offset voltages is successfully decoded, it indicates that the data error correction is successful, and the upper offset voltage and the lower offset voltage of this successful error correction are recorded. For example, in MODE N4 mode, if the soft data read at the upper offset voltage M+i and the lower offset voltage M-j is successfully error-corrected, the upper offset voltage M+i and the lower offset voltage M-j are recorded. The upper offset voltage M+i, the lower offset voltage M-j are associated with relevant information such as the current data characteristics and the storage cell status to form historical error correction data, so that when the same or similar situations are encountered in the future, these offset voltages can be quickly called as references.

[0068] Based on the existing soft retry error correction method (using a fixed offset step for soft retry), the VT graph of read errors that occur in the flash memory under the scenarios of normal temperature and high temperature (85°C) write and low temperature (-25°C) read is as Figure 2 shown. Based on the flash memory error correction method of the present invention, the VT graph of read errors that occur in the flash memory under the scenarios of normal temperature and high temperature (85°C) write and low temperature (-25°C) read is as Figure 3 shown. Among them, the abscissa in the VT graph represents different voltages, the ordinate in the VT graph represents the number of cells (basic storage units) at the corresponding voltages, the blue curve in the VT graph represents the voltage and the number of cells when reading a certain storage location at normal temperature, and the yellow curve in the VT graph represents the voltage and the number of cells when reading the same storage location at high temperature write and low temperature read. From Figure 2 and Figure 3 it can be seen that when using the existing soft retry error correction method to read the same location, the result is UNC (uncorrectable error), and the two curves do not coincide, that is, the error correction capabilities at extreme temperatures and normal temperatures are quite different; while for the error correction method of the present invention to read the same location, the result does not show UNC (uncorrectable error), and the coincidence degree of the two curves is high, that is, the error correction capabilities at extreme temperatures and normal temperatures are similar.

[0069] Embodiment 2 of the present invention is as follows: A computer-readable storage medium, on which a computer program is stored, and the computer program is executed to implement each step in the flash memory error correction method based on adaptive learning as described in Embodiment 1.

[0070] In summary, the present invention provides a flash memory error correction method and a readable storage medium based on adaptive learning, which can optimize the offset step in real time according to the deviation data generated by error correction of reference data and soft data, and realize the dynamic adjustment of the offset step and voltage offset. Compared with the fixed step preset in the traditional error correction method, the offset step of the present invention can be set according to the actual situation of the data, so that the error correction process can flexibly adjust the bias voltage according to the actual state of different flash memory cells, effectively adapting to different application scenarios. And this method can finely adjust the voltage through the offset step, so as to find the optimal read voltage threshold, reduce the data error rate, and improve the data reliability. At the same time, the offset step can be adjusted separately for the voltages of upward offset and downward offset to adapt to the data error conditions under different bias voltages and more effectively correct data errors. In addition, by switching the read mode to read different amounts of soft data, a read mode with stronger error correction ability can be selected to improve the error correction success rate, thereby effectively reducing the probability of flash memory data read errors.

[0071] In the above embodiments provided by the present application, it should be understood that the disclosed methods, devices, computer-readable storage media, and electronic devices can be implemented in other ways. For example, the device embodiments described above are only illustrative. For example, the division of the modules is only a logical function division. In actual implementation, there may be other division methods. For example, multiple components or modules can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling or direct coupling or communication connection between each other can be through some interfaces, and the indirect coupling or communication connection of devices or components or modules can be in an electrical, mechanical or other form.

[0072] The components described as separate components may or may not be physically separated, and the components shown as components may or may not be physical modules, that is, they may be located in one place, or may be distributed to multiple network modules. Some or all of the components can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0073] In addition, in each embodiment of the present invention, the functional modules can be integrated in a processing module, or each component can exist physically alone, or two or more modules can be integrated in one module. The above integrated modules can be implemented in the form of hardware or in the form of software functional modules.

[0074] When the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0075] It should be noted that for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the present invention is not limited by the described action sequence, because according to the present invention, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the present invention.

[0076] In the above embodiments, the descriptions of the various embodiments have their own focuses. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0077] The above are only the embodiments of the present invention, and do not limit the patent scope of the present invention. All equivalent transformations made by using the content of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical fields, are equally included in the patent protection scope of the present invention.

Claims

1. A flash memory error correction method based on adaptive learning, characterized in that: include: Acquiring a reference voltage, and reading data according to the reference voltage to obtain reference data; Acquire historical error correction data corresponding to the reference data, and determine the offset step lengths of different bias types respectively according to the historical error correction data; According to the offset step size and the reference voltage, data is read based on the current reading mode to obtain soft data of the different bias types, wherein the number of soft data read in each reading mode is different; Determining whether error correction is successful in the current reading mode according to the soft data and the reference data; If the error correction fails, after switching the current reading mode to the reading mode of the next priority, the offset step is updated according to the deviation data between the reference data and the soft data, and the step of reading data based on the current reading mode according to the offset step and the reference voltage to obtain the soft data of the different bias types is returned to execute until the error correction is successful.

2. The method according to claim 1, characterized in that: According to the offset step size and the reference voltage, performing data reading based on the current reading mode to obtain the soft data of different bias types includes: Determine the offset voltages of the reference voltage under the different bias types respectively according to the offset step size and the current reading mode; Data is read respectively according to the offset voltages of the different bias types to obtain soft data of the different bias types.

3. The method according to claim 2, characterized in that Determining the offset voltages of the reference voltage under the different bias types according to the offset step size and the current reading quantity includes: Determining the read quantity of the soft data according to the current read mode; A plurality of offset voltages of the reference voltage under the different bias types are determined according to the offset step length, and the number of the plurality of offset voltages is the read number.

4. The method according to claim 2, characterized in that: Determining a plurality of offset voltages of the reference voltage under the different bias types according to the offset step size comprises: Under each bias type, the reading quantity is used as the number of offsets, the reference voltage is cumulatively offset according to the offset step corresponding to the bias type, and the reference voltage after each cumulative offset is marked as an offset voltage.

5. The method according to claim 1, characterized in that The reading modes include a first mode, a second mode and a third mode; The priority of the first mode is higher than that of the second mode, and the priority of the second mode is higher than that of the third mode; The read quantities of soft data in the first mode, the second mode and the third mode under each bias type are respectively a first value, a second value and a third value, the first value is smaller than the second value, and the second value is smaller than the third value.

6. The method according to claim 2, characterized in that After the error correction is successful, it also includes: The characteristic information of the reference data, the updated offset step length, and the offset voltage determined by the reference voltage based on the updated offset step length are stored in a history database as a set of historical error correction data.

7. The method according to claim 6, characterized in that Determining whether error correction is successful in the current reading mode according to the soft data and the reference data includes: Performing comprehensive decoding verification on the reference data and all soft data read in the current reading mode; If the decoding is successful, the error correction is successful in the current reading mode; If decoding fails, error correction fails in the current reading mode.

8. The method according to claim 1, characterized in that: Obtaining the reference voltage includes: Obtaining a preset error correction reference voltage table and reading an error correction effective voltage table of successful error correction in retry error correction; Determining a storage unit location for performing data error correction; Acquire the effective voltage corresponding to the storage unit position from the error correction effective voltage table; If the effective voltage is obtained, determining the effective voltage as a reference voltage; If the valid voltage is not obtained, a reference voltage corresponding to the storage unit position is obtained from the error correction reference voltage table.

9. The method according to claim 1, characterized in that: Updating the offset step size according to the deviation data between the reference data and the soft data comprises: The offset step sizes under the different bias types are updated respectively by an adaptive gradient descent method to minimize the deviation data between the reference data and the soft data.

10. The method according to claim 1, characterized in that Before obtaining the reference voltage, it also includes: If a read request is received, data is read according to the read request to obtain initial data; Decoding and verifying the initial data, and if the decoding of the initial data fails, performing error correction processing on the initial data by retrying reading to obtain initial error-corrected data; Decoding and verifying the initial error correction data; If the initial error correction data is decoded successfully, the initial error correction data is returned; If the initial error correction data decoding fails, the step of obtaining the reference voltage is performed.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executed to implement the various steps in the flash memory error correction method based on adaptive learning as described in any one of claims 1-10.

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