Unidirectional low-capacitance transient voltage suppression protection device

Abstract

The embodiment of the invention provides a unidirectional low-capacitance transient voltage suppression protection device which is characterized in that a first epitaxial layer is grown on a substrate, then ion implantation is carried out on the first epitaxial layer to form a first implantation region, and then a second epitaxial layer is grown on the first epitaxial layer to form a second implantation region; performing ion implantation on the second epitaxial layer to form a second implantation region, a third implantation region and a fourth implantation region, performing ion implantation on the third implantation region to form a fifth implantation region and a sixth implantation region, and performing ion implantation on the fourth implantation region to form a seventh implantation region; and finally, an SCR structure from right to left and an NPN structure from bottom to top or an NP structure from bottom to top in the transverse direction are formed, so that the problems that the negative end clamping voltage of the existing bidirectional NPN characteristic suppression protection device is too high and the protection effect on a rear-end product is poor, or the packaging size of the unidirectional NPN characteristic transient voltage suppression protection device realized through a packaging series structure is not small and the packaging cost is low are solved. And the starting voltages of the negative end are 2Vf and 2RDYN. The method can better solve the problem that the negative end clamping voltage is too high and the packaging size is limited.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor technology, and particularly to a unidirectional low-capacitance transient voltage suppression protection device. Background Art

[0002] With the continuous increase in the signal transmission rate of electronic products and the increasingly advanced process of backend IC devices, the tolerance of electronic products to ESD (electrostatic discharge) and EOS (electrical overstress) becomes weaker. This requires adding transient voltage suppression protection devices (TVS) to protect the backend IC of electronic products, and at the same time puts forward higher requirements for TVS devices, such as lower clamping voltage and smaller capacitance. Existing TVS products have diode characteristics, SCR characteristics, and NPN characteristics. Diode characteristics have the disadvantage of high clamping voltage. Although SCR products have low clamping voltage, there is a risk of self-locking. For traditional NPN characteristic suppression protection devices, it is difficult to control the minimum breakdown voltage and clamping voltage. At the same time, since many current applications are sensitive to the negative terminal clamping voltage, bidirectional NPN characteristic products cannot meet the protection requirements. Therefore, a new type of unidirectional NPN characteristic transient voltage suppression protection device is invented. Summary of the Invention

[0003] To this end, embodiments of the present application provide a unidirectional low-capacitance transient voltage suppression protection device, including a substrate, a first epitaxial layer, and a second epitaxial layer;

[0004] A first implantation region is provided in the first epitaxial layer, and a second implantation region, a third implantation region, and a fourth implantation region are provided in the second epitaxial layer, and the second implantation region is disposed above the first implantation region;

[0005] A fifth implantation region and a sixth implantation region are spaced apart in the third implantation region, and a seventh implantation region is provided in the fourth implantation region;

[0006] A first trench is provided between the second implantation region and the fourth implantation region, and a second trench is provided on a side of the third implantation region away from the fourth implantation region;

[0007] A third trench is provided on a side of the second implantation region away from the first trench, and a fourth trench is provided on a side of the third isolation trench away from the second implantation region;

[0008] The first trench, the second trench, the third trench, and the fourth trench all extend into the substrate, the first trench, the second trench, and the third trench are all filled with insulating materials, and the fourth trench is filled with conductive materials;

[0009] The substrate, the fourth implantation region, and the sixth implantation region are of the first doping type. The first implantation region, the third implantation region, the fifth implantation region, and the seventh implantation region are of the second doping type. The second implantation region is of the first doping type or the second doping type.

[0010] As a preferred embodiment of the present application, the first doping type is N-type, and the second doping type is P-type.

[0011] As a preferred embodiment of the present application, the first epitaxial layer is an intrinsic epitaxial layer, and the second epitaxial layer is of the first doping type or the second doping type.

[0012] As a preferred embodiment of the present application, the insulating material is silicon dioxide, and the conductive material is polysilicon of the first doping type or a conductive metal material.

[0013] Compared with the prior art, the present application provides a unidirectional low-capacitance transient voltage suppression protection device. A first epitaxial layer is grown on a substrate, and then ion implantation is performed in the first epitaxial layer to form a first implantation region. Then, a second epitaxial layer is grown on the first epitaxial layer, and ion implantation is performed on the second epitaxial layer to form a second implantation region, a third implantation region, and a fourth implantation region. Finally, ion implantation is performed in the third implantation region to form a fifth implantation region and a sixth implantation region, and ion implantation is performed in the fourth implantation region to form a seventh implantation region, finally forming an SCR structure horizontally from right to left and an NPN structure or an NP structure vertically from bottom to top, solving the problems of the existing bidirectional NPN characteristic suppression protection device, where the negative terminal clamping voltage is too high and the protection effect on the backend product is poor, or currently, through a packaged series structure to implement a unidirectional NPN characteristic transient voltage suppression protection device, the packaged size cannot be reduced, with a negative terminal turn-on voltage of 2Vf and 2RDYN. This method can better solve the problems of too high negative terminal clamping voltage and packaged size limitation. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only exemplary, and for those of ordinary skill in the art, other implementation drawings can be obtained based on the provided drawings without creative efforts.

[0015] The structures, ratios, sizes, etc. shown in this specification are only used to cooperate with the content disclosed in the specification for those familiar with this technology to understand and read, and are not used to limit the implementation conditions of the present invention. Therefore, they do not have substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the efficacy that the present invention can produce and the purpose that can be achieved, should still fall within the scope that the technical content disclosed in the present invention can cover.

[0016] Figure 1 It is a schematic structural diagram of a unidirectional low-capacitance transient voltage suppression protection device according to an embodiment of the present invention. Specific embodiments

[0017] The following specific embodiments illustrate the implementation manners of the present invention. Those familiar with this technology can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present invention.

[0018] Embodiment 1

[0019] As Figure 1 shown, the embodiment of the present application provides a unidirectional low-capacitance transient voltage suppression protection device, including a substrate 1, a first epitaxial layer 2, and a second epitaxial layer 3;

[0020] A first implantation region 4 is provided in the first epitaxial layer 2, and a second implantation region 5, a third implantation region 6, and a fourth implantation region 7 are provided in the second epitaxial layer 3. The second implantation region 5 is disposed above the first implantation region 4;

[0021] A fifth implantation region 8 and a sixth implantation region 9 are disposed at intervals in the third implantation region 6, and a seventh implantation region 10 is provided in the fourth implantation region 7;

[0022] A first trench 12 is provided between the second implantation region 5 and the fourth implantation region 7, and a second trench 11 is provided on a side of the third implantation region 6 away from the fourth implantation region 7;

[0023] A third trench 13 is provided on a side of the second implantation region 5 away from the first trench 12, and a fourth trench 14 is provided on a side of the third isolation trench away from the second implantation region 5;

[0024] The first trench 12, the second trench 11, the third trench 13, and the fourth trench 14 all extend into the substrate 1. The first trench 12, the second trench 11, and the third trench 13 are all filled with an insulating material, and the fourth trench 14 is filled with a conductive material. In the embodiment of the present application, the insulating material is silicon dioxide, and the conductive material is polysilicon of a first doping type or a conductive metal material.

[0025] The substrate 1, the fourth implantation region 7, and the sixth implantation region 9 are of the first doping type. The first implantation region 4, the third implantation region 6, the fifth implantation region 8, and the seventh implantation region 10 are of the second doping type. The second implantation region 5 is of the first doping type or the second doping type.

[0026] In the embodiment of the present application, the first epitaxial layer 2 is an intrinsic epitaxial layer, and the second epitaxial layer 3 is of the first doping type or the second doping type.

[0027] In the embodiment of the present application, the first doping type is N-type, and the second doping type is P-type.

[0028] In the embodiment of the present application, the current path from the I / O terminal to the ground terminal is as follows: The current direction from the I / O terminal to the ground terminal is as shown by the arrow 15. The current first goes from the polysilicon in the fourth trench 14 to the substrate 1, and then from the substrate 1 to the first implantation region 4, the second epitaxial layer 3, and the second implantation region 5 to form an NPN structure from bottom to top. Then, the current enters the seventh implantation region 10 through the front metal connection and then flows through the fourth implantation region 7, the second epitaxial layer 3, the third implantation region 6, and the sixth implantation region 9 to the ground terminal to form an SCR structure horizontally from right to left. The first implantation region 4 is used to adjust the reverse breakdown voltage of the NPN structure to prevent the current from directly flowing into the third implantation region 6 through the fifth implantation region 8 without passing through the second implantation region 5.

[0029] The current path from the ground terminal to the I / O terminal is as follows: The current direction from the I / O terminal to the ground terminal is as shown by the arrow 16. The current sequentially passes through the fifth implantation region 8, the third implantation region 6, the second epitaxial layer 3, the first epitaxial layer 2, the substrate 1, and the polysilicon in the fourth trench 14 to the I / O terminal.

[0030] Embodiment 2

[0031] The difference between Embodiment 2 and Embodiment 1 is that the second implantation region 5 is of the second doping type. In the embodiment of the present application, the first implantation region 4 is used to adjust the reverse breakdown voltage of the NP structure to prevent the current from directly flowing into the third implantation region 6 through the fifth implantation region 8 without passing through the second implantation region 5.

[0032] In the embodiment of the present application, the first epitaxial layer 2 is an intrinsic epitaxial layer, and the second epitaxial layer 3 is of the first doping type or the second doping type.

[0033] The insulating material is silicon dioxide, and the conductive material is polysilicon with a first doping type or a conductive metal material.

[0034] In the embodiment of the present application, the first doping type is N-type and the second doping type is P-type.

[0035] In the embodiment of the present application, the current path from the I / O terminal to the ground terminal and the current path from the ground terminal to the I / O terminal are the same as those in Embodiment 1, except that: the current forms an NP structure from bottom to top from the substrate 1 to the first implantation region 4, the second epitaxial layer 3, and the second implantation region 5.

[0036] Compared with the prior art, the present application provides a unidirectional low-capacitance transient voltage suppression protection device. A first epitaxial layer 2 is grown on the substrate 1, then ion implantation is performed on the first epitaxial layer 2 to form a first implantation region 4, then a second epitaxial layer 3 is grown on the first epitaxial layer 2, and then ion implantation is performed on the second epitaxial layer 3 to form a second implantation region 5, a third implantation region 6, and a fourth implantation region 7. Finally, ion implantation is performed on the third implantation region 6 to form a fifth implantation region 8 and a sixth implantation region 9, and ion implantation is performed on the fourth implantation region 7 to form a seventh implantation region 10, finally forming a lateral SCR structure from right to left and an NPN structure or an NP structure from bottom to top, solving the problems of the existing bidirectional NPN characteristic suppression protection device, such as too high negative terminal clamping voltage and poor protection effect on the backend product, or the current unidirectional NPN characteristic transient voltage suppression protection device realized by the packaged series structure, with a large packaged size and a negative terminal turn-on voltage of 2Vf and 2RDYN. This method can better solve the problems of too high negative terminal clamping voltage and packaging size limitation.

[0037] Although the present invention has been described in detail above with general descriptions and specific embodiments, based on the present invention, some modifications or improvements can be made, which are obvious to those skilled in the art. Therefore, these modifications or improvements made without departing from the spirit of the present invention all fall within the scope of protection required by the present invention.

Claims

1. A unidirectional low-capacitance transient voltage suppression protection device, characterized in that: comprising a substrate, a first epitaxial layer and a second epitaxial layer; A first injection region is provided in the first epitaxial layer, a second injection region, a third injection region and a fourth injection region are provided in the second epitaxial layer, and the second injection region is provided above the first injection region; The third injection region is provided with a fifth injection region and a sixth injection region in between, and the fourth injection region is provided with a seventh injection region; A first trench is provided between the second injection region and the fourth injection region, and a second trench is provided on a side of the third injection region away from the fourth injection region; A third trench is disposed on a side of the second injection region away from the first trench, and a fourth trench is disposed on a side of the third trench away from the second injection region; The first trench, the second trench, the third trench and the fourth trench all extend into the substrate, the first trench, the second trench and the third trench are all filled with insulating materials, and the fourth trench is filled with conductive materials; The substrate, the fourth injection region, and the sixth injection region are of the first doping type, the first injection region, the third injection region, the fifth injection region, and the seventh injection region are of the second doping type, and the second injection region is of the first doping type or the second doping type.

2. A unidirectional low capacitance transient voltage suppression protection device as claimed in claim 1, characterized in that: The first doping type is N-type, and the second doping type is P-type.

3. A unidirectional low capacitance transient voltage suppression protection device as claimed in claim 1, characterized in that: The first epitaxial layer is an intrinsic epitaxial layer, and the second epitaxial layer is of a first doping type or a second doping type.

4. A unidirectional low capacitance transient voltage suppression protection device as claimed in claim 1, characterized in that: The insulating material is silicon dioxide, and the conductive material is polysilicon with a first doping type.

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