Patterned passivation contact structure and preparation method thereof, and solar cell and preparation method thereof

Abstract

The invention relates to the technical field of solar cells, and discloses a patterned passivation contact structure and a preparation method thereof, and a solar cell and a preparation method thereof. The preparation method of the patterned passivation contact structure comprises the following steps: preparing a tunneling oxide layer and doped amorphous silicon on the surface of a silicon wafer; injecting hydrogen ions and / or helium ions into the silicon wafer in the non-electrode contact region to form a selective injection layer in the silicon wafer; and annealing, converting the doped amorphous silicon into doped polycrystalline silicon, diffusing doped atoms into the silicon wafer to form a doped part, enabling the thickness of the doped part to be greater than the injection depth of the selective injection layer in the silicon wafer, and enabling the selective injection layer to fall off after bubbles are formed by thermal reaction so as to strip the passivation contact structure of the non-electrode contact region from the doped part. And the outer surface of the doped part of the non-electrode contact area is exposed and an uneven suede is formed. The method can simplify the process, repair the injection damage, reduce the cost, reduce the parasitic absorption loss, and improve the long-wave light absorption and carrier transverse transmission capability.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and particularly relates to a patterned passivated contact structure and a preparation method thereof, a solar cell and a preparation method thereof. Background Art

[0002] As shown in the publication number CN117878166A, the complete back passivated contact structure of the existing TOPCon cell (tunnel oxide passivated contact cell), that is, sequentially depositing a tunnel oxide layer and doped amorphous silicon on the entire back of the silicon wafer, can block the passage of minority carriers, allow the passage of majority carriers, and form an extremely high carrier concentration barrier, thus enhancing the passivation and contact effects. However, the presence of the passivated contact structure in the non-electrode contact area affects the light absorption in the long wavelength band, and the doped polysilicon formed by annealing the doped amorphous silicon also brings parasitic absorption loss. Therefore, the complete back passivated contact structure has obvious defects, further limiting the improvement of the photoelectric conversion efficiency (i.e., the cell efficiency).

[0003] To overcome the above defects of the complete back passivated contact structure of the existing TOPCon cell, the publication number CN220491896U discloses a TOPCon cell structure and a manufacturing method thereof. The manufacturing method of this TOPCon cell structure mainly includes the following steps: first, grow a passivated contact structure (i.e., a tunnel oxide layer and a phosphorus-doped amorphous silicon layer) on the back of the silicon wafer; then, anneal to convert the phosphorus-doped amorphous silicon layer into a phosphorus-doped polysilicon layer. After annealing, PSG (phosphosilicate glass) will be formed on the back of the phosphorus-doped polysilicon layer; then, use laser grooving to remove the PSG in the non-grid line area (also called the non-electrode contact area) on the back of the silicon wafer to expose the phosphorus-doped polysilicon layer in the non-grid line area; then, sequentially clean with HF solution, KOH solution (or NaOH solution) and HF solution pickling to remove the PSG plated on the front, the phosphorus-doped polysilicon layer in the non-grid line area (i.e., the laser grooving area) and the tunnel oxide layer in the non-grid line area respectively, and retain the passivated contact structure in the grid line area. In this way, a TOPCon cell with a patterned passivated contact structure on the back is obtained.

[0004] However, the manufacturing method of the existing such TOPCon cell structure as shown in CN220491896U has the following defects:

[0005] (1) The process steps of this manufacturing method are numerous, increasing the manufacturing cost of the cell: it is necessary to first use laser to selectively groove and remove the PSG to expose the phosphorus-doped polysilicon layer, and then sequentially clean with HF solution, alkali solution and HF solution to remove the PSG plated on the front, the phosphorus-doped polysilicon layer at the laser grooving area and the tunnel oxide layer at the laser grooving area respectively, so as to make its back have a patterned passivated contact structure.

[0006] (2) Laser grooving can cause damage to the silicon wafer, and additional loss repair processes need to be added, which will further increase costs and reduce the battery manufacturing efficiency; otherwise, the silicon wafer damage will affect the battery efficiency.

[0007] (3) For the TOPCon battery with a patterned passivated contact structure on the back prepared by the above manufacturing method, the surface of the non-grid line area presents a flat morphology, which is not conducive to the absorption and utilization of long-wavelength light; moreover, this manufacturing method is also difficult to ensure the carrier lateral transport ability inside the battery. These are not conducive to the further improvement of the battery efficiency. Summary of the Invention

[0008] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a patterned passivated contact structure and a preparation method thereof, a solar cell and a preparation method thereof.

[0009] Based on this, the present invention discloses a preparation method of a patterned passivated contact structure, including the following preparation steps:

[0010] S1. Preparation of the passivated contact structure: sequentially prepare a tunneling oxide layer and doped amorphous silicon on the surface of the silicon wafer;

[0011] S2. Inject hydrogen ions and / or helium ions into the interior of the silicon wafer in the non-electrode contact area to form a selective injection layer in the silicon wafer;

[0012] S3. Annealing treatment is carried out to convert the doped amorphous silicon into doped polycrystalline silicon, and the doped atoms diffuse into the silicon wafer to form a doped part, and the thickness of the doped part in the silicon wafer is greater than the injection depth of the selective injection layer in the silicon wafer, and the selective injection layer undergoes a thermal reaction to form bubbles. As the bubble pressure rises, the selective injection layer ruptures and falls off to peel off and remove the passivated contact structure in the non-electrode contact area from the doped part, so that the outer surface of the doped part in the non-electrode contact area is exposed and a pitted and uneven textured surface is formed.

[0013] Preferably, in step S1, the passivated contact structure includes a tunneling oxide layer with a thickness less than 2 nm and doped amorphous silicon provided on the surface of the tunneling oxide layer with a thickness of 80-150 nm; the preparation method of the passivated contact structure is plasma enhanced chemical vapor deposition method and / or physical vapor deposition method.

[0014] Preferably, in step S2, the selective injection layer is prepared by ion implantation method, and the injection dose of hydrogen ions and / or helium ions is 1E14-1E17 atoms / cm 2 , and the injection energy is 10 KeV-100 KeV; the distance between the outer surface of the selective injection layer and the outer surface of the silicon wafer is 0-50 nm.

[0015] Further preferably, in step S2, when hydrogen ions are implanted to prepare the selective implantation layer, the implantation dose of hydrogen ions is 3E15 atoms / cm 2 , and the implantation energy is 10 keV to 50 keV; the distance between the outer surface of the selective implantation layer and the outer surface of the silicon wafer is 10 to 20 nm.

[0016] Preferably, in step S3, the annealing temperature is 800 to 950 °C, and the annealing time is 60 to 120 min; after annealing, the peak doping concentration of the doped part in the non-electrode contact area is less than the peak doping concentrations of the doped parts in the electrode contact area and the passivated contact structure, and the thickness of the doped part in the non-electrode contact area is less than the thickness of the doped part in the electrode contact area.

[0017] Further preferably, in step S3, the annealing temperature is 850 to 880 °C, and the annealing time is 70 to 90 min; after annealing, the peak doping concentration of the doped part in the non-electrode contact area is 1 to 5E19 cm -3 , and the peak doping concentrations of the doped parts in the electrode contact area and the passivated contact structure are 1.5 to 2.5E20 cm -3 .

[0018] Preferably, before step S1, the following pretreatment steps are further included: polishing the surface of the silicon wafer to form a flat surface morphology on the silicon wafer surface; using an alkaline solution of KOH solution or NaOH solution for polishing, the volume concentration of the alkaline solution is 2 to 8%, the reaction temperature is 55 to 75 °C, and the polishing time is 1 to 10 min;

[0019] After step S3, the following treatment steps are further included: pickling treatment to remove impurities after annealing.

[0020] The present invention also discloses a patterned passivated contact structure, which is prepared by using the preparation method of a patterned passivated contact structure described above in the present invention content;

[0021] The patterned passivated contact structure includes a silicon wafer, a doped part is provided on the surface layer of the silicon wafer, the silicon wafer is divided into a non-electrode contact area and an electrode contact area, the thickness of the doped part in the non-electrode contact area is less than the thickness of the doped part in the electrode contact area, and the outer surface of the doped part in the non-electrode contact area is exposed and forms a rough and uneven velvet surface, while the surface of the doped part in the electrode contact area is sequentially provided with a tunneling oxide layer and doped polysilicon.

[0022] The present invention also discloses a preparation method of a solar cell, including the following preparation steps:

[0023] Step 1: Texturing the silicon wafer to form a velvet surface with a pyramid structure on the silicon wafer surface;

[0024] Step 2: Perform boron diffusion doping treatment on the silicon wafer to form a p+ emitter on the front side of the silicon wafer;

[0025] Step 3: Perform pickling treatment to remove impurities and the diffusion halo layer after boron diffusion doping;

[0026] Step 4: Use the preparation method of a patterned passivated contact structure described above in the present invention to form the patterned passivated contact structure on the back side of the silicon wafer;

[0027] Step 5: Prepare a front passivation and antireflection film on the front side of the p+ emitter, and prepare a back passivation and antireflection film on the back side of the patterned passivated contact structure;

[0028] Step 6: Perform metallization treatment to form a front electrode in ohmic contact with the p+ emitter and a back electrode in ohmic contact with the doped polysilicon, thus obtaining the solar cell;

[0029] Step 7: Perform post-optimization treatment on the solar cell.

[0030] The present invention also discloses a solar cell, which is obtained by using the preparation method of a solar cell described above in the present invention.

[0031] Compared with the prior art, the preparation method of the patterned passivated contact structure of the present invention has at least the following beneficial effects:

[0032] (1) During the annealing process of the present invention, a doped portion can be formed synchronously by in-diffusion of doping atoms, and the passivated contact structure in the non-electrode contact area can be removed synchronously by forming and cracking off bubbles in the selective injection layer during the annealing process, and a rough and uneven velvet surface can be formed on the back side of the doped portion in the non-electrode contact area; therefore, the process of preparing the patterned passivated contact structure can be greatly simplified, and its manufacturing cost can be reduced.

[0033] (2) Moreover, the annealing process can effectively repair the damage to the silicon wafer caused by the previous ion implantation selective injection layer; therefore, there is no need to additionally add a process for repairing the damage to the silicon wafer, and the process of preparing the patterned passivated contact structure can be further simplified, further improving its manufacturing efficiency and reducing the manufacturing cost.

[0034] (3) Since the passivation contact structure in the non - electrode contact area (i.e., the passivation contact structure on the back of the selective injection layer) is removed, the parasitic absorption loss caused by doped polysilicon can be effectively reduced. At the same time, since the electrode contact area has a doped part and a passivation contact structure, and the doped part remains in the non - electrode contact area, the lateral carrier transport ability inside the battery can be effectively ensured. Moreover, the passivation contact structure in the electrode contact area is retained, which can reduce metal recombination. Also, a rough and uneven matte surface is formed on the back of the doped part in the non - electrode contact area, which can further increase the optical path inside the silicon wafer and further improve the absorption rate and utilization rate of long - wavelength light. Therefore, the preparation method of the present invention helps to further improve the open - circuit voltage, short - circuit current and battery efficiency. Description of the Drawings

[0035] Figure 1 It is a schematic cross - sectional structure diagram after the treatment of step 6 in the preparation method of a solar cell with a patterned passivation contact structure according to this embodiment.

[0036] Figure 2 It is a schematic cross - sectional structure diagram of a solar cell with a patterned passivation contact structure according to this embodiment.

[0037] Explanation of the reference numerals in the drawings: silicon wafer 1; p + emitter 2; tunneling oxide layer 3; doped polysilicon 4; selective injection layer 5; doped part 6; rough and uneven matte surface 7; Al 2 O 3 film 8; front - side passivation and antireflection film 9; back - side passivation and antireflection film 10; front - side electrode 11; back - side electrode 12. Detailed Embodiment

[0038] To make the above - mentioned objects, features and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0039] A preparation method of a solar cell with a patterned passivation contact structure according to the present invention, see Figure 1-2 , includes the following preparation steps:

[0040] Step 1, texturing: The silicon wafer 1 is textured to form a matte surface with a pyramid structure on the surface of the silicon wafer 1.

[0041] In step 1, the silicon wafer 1 is preferably an N - type crystalline silicon. The silicon wafer 1 is textured with an alkali solution to form a matte surface with a pyramid structure on both the front and back surfaces of the silicon wafer 1; the alkali solution is a KOH solution or an NaOH solution.

[0042] Step 2, boron diffusion: Boron diffusion doping treatment (abbreviated as boron diffusion) is carried out on the front surface of the silicon wafer 1 to form a p + emitter 2 on the front surface of the silicon wafer 1.

[0043] In Step 2, the doping source (boron source) introduced in the boron diffusion is BCl 3 or BBr 3 , and the sheet resistance range of the boron diffusion doping is 150 - 350 Ω (Ω / sq).

[0044] In practice, during the boron diffusion process, a lightly doped p+ emitter 2 with diffusion around will be formed both in the local area on the back side of the silicon wafer 1 and in the local area on the edge of the silicon wafer 1; and after the boron diffusion, boron silicate glass (BSG) will also be formed on the outer surface of the p+ emitter 2.

[0045] Step 3, pickling: The back side of the silicon wafer 1 is cleaned with an HF solution to remove the BSG diffused around on the back side and the edge of the silicon wafer 1.

[0046] In Step 3, the mass fraction of the HF solution is 5% - 20%, and the pickling time is 0.5 - 3 min.

[0047] Step 4, back polishing: The back side of the silicon wafer 1 is polished to remove the lightly doped p+ emitter 2 diffused around on the back side and the edge of the silicon wafer 1, and to make the back surface of the silicon wafer 1 form a flat morphology.

[0048] In practice, the back polishing process also passes through a pickling tank, and at this time, the front BSG will be removed together.

[0049] In Step 4, an alkaline solution such as a KOH solution or an NaOH solution is used for polishing treatment. The volume concentration of the alkaline solution is 2% - 8%, the reaction temperature is 55 - 75 °C, and the polishing time is 1 - 10 min.

[0050] After the back side of the silicon wafer 1 is polished, it helps the back side of the subsequent deposited passivated contact structure to also have a flat morphology, and the flat morphology of the back side of the passivated contact structure in the electrode contact area helps to improve the light reflectivity of the electrode contact area, and further helps to improve the open - circuit voltage and the cell efficiency.

[0051] Step 5, preparation of the back passivated contact structure: A tunneling oxide layer 3 and doped amorphous silicon (such as phosphorus - doped amorphous silicon) are sequentially deposited on the back side of the silicon wafer 1.

[0052] In practice, the passivated contact structure includes a tunneling oxide layer 3 and doped amorphous silicon provided on the surface of the tunneling oxide layer 3.

[0053] In Step 5, the thickness of the tunneling oxide layer 3 is less than 2 nm, the thickness of the doped amorphous silicon is 80 - 150 nm, and the deposition method uses the PECVD (plasma - enhanced chemical vapor deposition) method and / or the PVD (physical vapor deposition) method.

[0054] Step 6, Preparation of the selective implantation layer 5: Hydrogen ions and / or helium ions are implanted into the back surface of the silicon wafer 1 from the non-electrode contact area of the silicon wafer 1 to form a selective implantation layer 5 within the silicon wafer 1. The structure after being processed in Step 6 is as Figure 1 shown.

[0055] It should be noted that the non-electrode contact area mentioned below refers to the non-back electrode 12 contact area, and the electrode contact area mentioned below refers to the back electrode 12 contact area.

[0056] In Step 6, the preparation method of the selective implantation layer 5 adopts the ion implantation method. The implantation dose of hydrogen ions and / or helium ions is 1E14 - 1E17 atoms / cm 2 , the implantation energy is 10 KeV - 100 KeV, and the distance between the back surface of the selective implantation layer 5 and the back surface of the silicon wafer 1 is less than or equal to 50 nm.

[0057] Step 7, Annealing: The silicon wafer 1 processed in Step 6 is annealed. Under high-temperature annealing, the doped amorphous silicon is converted into doped polycrystalline silicon 4 (such as phosphorus-doped polycrystalline silicon), and the doped atoms of the doped amorphous silicon diffuse into the silicon wafer 1 to form a doped portion 6 on the back of the silicon wafer 1. At the same time, the selective implantation layer 5 is heated to form bubbles. As the bubble pressure rises, the selective implantation layer 5 will automatically crack to peel off and remove the passivation contact structure on the back of the selective implantation layer 5 (the passivation contact structure on the back of the selective implantation layer 5 is the tunneling oxide layer 3 and doped amorphous silicon (or doped polycrystalline silicon 4) in the non-electrode contact area) from the doped portion 6, resulting in a rough and uneven textured surface 7 being formed on the back of the doped portion 6 in the non-electrode contact area (since the sizes of the bubbles formed by the selective implantation layer 5 are not uniform, a rough and uneven textured surface 7 will be formed on the back of the doped portion 6 in the non-electrode contact area). At this time, the back of the doped portion 6 in the non-electrode contact area is exposed.

[0058] In Step 7, the annealing temperature is 800 - 950 °C, and the annealing time is 60 - 120 min; after annealing, the peak doping concentration of the non-poly region (the non-poly region is the doped portion 6 in the non-electrode contact area) is 1 - 5E19 cm -3 , and the peak doping concentration of the poly region (the poly region is the doped portion 6 and the passivation contact structure in the electrode contact area) is 1.5 - 2.5E20 cm -3 . In this embodiment, the thickness of the doped portion 6 in the silicon wafer 1 is greater than the implantation depth of the selective implantation layer 5 in the silicon wafer 1; therefore, when the selective implantation layer 5 cracks and falls off, the doped portion 6 in the non-electrode contact area will be thinned, and thus the peak doping concentration of the non-poly region is lower than that of the poly region; however, the doped portion 6 in the non-electrode contact area will not be completely peeled off and removed.

[0059] In practice, after annealing in step 7, a phosphosilicate glass (i.e., PSG) is also formed on the outer surfaces of the doped polysilicon 4 in the electrode contact region and the doped portion 6 in the non-electrode contact region.

[0060] Step 8, pickling: Use an HF solution to remove the PSG formed after annealing in step 7.

[0061] The above steps 4-8 are the preparation steps of a preparation method for a patterned passivated contact structure of the present invention.

[0062] For a patterned passivated contact structure of the present invention, refer to Figure 2 , including: a silicon wafer 1, a doped portion 6 is provided on the back surface layer of the silicon wafer 1, the thickness of the doped portion 6 in the non-electrode contact region is less than the thickness of the doped portion 6 in the electrode contact region, and the back surface of the doped portion 6 in the non-electrode contact region is exposed and formed with a rough and uneven textured surface 7, while a tunneling oxide layer 3 and doped polysilicon 4 are sequentially provided on the back surface of the doped portion 6 in the electrode contact region.

[0063] Step 9, depositing an Al2O3 film 8: Use the ALD (atomic layer deposition) method to deposit an Al2O3 film 8 on the front surface of the p+ emitter 2.

[0064] Step 10, depositing a passivation and antireflection film: Deposit a front surface passivation and antireflection film 9 (such as a silicon nitride film or a silicon oxynitride film) on the front surface of the Al2O3 film 8, and deposit a back surface passivation and antireflection film 10 on the back surfaces of the doped polysilicon 4 in the electrode contact region and the doped portion 6 in the non-electrode contact region.

[0065] Step 11, metallization: Screen-print the front electrode 11 paste and the back electrode 12 paste on the front surface passivation and antireflection film 9 and the back surface passivation and antireflection film 10 respectively; after sintering, form the front electrode 11 and the back electrode 12, wherein the front electrode 11 (including the main grid and the sub-grid) sequentially passes through the front surface passivation and antireflection film 9 and the Al2O3 film 8 and then makes an ohmic contact with the p+ emitter 2, while the back electrode 12 (including the main grid and the sub-grid) passes through the back surface passivation and antireflection film 10 and then makes an ohmic contact with the doped polysilicon 4. After being processed by step 11, a solar cell with a patterned passivated contact structure can be obtained, which is a TOPCon cell with a patterned passivated contact.

[0066] Step 12, optical injection: Perform optical injection treatment on the solar cell to improve the passivation performance of the solar cell and reduce the light-induced degradation.

[0067] Step 13, laser-assisted sintering (LECO): Use laser-assisted sintering technology to perform post-treatment optimization on the solar cell to improve the ohmic contact performance of the front electrode 11 (and / or the back electrode 12). The above steps 8-13 can all be carried out with reference to the existing process, so they will not be elaborated here.

[0068] The following presents a specific embodiment of a solar cell with a patterned passivated contact structure and its manufacturing method according to the present invention:

[0069] Example 1

[0070] The manufacturing method of a solar cell with a patterned passivated contact structure in this example is shown in Figure 1-2 and includes the following manufacturing steps:

[0071] Step 1: Select an N-type monocrystalline silicon wafer 1 as the substrate. Use a heated NaOH solution to remove the damaged layers on the front and back sides of the silicon wafer 1, and perform texturing treatment on the silicon wafer 1 to form a pyramidal texture on the front and back sides of the silicon wafer 1. Among them, the thickness of the N-type monocrystalline silicon wafer 1 is 125 - 150 μm (such as 135 μm), its resistivity is 0.5 - 1.5 Ω·cm (such as 1 Ω·cm), and the size of the N-type monocrystalline silicon wafer 1 is 182 mm × 183.75 mm.

[0072] Step 2: Introduce boron source BCl 3 on the front surface of the silicon wafer 1 for boron diffusion doping. The high-temperature promotion temperature is 850 - 950 °C (preferably 880 - 910 °C, such as 900 °C), the oxidation temperature is 1000 - 1060 °C (such as 1035 °C), and the oxidation time is 80 - 90 min (such as 85 min); after boron diffusion doping, a p+ emitter 2 is formed, and the sheet resistance of boron diffusion doping is 150 - 350 Ω / sq (preferably 200 - 280 Ω / sq, such as 260 Ω / sq).

[0073] Step 3: Use an HF solution to clean the back surface of the silicon wafer 1 to remove the BSG on the back surface of the silicon wafer 1 and the edge diffusion of the silicon wafer 1. Among them, the mass fraction of HF in the HF solution is 5% - 20% (such as 10%), and the pickling time is 0.5 - 3 min (such as 2 min).

[0074] Step 4: Use a NaOH solution with a volume concentration of 3% to polish the back surface of the silicon wafer 1. The reaction temperature is 60 °C and the reaction time is 4 min to remove the lightly doped p+ emitter 2 on the back surface of the silicon wafer 1 and the edge diffusion of the silicon wafer 1, and form a flat morphology on the back surface of the silicon wafer 1.

[0075] Step 5: Use a popaid device (plasma oxidation and plasma-assisted in-situ doping device) to first deposit a tunneling oxide layer 3 with a thickness of 0.5 - 1 nm (such as 1 nm) on the back surface of the silicon wafer 1; then, in the popaid device, the ionized argon ions form high-energy ions under the acceleration of the magnetic field and bombard the silicon target, and at the same time introduce phosphine (doping source) to deposit in-situ doped doped amorphous silicon on the back surface of the tunneling oxide layer 3, and the thickness of the doped amorphous silicon is 100 - 130 nm (such as 120 nm).

[0076] Step 6: By using the ion implantation method, hydrogen ions are implanted into the silicon wafer 1 from the back surface of the non-electrode contact area of the silicon wafer 1 to form a selective implantation layer 5 in the silicon wafer 1. Among them, the implantation dose of hydrogen ions is 3E15 atoms / cm 2 , the implantation energy is 10 KeV to 50 KeV (such as 30 KeV), and the distance between the back surface of the selective implantation layer 5 and the back surface of the silicon wafer 1 is less than or equal to 50 nm (preferably 10 - 20 nm, such as 18 nm). The structure after being processed in Step 6 is as Figure 1 shown.

[0077] Step 7: The silicon wafer 1 processed in Step 6 is annealed. The annealing temperature is 850 - 880 °C (such as 865 °C), and the annealing time is 70 - 90 min (such as 80 min). Under high-temperature annealing, phosphorus atoms are activated as substitutional impurities, and the doped amorphous silicon is transformed into doped polycrystalline silicon 4. At the same time, the activated phosphorus atoms will diffuse inward into the silicon wafer 1 to form a doped part 6 on the back of the silicon wafer 1. And through the thermal reaction, the selective implantation layer 5 gradually forms bubbles. As the bubble pressure rises, the selective implantation layer 5 will rupture and fall off, so as to locally remove the passivation contact structure in the non-electrode contact area, and the doped part 6 in the non-electrode contact area will be thinned, and a pitted and uneven matte surface 7 will be formed on the back of the doped part 6 above the selective implantation layer 5. After annealing, the peak doping concentration in the non-poly region is 1 - 5E19 cm -3 (such as 3E19 cm -3 ), and the peak doping concentration in the poly region is 1.5 - 2.5E20 cm -3 (such as 2E20 cm -3 ).

[0078] Step 8: Use a trough machine to remove the PSG formed after annealing in Step 7 with HF solution.

[0079] Step 9: Deposit an Al2O3 film 8 on the front of the p+ emitter 2 by using the ALD method: Under vacuum, the deposition temperature is 300 °C, and H 2 O, TMA and N 2 react to deposit an Al2O3 film 8 with a thickness of 1 - 10 nm (such as 5 nm).

[0080] Step 10: Use the PECVD method to deposit a front passivation and antireflection film 9 on the front of the Al2O3 film 8, and deposit a back passivation and antireflection film 10 on the back of the doped polycrystalline silicon 4 in the electrode contact area and the back of the doped part 6 in the non-electrode contact area: Under vacuum, NH 3 , N 2 O, SiH 4React to deposit a passivation and antireflection film with a thickness of 60 - 100 nm (wherein, the thickness of the front passivation and antireflection film 9 is 75 nm, and the thickness of the back passivation and antireflection film 10 is 85 nm).

[0081] Step 11: Screen-print the front electrode 11 paste and the back electrode 12 paste on the front passivation and antireflection film 9 and the back passivation and antireflection film 10 respectively, and sinter to form an ohmic contact between the front electrode 11 and the p+ emitter 2, and an ohmic contact between the back electrode 12 and the doped polysilicon 4. The widths of the front electrode 11 and the back electrode 12 are both 25 - 45 μm (such as 30 μm). After the treatment of Step 11, a solar cell with a patterned passivation contact structure of this embodiment can be obtained. See Figure 2 which is a TOPCon cell with patterned passivation contact.

[0082] Step 12: Perform light injection treatment on the TOPCon cell to improve the passivation performance of the TOPCon cell and reduce its light-induced attenuation.

[0083] Step 13: Laser-enhanced contact: Use laser-assisted sintering technology to perform post-treatment optimization on the TOPCon cell to improve the ohmic contact performance of the front electrode 11 (and / or the back electrode 12).

[0084] Comparative Example 1

[0085] A passivation contact solar cell and its preparation method of this comparative example both refer to Example 1. The difference between it and Example 1 is that:

[0086] The preparation method of a passivation contact solar cell of this comparative example omits Step 6 of Example 1 and replaces Step 7 of Example 1 with a conventional annealing step: that is, convert the doped amorphous silicon into doped polysilicon through the annealing step. In this way, a passivation contact solar cell of this comparative example can be obtained (the solar cell of this comparative example is also a TOPCon cell, but the non-electrode contact area and the electrode contact area on the back of the TOPCon cell of this comparative example both have a passivation contact structure composed of a tunneling oxide layer and doped polysilicon).

[0087] It is found through testing that: compared with the TOPCon cell of Comparative Example 1, the Eta (cell efficiency) of the TOPCon cell of Example 1 is increased by 0.18%, its Uoc (open-circuit voltage) is increased by 1.6 mV, its Isc (short-circuit current) is increased by 85 mA, and its FF (fill factor) is decreased by 0.12%.

[0088] In summary, compared with Comparative Example 1 and the existing preparation method of TOPCon cells such as the one with the publication number CN220491896U, on the basis of preparing a passivated contact structure (including a tunneling oxide layer 3 and doped amorphous silicon located on the back surface of the silicon wafer 1 in sequence) on the back surface of the silicon wafer 1, during the annealing process, hydrogen ions and / or helium ions are selectively implanted into the interior of the silicon wafer 1 in the non-electrode contact area to form a selective implantation layer 5, and the doped atoms of the doped amorphous silicon are diffused into the silicon wafer 1 through annealing to form a doped portion 6. At the same time, the selective implantation layer 5 will heat up to form bubbles and automatically crack and fall off during the annealing process, so that the passivated contact structure on the back surface of the selective implantation layer 5 is locally removed, and a pitted and uneven texture 7 is formed on the back surface of the doped portion 6 in the non-electrode contact area. Thus, the preparation method of the solar cell with a patterned passivated contact structure of the present invention has the following advantages:

[0089] (1) During the annealing process, the doped portion 6 can be formed synchronously, the passivated contact structure in the non-electrode contact area can be removed synchronously, and at the same time, a pitted and uneven texture 7 can be formed on the back surface of the doped portion 6 in the non-electrode contact area; therefore, the process of preparing a solar cell with a patterned passivated contact structure can be greatly simplified, and its manufacturing cost can be reduced.

[0090] (2) Moreover, the annealing process can effectively repair the damage to the silicon wafer 1 caused by the previous ion implantation of the selective implantation layer 5; therefore, there is no need to additionally add a process for repairing the damage to the silicon wafer 1, and the process of preparing a solar cell with a patterned passivated contact structure can be further simplified, further improving its manufacturing efficiency and reducing the manufacturing cost.

[0091] (3) Since the passivated contact structure in the non-electrode contact area (i.e., the passivated contact structure on the back surface of the selective implantation layer 5) is removed, the parasitic absorption loss caused by the doped polysilicon 4 can be effectively reduced. At the same time, since the electrode contact area has a doped portion 6 and a passivated contact structure, and the doped portion 6 remains in the non-electrode contact area, the lateral carrier transport ability inside the cell can be effectively guaranteed. And the passivated contact structure in the electrode contact area is retained, which can reduce metal recombination. Moreover, a pitted and uneven texture 7 is formed on the back surface of the doped portion 6 in the non-electrode contact area, which can further increase the optical path of light inside the silicon wafer 1 and further improve the absorption rate and utilization rate of long-wavelength light. Therefore, the preparation method of the present invention can further improve the open-circuit voltage, short-circuit current, and cell efficiency.

[0092] Although the preferred embodiments of the embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications to these embodiments once they know the basic creative concepts. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications falling within the scope of the embodiments of the present invention.

[0093] The above has introduced the technical solution provided by the present invention in detail. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A method for preparing a patterned passivation contact structure, characterized in that: The method comprises the following preparation steps: S1. Preparation of passivation contact structure: preparing tunnel oxide layer and doped amorphous silicon on the surface of silicon wafer in sequence; S2, implanting hydrogen ions and / or helium ions into the silicon wafer in the non-electrode contact area to form a selective implantation layer in the silicon wafer; S3. Annealing treatment to convert the doped amorphous silicon into doped polysilicon, and diffuse the doped atoms into the silicon wafer to form a doped portion, and the thickness of the doped portion in the silicon wafer is greater than the injection depth of the selective injection layer in the silicon wafer, and the selective injection layer forms bubbles through a thermal reaction, and as the bubble pressure rises, the selective injection layer ruptures and falls off to peel off and remove the passivation contact structure of the non-electrode contact area from the doped portion, thereby exposing the outer surface of the doped portion in the non-electrode contact area and forming an uneven velvet surface.

2. The method for preparing a patterned passivation contact structure according to claim 1, characterized in that: In step S1, the passivation contact structure includes a tunneling oxide layer with a thickness of less than 2 nm and doped amorphous silicon with a thickness of 80 to 150 nm arranged on the surface of the tunneling oxide layer; the preparation method of the passivation contact structure is plasma enhanced chemical vapor deposition and / or physical vapor deposition.

3. The method for preparing a patterned passivation contact structure according to claim 1, characterized in that: In step S2, the selective implantation layer is prepared by ion implantation, and the implantation dose of hydrogen ions and / or helium ions is 1E14-1E17 atoms / cm 2 The injection energy is 10KeV to 100KeV; the distance between the outer surface of the selective injection layer and the outer surface of the silicon wafer is 0 to 50nm.

4. The method for preparing a patterned passivation contact structure according to claim 3, characterized in that: In step S2, when hydrogen ions are injected to prepare the selective injection layer, the injection dose of hydrogen ions is 3E15 atoms / cm 2 The injection energy is 10KeV to 50KeV; the distance between the outer surface of the selective injection layer and the outer surface of the silicon wafer is 10 to 20nm.

5. The method for preparing a patterned passivation contact structure according to claim 1, characterized in that: In step S3, the annealing temperature is 800-950°C, and the annealing time is 60-120 minutes; after annealing, the peak doping concentration of the doped part of the non-electrode contact area is less than the peak doping concentration of the doped part of the electrode contact area and the passivation contact structure, and the thickness of the doped part of the non-electrode contact area is less than the thickness of the doped part of the electrode contact area.

6. The method for preparing a patterned passivation contact structure according to claim 5, characterized in that: In step S3, the annealing temperature is 850-880°C, and the annealing time is 70-90 minutes; after annealing, the peak doping concentration of the doped part of the non-electrode contact area is 1-5E19cm -3 The peak doping concentration of the doped part of the electrode contact region and the passivation contact structure is 1.5 to 2.5E20cm -3 .

7. The method for preparing a patterned passivation contact structure according to claim 1, characterized in that: Before step S1, the method further includes the following pretreatment steps: polishing the surface of the silicon wafer to form a flat morphology on the surface of the silicon wafer; polishing is performed using an alkaline solution KOH solution or NaOH solution, the volume concentration of the alkaline solution is 2-8%, the reaction temperature is 55-75° C., and the polishing time is 1-10 minutes; After step S3, the following processing steps are also included: pickling treatment to remove impurities after annealing.

8. A patterned passivation contact structure, characterized in that: It is prepared by the method for preparing a patterned passivation contact structure as described in any one of claims 1 to 7; The patterned passivation contact structure includes a silicon wafer, a surface layer of which is provided with a doped portion, and the silicon wafer is divided into a non-electrode contact area and an electrode contact area, the thickness of the doped portion in the non-electrode contact area is less than the thickness of the doped portion in the electrode contact area, and the outer surface of the doped portion in the non-electrode contact area is exposed and forms an uneven velvet surface, while the surface of the doped portion in the electrode contact area is provided with a tunneling oxide layer and doped polysilicon in sequence.

9. A method for preparing a solar cell, characterized in that: The method comprises the following preparation steps: Step 1: performing a texturing process on the silicon wafer to form a velvet surface with a pyramid structure on the surface of the silicon wafer; Step 2: performing boron diffusion doping on the silicon wafer to form a p+ emitter on the front side of the silicon wafer; Step 3: Pickling to remove impurities and the surrounding expansion layer after boron diffusion doping; Step 4: forming the patterned passivation contact structure on the back side of the silicon wafer using the method for preparing a patterned passivation contact structure according to any one of claims 1 to 7; Step 5: prepare a front passivation anti-reflection film on the front of the p+ emitter, and prepare a back passivation anti-reflection film on the back of the patterned passivation contact structure; Step 6: metallization treatment to form a front electrode that is in ohmic contact with the p+ emitter and a back electrode that is in ohmic contact with the doped polysilicon, thereby obtaining the solar cell; Step 7: Optimize and post-process the solar cell.

10. A solar cell, characterized in that: It is prepared by the method for preparing a solar cell as claimed in claim 9.

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