Preparation method of display panel, display panel and electronic device

Abstract

A method for manufacturing a display panel, a display panel, and an electronic device provided by an embodiment of the present application relate to the field of display technologies. The method includes forming a plurality of conductive pads on one side of a substrate, where the plurality of conductive pads are located in a bonding region; forming a pixel definition material layer and a first sacrificial layer on one side of the substrate, the first sacrificial layer covering at least a part of the plurality of conductive pads; patterning the pixel definition material layer including a first pixel opening to form a pixel definition layer including a second pixel opening located in a display region, and simultaneously removing the first sacrificial layer covering the plurality of conductive pads. By forming the first sacrificial layer on the conductive pads in the present application, the conductive pads are not easily damaged, thereby improving the performance of the finally formed display panel. And by removing the first sacrificial layer while forming the second pixel opening, the process cost of removing the first sacrificial layer can be reduced, and the manufacturing cycle of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and in particular, to a method for manufacturing a display panel, a display panel, and an electronic device. Background Art

[0002] Flat panel display devices based on technologies such as Organic Light Emitting Diode (OLED) and Light Emitting Diode (LED) are widely used in various consumer electronic products such as mobile phones, televisions, laptop computers, and desktop computers due to advantages such as high picture quality, power saving, thin body, and wide application range, and have become the mainstream in display panels. In the process of manufacturing traditional display panels, light-emitting pixel patterning is usually achieved through a Fine Metal Mask (FMM). The FMM technology is mature and has rich mass production experience. However, the FMM technology also has problems such as limited precision, high development cost, and long development cycle. The fine metal maskless technology eliminates the limitations of traditional OLED processes on display screen size, resolution, and other screen body performances, and has the advantages of high performance, full-domain size, and agile delivery. Patents CN118251982A, CN115666161A, CN116648095A, CN117062489A, CN118678742A, CN118785761A, CN115224220A, CN118678729A, CN118660529A, CN118660589A record the relevant content of the fine metal maskless technology for reference.

[0003] However, there are still some problems in the display panel that need to be solved urgently. Summary of the Invention

[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a method for manufacturing a display panel. The display panel includes a display area and a non-display area surrounding at least part of the display area. The non-display area includes a bonding area. The method includes:

[0005] Forming a plurality of conductive pads on one side of the substrate, and the plurality of conductive pads are located in the bonding area;

[0006] Forming a pixel defining material layer and a first sacrificial layer on one side of the substrate. At least part of the pixel defining material layer is located in the display area, and at least part of the first sacrificial layer is located in the bonding area. The first sacrificial layer covers at least part of the plurality of conductive pads;

[0007] Forming an isolation material layer on a side of the pixel defining material layer away from the substrate;

[0008] Pattern the isolation material layer to form an isolation material layer including a first isolation opening located in the display area;

[0009] Pattern the pixel defining material layer to form a pixel defining material layer including a first pixel opening located in the display area, the first pixel opening communicating with the first isolation opening;

[0010] Form a first light emitting unit at the first isolation opening;

[0011] Pattern the isolation material layer including the first isolation opening to form an isolation structure including a first isolation opening and a second isolation opening;

[0012] Pattern the pixel defining material layer including the first pixel opening to form a pixel defining layer including a second pixel opening located in the display area, while removing the first sacrificial layer covering the plurality of conductive pads, the second pixel opening communicating with the second isolation opening;

[0013] Form a second light emitting unit at the second isolation opening.

[0014] In some possible embodiments, before the step of forming the isolation material layer on a side of the pixel defining material layer away from the substrate, further include:

[0015] Pattern the pixel defining material layer to form a pixel defining material layer including vias located in the non-display area;

[0016] Pattern the pixel defining material layer including the vias to form a pixel defining material layer including a first pixel blind hole, a second pixel blind hole, and a third pixel blind hole in the display area, while removing a part of the first sacrificial layer to make the thickness of the first sacrificial layer equal to the thickness of the pixel defining material layer at the second pixel blind hole;

[0017] Preferably, along the thickness direction of the substrate, the thicknesses of the pixel defining material layer at the first pixel blind hole, the pixel defining material layer at the second pixel blind hole, and the pixel defining material layer at the third pixel blind hole are all equal;

[0018] Preferably, after the step of forming the pixel defining material layer including the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole, along the thickness direction of the substrate, the thickness of the first sacrificial layer is greater than or equal to 500 Å and less than or equal to 1000 Å;

[0019] Preferably, after the step of forming a pixel defining material layer including a first pixel blind hole, a second pixel blind hole, and a third pixel blind hole, a first step is formed at the junction of the first sacrificial layer and the pixel defining material layer;

[0020] Preferably, the pixel defining material layer and the first sacrificial layer are of the same layer and the same material;

[0021] Preferably, before the step of forming a pixel defining material layer and a first sacrificial layer on one side of the substrate, further comprising:

[0022] Forming a plurality of first electrodes arranged at intervals on one side of the substrate, and the orthographic projections of the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole on the substrate are respectively located within the orthographic projections of the corresponding first electrodes on the substrate.

[0023] In some possible embodiments, before the step of forming a pixel defining material layer and a first sacrificial layer on one side of the substrate, further comprising:

[0024] Forming a power supply trace on one side of the substrate, and at least a part of the power supply trace is located in the non-display area;

[0025] Preferably, the step of forming an isolation material layer on the side of the pixel defining material layer away from the substrate includes:

[0026] Forming an isolation material layer on one side of the substrate, and simultaneously forming a second sacrificial layer on the side of the first sacrificial layer away from the substrate. The orthographic projection of the second sacrificial layer on the substrate covers the orthographic projections of the plurality of conductive pads on the substrate, and the isolation material layer is electrically connected to the power supply trace through the via hole.

[0027] In some possible embodiments, the step of patterning the pixel defining material layer to form a pixel defining material layer including a first pixel opening located in the display area includes:

[0028] Patterning the pixel defining material layer including the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole to form a pixel defining material layer including a first pixel opening, the second pixel blind hole, and the third pixel blind hole;

[0029] The step of forming a first light-emitting unit at the first isolation opening includes:

[0030] Sequentially forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer corresponding to the first light-emitting unit at the first isolation opening. The light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the first light-emitting unit extend to the side of the isolation material layer and the second sacrificial layer away from the substrate;

[0031] Pattern the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the first light-emitting unit to form the first light-emitting unit at the first isolation opening and form a first encapsulation unit on the side of the first light-emitting unit away from the substrate.

[0032] In some possible implementation manners, before the step of patterning the isolation material layer including the first isolation opening to form an isolation structure including a first isolation opening and a second isolation opening, it further includes:

[0033] Pattern the isolation material layer including the first isolation opening to form an isolation material layer including a first isolation opening and a third isolation opening;

[0034] Pattern the pixel definition material layer including the first pixel opening, the second pixel blind hole, and the third pixel blind hole to form a pixel definition material layer including a first pixel opening, a third pixel opening, and the second pixel blind hole, where the third pixel opening communicates with the third isolation opening;

[0035] Form the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the third light-emitting unit at the third isolation opening in sequence, and the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the third light-emitting unit extend to the side of the isolation material layer, the first light-emitting unit, and the second sacrificial layer away from the substrate;

[0036] Pattern the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the third light-emitting unit to form the third light-emitting unit at the third isolation opening and form a third encapsulation unit on the side of the third light-emitting unit away from the substrate.

[0037] In some possible implementation manners, the step of patterning the isolation material layer including the first isolation opening to form an isolation structure including a first isolation opening and a second isolation opening includes:

[0038] Pattern the isolation material layer including the first isolation opening and the third isolation opening to form an isolation structure including a first isolation opening, a third isolation opening, and a second isolation opening, and remove the second sacrificial layer at the same time.

[0039] In some possible implementation manners, the step of patterning the pixel definition material layer including the first pixel opening to form a pixel definition layer including a second pixel opening located in the display area and removing the first sacrificial layer covering the plurality of conductive pads at the same time includes:

[0040] Patterning the pixel defining material layer including the first pixel opening, the third pixel opening, and the second pixel blind via to form a pixel defining layer including the first pixel opening, the second pixel opening, and the third pixel opening, while removing the first sacrificial layer covering the plurality of conductive pads, and the remaining first sacrificial layer forms a sacrificial retention portion.

[0041] In some possible embodiments, the step of forming the second light emitting unit at the second isolation opening includes:

[0042] Sequentially forming a light emitting material layer, a second electrode material layer, and a first encapsulation material layer corresponding to the second light emitting unit at the second isolation opening, and the light emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the second light emitting unit extend to the side of the isolation structure, the first light emitting unit, the third light emitting unit, and the plurality of conductive pads away from the substrate;

[0043] Patterning the light emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the second light emitting unit to form the second light emitting unit at the second isolation opening.

[0044] In some possible embodiments, before the step of forming the pixel defining material layer and the first sacrificial layer on one side of the substrate, it further includes:

[0045] Forming an insulating layer on one side of the substrate, the insulating layer includes an insulating portion located between adjacent two conductive pads, and the insulating portion extends to cover a part of the conductive pads.

[0046] In some possible embodiments, the step of forming the insulating layer on one side of the substrate includes:

[0047] Forming an insulating material layer on one side of the substrate;

[0048] Patterning the insulating material layer to form a planarization layer located in the display area and an insulating layer located in the bonding area.

[0049] In some possible embodiments, after the step of patterning the pixel defining material layer including the first pixel opening to form a pixel defining layer including the second pixel opening located in the display area, while removing the first sacrificial layer covering the plurality of conductive pads, it further includes:

[0050] At least removing the insulating layer covering the plurality of conductive pads and removing the insulating layer between adjacent two of the conductive pads.

[0051] In some possible embodiments, the present application further provides a display panel, which is prepared by the method for preparing a display panel described in the present application.

[0052] In some possible embodiments, the present application further provides a display panel. The display panel includes a display area and a non-display area surrounding at least a part of the display area. The non-display area includes a bonding area. The display panel includes:

[0053] A substrate;

[0054] A plurality of conductive pads, located on one side of the substrate, and the plurality of conductive pads are located in the bonding area;

[0055] A pixel definition layer, located on one side of the substrate, and at least a part of the pixel definition layer is located in the display area;

[0056] A sacrificial retention part, at least a part of which is located in the non-display area. The orthographic projection of the sacrificial retention part on the substrate is outside the orthographic projection of the conductive pad on the substrate. There is a first step at the junction of the pixel definition layer and the sacrificial retention part;

[0057] An isolation structure, located on the side of the pixel definition layer away from the substrate, and the isolation structure encloses a plurality of isolation openings;

[0058] A plurality of light-emitting units, at least a part of the light-emitting units are located at the isolation openings.

[0059] In some possible embodiments, along the thickness direction of the substrate, the thickness of the sacrificial retention part is less than the thickness of the pixel definition layer;

[0060] Preferably, along the thickness direction of the substrate, the difference between the thickness of the pixel definition layer and the thickness of the sacrificial retention part is greater than or equal to 2500 Å and less than or equal to 4000 Å;

[0061] Preferably, along the thickness direction of the substrate, the thickness of the sacrificial retention part is greater than or equal to 500 Å and less than or equal to 1000 Å;

[0062] Preferably, along the thickness direction of the substrate, the thickness of the pixel definition layer is greater than or equal to 3000 Å and less than or equal to 5000 Å;

[0063] Preferably, at least a part of the sacrificial retention part is located in the bonding area;

[0064] Preferably, the sacrificial retention part and the pixel definition layer are of the same layer and the same material.

[0065] In some possible embodiments, the present application further provides an electronic device, and the electronic device includes the display panel described in the present application.

[0066] Compared with the prior art, the present application has the following beneficial effects:

[0067] A method for manufacturing a display panel, a display panel, and an electronic device provided by the present application can make the conductive pads not easily damaged by forming a first sacrificial layer on the conductive pads, thereby improving the performance of the finally formed display panel, and by removing the first sacrificial layer while forming the second pixel opening, the process cost of removing the first sacrificial layer can be reduced, and the manufacturing cycle of the display panel can be improved. Description of the Drawings

[0068] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0069] Figure 1 It is a schematic flow chart of a method for manufacturing a display panel provided by an embodiment of the present application;

[0070] Figure 2 It is a top view schematic diagram of a display panel provided by an embodiment of the present application;

[0071] Figure 3 It is a cross-sectional schematic diagram of forming a plurality of conductive pads on one side of a substrate provided by an embodiment of the present application;

[0072] Figure 4 It is a cross-sectional schematic diagram of forming a pixel defining material layer and a first sacrificial layer on one side of a substrate provided by an embodiment of the present application;

[0073] Figure 5 It is a cross-sectional schematic diagram of forming an isolation material layer on the side of the pixel defining material away from the substrate provided by an embodiment of the present application;

[0074] Figure 6 It is one of the cross-sectional schematic diagrams of forming a first isolation opening on the isolation material layer by patterning the isolation material layer provided by an embodiment of the present application;

[0075] Figure 7 It is one of the cross-sectional schematic diagrams of forming a first pixel opening on the pixel defining material layer by patterning the pixel defining material layer provided by an embodiment of the present application;

[0076] Figure 8Schematic cross-sectional view of forming a first light-emitting unit at a first isolation opening provided by an embodiment of the present application;

[0077] Figure 9 One of the schematic cross-sectional views of forming a second isolation opening on an isolation material layer by a patterned isolation material layer provided by an embodiment of the present application;

[0078] Figure 10 One of the schematic cross-sectional views of forming a second pixel opening on a pixel defining material layer by a patterned pixel defining material layer provided by an embodiment of the present application;

[0079] Figure 11 Schematic cross-sectional view of forming a second light-emitting unit at a second isolation opening provided by an embodiment of the present application;

[0080] Figure 12 Schematic cross-sectional view of forming an insulating material layer on one side of a substrate provided by an embodiment of the present application;

[0081] Figure 13 Schematic cross-sectional view after patterning the insulating material layer provided by an embodiment of the present application;

[0082] Figure 14 Schematic cross-sectional view of forming a power supply trace on one side of a substrate provided by an embodiment of the present application;

[0083] Figure 15 One of the schematic cross-sectional views of forming a pixel defining material layer on the side of a planarization layer away from the substrate provided by an embodiment of the present application;

[0084] Figure 16 Another one of the schematic cross-sectional views of forming a pixel defining material layer on the side of a planarization layer away from the substrate provided by an embodiment of the present application;

[0085] Figure 17 Schematic cross-sectional view after patterning the pixel defining material layer provided by an embodiment of the present application;

[0086] Figure 18 Schematic cross-sectional view after patterning the pixel defining material layer including a via provided by an embodiment of the present application;

[0087] Figure 19 One of the schematic cross-sectional views of forming an isolation material layer on one side of a substrate provided by an embodiment of the present application;

[0088] Figure 20 Another one of the schematic cross-sectional views of forming an isolation material layer on one side of a substrate provided by an embodiment of the present application;

[0089] Figure 21Schematic cross-sectional view II of the patterned isolation material layer provided by the embodiment of the present application for forming a first isolation opening on the isolation material layer;

[0090] Figure 22 Schematic cross-sectional view II of the patterned pixel defining material layer provided by the embodiment of the present application for forming a first pixel opening on the pixel defining material layer;

[0091] Figure 23 Schematic cross-sectional view of successively forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer of a first light-emitting unit at the first isolation opening provided by the embodiment of the present application;

[0092] Figure 24 Schematic cross-sectional view after patterning the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer of the first light-emitting unit provided by the embodiment of the present application;

[0093] Figure 25 Schematic cross-sectional view of the isolation material layer of the patterned isolation material layer forming a third isolation opening provided by the embodiment of the present application;

[0094] Figure 26 Schematic cross-sectional view of the patterned pixel defining material layer forming a third pixel opening provided by the embodiment of the present application;

[0095] Figure 27 Schematic cross-sectional view of successively forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer of a third light-emitting unit at the third isolation opening provided by the embodiment of the present application;

[0096] Figure 28 Schematic cross-sectional view after patterning the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer of the third light-emitting unit provided by the embodiment of the present application;

[0097] Figure 29 Schematic cross-sectional view II of the patterned isolation material layer forming a second isolation opening provided by the embodiment of the present application;

[0098] Figure 30 Schematic cross-sectional view II of the patterned pixel defining material layer forming a second pixel opening provided by the embodiment of the present application;

[0099] Figure 31 Schematic cross-sectional view of successively forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer of a second light-emitting unit at the second isolation opening provided by the embodiment of the present application;

[0100] Figure 32 Schematic cross-sectional view after patterning the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer of the second light-emitting unit provided by the embodiment of the present application;

[0101] Figure 33 Cross-sectional schematic diagram after removing the insulating layer provided by the embodiment of the present application;

[0102] Figure 34 Top view schematic diagram of the bonding area provided by the embodiment of the present application;

[0103] Figure 35 Provided by the embodiment of the present application Figure 34 Cross-sectional schematic diagram at A-A in

[0104] Reference numerals: 1, substrate; 2, conductive pad; 3, first electrode; 4, pixel defining material layer; 41, via hole; 42, first pixel blind hole; 43, third pixel blind hole; 44, second pixel blind hole; 5, first sacrificial layer; 51, sacrificial retention part; 6, isolation material layer; 7, first isolation opening; 8, first pixel opening; 9, first light-emitting unit; 10, second isolation opening; 11, isolation structure; 111, first isolation part; 112, second isolation part; 12, pixel defining layer; 13, second pixel opening; 14, second light-emitting unit; 15, insulating material layer; 16, planarization layer; 17, insulating part; 18, power supply trace; 19, first step; 20, third pixel opening; 21, second sacrificial layer; 22, light-emitting material layer; 23, second electrode material layer; 24, first encapsulation material layer; 25, first encapsulation unit; 26, third isolation opening; 27, third encapsulation unit; 28, third light-emitting unit; 29, second encapsulation unit. Detailed implementation manners

[0105] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0106] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application that is claimed, but merely represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts fall within the scope of protection of the present application.

[0107] It should be noted that: similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0108] In the description of the present application, it should be noted that the orientation or positional relationship indicated by terms such as "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the inventive product is customarily placed during use. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application. In addition, terms such as "first", "second", "third", etc. are only used for differential description and cannot be construed as indicating or implying relative importance.

[0109] It should be noted that, without conflict, different features in the embodiments of the present application can be combined with each other.

[0110] Improving the density of light-emitting units in a display panel (i.e., pixel density) is an important way to improve the display effect. However, currently, the display panel fabricated by using the Fine Metal Mask (FMM) technology is limited by the technology and cannot further increase the density of light-emitting units. To solve the technical problem that the density of light-emitting units cannot be further improved, an isolation structure is provided in some display panels. When the light-emitting layer and the second electrode are deposited in a whole layer, the light-emitting layer and the second electrode can be disconnected at the isolation structure, and light-emitting units of different colors can be formed in different isolation openings through multiple deposition and multiple etching processes (i.e., light-emitting unit patterning).

[0111] The display panel in the related art includes a display area and a non-display area surrounding at least part of the display area. The non-display area includes a bonding area. The display panel includes a substrate and a conductive pad located on one side of the substrate. During the process of forming the display panel, for example, when patterning the light-emitting units, the conductive pad is easily damaged, thereby affecting the bonding effect of the display panel and ultimately affecting the performance of the display panel.

[0112] To solve the above-mentioned technical problems, the specific implementation solutions of the present application will be described in detail below with reference to the drawings.

[0113] Please refer to Figure 1 and Figure 2 , this embodiment provides a method for manufacturing a display panel. The display panel includes a display area AA and a non-display area AB surrounding at least part of the display area AA. The non-display area AB includes a bonding area AB1. The method includes:

[0114] S10: Form a plurality of conductive pads 2 on one side of the substrate 1, and the plurality of conductive pads 2 are located in the bonding area AB1.

[0115] Please refer to Figure 3, a plurality of conductive pads 2 are formed on one side of the substrate 1. The plurality of conductive pads 2 may include a first conductive pad and a second conductive pad. One of the first conductive pad and the second conductive pad is used for chip bonding, and the other is used for bonding with a flexible circuit board.

[0116] S11: A pixel defining material layer 4 and a first sacrificial layer 5 are formed on one side of the substrate 1. At least a part of the pixel defining material layer 4 is located in the display area AA, and at least a part of the first sacrificial layer 5 is located in the bonding area AB1. The first sacrificial layer 5 covers at least a part of the plurality of conductive pads 2.

[0117] Please refer to Figure 4 , a pixel defining material layer 4 and a first sacrificial layer 5 are formed on one side of the substrate 1. The first sacrificial layer 5 can protect at least a part of the plurality of conductive pads 2.

[0118] S12: An isolation material layer 6 is formed on the side of the pixel defining material away from the substrate 1.

[0119] Please refer to Figure 5 , an isolation material layer 6 is formed on the side of the pixel defining material layer 6 away from the substrate 1. The isolation material layer 6 has conductivity.

[0120] S13: The isolation material layer 6 is patterned to form an isolation material layer 6 including a first isolation opening 7 located in the display area AA.

[0121] Please refer to Figure 6 , the isolation material layer 6 is patterned to form a first isolation opening 7 on the isolation material layer 6.

[0122] S14: The pixel defining material layer 4 is patterned to form a pixel defining material layer 4 including a first pixel opening 8 located in the display area AA. The first pixel opening 8 communicates with the first isolation opening 7.

[0123] Please refer to Figure 7 , the pixel defining material layer 4 is patterned to form a first pixel opening 8 communicating with the first isolation opening 7 on the pixel defining material layer 4. The orthographic projection of the first pixel opening 8 on the substrate 1 is located within the orthographic projection of the first isolation opening 7 on the substrate 1.

[0124] S15: A first light-emitting unit 9 is formed at the first isolation opening 7.

[0125] Please refer to Figure 8 , a first light-emitting unit 9 is formed at the first isolation opening 7. During the process of forming the first light-emitting unit 9, the related materials of the first light-emitting unit 9 will be etched. Since the first sacrificial layer 5 covers the conductive pads 2, it is not easy to damage the conductive pads 2 when etching the related materials of the first light-emitting unit 9.

[0126] S16: Pattern the isolation material layer 6 including the first isolation opening 7 to form an isolation structure 11 including the first isolation opening 7 and the second isolation opening 10.

[0127] Please refer to Figure 9 , pattern the isolation material layer 6 to form a second isolation opening 10 on the isolation material layer 6, and the second isolation opening 10 is the last isolation opening provided on the isolation material layer 6. The isolation structure 11 includes a first isolation portion 111 and a second isolation portion 112 that are sequentially stacked in a direction away from the substrate 1, and a positive projection of the side of the first isolation portion 111 away from the substrate 1 on the substrate 1 is located within a positive projection of the second isolation portion 112 on the substrate 1.

[0128] Since the second isolation portion 112 is located on the side of the first isolation portion 111 away from the substrate 1, and in a plane parallel to the plane where the substrate 1 is located, the lateral width of the second isolation portion 112 is greater than the lateral width of the first isolation portion 111, so the second isolation portion 112 will disconnect the materials of the light-emitting units at the isolation structure 11. Thus, the isolation structure 11 formed by the first isolation portion 111 and the second isolation portion 112 can more easily encapsulate each light-emitting unit independently, thereby improving the encapsulation yield of the display panel.

[0129] S17: Pattern the pixel defining material layer 4 including the first pixel opening 8 to form a pixel defining layer 12 including a second pixel opening 13 located in the display area AA, and at the same time remove the first sacrificial layer 5 covering the plurality of conductive pads 2, and the second pixel opening 13 communicates with the second isolation opening 10.

[0130] Please refer to Figure 10 , pattern the pixel defining material layer 4 to form a second pixel opening 13 communicating with the second isolation opening 10 on the pixel defining material layer 4. A positive projection of the second pixel opening 13 on the substrate 1 is located within a positive projection of the second isolation opening 10 on the substrate 1, and the second pixel opening 13 is the last pixel opening provided on the pixel defining material layer 4.

[0131] When forming the last pixel opening on the pixel defining material layer 4, the first sacrificial layer 5 covering the conductive pads 2 is removed. In this way, there is no need to set a dedicated process to remove the first sacrificial layer 5, thereby reducing the process complexity and cost of removing the first sacrificial layer 5 and reducing the production cycle of the display panel.

[0132] S18: Form a second light-emitting unit 14 at the second isolation opening 10.

[0133] Please refer to Figure 11 , form a second light-emitting unit 14 at the second isolation opening 10, and the second light-emitting unit 14 is the last type of light-emitting unit formed by the display panel.

[0134] Although there is a risk of etching the conductive pad 2 during the formation of the second light-emitting unit 14, it is not easy to damage the conductive pad 2 through only one light-emitting unit patterning.

[0135] Based on the above design, in this embodiment, before forming the isolation opening, the pixel opening, and the first light-emitting unit 9 by the above method, the conductive pad 2 is covered with a first sacrificial layer 5. The first sacrificial layer 5 has a protective effect on the conductive pad 2, and it is not easy to damage the conductive pad 2 during the formation of the isolation opening, the pixel opening, and the first light-emitting unit 9. Thereby, the bonding effect between the conductive pad 2 and the chip and the flexible circuit board can be improved, and further, the performance of the finally formed display panel can be improved.

[0136] In addition, during the formation of the second pixel opening 13, the first sacrificial layer 5 covering the conductive pad 2 is removed. In this way, there is no need to set up a dedicated process to remove the first sacrificial layer 5, thereby reducing the process complexity and cost of removing the first sacrificial layer 5, and reducing the production cycle of the display panel.

[0137] The preparation process of the display panel in the present application is introduced in detail below.

[0138] In some possible implementation manners, before the step of forming the pixel defining material layer 4 and the first sacrificial layer 5 on one side of the substrate 1, it further includes:

[0139] An insulating layer is formed on one side of the substrate 1. The insulating layer includes an insulating portion 17 located between two adjacent conductive pads 2, and the insulating portion 17 extends to cover a part of the conductive pad 2.

[0140] Specifically, please refer to Figure 12 , an insulating material layer 15 is formed on one side of the substrate 1. The insulating material layer 15 extends from the display area AA to the bonding area AB1, and the insulating material layer 15 located in the bonding area AB1 covers the conductive pad 2.

[0141] Please refer to Figure 13 , the insulating material layer 15 is patterned to form a planarization layer 16 located in the display area AA and an insulating layer located in the bonding area AB1. The insulating layer exposes at least a part of the conductive pad 2.

[0142] The planarization layer 16 and the insulating layer are formed by the same process, thereby reducing the process cost of forming the planarization layer 16 and the insulating layer.

[0143] Please refer to Figure 14 , a power supply trace 18 is formed on one side of the substrate 1. At least a part of the power supply trace 18 is located in the non-display area AB; the planarization layer 16 extends to the non-display area AB, and the power supply trace 18 is formed on the side of the planarization layer 16 away from the substrate 1 in the non-display area AB.

[0144] Please refer to Figure 15 and Figure 16 , a pixel defining material layer 4 is formed on the side of the planarization layer 16 away from the substrate 1. The pixel defining material layer 4 extends to the non-display area AB and the bonding area AB1. The pixel defining material layer 4 in the non-display area AB covers the power trace 18, and the pixel defining material layer 4 in the bonding area AB1 covers the conductive pad 2.

[0145] Before forming the pixel defining material layer 4, a plurality of first electrodes 3 arranged at intervals are also formed on the side of the planarization layer 16 away from the substrate 1. The first electrode 3 can be an anode.

[0146] Please refer to Figure 17 , the pixel defining material layer 4 is patterned to form a pixel defining material layer 4 including a via 41 in the non-display area AB, and the via 41 exposes a part of the power trace 18.

[0147] Please refer to Figure 18 , the pixel defining material layer 4 including the via 41 is patterned to form a pixel defining material layer 4 including a first pixel blind hole 42, a second pixel blind hole 44, and a third pixel blind hole 43 in the display area AA. At the same time, a part of the first sacrificial layer 5 is removed so that the thickness of the first sacrificial layer 5 is equal to the thickness of the pixel defining material layer 4 at the second pixel blind hole 44.

[0148] The pixel defining material layer 4 is secondarily patterned to thin a part of the pixel defining material layer 4 in the display area AA to form a first pixel blind hole 42, a second pixel blind hole 44, and a third pixel blind hole 43. The orthographic projections of the first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43 on the substrate 1 are respectively located within the orthographic projections of the corresponding first electrodes 3 on the substrate 1. At the same time, the first sacrificial layer 5 covering the conductive pad 2 is thinned so that the thickness D1 of the pixel defining material layer 4 between the second pixel blind hole 44 and the corresponding first electrode 3 is equal to the thickness D2 of the first sacrificial layer 5.

[0149] Optionally, along the thickness direction Z of the substrate 1, the thicknesses of the pixel defining material layer 4 at the first pixel blind hole 42, the thickness of the pixel defining material layer 4 at the second pixel blind hole 44, and the thickness of the pixel defining material layer 4 at the third pixel blind hole 43 are all equal.

[0150] The first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43 are formed by the same process. Therefore, the thickness of the pixel defining material layer 4 between the first pixel blind hole 42 and the corresponding first electrode 3, the thickness of the pixel defining material layer 4 between the second pixel blind hole 44 and the corresponding first electrode 3, and the thickness of the pixel defining material layer 4 between the third pixel blind hole 43 and the corresponding first electrode 3 are all equal.

[0151] The pixel defining material layer 4 between the first pixel blind hole 42 and the corresponding first electrode 3 can protect the corresponding first electrode 3. The pixel defining material layer 4 between the second pixel blind hole 44 and the corresponding first electrode 3 can protect the corresponding first electrode 3. The pixel defining material layer 4 between the third pixel blind hole 43 and the corresponding first electrode 3 can protect the corresponding first electrode 3, which can avoid damaging the first electrode 3 in subsequent processes.

[0152] While forming the first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43, the thickness of the first sacrificial layer 5 is thinned, so that there is no need to set a dedicated process to thin the thickness of the first sacrificial layer 5.

[0153] Optionally, after the step of forming the pixel defining material layer 4 including the first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43, along the thickness direction Z of the substrate 1, the thickness D2 of the first sacrificial layer 5 is greater than or equal to 500 Å and less than or equal to 1000 Å. For example, the thickness D2 can be 500 Å, 600 Å, 700 Å, 800 Å, 900 Å, or 1000 Å, etc. Reasonably setting the thickness D2 can not only effectively protect the conductive pad 2 by the first sacrificial layer 5, but also facilitate removing the first sacrificial layer 5 in subsequent processes.

[0154] Optionally, after the step of forming the pixel defining material layer 4 including the first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43, a first step 19 is formed at the junction of the first sacrificial layer 5 and the pixel defining material layer 4. The first step 19 can reduce the step difference between the first sacrificial layer 5 and the pixel defining material layer 4, so that the film layer formed at the junction of the first sacrificial layer 5 and the pixel defining material layer 4 can be smoother.

[0155] Optionally, the pixel defining material layer 4 and the first sacrificial layer 5 are of the same layer and the same material; the pixel defining material layer 4 and the first sacrificial layer 5 are formed by the same process, thereby reducing the process cost of forming the pixel defining material layer 4 and the first sacrificial layer 5.

[0156] Please refer to Figure 19 and Figure 20 , an isolation material layer 6 is formed on one side of the substrate 1, and at the same time, a second sacrificial layer 21 is formed on the side of the first sacrificial layer 5 away from the substrate 1. The orthographic projection of the second sacrificial layer 21 on the substrate 1 covers the orthographic projection of a plurality of conductive pads 2 on the substrate 1. The isolation material layer 6 is electrically connected to the power trace 18 through the via 41.

[0157] An isolation material layer 6 is formed on the side of the pixel defining material layer 4 away from the substrate 1. The isolation material layer 6 located on the side of the power supply trace 18 away from the substrate 1 is electrically connected to the power supply trace 18 through a via 41. In this way, the power signal of the power supply trace 18 can be transmitted to the display area AA through the isolation material layer 6.

[0158] The isolation material layer 6 extending to the side of the first sacrificial layer 5 away from the substrate 1 forms a second sacrificial layer 21 covering the first sacrificial layer 5. The second sacrificial layer 21 can protect the first sacrificial layer 5 and the conductive pad 2. Forming the second sacrificial layer 21 while forming the isolation material layer 6 can reduce the process cost of forming the second sacrificial layer 21.

[0159] Please refer to Figure 21 , Pattern the isolation material layer 6, and form a first isolation opening 7 on the isolation material layer 6. The first isolation opening 7 communicates with the first pixel blind hole 42.

[0160] Please refer to Figure 22 , Pattern the pixel defining material layer 4 including the first pixel blind hole 42, the second pixel blind hole 44, and the third pixel blind hole 43 to form a pixel defining material layer 4 including a first pixel opening 8, the second pixel blind hole 44, and the third pixel blind hole 43. That is, remove the pixel defining material layer 4 between the first pixel blind hole 42 and the corresponding first electrode 3 to form the first pixel opening 8.

[0161] Please refer to Figure 23 , At the first isolation opening 7, sequentially form a light-emitting material layer 22, a second electrode material layer 23, and a first encapsulation material layer 24 corresponding to the first light-emitting unit 9. The light-emitting material layer 22, the second electrode material layer 23, and the first encapsulation material layer 24 corresponding to the first light-emitting unit 9 extend to the side of the isolation material layer 6 and the second sacrificial layer 21 away from the substrate 1.

[0162] Please refer to Figure 24 , Pattern the light-emitting material layer 22, the second electrode material layer 23, and the first encapsulation material layer 24 corresponding to the first light-emitting unit 9 to form the first light-emitting unit 9 at the first isolation opening 7 and form a first encapsulation unit 25 located on the side of the first light-emitting unit 9 away from the substrate 1.

[0163] When patterning the light-emitting material layer 22, the second electrode material layer 23, and the first encapsulation material layer 24 of the first light-emitting unit 9, the light-emitting material layer 22, the second electrode material layer 23, and the first encapsulation material layer 24 of the first light-emitting unit 9 on the side of the second sacrificial layer 21 away from the substrate 1 will be removed. During this process, the first sacrificial layer 5 and the second sacrificial layer 21 will protect the conductive pad 2. Therefore, during the formation of the first light-emitting unit 9, it is not easy to damage the conductive pad 2.

[0164] Please refer toFigure 25 , patterning the isolation material layer 6 including the first isolation opening 7 to form an isolation material layer 6 including the first isolation opening 7 and the third isolation opening 26.

[0165] Please refer to Figure 26 , patterning the pixel defining material layer 4 including the first pixel opening 8, the second pixel blind hole 44 and the third pixel blind hole 43 to form a pixel defining material layer 4 including the first pixel opening 8, the third pixel opening 20 and the second pixel blind hole 44, and the third pixel opening 20 communicates with the third isolation opening 26. That is, removing the pixel defining material layer 4 between the third pixel blind hole 43 and the corresponding first electrode 3 to form the third pixel opening 20.

[0166] Please refer to Figure 27 , sequentially forming a light emitting material layer 22, a second electrode material layer 23 and a first encapsulation material layer 24 corresponding to the third light emitting unit 28 at the third isolation opening 26, and the light emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 corresponding to the third light emitting unit 28 extend to the side of the isolation material layer 6, the first light emitting unit 9 and the second sacrificial layer 21 away from the substrate 1.

[0167] Please refer to Figure 28 , patterning the light emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 corresponding to the third light emitting unit 28 to form the third light emitting unit 28 at the third isolation opening 26 and form a third encapsulation unit 27 on the side of the third light emitting unit 28 away from the substrate 1.

[0168] When patterning the light emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 of the third light emitting unit 28, the light emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 of the third light emitting unit 28 on the side of the second sacrificial layer 21 away from the substrate 1 are removed. During this process, the first sacrificial layer 5 and the second sacrificial layer 21 protect the conductive pad 2. Therefore, during the formation of the third light emitting unit 28, it is not easy to damage the conductive pad 2.

[0169] Please refer to Figure 29 , patterning the isolation material layer 6 including the first isolation opening 7 and the third isolation opening 26 to form an isolation structure 11 including the first isolation opening 7, the third isolation opening 26 and the second isolation opening 10, and at the same time removing the second sacrificial layer 21.

[0170] When forming the last isolation opening, the second sacrificial layer 21 is removed. In this way, there is no need to set up a special process to remove the second sacrificial layer 21, thereby reducing the process cost of removing the second sacrificial layer 21.

[0171] Please refer to Figure 30, patterning the pixel defining material layer 4 including the first pixel opening 8, the third pixel opening 20 and the second pixel blind hole 44 to form a pixel defining layer 12 including the first pixel opening 8, the second pixel opening 13 and the third pixel opening 20, while removing the first sacrificial layer 5 covering the plurality of conductive pads 2, and the remaining first sacrificial layer 5 forms a sacrificial retention portion 51. That is, removing the pixel defining material layer 4 between the second pixel blind hole 44 and the corresponding first electrode 3 to form the second pixel opening 13.

[0172] When forming the last pixel opening, the first sacrificial layer 5 covering the plurality of conductive pads 2 is removed, and the remaining part of the first sacrificial layer 5 is the sacrificial retention portion 51, and a first step 19 is formed at the junction of the sacrificial retention portion 51 and the pixel defining layer 12. In this way, there is no need to set up a dedicated process to remove the first sacrificial layer 5, thereby reducing the process cost of removing the first sacrificial layer 5.

[0173] Please refer to Figure 31 , sequentially forming a light-emitting material layer 22, a second electrode material layer 23 and a first encapsulation material layer 24 corresponding to the second light-emitting unit at the second isolation opening 10, and the light-emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 corresponding to the second light-emitting unit extend to the side of the isolation structure 11, the first light-emitting unit 9, the third light-emitting unit 28 and the plurality of conductive pads 2 away from the substrate 1.

[0174] Since there is a first step 19 on the pixel defining layer 12 in the bonding area AB1, the step difference of the second electrode material layer 23 of the second light-emitting unit 14 at the first step 19 is smaller, and the second electrode material layer 23 of the second light-emitting unit 14 is flatter at the first step 19.

[0175] Please refer to Figure 32 , patterning the light-emitting material layer 22, the second electrode material layer 23 and the first encapsulation material layer 24 corresponding to the second light-emitting unit 14 to form the second light-emitting unit 14 and a second encapsulation unit 29 located on the side of the second light-emitting unit 14 away from the substrate 1 at the second isolation opening 10.

[0176] Since the second electrode material layer 23 of the second light-emitting unit 14 is flatter at the first step 19, when removing the first encapsulation material layer 24 of the second light-emitting unit 14, the second electrode material layer 23 of the second light-emitting unit 14 can better protect the conductive pads 2, thereby reducing the risk of damage to the conductive pads 2.

[0177] Please refer to Figure 33 , at least removing the insulating layer covering the plurality of conductive pads 2 and removing the insulating layer between adjacent two conductive pads.

[0178] After forming the first light-emitting unit 9, the third light-emitting unit 28, and the second light-emitting unit 14, the insulating portion 17 located between two adjacent conductive pads 2 can be removed to better expose the conductive pads 2, so that the chip and the flexible circuit board can be more effectively bonded.

[0179] In summary, in this embodiment, the first light-emitting unit 9, the third light-emitting unit 28, and the second light-emitting unit 14 are prepared in this order. The first light-emitting unit 9, the third light-emitting unit 28, and the second light-emitting unit 14 have different light-emitting colors. For example, the light-emitting color of the first light-emitting unit 9 can be blue, the light-emitting color of the third light-emitting unit 28 can be green, and the light-emitting color of the second light-emitting unit 14 can be red. The first light-emitting unit 9, the third light-emitting unit 28, and the second light-emitting unit 14 all include a first electrode 3, a light-emitting functional portion, and a second electrode that are sequentially stacked in a direction away from the substrate 1. Among them, the second electrode can be a cathode.

[0180] During the formation of the first light-emitting unit 9 and the third light-emitting unit 28, a first sacrificial layer 5 and a second sacrificial layer 21 are provided on the side of the conductive pad 2 away from the substrate 1. The first sacrificial layer 5 and the second sacrificial layer 21 can protect the conductive pad 2. Therefore, during the formation of the first light-emitting unit 9 and the third light-emitting unit 28, the conductive pad 2 is not easily damaged.

[0181] Since there is a first step 19 on the pixel defining layer 12 in the bonding area AB1, the step difference of the second electrode material layer 23 of the second light-emitting unit 14 at the first step 19 is small, and the second electrode material layer 23 of the second light-emitting unit 14 is flatter at the first step 19. When removing the first encapsulation material layer 24 of the second light-emitting unit 14, the second electrode material layer 23 of the second light-emitting unit 14 can better protect the conductive pad 2, thereby reducing the risk of damage to the conductive pad 2, and further improving the bonding effect between the conductive pad 2 and the chip and the flexible circuit board, and ultimately improving the performance of the formed display panel.

[0182] In addition, when forming the last isolation opening (the second isolation opening 10), the second sacrificial layer 21 is removed. In this way, no special process is required to remove the second sacrificial layer 21, thereby reducing the process cost of removing the second sacrificial layer 21. When forming the last pixel opening (the second pixel opening 13), the first sacrificial layer 5 is removed. In this way, no special process is required to remove the first sacrificial layer 5, thereby reducing the process cost of removing the first sacrificial layer 5. Finally, the use of a mask plate can be reduced, and the cycle and cost of manufacturing the display panel can be reduced.

[0183] In some possible embodiments, the present application further provides a display panel, which is prepared by the preparation method of the display panel in the present application. The display panel has all the beneficial effects of the display panel prepared by the preparation method of the display panel in the above embodiments.

[0184] In some possible embodiments, please refer to Figure 1 、 Figures 33 - 35 the present application further provides a display panel, which includes a display area AA and a non-display area AB surrounding at least part of the display area AA. The non-display area AB includes a bonding area AB1. The display panel includes a substrate 1, a plurality of conductive pads 2, a pixel defining layer 12, a sacrificial retention portion 51, an isolation structure 11, and a plurality of light-emitting units.

[0185] The plurality of conductive pads 2 are located on one side of the substrate 1, and the plurality of conductive pads 2 are located in the bonding area AB1.

[0186] The pixel defining layer 12 is located on one side of the substrate 1, and at least part of the pixel defining layer 12 is located in the display area AA.

[0187] At least part of the sacrificial retention portion 51 is located in the non-display area AB. The orthographic projection of the sacrificial retention portion 51 on the substrate 1 is located outside the orthographic projection of the conductive pad 2 on the substrate 1. A first step 19 is provided at the junction of the pixel defining layer 12 and the sacrificial retention portion 51.

[0188] The isolation structure 11 is located on the side of the pixel defining layer 12 away from the substrate 1. The isolation structure 11 encloses a plurality of isolation openings, and part of the light-emitting unit is located at the isolation openings.

[0189] Since there is a first step 19 at the junction of the pixel defining layer 12 and the sacrificial retention portion 51, during the process of forming the display panel, the step difference of the second electrode material layer 23 of the light-emitting unit at the first step 19 is smaller, the second electrode material layer 23 of the light-emitting unit is flatter at the first step 19, and the second electrode material layer 23 of the light-emitting unit can better protect the conductive pad 2, thereby reducing the risk of damage to the conductive pad 2, and further improving the bonding effect between the conductive pad 2 and the chip and the flexible circuit board, and finally improving the performance of the display panel.

[0190] In some possible embodiments, along the thickness direction Z of the substrate 1, the thickness D3 of the sacrificial retention portion 51 is less than the thickness D4 of the pixel defining layer 12.

[0191] Optionally, at least part of the sacrificial retention portion 51 is located in the bonding area;

[0192] Optionally, the first step 19 is located in the bonding area AB1.

[0193] During the process of forming the display panel, the second electrode material layer 23 of the light-emitting unit extends to the sacrificial retention portion 51 and the pixel defining layer 12. Since the thickness D3 is less than the thickness D4, the second electrode material layer 23 of the light-emitting unit is flatter at the sacrificial retention portion 51 and the pixel defining layer 12, thereby improving the protection effect of the second electrode material layer 23 on the conductive pad 2.

[0194] Preferably, along the thickness direction Z of the substrate 1, the difference between the thickness D4 of the pixel defining layer 12 and the thickness D3 of the sacrificial retention portion 51 is greater than or equal to 2500 Å and less than or equal to 4000 Å. For example, the difference between the thickness D4 and the thickness D3 can be 2500 Å, 3000 Å, 3500 Å, 3800 Å or 4000 Å, etc.

[0195] Optionally, along the thickness direction Z of the substrate 1, the thickness D3 of the sacrificial retention portion 51 is greater than or equal to 500 Å and less than or equal to 1000 Å. For example, the thickness D3 can be 500 Å, 600 Å, 700 Å, 800 Å, 900 Å or 1000 Å, etc.

[0196] Preferably, along the thickness direction Z of the substrate 1, the thickness D4 of the pixel defining layer 12 is greater than or equal to 3000 Å and less than or equal to 5000 Å. For example, the thickness D4 can be 3000 Å, 3500 Å, 4000 Å, 4500 Å or 5000 Å, etc.

[0197] Reasonably setting the difference between the thickness D4 and the thickness D3, the thickness D3, and the thickness D4 can make the second electrode material layer 23 of the light-emitting unit flatter at the first step 19, thereby better protecting the conductive pad 2.

[0198] Optionally, the sacrificial retention portion 51 and the pixel defining layer 12 are of the same layer and the same material. In this way, the sacrificial retention portion 51 and the pixel defining layer 12 are formed by the same process, thereby reducing the process cost of forming the sacrificial retention portion 51 and the pixel defining layer 12.

[0199] In some possible implementation manners, the present application further provides an electronic device, and the electronic device includes the display panel in the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, a laptop computer, a mobile phone, a tablet computer, a wearable device, a vehicle-mounted display device, etc. Since the electronic device includes the display panel in the present application, the performance of the electronic device is better.

[0200] The technical features of the above embodiments can be combined arbitrarily. For the sake of brief description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0201] The above-described embodiments merely represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all fall within the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the appended claims.

Claims

1. A method for preparing a display panel, characterized in that, The display panel includes a display area and a non-display area surrounding at least part of the display area. The non-display area includes a bonding area. The method includes: Forming a plurality of conductive pads on one side of the substrate, and the plurality of conductive pads are located in the bonding area; Forming a pixel defining material layer and a first sacrificial layer on one side of the substrate. At least part of the pixel defining material layer is located in the display area, and at least part of the first sacrificial layer is located in the bonding area. The first sacrificial layer covers at least part of the plurality of conductive pads; Forming an isolation material layer on a side of the pixel defining material layer away from the substrate; Patterning the isolation material layer to form an isolation material layer including a first isolation opening located in the display area; Patterning the pixel defining material layer to form a pixel defining material layer including a first pixel opening located in the display area, and the first pixel opening communicates with the first isolation opening; Forming a first light-emitting unit at the first isolation opening; Patterning the isolation material layer including the first isolation opening to form an isolation structure including a first isolation opening and a second isolation opening; Patterning the pixel defining material layer including the first pixel opening to form a pixel defining layer including a second pixel opening located in the display area, and simultaneously removing the first sacrificial layer covering the plurality of conductive pads. The second pixel opening communicates with the second isolation opening; Forming a second light-emitting unit at the second isolation opening; Before the step of forming the isolation material layer on a side of the pixel defining material layer away from the substrate, it further includes: Patterning the pixel defining material layer to form a pixel defining material layer including a via hole located in the non-display area; Patterning the pixel defining material layer including the via hole to form a pixel defining material layer including a first pixel blind hole, a second pixel blind hole, and a third pixel blind hole in the display area, and simultaneously removing part of the first sacrificial layer to make the thickness of the first sacrificial layer equal to the thickness of the pixel defining material layer at the second pixel blind hole; 2. The manufacturing method of the display panel according to claim 1, characterized in that, Along the thickness direction of the substrate, the thicknesses of the pixel defining material layer at the first pixel blind hole, the pixel defining material layer at the second pixel blind hole, and the pixel defining material layer at the third pixel blind hole are all equal; After the step of forming the pixel defining material layer including the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole, along the thickness direction of the substrate, the thickness of the first sacrificial layer is greater than or equal to 500 Å and less than or equal to 1000 Å; 3. The manufacturing method of the display panel according to claim 2, wherein, After the step of forming the pixel defining material layer including the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole, a first step is formed at the junction of the first sacrificial layer and the pixel defining material layer; The pixel defining material layer and the first sacrificial layer are of the same layer and the same material; 4. The manufacturing method of the display panel according to claim 2, wherein, Before the step of forming the pixel defining material layer and the first sacrificial layer on one side of the substrate, it further includes: A plurality of first electrodes are formed on one side of the substrate at intervals, and the positive projections of the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole on the substrate are respectively located within the positive projections of the corresponding first electrodes on the substrate.

5. The manufacturing method of the display panel according to claim 1, characterized in that, Before the step of forming the pixel defining material layer and the first sacrificial layer on one side of the substrate, it further includes: A power supply trace is formed on one side of the substrate, and at least a part of the power supply trace is located in the non-display area; The step of forming the isolation material layer on the side of the pixel defining material layer away from the substrate includes: An isolation material layer is formed on one side of the substrate, and at the same time, a second sacrificial layer is formed on the side of the first sacrificial layer away from the substrate. The positive projection of the second sacrificial layer on the substrate covers the positive projections of the plurality of conductive pads on the substrate, and the isolation material layer is electrically connected to the power supply trace through the via hole.

6. The manufacturing method of the display panel according to claim 5, wherein, The step of patterning the pixel defining material layer to form a pixel defining material layer including a first pixel opening located in the display area includes: Patterning the pixel defining material layer including the first pixel blind hole, the second pixel blind hole, and the third pixel blind hole to form a pixel defining material layer including a first pixel opening, the second pixel blind hole, and the third pixel blind hole; The step of forming a first light-emitting unit at the first isolation opening includes: Sequentially forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer corresponding to the first light-emitting unit at the first isolation opening. The light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the first light-emitting unit extend to the sides of the isolation material layer and the second sacrificial layer away from the substrate; Patterning the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the first light-emitting unit to form a first light-emitting unit at the first isolation opening and form a first encapsulation unit on the side of the first light-emitting unit away from the substrate.

7. The method for manufacturing a display panel according to claim 6, wherein, Before the step of patterning the isolation material layer including the first isolation opening to form an isolation structure including a first isolation opening and a second isolation opening, it further includes: Patterning the isolation material layer including the first isolation opening to form an isolation material layer including a first isolation opening and a third isolation opening; Patterning the pixel defining material layer including the first pixel opening, the second pixel blind hole, and the third pixel blind hole to form a pixel defining material layer including a first pixel opening, a third pixel opening, and the second pixel blind hole, and the third pixel opening communicates with the third isolation opening; Sequentially forming a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer corresponding to the third light-emitting unit at the third isolation opening. The light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the third light-emitting unit extend to the sides of the isolation material layer, the first light-emitting unit, and the second sacrificial layer away from the substrate; Pattern the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the third light-emitting unit to form the third light-emitting unit at the third isolation opening and form a third encapsulation unit on the side of the third light-emitting unit away from the substrate.

8. The manufacturing method of the display panel according to claim 7, wherein, The patterning of the isolation material layer including the first isolation opening to form an isolation structure including the first isolation opening and the second isolation opening includes: Pattern the isolation material layer including the first isolation opening and the third isolation opening to form an isolation structure including the first isolation opening, the third isolation opening, and the second isolation opening, while removing the second sacrificial layer.

9. The manufacturing method of the display panel according to claim 8, wherein, The patterning of the pixel defining material layer including the first pixel opening to form a pixel defining layer including a second pixel opening in the display area, while removing the first sacrificial layer covering the plurality of conductive pads, includes: Pattern the pixel defining material layer including the first pixel opening, the third pixel opening, and the second pixel blind hole to form a pixel defining layer including the first pixel opening, the second pixel opening, and the third pixel opening, while removing the first sacrificial layer covering the plurality of conductive pads, and the remaining first sacrificial layer forms a sacrificial retention portion.

10. The manufacturing method of the display panel according to claim 9, wherein, The step of forming the second light-emitting unit at the second isolation opening includes: Sequentially form a light-emitting material layer, a second electrode material layer, and a first encapsulation material layer corresponding to the second light-emitting unit at the second isolation opening, and the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the second light-emitting unit extend to the sides of the isolation structure, the first light-emitting unit, the third light-emitting unit, and the plurality of conductive pads away from the substrate; Pattern the light-emitting material layer, the second electrode material layer, and the first encapsulation material layer corresponding to the second light-emitting unit to form the second light-emitting unit at the second isolation opening.

11. The manufacturing method of the display panel according to any one of claims 1-10, characterized in that, Before the step of forming the pixel defining material layer and the first sacrificial layer on one side of the substrate, it further includes: Form an insulating layer on one side of the substrate, the insulating layer includes an insulating portion between adjacent two conductive pads, and the insulating portion extends to cover a part of the conductive pads.

12. The method for manufacturing a display panel according to claim 11, wherein, The step of forming the insulating layer on one side of the substrate includes: Form an insulating material layer on one side of the substrate; Perform patterning on the insulating material layer to form a planarization layer in the display area and an insulating layer in the bonding area.

13. The method for manufacturing a display panel according to claim 11, wherein After the step of patterning the pixel defining material layer including the first pixel opening to form a pixel defining layer including a second pixel opening in the display area, while removing the first sacrificial layer covering the plurality of conductive pads, it further includes: At least remove the insulating layer covering the plurality of conductive pads and remove the insulating layer between adjacent two of the conductive pads.

14. A display panel, characterized in that, A display panel prepared by the method for preparing a display panel according to any one of claims 1-13; the display panel includes a display area and a non-display area surrounding at least part of the display area, the non-display area includes a bonding area, and the display panel includes: A substrate; A plurality of conductive pads located on one side of the substrate, and the plurality of conductive pads are located in the bonding area; A pixel defining layer located on one side of the substrate, and at least part of the pixel defining layer is located in the display area; A sacrificial retention portion, at least part of which is located in the non-display area, and the orthographic projection of the sacrificial retention portion on the substrate is outside the orthographic projection of the conductive pad on the substrate, and a first step exists at the junction of the pixel defining layer and the sacrificial retention portion; An isolation structure located on the side of the pixel defining layer away from the substrate, and the isolation structure encloses a plurality of isolation openings; A plurality of light-emitting units, at least part of the light-emitting units are located at the isolation openings.

15. The display panel according to claim 14, wherein In the thickness direction of the substrate, the thickness of the sacrificial retention portion is less than the thickness of the pixel defining layer.

16. The display panel according to claim 15, wherein In the thickness direction of the substrate, the difference between the thickness of the pixel defining layer and the thickness of the sacrificial retention portion is greater than or equal to 2500 Å and less than or equal to 4000 Å; In the thickness direction of the substrate, the thickness of the sacrificial retention portion is greater than or equal to 500 Å and less than or equal to 1000 Å; In the thickness direction of the substrate, the thickness of the pixel defining layer is greater than or equal to 3000 Å and less than or equal to 5000 Å.

17. The display panel according to claim 14, wherein, At least part of the sacrificial retention portion is located in the bonding area; The sacrificial retention portion and the pixel defining layer are of the same layer and the same material.

18. An electronic device, characterized in that, The electronic device includes the display panel according to any one of claims 14-17.

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