Data transmission method and device based on network-on-chip, and electronic equipment

Abstract

The embodiment of the invention provides a data transmission method and device based on a network-on-chip, electronic equipment and a readable storage medium. The method comprises the steps that a data packet is received, and a target routing node corresponding to the data packet is determined; determining a next-hop routing node corresponding to the routing node from the tree topology structure according to the receiving direction of the data packet and the position of the routing node in the tree topology structure; the tree topology structure is a structure for connecting configuration channels of the routing nodes; and sending the data packet to the next-hop routing node, so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, sending the data packet to the target routing node, so that the target routing node performs configuration according to the data packet, and sending the configured data packet to the next-hop routing node, so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node. The bandwidth utilization rate during data transmission is improved, and the real-time performance of data transmission is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a data transmission method, device, electronic device and readable storage medium based on an on-chip network. Background Art

[0002] As chip integration increases, traditional bus architectures are being replaced by on-chip (NoC) due to their poor scalability, low bandwidth, and high latency. NoCs, which achieve efficient communication through message switching, have become the standard interconnect solution for multi-core processors. In complex systems-on-chip (SoCs), the transmission of configuration information becomes a key challenge. For example, scenarios such as AI chips and heterogeneous computing require real-time configuration adjustments to adapt to load fluctuations. Misconfiguration can lead to system failure or performance degradation.

[0003] In existing on-chip networks, a bus topology with the same main path is usually used. However, due to the extremely low bandwidth utilization of configuration information flow, bandwidth is wasted. Alternatively, a serial bus structure is used to transmit configuration information, which has poor real-time performance and low configuration efficiency. Summary of the Invention

[0004] The embodiments of the present application provide a data transmission method, device, electronic device and readable storage medium based on an on-chip network, which can improve bandwidth utilization during data transmission and improve the real-time performance of data transmission.

[0005] In a first aspect, an embodiment of the present application discloses a data transmission method for a network on chip, which is applied to a routing node of the network on chip, and the method includes: Receive a data packet and determine a target routing node corresponding to the data packet; Determining a next-hop routing node corresponding to the routing node from the tree-like topology structure according to a receiving direction of the data packet and a position of the routing node in the tree-like topology structure; the tree-like topology structure is a structure of configured paths connecting the routing nodes; The data packet is sent to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and the data packet is sent to the target routing node so that the target routing node is configured according to the data packet.

[0006] In a second aspect, an embodiment of the present application discloses a data transmission device based on a network on chip, which is applied to a routing node of the network on chip, and the device includes: A receiving module, configured to receive a data packet and determine a target routing node corresponding to the data packet; a node determination module, configured to determine a next-hop routing node corresponding to the routing node from the tree-like topology structure based on a receiving direction of the data packet and a position of the routing node in the tree-like topology structure; the tree-like topology structure being a structure of configured paths connecting the routing nodes; A sending module is used to send the data packet to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and send the data packet to the target routing node so that the target routing node is configured according to the data packet.

[0007] In a third aspect, an embodiment of the present application further provides an electronic device comprising a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to execute the instructions to implement the method of the first aspect.

[0008] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, which, when instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to execute the method of the first aspect.

[0009] The embodiments of the present application include the following advantages: The configuration path of each routing node in the on-chip network is designed as a tree topology, in which each routing node is located at a leaf node in the tree topology. The message transmitted on the configuration path is from the root node to the leaf node. From the leaf node to the root node, the tree topology only involves the necessary routing channels between the root node and some leaf nodes, and the routing channels between some leaf nodes and leaf nodes. Therefore, not all leaf nodes in the tree topology are connected to each other. By reducing unnecessary routing channels between leaf nodes, the chip area overhead is reduced. When a routing node receives a data packet, it determines the target routing node corresponding to the data packet and determines the next-hop routing node based on the receiving direction of the data packet and the position of the routing node in the tree topology. For data packets that need to carry the same configuration information, the data packet is sent to all routing nodes via broadcast, reducing the delay of transmitting data packets to multiple routing nodes in a unicast manner and improving the real-time performance of data packet transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0011] Figure 1 is a flowchart of an embodiment of a data transmission method based on an on-chip network of the present invention; Figure 2 is a schematic diagram of a routing node topology structure of the present invention; Figure 3 is a schematic diagram of data transmission based on an on-chip network of the present invention; Figure 4 is a flowchart of another embodiment of a data transmission method based on an on-chip network of the present invention; Figure 5 It is a schematic diagram of a process of generating a hardware component of the present invention; Figure 6 It is a structural schematic diagram of a data packet of the present invention; Figure 7 It is a structural block diagram of a data transmission device based on an on-chip network of the present invention; Figure 8 This is a structural block diagram of an electronic device provided by an example of the present invention. DETAILED DESCRIPTION

[0012] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0013] The terms "first", "second", etc. in the specification and claims of the present invention are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present invention can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after the association are in an "or" relationship. In the embodiments of the present invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0014] Method Example Reference Figure 1 , shows a flowchart of an embodiment of a data transmission method based on an on-chip network of the present invention, the method may specifically include the following steps: Step 101: Receive a data packet and determine a target routing node corresponding to the data packet; Step 102: Determine a next-hop routing node corresponding to the routing node from the tree-like topology structure based on the receiving direction of the data packet and the position of the routing node in the tree-like topology structure; the tree-like topology structure is a structure of configured paths connecting each routing node; Step 103: Send the data packet to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and send the data packet to the target routing node so that the target routing node is configured according to the data packet.

[0015] Regarding steps 101-103, an embodiment of the present application provides a data transmission method based on a network on a chip (NOC), which can be applied to each routing node in the NOC. Large system-on-chips (SoCs) contain numerous intellectual property (IP) cores. During chip startup or operation, configuration information needs to be distributed to each target IP core via a configuration bus. These IP cores can include a central processing unit (CPU), a graphics processing unit (GPU), a memory controller, a peripheral controller, a consistency processing module, an integrated circuit die (DIE) module, and so on. In this application, the configuration bus connecting each routing node has a tree topology, and the configuration bus is also known as the configuration path. The tree topology contains only routing nodes, and configuration information is forwarded and transmitted by the routing nodes in the tree topology. Upon receiving configuration information, a routing node saves the configuration information for configuration, forwards it to another routing node, or sends it to a locally mounted IP core.

[0016] It's important to note that the SoC contains a control module, which serves as the "brain" or "source" of the entire configuration system and the root node of the tree-like topology. The control module generates configuration information and data packets to be distributed; initiates configuration transmission, sending data packets to directly connected routing nodes or leaf nodes; and receives and processes responses or interrupts from leaf nodes or routing nodes. The control module can be a dedicated hardware state machine, a firmware / software module running on a management processor, or a designed configuration engine.

[0017] Data packets carry configuration information, primarily control commands and configuration data. For example, they perform read or write operations on IP core registers. Data packets typically contain the following fields: destination address, source address, opcode, storage address, data, transaction identifier, and error checking code. The destination address uniquely identifies the target routing node to which the configuration information is applied. The source address refers to the address of the node initiating the configuration request, or the control module, and is used to transmit responses or interrupts. The opcode specifies the type of configuration operation to be performed, such as register read, register write, reset, boot, or mode set. The storage address specifies the address of the specific register or storage location to be accessed within the target routing node. For write operations, the data contains the data to be written; for read operations, it may be empty or contain placeholders. The transaction identifier is used to match requests and responses, especially when supporting read operations or complex transactions. The error checking code ensures the integrity of data transmission, such as a cyclic redundancy check (CRC) or parity bit.

[0018] The target routing node is the routing node to which a data packet is ultimately destined. The target routing node executes the configuration operations carried in the data packet or sends it to a locally mounted IP core, which then executes the configuration operations carried in the data packet. In a tree topology, the target routing node is also a leaf node, representing a specific hardware functional unit that needs to be configured. From the perspective of a configuration packet, when a data packet arrives at this node and is consumed by it rather than forwarded, this node becomes the packet's "target routing node." The data packet is sent to and processed by the target routing node, rather than simply passing through it.

[0019] It should be noted that after receiving the data packet, the target routing node is used for configuration or sent to the local IP core for configuration. The process of configuring according to the data packet is to extract the control commands and configuration data from the data packet and execute the control commands on the registers of the target routing node or the registers of the IP core.

[0020] like Figure 2A schematic diagram of a routing node topology is shown. The topology provides two paths connecting routing nodes: one is the main path of the mesh topology, and the other is the configuration path of the tree topology provided in this application. The tree topology has a single root node, which refers to the location of the control module and the source of configuration data. The control module can also be called the control center. All other routing nodes are leaf nodes, and the root node is connected to the leaf nodes. As can be seen from the diagram, the control center is located in a corner of the entire mesh topology, such as the lower left corner, upper left corner, upper right corner, or lower right corner. In the example, the control center is located in the lower left corner. The routing nodes on the horizontal axis not only connect to the routing nodes in the horizontal direction, but also to the routing nodes or other routing nodes on the vertical axis. The routing nodes or other routing nodes on the vertical axis only connect to routing nodes in the vertical direction, or in the south and north directions. It should be noted that the configuration path of the tree topology provided in this application can not only transmit configuration information sent from the root node to the leaf nodes, but also transmit interrupt signals sent from the leaf nodes to the root node. Since the transmission of configuration information will only be sent from the control module located at the root node, the interrupt signal will only be sent according to the characteristics of the control module. The tree topology structure provided in the embodiment of the present application reduces the routing channels between the routing nodes located at the leaf nodes and the routing nodes, thereby reducing the chip area overhead or cost.

[0021] Interrupt signals are initiated by leaf routing nodes and transmitted upstream, while packets carrying configuration information are initiated by the root node and transmitted downstream. Interrupt signals are hardware-triggered asynchronous event notification signals. Interrupts typically occur in the following ways: register write verification failures generate error interrupts, temperature sensor exceeding warning values ​​generate threshold interrupts, and external pin level transitions generate event interrupts.

[0022] It should be noted that the tree topology refers to a dedicated path for transmitting configuration information and is a backend channel used within the system to manage, control, and initialize hardware modules. The primary path structure refers to the path used to process user data or business data during system operation, such as the CPU-to-memory interconnect and the data forwarding bus of a network chip. The primary path structure strives for high bandwidth, low latency, and communication between any endpoints. It often employs more complex topologies and even includes dedicated routing protocols.

[0023] like Figure 3A schematic diagram of data transmission based on an on-chip network is shown. When the control center at the root node sends a data packet, it is sent to the directly connected routing node. Except for the last routing node on the horizontal axis, which needs to determine whether the data packet should be sent to the local, eastward, or northward routing node, the routing node on the vertical axis needs to determine whether the data packet should be sent to the local or northward routing node. The routing node in the lower right corner needs to determine whether the data packet should be sent to the local or northward routing node. The remaining routing nodes also need to determine whether the data packet should be sent to the local or northward routing node. When a leaf node sends an interrupt signal to the control center, the routing node on the vertical axis needs to send the interrupt signal to the southward routing node, the routing node on the horizontal axis needs to send the interrupt signal to the westward routing node, and the remaining routing nodes also need to send the interrupt signal to the southward routing node. Based on the above content, it can be seen that different routing nodes receive data packets or interrupt signals in different directions, have different positions in the tree topology, and have different next-hop routing nodes.

[0024] After receiving the packet, the next-hop routing node executes steps 101-103 again. This process repeats itself on each intermediate routing node until the packet is sent to the destination routing node. Upon receiving the packet, the destination routing node stops forwarding the packet and parses it, extracting the configuration instructions or data carried in the packet and executing the configuration instructions. For example, this might involve setting register values.

[0025] In an embodiment of the present application, the configuration paths of each routing node in the on-chip network are designed as a tree topology, wherein each routing node is located at a leaf node in the tree topology. Messages transmitted on the configuration paths travel from the root node to the leaf node, and from the leaf node to the root node. This reduces chip area overhead by eliminating unnecessary routing channels between leaf nodes. Upon receiving a data packet, the routing node determines the target routing node corresponding to the data packet. Based on the data packet's receiving direction and the routing node's position in the tree topology, the routing node transmits the data packet to the next-hop routing node along the tree topology, thereby improving the real-time performance of data packet transmission.

[0026] Reference Figure 4 , shows a flowchart of another method for data transmission based on a network on chip according to the present invention, which is applied to a routing node of the network on chip and may specifically include the following steps: Step 201: Receive a data packet and determine a target routing node corresponding to the data packet.

[0027] This step may be specifically referred to the above step 101 and will not be described again here.

[0028] Step 202: Determine the transmission mode of the data packet; Step 203: When the transmission mode is unicast, determine a routing algorithm according to the position of the routing node in the tree topology and the receiving direction; Step 204: Determine a next-hop routing node from first routing nodes connected in directions other than the receiving direction according to the routing algorithm; Step 205: When the transmission mode is a broadcast mode, determine the first routing node as the next-hop routing node.

[0029] Regarding steps 202-205, it should be noted that the packet header carries a transmission mode identifier, for example, a 1-2 bit field. This identifier is set by the control module when the packet is generated, and explicitly indicates whether the packet is being transmitted in unicast or broadcast mode. The meaning of the destination node and the next hop selection logic are completely different depending on whether the packet is being transmitted in unicast or broadcast mode.

[0030] The transmission mode identifier is located in the packet header and is 1 bit or a small number of bits. For example, an identifier of 0 indicates that the packet's transmission mode is unicast, and an identifier of 1 indicates that the packet's transmission mode is broadcast. When the packet's transmission mode is unicast, the packet has a clear, single target routing node identifier, such as a specific leaf node or branch node address. The routing decision of the routing node to determine the next-hop routing node strongly depends on this target identifier. When the packet's transmission mode is broadcast, the packet's target routing node is all routing nodes in the tree topology. The packet does not have a specific target routing node identifier, and the routing decision is completely independent of the specific target node, relying only on the network topology and the receiving direction.

[0031] When the data packet is transmitted via unicast, the next-hop routing node for the data packet from the current routing node is a specific neighbor node of the current routing node. Neighbor node selection is based on the target node's location, the packet's own location, the receiving direction, and the routing algorithm. Excluding the receiving direction, the path from the root node to the target routing node is deterministic and point-to-point. When the data packet is transmitted via broadcast, the next-hop routing node is all other neighbor nodes except the receiving direction. The selection is based solely on the receiving direction and the neighbor list, and is independent of the target routing node. Many homogeneous IP cores require broadcast transmission of the same configuration. Therefore, a register configuration bus capable of performing broadcast functions is required to improve the efficiency of configuring multiple IP cores.

[0032] Among them, the first routing node refers to the adjacent routing node that the current routing node is directly connected to by a physical link in the tree topology. The routing algorithm refers to the rule or calculation method used to determine the path that a data packet takes from the source node to the target routing node in a communication network. Each routing node only determines the next-hop routing node based on the routing algorithm, rather than the complete routing path. In the case where the data packet is transmitted in unicast mode, the current routing node needs to determine the routing algorithm executed by the current routing node based on the receiving direction of the data packet and the position of the current routing node in the tree topology. Then, the next-hop routing node is determined based on the destination address carried by the data packet and the routing algorithm. For example, Figure 2 This figure shows a routing node topology. The entire topology is placed in a coordinate system, with the control center in the lower left corner. The routing node directly connected to the control center is node (0, 0) in the tree topology. Node (0, 0) uses the XY routing algorithm to determine the next-hop routing node for packets entering from all directions. Routing nodes on the horizontal axis use the XY routing algorithm to determine the next-hop routing node for packets entering from the west, and use the YX routing algorithm to determine the next-hop routing node for packets entering from all other directions. Routing nodes on the vertical axis use the YX routing algorithm for packets entering from all directions. The remaining routing nodes also use the YX routing algorithm for packets entering from all directions. Messages can be data packets sent by the control center, interrupt signals generated by leaf nodes, or responses to data packets.

[0033] It should be noted that Figure 2 Only one type of routing node topology is shown. The control center can be located not only in the lower left corner, but also in the upper left corner, upper right corner, and lower right corner. The coordinate system will change accordingly, but the routing nodes are still divided into three categories: routing nodes on the horizontal axis, routing nodes on the vertical axis, and other routing nodes. Each routing node still selects a routing algorithm from the XY routing algorithm and the YX routing algorithm based on its own position in the tree topology and the receiving direction of the data packet.

[0034] It should be noted that the routing nodes in the tree topology have corresponding hardware overheads for different routing algorithms. Figure 5 As shown, corresponding different hardware components are generated through a generation module (Generate) based on the routing node coordinates and the input direction. Specifically, based on the routing node coordinates and the input direction of the data packet, one of the hardware components implementing the XY routing algorithm and the hardware components implementing the YX routing algorithm is selected. No other hardware components are required or involved, and no redundant resource overhead is introduced.

[0035] It should be noted that the core purpose of considering directions other than the receiving direction when determining the next-hop routing node is to prevent loops and duplicate reception. When the transmission mode is unicast, this prevents packets from being sent back to the upstream node that sent them, causing ping-pong or loops. When the transmission mode is broadcast, excluding the receiving direction ensures that broadcast packets do not return to the upstream node that sent the packet, preventing broadcast packets from circulating infinitely in the network.

[0036] Optionally, sending the data packet to the next-hop routing node may specifically include: Step S11: When the transmission mode is a broadcast mode, the data packet is copied according to the number of the next-hop routing nodes; Step S12: Send the copied data packets to the next-hop routing nodes respectively.

[0037] With respect to steps S11 and S12, when the transmission mode of the data packet is broadcast, a next-hop routing node list including N neighbor nodes to be forwarded has been determined.

[0038] Since the upstream routing will only send one data packet to the current routing node, when the current routing node has at least two next-hop routing nodes, the current routing node needs to copy the data packet, and the number of copies is the number of next-hop nodes. For example: if the current routing node is a routing node on the horizontal axis and has two next-hop routing nodes, namely routing nodes S1 and S2 in the east and north directions, then two copies of the data packet will be copied. Generate N copies of the data packet that are exactly the same as the original received packet. The hardware implementation method is a dedicated replication circuit. The replication logic is designed in the router hardware, such as the state machine and buffer management method, or the shared buffer and multi-pointer method. The shared buffer and multi-pointer method directly generates multiple copies. The shared buffer and multi-pointer method is to store the original packet in shared memory, create N virtual copies pointing to the same data, and read them on demand when physically sending.

[0039] It should be noted that when N data packets are sent, the N data packets can be sent to the corresponding N next-hop routing nodes at the same time.

[0040] For example, the routing node may set a request flag for each transmission direction, which is set to 1 before the data packet is sent from that direction and is set to 0 after the data packet is sent from that direction. Figure 2In the topology shown, when node (0, 0) receives a multicast packet from the control center, it sets the routing request flag for all available directions to 1. [1 (local), 0 (south), 1 (north), 0 (west), 1 (east)]; when nodes on the horizontal axis receive a multicast packet from the west, they send packets in the local, north, and east directions, setting the request flag for each direction to 0 after each packet is sent. Once a packet has been sent from all available directions, the next packet is forwarded.

[0041] Step 206: Divide the data packet into at least two first flow control units according to the bandwidth of the configured path; Step 207: Send the at least two first flow control units to the next-hop routing node in sequence.

[0042] For steps 206 and 207, an embodiment of the present application provides a core fragmentation mechanism for transmitting data packets in a low-bandwidth configuration path, based on flow control transmission of a first flow control unit (Flit). The configuration path bandwidth refers to the single-cycle transmission bit width supported by the physical link, such as 4-bit or 8-bit. The original data packet is a complete configuration packet to be sent, which may be as long as 32-bit or 64-bit or even longer. It should be noted that the number of bits of a flit is less than or equal to the bandwidth of the physical link, and the bandwidth of the physical link is usually an integer multiple of a flit. For example, if the single-cycle transmission bit width supported by the physical link is 8 bits, the number of bits of a flit can be 8 bits or 4 bits.

[0043] The number of first flow control units is the number of bits in the data packet divided by the number of bits in the first flow control unit. The size of the data packet is determined by the system operation and the data size. For example, when the number of flit bits is 24 bits, a read operation requires an address in the data packet, which only requires 48 bits, or two flits. A write operation requires an address and data, which requires 114 bits, and requires more flits.

[0044] When the data packet is divided into at least two first flow control units, the complete data packet is sent to the next-hop routing node by sending the at least two first flow control units to the next-hop routing unit.

[0045] It should be noted that the determination of the first flow control unit is based not only on the physical bandwidth of the configured path but also on software data alignment and compatibility with the CPU word length. After a data packet is divided into at least two first flow control units, at least two first flow control units should be able to be reassembled into a complete CPU word length. For example, to be compatible with 32-bit software, an 8-bit first flow control unit is used, and every four flits can form a complete 32-bit word.

[0046] Optionally, step 207 may specifically include: Step S21: for each first flow control unit, after the first flow control unit is sent to the next-hop routing node, delete the first flow control unit from the input buffer of the routing node; Step S22: Read the next first flow control unit from the input buffer, and send the next first flow control unit to the next-hop routing node until all first flow control units are sent to the next-hop routing node.

[0047] With respect to steps S21 and S22, the embodiment of the present application provides a core mechanism for flow control unit-level buffer management, which is used to ensure reliable transmission of data packets and efficient resource utilization in the bandwidth configuration path. The buffer is released immediately after the Flit is sent. The current routing node has successfully sent a Flit to the physical link of the next-hop routing node, avoiding the retention of sent data occupying the valuable buffer and ensuring that the newly arrived Flit can immediately use the free cache slot. It should be noted that zero idle transmission can be achieved in the embodiment of the present application. The next Flit is started immediately after the current Flit is sent. In terms of hardware, the physical layer sending circuit and the buffer reading circuit work in parallel.

[0048] It should be noted that when the transmission mode is broadcast and the current routing node has at least two next-hop routing nodes, the first flow control unit can be sent to at least two next-hop routing nodes simultaneously. The router can arbitrate messages in all directions simultaneously in a single shot. Only after all transmittable directions of the first FLIT have output the message will the router's input buffer drain the FLIT and transmit the remaining FLIT messages of the data packet. The transmittable direction refers to the direction toward the next-hop routing node.

[0049] Optionally, the first flow control unit carries a first identifier, and the first identifier is used to indicate whether there is a first flow control unit for the same data packet after the first flow control unit. Step S22 may specifically include: Step S31: When the first identifier is 1, read the next first flow control unit from the input buffer, and send the next first flow control unit to the next-hop routing node; Step S32: When the first identifier is 0, determine that all first flow control units corresponding to the data packet are sent to the next-hop routing node, and read the first flow control unit corresponding to the next data packet from the input buffer.

[0050] With respect to steps S31 and S32, the embodiment of the present application provides a flow control unit continuity identification mechanism for implementing the control logic for the uninterrupted flow transmission of multiple Flit data packets. Specifically, Figure 6The structure of a data packet is shown, and each data packet is divided into at least two first flow control units. Each flit includes a first identifier in the header and original data content. The first identifier is 1 or 0. Only the first identifier of the last flow control unit in the data packet is 0, and the first identifiers of the remaining first flow control units are all 1. The original data content is obtained by fragmenting the data packet, and the data therein is a combination of bits. Each flit header reserves a 1-bit flag bit. When the flag bit is 1, it means that there is a subsequent flit of the same data packet. When the flag bit is 0, it means that the flit is the last unit of the data packet. The first identifier is set in each flit header when the control module slices the data packet into at least two flits before sending the data packet. It is used to guide each routing point when switching the data packet to avoid errors or abnormalities caused by the flit flow in the same data packet being cut off.

[0051] In an embodiment of the present application, each flit is sent simultaneously to each next-hop routing node. After the flit is output from each transmittable direction, the flit is discharged from the input buffer. When the first identifier of the flit indicates that there is a flit of the same data packet after it, the next flit is read from the input buffer. When the first identifier of the flit indicates that there is no flit of the same data packet after it, it means that the data packet has been transmitted and the flit of the next data packet can be read.

[0052] Optionally, the method further includes: Step S41: receiving a response returned by the next-hop routing node; Step S42: When the number of responses is at least two, arbitrate the at least two responses and determine the priority corresponding to each response; Step S43: Send each response to the upstream routing node in sequence according to the priority; the upstream routing node is the routing node that sends the data packet to the routing node.

[0053] Regarding steps S41-S43, it should be noted that the configuration path of the tree topology structure not only transmits data packets sent from the root node to the leaf nodes, but also transmits responses sent from the leaf nodes to the root node. Responses refer to the feedback signals from the leaf nodes to the data packets sent by the root node, and can generally be divided into the following three categories: when the root node requests a register read, the leaf node returns the read data; after completing the configuration according to the data packet, the leaf node returns a status confirmation response to the root node; when the root node verifies the hardware, in the event of a verification failure or hardware anomaly, the root node sends an error report to the root node.

[0054] like Figure 2In the routing node topology shown, the routing node on the horizontal axis may receive responses from multiple directions, such as north, east, and local. When multiple responses are received, they compete for a single uplink channel. Therefore, arbitration is performed to determine the transmission order of the multiple responses. Each response is transmitted sequentially in this order to avoid conflicts and congestion.

[0055] The core of arbitration is to resolve contention conflicts between multiple input sources and a single output channel. Specifically, different weights can be assigned to different types of responses. For example, interrupt signals have a weight of 3, error responses have a weight of 2, and data has a weight of 1. Dynamic adjustment factors, such as waiting time factors and leaf node criticality, can also be introduced. When the waiting time factor exceeds the retention threshold, the priority is automatically increased, and the response weight of the core module or core IP core is higher.

[0056] For example, Figure 2 The topology of the routing nodes shown in Figure 3The schematic diagram of data transmission based on on-chip network is shown. The control center sends a data packet to the directly connected routing node. When the data packet is transmitted in unicast mode, the target routing node of the data packet is the (1, 2) routing node, the directly connected (0, 0) routing node is the routing node on the horizontal axis and the receiving direction of the data packet is the west direction. Therefore, the routing algorithm is the XY routing algorithm, and the next hop routing node is determined to be the (1, 0) routing node. The (0, 0) routing node sends the data packet to the (1, 0) routing node. The (1,0) routing node is also a routing node on the horizontal axis, and the direction of receiving the data packet is also west. The routing algorithm is the XY routing algorithm. There is no deviation between the X coordinate and the target routing node, and thus the next-hop routing node is determined to be the (1,1) routing node. The (1,0) routing node sends the data packet to the (1,1) routing node. The (1,1) routing node is not a routing node on the horizontal or vertical axis. Regardless of the direction of receiving the data packet, the routing algorithm is the YX routing algorithm. The next-hop routing node is determined to be the (1,2) routing node. The (1,1) routing node sends the data packet to the (1,2) routing node. After receiving the data packet, the (1,2) routing node determines that it is the target routing node based on the destination address carried in the data packet, configures itself according to the data packet, and returns a response. The response carries the address of the control center. The (1,2) routing node is not a routing node on the horizontal or vertical axis, so the routing algorithm is determined to be the YX routing algorithm. The next-hop routing node is determined to be the (1,1) routing node, and the response is sent to the (1,1) routing node. After the (1,1) routing node receives the response, the (1,1) routing node is not a routing node on the horizontal or vertical axis, so the routing algorithm is determined to be the YX routing algorithm. The next-hop routing node is determined to be the (1,0) routing node, and the response is sent to the (1,0) routing node. The (1,0) routing node is a routing node on the horizontal axis, the response receiving direction is north, the routing algorithm is determined to be the YX routing algorithm, the Y-axis coordinate has no deviation, the next-hop routing node is determined to be the (0,0) routing node, and the response is sent to the (0,0) routing node. The (0,0) routing node sends the response to the control center. After the control center receives the response, it determines that the configuration is complete.

[0057] The control center sends a data packet to a directly connected routing node. If the data packet is broadcast, the (0,0) routing node must send the data packet in the north, east, and local directions in addition to the receiving direction. Consequently, the (0,0) routing node replicates the data packet twice, sending it to the north, east, and local directions respectively. Other routing nodes follow the same logic as the (0,0) routing node, replicating the data packet based on the number of adjacent routing nodes in directions other than the receiving direction, and then sending the replicated data packets to the next-hop routing node. After receiving the data packet, each routing node configures itself based on the data packet and generates a response. Each routing node generates a response and returns it to the control center along a tree topology. For example, the (1,0) routing node will receive responses from the north, east, and local directions, but the (1,0) routing node has only one uplink channel to send the response to the (0,0) routing node. Therefore, it is necessary to arbitrate the responses from the three directions, determine the order in which the three responses are sent, and send each response to the (0,0) routing node in turn. The (0,0) routing node will send each response to the control center according to the same execution logic. A counter is set in the control center. The counter is 0 when the data packet is sent. When a response is received, the counter is incremented until the counter value is the same as the number of routing nodes in the tree topology structure, and the configuration is determined to be complete.

[0058] Optionally, step S43 may specifically include: Step S51: Divide each response into at least two second flow control units according to the bandwidth of the configured path; Step S52: For each response, send all second flow control units of the response to the upstream routing node in sequence; Step S53: Determine the next response according to the priority, and send all second flow control units corresponding to the next response to the upstream routing node until all responses are sent to the upstream routing node.

[0059] For steps S51-S53, similar to the transmission of data packets, an embodiment of the present application provides a core fragmentation mechanism for transmitting responses in a low-bandwidth configuration path, based on flow control transmission of a second flow control unit (Flit). The configuration path bandwidth refers to the single-cycle transmission bit width supported by the physical link, such as 4-bit or 8-bit. The original response may be as long as 32-bit or 64-bit or even longer, and the number of bits of a flit is less than or equal to the bandwidth of the physical link, and the bandwidth of the physical link is usually an integer multiple of a flit. For example, the single-cycle transmission bit width supported by the physical link is 8 bits, and the number of bits of a flit can be 8 bits or 4 bits. Each response can also be divided into at least two second flow control units for transmission. The header of each second flow control unit also carries a second identifier, which is used to indicate whether there is a second flow control unit with the same data response as the current second flow control unit.

[0060] In the case where the current data packet obtains the arbitration priority of the uplink channel, the router uses the second identifier to determine whether there is a second flow control unit with the same response after the second flow control unit. If the second identifier is 1, it means that there is a second flow control unit belonging to the same response after the second flow control unit, and if the second identifier is 0, it means that there is no second flow control unit belonging to the same response after the second flow control unit. If there is a second flow control unit message belonging to the same response after the second flow control unit, the arbitration priority of the uplink channel will be exclusively occupied by the input port corresponding to the response. For example, for a routing node, when the response entering from the east direction obtains the arbitration priority of the north output port, then before the entire response in the east direction is sent, that is, before the second identifier of the second flow control unit is 0, the input ports in other directions cannot obtain the arbitration priority of the output direction, and the responses of other input ports cannot be output from the output direction.

[0061] In summary, the embodiment of the present application provides a data transmission method based on an on-chip network, which can design the configuration path of each routing node in the on-chip network into a tree topology structure, wherein each routing node is located at a leaf node in the tree topology structure, and the message transmitted on the configuration path is from the root node to the leaf node, and from the leaf node to the root node, by reducing unnecessary routing channels between leaf nodes, the chip area overhead is reduced, and the channel area of ​​the configuration path is reduced by more than 30%. Furthermore, data packets, responses, interrupts and other messages can be efficiently transmitted from the control center to each IP core in a multi-FLIT manner, or from each IP core to the control center. Since the number of bits of a flit is lower than that of a data packet, the channel width can be reduced, further saving the channel area, improving the bandwidth utilization of the configuration path, and improving the real-time performance of data transmission. In addition, the broadcast configuration method can reduce the delay when multiple IP cores perform the same configuration by more than 80%. As the scale of the on-chip network continues to expand, the gain brought by the broadcast configuration method will further increase. In addition, when the chip starts, multiple modules need to be configured. The bandwidth utilization efficiency is high and broadcast configuration is supported, which can effectively reduce the startup time of the entire chip system.

[0062] Reference Figure 7 , shows a structural block diagram of a data transmission device based on a network on chip of the present invention, which is applied to a routing node of the network on chip and may specifically include the following modules: The receiving module 310 is configured to receive a data packet and determine a target routing node corresponding to the data packet; a node determination module 320 configured to determine a next-hop routing node corresponding to the routing node from the tree-like topology structure based on a receiving direction of the data packet and a position of the routing node in the tree-like topology structure; the tree-like topology structure being a structure of configured paths connecting the routing nodes; The sending module 330 is used to send the data packet to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and send the data packet to the target routing node so that the target routing node is configured according to the data packet.

[0063] Optionally, the node determination module includes: A mode determination module, used to determine the transmission mode of the data packet; an algorithm determination module, configured to determine a routing algorithm according to a position of the routing node in the tree topology and the receiving direction when the transmission mode is a unicast mode; A first determining submodule, configured to determine, according to the routing algorithm, a next-hop routing node from first routing nodes connected in directions other than the receiving direction; The second determining submodule is configured to determine the first routing node as a next-hop routing node when the transmission mode is a broadcast mode.

[0064] Optionally, the sending module includes: a replication module, configured to replicate the data packet according to the number of the next-hop routing nodes when the transmission mode is a broadcast mode; The first sending submodule is used to send the copied data packets to the next-hop routing node respectively.

[0065] Optionally, the sending module includes: a first dividing module, configured to divide the data packet into at least two first flow control units according to the bandwidth of the configured path; The second sending submodule is used to send the at least two first flow control units to the next-hop routing node in sequence.

[0066] Optionally, the second sending submodule includes: a deleting module, configured to delete, for each first flow control unit, the first flow control unit from an input buffer of the routing node after the first flow control unit is sent to the next-hop routing node; A reading module is used to read the next first flow control unit from the input buffer and send the next first flow control unit to the next-hop routing node until all the first flow control units are sent to the next-hop routing node.

[0067] Optionally, the reading module includes: A first reading submodule, configured to read a next first flow control unit from the input buffer and send the next first flow control unit to the next-hop routing node when the first identifier is 1; The second reading submodule is used to determine that all first flow control units corresponding to the data packet are sent to the next-hop routing node when the first identifier is 0, and read the first flow control unit corresponding to the next data packet from the input buffer.

[0068] Optionally, the device further comprises: A response receiving module, configured to receive a response returned by the next-hop routing node; an arbitration module, configured to arbitrate the at least two responses and determine the priorities corresponding to the respective responses when the number of the responses is at least two; The response sending module is used to send each response to the upstream routing node in sequence according to the priority; the upstream routing node is the routing node that sends the data packet to the routing node.

[0069] Optionally, the response sending module includes: a second dividing module, configured to divide each response into at least two second flow control units according to the bandwidth of the configured path; A first response sending submodule, configured to send, for each response, all second flow control units of the response to the upstream routing node in sequence; The second response sending submodule is used to determine the next response according to the priority, and send all second flow control units corresponding to the next response to the upstream routing node until all responses are sent to the upstream routing node.

[0070] In summary, the embodiment of the present application provides a data transmission device based on an on-chip network, which can design the configuration path of each routing node in the on-chip network into a tree topology structure, wherein each routing node is located at a leaf node in the tree topology structure, and the message transmitted on the configuration path is from the root node to the leaf node, and from the leaf node to the root node. By reducing unnecessary routing channels between leaf nodes, the chip area overhead is reduced, and the channel area of ​​the configuration path is reduced by more than 30%. Furthermore, data packets, responses, interrupts and other messages can be efficiently transmitted from the control center to each IP core in a multi-FLIT manner, or from each IP core to the control center. Since the number of bits of a flit is lower than that of a data packet, the channel width can be reduced, further saving the channel area, improving the bandwidth utilization of the configuration path, and improving the real-time performance of data transmission. In addition, the broadcast configuration method can reduce the delay when multiple IP cores perform the same configuration by more than 80%. As the scale of the on-chip network continues to expand, the gain brought by the broadcast configuration method will further increase. In addition, when the chip starts, multiple modules need to be configured. The bandwidth utilization efficiency is high and broadcast configuration is supported, which can effectively reduce the startup time of the entire chip system.

[0071] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0072] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0073] Regarding the processor in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method and will not be elaborated here.

[0074] Reference Figure 8 , is a structural block diagram of an electronic device for data transmission based on an on-chip network provided by an embodiment of the present invention. Figure 8 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the data transmission method based on on-chip network of the aforementioned embodiment.

[0075] The processor may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or other programmable devices, transistor logic devices, hardware components, or any combination thereof. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0076] The communication bus may include a path for transmitting information between the memory and the communication interface. The communication bus may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 8 The fact that only one line is used does not mean that there is only one bus or one type of bus.

[0077] The memory may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0078] The embodiment of the present invention further provides a non-transitory computer-readable storage medium, which, when the instructions in the storage medium are executed by a processor of an electronic device (server or terminal), enables the processor to execute Figure 1 The data transmission method based on on-chip network is shown.

[0079] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0080] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, apparatuses, or computer program products. Thus, embodiments of the present invention may take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.

[0081] The embodiments of the present invention are described with reference to flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0082] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0083] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 a process or multiple processes and / or boxes Figure 1 The steps for the function specified in one or more boxes.

[0084] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0085] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0086] The above is a detailed introduction to the data transmission method, device, electronic device and readable storage medium based on the on-chip network provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A data transmission method based on an on-chip network, characterized in that: Applied to a routing node in a network on chip, the method comprises: Receive a data packet and determine a target routing node corresponding to the data packet; Determining a next-hop routing node corresponding to the routing node from the tree-like topology structure according to a receiving direction of the data packet and a position of the routing node in the tree-like topology structure; the tree-like topology structure is a structure of configured paths connecting the routing nodes; The data packet is sent to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and the data packet is sent to the target routing node so that the target routing node is configured according to the data packet.

2. The method according to claim 1, characterized in that The determining, from the tree topology structure, a next-hop routing node corresponding to the routing node according to a receiving direction of the data packet and a position of the routing node in the tree topology structure comprises: Determining a transmission mode of the data packet; In the case where the transmission mode is a unicast mode, determining a routing algorithm according to the position of the routing node in the tree topology structure and the receiving direction; Determine, according to the routing algorithm, a next-hop routing node from first routing nodes connected in directions other than the receiving direction; In a case where the transmission mode is a broadcast mode, the first routing node is determined as the next-hop routing node.

3. The method according to claim 2, characterized in that The sending of the data packet to the next-hop routing node includes: When the transmission mode is a broadcast mode, duplicating the data packet according to the number of the next-hop routing nodes; The copied data packets are sent to the next-hop routing nodes respectively.

4. The method according to claim 1, wherein The sending of the data packet to the next-hop routing node includes: Dividing the data packet into at least two first flow control units according to the bandwidth of the configured path; The at least two first flow control units are sent to the next-hop routing node in sequence.

5. The method according to claim 4, characterized in that The sending the at least two first flow control units to the next-hop routing node in sequence includes: For each first flow control unit, after the first flow control unit is sent to the next-hop routing node, deleting the first flow control unit from an input buffer of the routing node; The next first flow control unit is read from the input buffer, and the next first flow control unit is sent to the next-hop routing node until all first flow control units are sent to the next-hop routing node.

6. The method according to claim 5, characterized in that The first flow control unit carries a first identifier, where the first identifier is used to indicate whether there is a first flow control unit for the same data packet after the first flow control unit; The step of reading a next first flow control unit from the input buffer comprises: When the first identifier is 1, read the next first flow control unit from the input buffer, and send the next first flow control unit to the next-hop routing node; When the first identifier is 0, it is determined that all first flow control units corresponding to the data packet are sent to the next-hop routing node, and the first flow control unit corresponding to the next data packet is read from the input buffer.

7. The method according to claim 1, characterized in that The method further comprises: Receive a response returned by the next-hop routing node; When the number of the responses is at least two, arbitrating the at least two responses to determine the priorities corresponding to the respective responses; Each response is sent to an upstream routing node in sequence according to the priority; the upstream routing node is a routing node that sends a data packet to the routing node.

8. The method according to claim 7, characterized in that The sending of each response to the upstream routing node in sequence according to the priority includes: Dividing each response into at least two second flow control units according to the bandwidth of the configured path; For each response, sending all second flow control units of the response to the upstream routing node in sequence; According to the priority, a next response is determined, and all second flow control units corresponding to the next response are sent to the upstream routing node until all responses are sent to the upstream routing node.

9. A data transmission device based on a network on chip, characterized in that: A routing node applied to a network on chip, the device comprising: A receiving module, configured to receive a data packet and determine a target routing node corresponding to the data packet; a node determination module, configured to determine a next-hop routing node corresponding to the routing node from the tree-like topology structure based on a receiving direction of the data packet and a position of the routing node in the tree-like topology structure; the tree-like topology structure being a structure of configured paths connecting the routing nodes; A sending module is used to send the data packet to the next-hop routing node so that the next-hop routing node determines the corresponding next-hop routing node until the next-hop routing node is the target routing node, and send the data packet to the target routing node so that the target routing node is configured according to the data packet.

10. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the method according to any one of claims 1 to 8.

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