Long-distance engine with two cameras with different resolutions

Abstract

Disclosed herein is a device having a long-distance imaging engine formed from two cameras with different resolutions. An example imaging engine includes a front end having a camera terminated in a communication interface for coupling to an external host processor executing an image processor. The front end has a near-field image sensor and a far-field image sensor, and a normalization processor for receiving respective image data from the sensors and normalizing the image data prior to sending the image data to the host processor. Normalizing includes adjusting image size, aspect ratio, or pixel count to comply with data rate constraints imposed by the communication interface or host processor.

Description

BACKGROUND OF THE INVENTION

[0001] Industrial scanners and / or barcode readers can be used in warehouse environments and / or other environments and can be provided, for example, in the form of fixed, mountable, or mobile scanning devices. These scanners can be used to scan barcodes and other objects. It may be desirable for the scanners to be frequently used in environments involving scanning or parsing barcodes over a wide distance range, such as from a few inches to several tens of feet or more.

[0002] Such industrial scanners can be implemented in various examples, including using imagers (such as camera systems). Additionally, to perform scanning over a range of distances, some have developed scanners that include multiple camera systems, each with a different scanning range. These camera systems can include different image sensors, each with a different resolution. For example, a close-range camera can have a 1 megapixel (MP) image sensor (1280×800), and a long-range camera can have a 2MP sensor (1920×1080). In such a multi-imager sensor configuration, when images captured from various imager sensors are sent to a host processor for decoding (e.g., decoding on a mobile terminal), the host processor needs to dynamically receive images of different sizes / resolutions and then process these images for barcode decoding or other imaging. This process is particularly difficult when the host processor does not know in advance the image sizes it will receive. The host processor would need to be dynamically reprogrammed for different image sizes, which would result in dropped frames and longer decoding times.

[0003] There is a need for a multi-camera scanner that can efficiently enable a host processor to dynamically acquire images from multiple cameras at different resolutions in a manner that allows for efficient image processing and decoding on the host processor. SUMMARY OF THE INVENTION

[0004] In an embodiment, the present invention is a method for providing host processor processing of image data from an imaging sensor, the method comprising: capturing image data of a near field of an environment using one of the imaging sensors, the image data of the near field being captured in a first image size; capturing image data of a far field of the environment from another of the imaging sensors, the image data of the far field being captured in a second image size different from the first image size; transmitting the captured image data of the near field and the captured image data of the far field to a normalization processor; at the normalization processor, performing an image normalization process on at least one of the captured image data of the near field and the captured image data of the far field to normalize at least one of the first image size and the second image size before transmitting at least one of the captured image data of the near field and the captured image data of the far field to an external host processor coupled to the normalization processor via a communication interface; and at the host processor, performing image processing on at least one of the captured image data of the near field and the captured image data of the far field.

[0005] In a variant of this embodiment, the first image size is smaller than the second image size, and performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a padding process to the captured image data of the near field to increase the first image size to be equal to the second image size.

[0006] In a variant of this embodiment, the first image size is smaller than the second image size, and performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a cropping process to the captured image data of the far field to reduce the second image size to be equal to the first image size.

[0007] In a variant of this embodiment, the first image size is smaller than the second image size, and performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a pixel binning process to the captured image data of the far field to reduce the second image size to be equal to the first image size.

[0008] In a variant of this embodiment, where the first image size is smaller than the second image size, and performing the image normalization process on at least one of the captured image data of the near field of view and the captured image data of the far field of view includes: applying a scaling process to the captured image data of the far field of view to reduce the second image size to be equal to the first image size.

[0009] In a variant of this embodiment, where the first image size is smaller than the second image size, and performing the image normalization process on at least one of the captured image data of the near field of view and the captured image data of the far field of view includes: changing the aspect ratio of one or both of the captured image data of the far field of view and the captured image data of the near field of view such that the second image size is equal to the first image size.

[0010] In a variant of this embodiment, performing the image normalization process includes: reducing the number of active rows of one or both of the captured image data of the far field of view and the captured image data of the near field of view such that the second image size is equal to the first image size.

[0011] In a variant of this embodiment, performing the image normalization process results in the number of pixels in the first image size and the second image size being equal.

[0012] In a variant of this embodiment, performing the image normalization process includes: changing the first image size and / or the second image size until the captured image data of the near field of view and the captured image data of the far field of view are sent from the normalization processor to the host processor at substantially the same frame rate.

[0013] In a variant of this embodiment, the substantially the same frame rate includes: the frame rate of the captured image data of the near field of view is within + / - 10% of the frame rate of the captured image data of the far field of view.

[0014] In a variant of this embodiment, performing the image normalization process includes: changing the frame rate of the image data of the near field of view and / or the frame rate of the image data of the far field of view before transmitting to the host processor.

[0015] In a variant of this embodiment, the method further includes: adding tag data to one or both of the captured image data of the far field of view and the captured image data of the near field of view, the tag data indicating the type of the image normalization process or the source imaging sensor for one or both of the first image data and the second image data.

[0016] In a variant of this embodiment, performing the image processing includes: decoding a decodable marker in at least one of the captured image data of the near field of view and the captured image data of the far field of view.

[0017] In a variant of this embodiment, a near - field image sensor captures the image data of the near field of view and a far - field image sensor captures the image data of the far field of view, and wherein the near - field image sensor and the far - field image sensor are coupled to the normalization processor via respective data channels, each respective data channel having the same data throughput rate, and wherein the normalization processor is coupled to the host processor via an independent data channel having the same data throughput rate or a different data throughput rate.

[0018] In a variant of this embodiment, the near - field image sensor and the far - field image sensor are respectively coupled to the normalization processor via 1 - channel, 2 - channel, or 4 - channel MIPI data channels.

[0019] In a variant of this embodiment, the normalization processor is coupled to the host processor via a 2 - channel or 4 - channel MIPI data channel.

[0020] In another embodiment, the present invention is an image sensor, comprising: a front end terminated in a communication interface, the front end being configured to communicate with an external host processor via the communication interface; the front end includes: an image sensor assembly, the image sensor assembly includes: a near - field image sensor configured to capture first image data in a first image size, and a far - field image sensor configured to capture second image data in a second image size different from the first image size, and a normalization processor configured to receive the first image data and the second image data, and further configured to perform the image normalization process on at least one of the first image data and the second image data to normalize at least one of the first image size and the second image to generate a normalized image data set for transmission to the host processor, the normalization processor being coupled to the communication interface.

[0021] In a variant of this embodiment, the image sensor further includes: the external host processor coupled to the communication interface, the host processor being configured to perform image processing on the normalized image data.

[0022] In a variant of this embodiment, the normalization processor is configured to: apply a padding process to the first image data to increase the first image size to be equal to the second image size.

[0023] In a variant of this embodiment, the normalization processor is configured to: apply a cropping process to the second image data to reduce the second image size to be equal to the first image size.

[0024] In a variant of this embodiment, the normalization processor is configured to: apply a pixel merging process to the second image data to reduce the second image size to be equal to the first image size.

[0025] In a variant of this embodiment, the normalization processor is configured to: apply a scaling process to the second image data to reduce the second image size to be equal to the first image size.

[0026] In a variant of this embodiment, the normalization processor is configured to: change the aspect ratio of one or both of the first image data and the second image data such that the second image size is equal to the first image size.

[0027] In a variant of this embodiment, the normalization processor is configured to: reduce the number of active rows of one or both of the first image data and the image data such that the second image size is equal to the first image size.

[0028] In a variant of this embodiment, the normalization processor is configured to: make the number of pixels in the first image size equal to the number of pixels in the second image size.

[0029] In a variant of this embodiment, the normalization processor is configured to: change the first image size and / or the second image size until the first image data and the second image data have substantially the same frame rate on the communication interface.

[0030] In a variant of this embodiment, wherein the substantially the same frame rate includes: the frame rate of the first image data is within + / - 10% of the frame rate of the second image data.

[0031] In a variant of this embodiment, wherein the normalization processor is configured to: change the frame rate of the first image data and / or the frame rate of the second image data.

[0032] In a variant of this embodiment, the normalization processor is configured to: add tag data to one or both of the first image data and the second image data, the tag data indicating the type of the image normalization process or the source imaging sensor for one or both of the first image data and the second image data.

[0033] In a variant of this embodiment, the near-field image sensor coupled to the normalization processor via a first data channel and the far-field image sensor coupled to the normalization processor via a second data channel, the first data channel and the second data channel having the same data throughput rate, and wherein the communication interface for communicating with the external host processor provides an independent data channel, the independent data channel having the same data throughput rate as the first data channel and the second data channel or a different data throughput rate.

[0034] In a variant of this embodiment, the first data channel and the second data channel are each a 1-channel, 2-channel, or 4-channel MIPI data channel.

[0035] In a variant of this embodiment, the independent data channel provided by the communication interface is a 2-channel or 4-channel MIPI data channel. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings (wherein like reference numerals represent like or functionally similar elements throughout the different views) are incorporated into and form a part of the specification together with the following detailed description and are used to further illustrate embodiments including the concepts of the claimed invention and to explain the various principles and advantages of those embodiments.

[0037] Figure 1 A schematic diagram showing an example of an imaging device having a long-distance imaging engine formed by two image sensors, each image sensor having a different resolution, and specifically showing a dedicated front-end ASIC and a back-end host processor according to an example.

[0038] Figure 2 Shows a flowchart representing a method for providing image data from Figure 1 two imaging sensors to a host processor according to an embodiment described herein, the method including a normalization process at the ASIC.

[0039] Figure 3 Shows a flowchart representing a method for normalizing image data captured by a near-field image sensor of an Figure 1 imaging device according to an embodiment described herein, and the method can be performed by the Figure 2 method.

[0040] Figure 4 and Figure 5 Shows a padding process applied to normalize image data from an image of a near-field image sensor according to an embodiment described herein.

[0041] Figure 6shows a flowchart representative of a method for normalizing image data captured by a far - field image sensor of an imaging device according to embodiments described herein, and the method may be performed by Figure 1 the method of Figure 2 .

[0042] Those skilled in the art will understand that the elements in the figures are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of embodiments of the present invention.

[0043] Apparatus and method components have been represented in the figures by conventional symbols in appropriate positions, the representation showing only those specific details relevant to understanding the embodiments of the present invention so as not to obscure the disclosure with details that are obvious to those of ordinary skill in the art having the benefit of the description herein. Detailed Description

[0044] As previously mentioned, conventionally, industrial scanners can use multiple imagers to scan over a large distance range, where each imager has a different scan range. To allow for high - resolution imaging, each imager can have an image sensor with a different resolution. For example, a close - range imager can have a 1 - megapixel (MP) image sensor (1280×800), and a long - range imager can have a 2MP sensor (1920×1080). Conventionally, a host processor is used to identify and decode markers (or other objects) in the images received from these image sensors. However, because the images can come from different sensors and have different sizes / resolutions, the host processor needs to dynamically receive and parse the images before analysis. This process is particularly difficult when the host processor does not know in advance the image sizes it will receive. As a result, the host processor often loses frames, which are typically captured at a very high frame rate, and experiences longer decoding times than desired.

[0045] Accordingly, the aim of the present application is to eliminate these and other problems of conventional scanners by providing systems and methods.

[0046] Accordingly, the present application provides a multi - camera scanner capable of efficiently enabling a host processor to dynamically acquire images from multiple cameras at different resolutions in a manner that allows for efficient image processing and decoding on the host processor.

[0047] Figure 1 is a block diagram of an imaging device 100 that has multiple imagers with different resolutions for enabling efficient and dynamic operation of a host processor to process received images. In particular, Figure 1It is a block diagram showing an example logic circuit configuration representative of various examples herein for implementing an imaging device. The imaging device 100 may be implemented in an example logic circuit capable of executing instructions to, for example, implement the operations of the example methods described herein, as represented by the flowcharts of the accompanying figures of this specification. When various embodiments are shown and described, it is understood that an example logic circuit capable of, for example, implementing the operations of the example methods described herein may include a field programmable gate array (FPGA) and an application specific integrated circuit (ASIC). Other example logic circuits include a digital signal processor (DSP), an image signal processor (ISP), and a general purpose CPU.

[0048] The imaging device 100 includes a processing platform 102 that is coupled to two image sensors (near-field image sensor 104 and far-field image sensor 106) via respective data channels (e.g., communication buses) 108a and 108b. The processing platform 102 includes a processing front end 110 and a processing back end 112. In various examples, the processing front end 110 is configured to control the operations of the image sensors 104 and 106 to capture a single image or consecutive images on respective fields of view (FOVs), where such images are captured, stored, and transmitted as image data. The image data from the respective image sensors will be at different image resolutions, as will be further discussed herein. The front end 110 may be configured to capture the raw image data from the image sensors 104 and 106 simultaneously or sequentially. The front end 110 may be configured to capture image data in response to various triggers according to a configuration, e.g., in response to an external event (such as detecting an object entering the FOV of one of the image sensors), a user input, or by other initiation actions. Additionally, the front end 110 is configured to preprocess the captured image data and transmit it to the back end 112, which is configured to identify features of interest in the image data. In particular, the front end 110 is configured to perform a normalization process on the captured image data before transmitting the image data to the back end 112 via the communication bus 116.

[0049] To effect such preprocessing, in Figure 1In the example shown, the front end 110 includes an ASIC 114 that includes a normalization engine 118, an image sensor controller 120, and an I / O interface 122 communicatively coupled to a communication bus 116. The back end 112 includes a host processor 124 that receives captured image data (such as affected image data from the ASIC 114) through an I / O interface 126 and performs dedicated imaging processing operations on the data (such as object identification, feature identification, logo identification and decoding, or other processing-intensive operations isolated from the front end 110) to provide lightweight processing operations. In various examples, the host processor 124 may send control commands to the front end 110 (i.e., the ASIC 114) to control the operation of the image sensors 104, 106. In response, the ASIC 114 provides image data from the image sensors 104, 106 to the normalization engine 118, thereby generating affected image data, which is then transmitted to the host process 124 for image processing.

[0050] As described above, the near-field image sensor 104 and the far-field image sensor 106 capture image data within their respective different fields of view (FOVs). For example, the former captures within a range less than 44 inches from the scanner device, and the latter captures within a range greater than 8 inches from the scanner device. That is, in some examples, the operating ranges of these image sensors may overlap, while in other examples they do not. In an example, the near-field image sensor 104 captures image data with an image size of 1MP (e.g., having 1280×800 pixels), while the far-field image sensor 106 captures image data with a larger size of 2MP (e.g., 1920×1080 pixels). Although not required, generally, compared with the larger FOV (e.g., 40° FOV) of the near-field imager sensor 104, the far-field image sensor 106 has a smaller FOV (e.g., 14° FOV) (measured as the divergence angle). However, compared with the near field, objects, features, barcodes, etc. in the far field will be smaller. Therefore, generally, the far-field image sensor will have a higher resolution and thus a larger image size to maintain an accurate analysis of the image data when finally provided to the host processor 124.

[0051] The two sensors 104, 106 can be separate structures mounted on the same printed circuit board. In other examples, the two sensors 104, 106 can be integrated into a single photodiode array structure, where each sensor is partitioned into a different part of the array structure. In operation, in some examples, the image sensor controller 120 controls the sensors 104, 106 to capture image data at a sampling frame rate (e.g., 60 frames per second (fps)) in response to the image size. In some examples, the respective frame rates of the sensors 104, 106 are different from each other. Additionally, the captured image data from each sensor 104, 106 is sent to the ASIC 114. In some examples, the ASIC 114 buffers the entire captured image data (e.g., each frame). In some examples, the ASIC 114 only uses line buffering to receive the image data, thereby reducing the buffer memory size on the ASIC 114.

[0052] Although the image size is determined by the difference in pixel sizes, the speed of image capture and communication is also determined by the types of the I / O interfaces 122 and 126 and the types of the buses 108a / 108b and 116. In various examples, the interfaces 122 and 126 are each a Mobile Industry Processor Interface (MIPI) I / O interface, and the buses 108a / 108b and 116 are MIPI buses. Other example bus architectures include parallel buses, Serial Peripheral Interface (SPI), High-Speed Serial Peripheral Interface (HiSPi), Low-Voltage Differential Signaling (LVDS), and Universal Serial Bus (USB). In some examples, in addition to the connection between the interfaces 122 and 126 for affecting data transfer, the front end 110 and the back end 112 can be connected through a control interface (such as an I 2The C command / control interface or camera control interface (CCI) is connected together. Thus, in some examples, interfaces 122 and 126 can represent control and data interfaces. Each of buses 108a, 108b, and 116 can be a single-pipe bus (i.e., single-channel), while in other examples, buses 108a / 108B and 116 are dual-pipe (i.e., dual-channel) buses. For MIPI-compatible buses and interfaces, a MIPI data rate of 672 Mbps / channel can be used. In some examples, each of image sensors 104, 106 can use two MIPI channels (108a and 108b respectively) of 8 bits / pixel to transmit corresponding image data from the sensor. In such examples, the maximum output data rate to host processor 124 can be 2 * 672 Mbps = 1344 Mbps. In some examples, the data throughput rates of data channels 108a, 108b are different from the data throughput rate of the data channel between interfaces 122 and 126. In some examples, channels 108a and 108b are 1-channel, 2-channel, or 4-channel MIPI data channels, and data channel 116 is a 2-channel or 4-channel MIPI data channel.

[0053] In Figure 1 the example, backend 112 includes a local bus 128 that provides bidirectional communication between host processor 124, I / O interface 126, memory 130, and network interface 132. More generally, bus 128 can connect host processor 124 to various subsystems of imaging device 100, including a WiFi transceiver subsystem, a near-field communication (NFC) subsystem, a Bluetooth subsystem, a display screen, a series of applications (applications (apps)) stored in an application memory subsystem, a power supply that powers imaging reader 30, and a microphone and speaker subsystem.

[0054] To facilitate decoding different types of image data captured at corresponding image sensors 104, 106, backend 112 includes host processor 124, and memory 130 includes an imaging application 134 that includes an image data processing application 136. Executing image data processing application 136, host processor 124 receives image data from ASIC 114 and provides the image data as is to image data processing application program 134, or performs initial processing on the received image data, such as determining whether there is a tag or other metadata in the image data that identifies the image sensor source (104 or 106), identifying the type of normalization process that normalization engine 118 performs on the image data (as further explained herein), or having data that can be used in image processing.

[0055] In various embodiments where the imaging device 100 is a barcode scanner imaging device, the imaging application 134 can include one or more applications for more effectively identifying a marker in the image data and decoding the marker to generate decoded data corresponding to the marker. In contrast, in various embodiments where the imaging device 100 is a machine vision device, the imaging application 134 can include one or more applications for identifying one or more objects in the image data, one or more defects in the identified objects, the presence or absence of a particular object in the image data, the distance between identified objects in the image data, contrast data, luminance data, pixel count, or a combination of the foregoing.

[0056] To affect such processes, in various embodiments, the host processor 124 executes an image data processing application 136 to identify one or more barcodes (or other identifiers) in the received image data. For example, the image data processing application 136 can be configured to identify and decode the identified marker, whether the marker is a one-dimensional (1D) or two-dimensional (2D) barcode, a Quick Response (QR) code, a linear barcode, or other encoded marker. For example, decoding the barcode data can represent decoded information encoded in one or more barcodes on an object within the image data. Additionally, as part of the image data processing, the application 136 can perform pixel and image smoothing on the image data. Additional processing can include performing statistical analysis on image data blocks (such as pixel groupings) by performing edge detection to identify markers or other symbols in the image data, including the boundaries of the markers or symbols and the resolution of the markers or symbols, for sufficiently accurate identification of the markers and symbols and sufficiently accurate decoding of the markers or identification symbols.

[0057] Memory 130 may represent one or more memories and may include one or more forms of volatile and / or non-volatile, fixed and / or removable memories, such as read-only memory (ROM), electronically programmable read-only memory (EPROM), random access memory (RAM), erasable electronically programmable read-only memory (EEPROM), and / or other hard disk drives, flash memory, micro SD cards, etc. Generally, a computer program or computer-based product, application, or code (e.g., imaging application 134 (including 136) and / or other computing instructions described herein) may be stored on a computer-usable storage medium or tangible, non-transitory computer-readable medium (e.g., standard random access memory (RAM), optical disk, universal serial bus (USB) drive, etc.), which has such computer-readable program code or computer instructions embodied therein, where the computer-readable program code or computer instructions may be installed on or otherwise adapted to be executed by host processor 124 (e.g., working with the corresponding operating system in memory 130) to facilitate, implement, or execute machine-readable instructions, methods, processes, elements, or limitations as shown, depicted, or described for the various flowcharts, illustrations, diagrams, figures, and / or other disclosures herein. In this regard, the program code may be implemented in any desired programming language and may be implemented as machine code, assembly code, byte code, interpretable source code, etc. (e.g., via Golang, Python, C, C++, C#, Objective-C, Java, Scala, ActionScript, JavaScript, HTML, CSS, XML, etc.).

[0058] The host processor 124 may be connected to the memory 130 via a computer bus, such as bus 128, which is responsible for transferring electronic data, data packets, or otherwise conveying electronic signals to and from the host processor 124 and the memory 130 in order to implement or execute machine-readable instructions, methods, processes, elements, or limitations as shown, depicted, or described for the various flowcharts, diagrams, charts, figures, and / or other disclosures herein. The host processor 124 may interface with the memory 130 via the computer bus 128 to create, read, update, delete, or otherwise access or interact with data stored in the memory 130 and / or an external database (e.g., a relational database such as Oracle, DB2, MySQL, or a NoSQL-based database such as MongoDB). The data stored in the memory 130 and / or the external database may include all or part of any of the data or information described herein, including, for example, image data from images captured by the near-field image sensor 104 and the far-field image sensor 106, image data from the front end 110, and more specifically, image data from the ASIC 114.

[0059] The example processing platform 102 further includes a network interface 132 at the backend 112 to enable communication with other imaging devices (e.g., barcode imaging devices or machine vision devices) via, for example, one or more networks. The example network interface 132 includes any suitable type of (multiple) communication interfaces (e.g., wired and / or wireless interfaces), which are configured to operate according to any suitable (multiple) protocols (e.g., Ethernet for wired communication and / or IEEE 802.11 and / or USB 3.0 for wireless communication). The example processing platform 100 also includes an I / O interface 126, which in some examples represents multiple I / O interfaces (such as a MIPI I / O interface 122 physically connected to the front end 110 via a MIPI interface), and another I / O interface for receiving user input and transmitting output data to the user. For example, the device interface can be an external I / O interface of the backend 112 to allow physical connection to external peripherals, which is separate from the connection between the I / O interfaces 122 and 126. Such user input and communication can include, for example, any number of keyboards, mice, USB drives, optical drives, screens, touchscreens, etc. The front end 110 and the backend 112, which are communicatively coupled, can also be physically and removably coupled to each other via a suitable interface type. The I / O interfaces 122 and 126 can generally be any high-speed data interfaces, such as MIPI, HiSPi, or LVDS. The I / O interfaces 122 and 126 can be considered to form an image data interface or a frame interface. In some examples, a camera serial interface is used. Additionally, although the interface 126 is shown separately, the interface 126 can be integrated into the host processor 124 or connected to the host processor 124 separately. For example, image data from the front end 110 can be directly received into the interface 126 via direct memory access (DMA). In fact, the memory 130 and / or the network interface 132 can be integrated into the host processor 124. Thus, in various examples of the backend 112, there is no local bus 128 or a separate I / O interface 126, but rather direct communication occurs with the host processor 124 circuitry, which provides the functions described via an integrated module.

[0060] Figure 2FIG. 0 is a flow chart of a method 200 for providing host processor image data from a plurality of different imaging sensors in accordance with an embodiment described herein. Generally, as described above, the method 200 for providing image data includes capturing image data, and regardless of which imaging sensor source captured the image data, affecting the image data through a normalization process at a front-end processor to normalize the image data. After normalization at the front-end, the affected image data is sent to a host process at the back-end for processing. That is, the method 200 provides a method for sending raw image data of different sizes to a host to perform barcode decoding, object identification, feature identification, etc., where the size of the image data has been normalized to be equal regardless of the imager source, thereby eliminating the need to dynamically reprogram the host processor.

[0061] In the example shown, an imaging device (such as imaging device 100) captures various images (captured as image data) within a sampling time window. This image data is captured at block 202 by a near-field image sensor (e.g., image sensor 104) and at block 204 by a far-field image sensor (e.g., image sensor 106), thereby generating image data captured at different ranges, different FOVs, different resolutions, and image sizes. For illustrative purposes, blocks 202 and 204 are shown separately. Imaging device 100 can be configured to continuously capture frames of image data over corresponding FOVs, e.g., each image sensor captures at 60 fps. Different from a cellular phone type dual imaging device, imaging device 100 is capable of automatically capturing image data from either or both image sensors within a sampling time window. For example, imaging device 100 can capture images from each sensor in alternating frames and, for example, perform initial processing on such images at ASIC 114 to determine whether an object in the image is imaged better by the near-field image sensor or the far-field image sensor, e.g., by determining sharpness and assigning the image sensor and image sensor that captured the sharpest image to capture a series of image data for sending to host processor 124 for analysis. In such examples, the image data can be captured at only one of blocks 202 and 204 within the sampling window. In another example, the image data is captured at each of blocks 202 and 204.

[0062] After the image data is captured, at block 206, the image data is transferred to ASIC 114 and more specifically to the normalization engine 118, and at block 208, in response to the received image data, a normalization protocol is identified. In various examples, the normalization protocol to be applied depends on the characteristics of the received image data, such as the source image sensor, the type of image sensor (near field or far field), the pixel resolution of the image sensor, and the image size of the image data. As further discussed below, in some examples, the constraints are backend and / or host processor constraints. In an example implementation of block 208, ASIC 114 analyzes the received image data to determine the (s) characteristics for identifying the normalization protocol. In other examples, ASIC 114 may identify the characteristics based on prior knowledge of which image sensor is connected to which MIPI line pair. In various examples of receiving image data from blocks 202 and 204, block 208 may determine the characteristics of each image data to identify the normalization protocol. In some examples, the normalization protocol may be predetermined at block 208. That is, block 208 may be preconfigured to apply a specific normalization protocol.

[0063] At block 210, the identified normalization protocol is applied to one or both of the received image data. The normalization protocol includes protocols that enforce the image data received by the host processor to have the same image size regardless of the source imager sensor. In some examples, the normalization protocol enforces the image data to additionally have the same frame rate regardless of the source image sensor. In some examples, normalization is performed to ensure that the frame rate of the image data to the host processor is within + / - 10%, + / - 5%, or + / - 1% of the captured frame rate output by the source image sensor. In other examples, the normalization protocol enforces the image data to have the same aspect ratio. As further detailed, in some examples, the normalization protocol performs padding on the rows and / or columns of the lower resolution image to make its resolution and aspect ratio the same as that of the higher resolution (and larger size) image (i.e., the same number of rows and columns). In some examples, the normalization protocol performs padding on the smaller sized image, increasing the size to that of the larger image but with a different aspect ratio. Regardless of the source sensor, the image data to the host processor has the same number of pixels. In the case of such examples, as long as the host processor can accept images with the same number of pixels but with different aspect ratios, the normalization protocol can achieve a higher frame rate for the smaller image sensor. Another normalization protocol includes applying multiple scaling / padding settings to reduce the size of the larger image data to match that of the smaller image data (e.g., having the same number of rows and columns). The advantage of such a protocol is the ability to have a higher frame rate and a lower data rate to the host processor. However, such a protocol can further include ASIC selection and sending multiple versions of the larger image data to the host processor. For example, the normalization protocol can create and send a pixel binned version of the higher resolution sensor for the full FOV at a lower resolution and a cropped version at a higher resolution for a smaller FOV.

[0064] After the received image data is applied to the normalization process, at block 212, ASIC 114 sends the image data to host processor 124 for processing at block 214. In various examples, the processes of claims 202 - 212 are performed at the front end 216 of the imaging device (such as the front end 110 of processing platform 102), while the process of block 214 is performed at the back end 218 of the imaging device (such as back end 112).

[0065] Figure 3 is represented by Figure 2 blocks 208 and 210 and Figure 1Flowchart of method 300 executed by normalization engine 118. More specifically, method 300 is an example normalization protocol executed on smaller-sized image data, such as the smaller-sized image data captured by near-field image sensor 104. At block 302, method 300 identifies the received image data as smaller-sized image data (e.g., from near-field image sensor 104) and determines the row and column dimensions of the image data. At block 304, the determined dimension values are compared with the dimension values of the received larger-sized image data (e.g., from far-field image sensor 106) to determine the dimension difference, which is used in part to determine the normalization protocol. At block 306, rate constraint data is identified for use with the image dimension data to determine the normalization protocol. Example rate constraint data includes: the desired frames per second rate of the captured image data at the front end to the ASIC, the desired frames per second rate output to the back-end host processor, or other rate constraints. Another example rate constraint data is the image processing rate at the ASIC and / or host processor. For example, the image processing rate can be the processing speed of the ASIC and / or host processor for processing a row of pixels in the image data.

[0066] Based on the comparison of the dimension data and comparison data of blocks 302 and 304 and the rate constraint data of block 306, a normalization protocol is determined at block 308 and the normalization protocol is applied at block 310. Optionally, at block 312, ASIC 114 can add tag data to one or both of the captured image data, whether or not the image data has been normalized. Such tag data can indicate the type of the source image sensor (e.g., near-field or far-field), or a code indicating the type of normalization process performed on ASIC 114. Then, host processor 124 can strip the tag data, analyze the tag data, and use the tag data to configure the image processing of host processor 124.

[0067] Figure 4 and Figure 5 shows an example process of determining padding to increase the size of the smaller image data so as to normalize the image data to a larger size for processing on the host processor. Figure 4An example image data 400 captured by the near-field imager sensor 104 is shown. The image data 400 has an image pixel size of 1280×800 pixels (1MP) and is captured from the image sensor 104 to the ASIC 114 at a rate of 60 frames per second. We consider whether the image data 402 filled to a larger pixel size can be used while still meeting the goal of 60fps. To maintain the 60fps image capture rate constraint, we studied an example normalized image pixel size of 1488×825 pixels, which will add 208 additional pixel columns and 25 pixel rows, and the additional pixel rows will increase the transmission time from the imager sensor to the ASIC by an additional 505 μs. To further evaluate the effect of padding on the image data 400, Figure 5 The time constraint effect of an even larger padded image from the ASIC 114 to the host processor 124 is shown. More specifically, the image data 400 is padded to have the same pixel size (rows and columns) as the image data captured by a 2MP far-field image sensor. In the example shown, the normalized image data 404 is shown to have a pixel size of 2160×1080. Based on Figure 4 the determination shown, to maintain the 60fps rate constraint of the captured image data, the additional 280 rows of the normalized image data 404 must be transferred to the host processor within the additional transmission time of 505 μs. Considering the bus data rate (the bus data rate per MIPI channel is 672 Mbps / channel) and assuming there are two MIPI lines per bus and the pixel size is 8 bits / pixel, the maximum output data rate to the host processor is 2 * 672 Mbps = 1344 Mbps. The fastest time to output one row is (1920 + 240 = 2160 pixels) = 2160 * 8 bits / 1344 Mbps = 12.86 μs. Therefore, as Figure 5As shown, at the front end 110, the time constraint for 800 lines of active image data 400 results in 16.16 ms of processing, while the time constraint for an additional 280 lines to the host processor 124 (i.e., from the front end 110 to the back end 112) is 3.6 ms. Since 3.6 ms is greater than the 505 μs limit, the 60 fps rate constraint at the front end 110 cannot meet the host processor 124. Instead, 50.6 fps will be applied at the host processor, and considering the overhead value of the bus (e.g., the overhead of the MIPI bus is about 5%), in this example, the host processor 124 will see 48 fps of normalized (padded) image data. Thus, the normalization can be applied in block 310, which increases the image data 400 to the padded image data 404 and meets the front-end fps rate constraint (e.g., the received image to the ASIC is 60 fps) and the back-end fps rate constraint (e.g., a minimum of 30 fps to the host processor 124 or a maximum of 60 fps to the host processor). For example, the added rows and columns will be blank pixel data.

[0068] Another way to make the normalization process in block 310 meet the rate constraint is to have the ASIC not send the image data of each frame to the host processor, but skip one or more frames between sending the image data. In this way, by not processing and sending every other frame of image data, the 60 fps of image data received by the ASIC can be reduced to approximately 30 fps. The unsent image data is still processed at the front end 110 to improve the image quality of the next image data to be sent, for example, to determine parameters such as auto exposure and focus for the image data capture of subsequent frames.

[0069] The normalization process of the frame 310 can normalize the image data such that the number of pixels contained in the near-field image data is the same as that in the far-field image data. For example, 2MP far-field image data may contain 2160×1080 = 2,332,800 pixels, and the normalized near-field image data can be padded to contain 2916×800 = 2,332,800 pixels (thus also having a size of 2MP). Then, the normalization process of the frame 310 can send image data with the same number of pixels but different aspect ratios to the host processor without the host processor changing the acquisition settings. In some examples, the normalization process of the frame 310 can scramble (not pad) the rather large image data by sending 2916×800 pixels of image data to match the X and Y aspect ratios of the near-field image sensor, where one input row of the image data will occupy more than one output row of the normalized image data. In such cases, the host processor can be configured to appropriately descramble the received normalized image to correctly read the row dimensions. Thus, as described above, in some examples, the frame 310 can be configured to affect both the near-field image data and the far-field image data, only the near-field image data, or only the far-field image data based on an evaluation of the near-field image data. In some examples, normalization can also be performed to match the capability constraints of the host processor. For example, the host processor may not have the ability to handle higher frame rates or higher resolutions. Other constraints specifically imposed by the backend itself and / or the host processor include constraints such as the supported fps, the supported resolution, and whether the image data needs to be flipped due to the mounting orientation of the front end relative to the backend. Thus, in some examples, the host processor constraints are identified, for example, in lieu of or in addition to the rate constraints of the frame 306.

[0070] Figure 6 It is represented that it can be by Figure 2 the frames 208 and 210 and Figure 1Flowchart of another example method performed by the normalization engine 118. More specifically, method 500 is an example normalization protocol performed on larger size image data, such as the larger size image data captured by the far-field image sensor 106. At block 502, method 400 identifies the received image data as larger size image data (e.g., from the far-field image sensor 106), and determines the row size and column size of the image data. At block 504, the determined size values are compared with the size values of the received smaller size image data (e.g., from the near-field image sensor 106) to determine the size difference, which is used in part to determine the normalization protocol. At block 506, rate constraint data is identified for use with the image size data to determine the normalization protocol. Example rate constraint data includes: the desired frames per second rate of the captured image data at the front end to the ASIC, the desired frames per second rate output to the back-end host processor, or other rate constraints. Another example rate constraint data is the image processing rate of the ASIC and / or the host processor. For example, the image processing rate can be the processing speed of the ASIC and / or the host processor for processing a row of pixels in the image data.

[0071] Based on the comparison of the size data and comparison data of blocks 502 and 504 and the rate constraint data of block 506, a normalization protocol is determined at block 508, and the normalization protocol is applied at block 310. Similar to block 312, optional block 512 can add label data to one or both of the captured image data, whether or not the image data has been normalized. Like block 312, the label data can be a code indicating the type of normalization process performed on the ASIC 114. The label data can indicate whether illumination / flash was used during exposure, the brightness level of the image, a frame identification code (such as a frame count), whether a special illumination sequence (different LED lights) was utilized, etc. Although the label data is shown as optionally being included in the image data after normalization, in some examples, the label data can be introduced before normalization, such as before padding.

[0072] The normalization protocol for block 508 is different from that for block 308 because the normalization protocol for block 508 typically involves reducing the size of large image data or decreasing the frame rate of the image data to match the frame rate of smaller image data. Example normalizations that can be performed at block 508 include: a normalization engine 118 that divides large image data into two or more images of different scales. For example, a 2MP image can be divided into two 1MP images, and each 1MP image is sent through a different MIPI channel of the bus. In some examples, at block 520, the normalization engine 118 can simply crop the large image data to match the size of the small image data. In some examples, the normalization engine 118 can apply a pixel merging process to the larger image data. However, in a further example at block 510, the normalization engine 118 can apply an image scaler to change the image size by a non-integer value, which can be a more flexible method than cropping or pixel merging. For example, the central region of a 1MP crop of the larger image data is identified as having full pixel resolution (1280×800) to match the resolution of the smaller image data. Alternatively, 1MP at full FOV can be determined, but the pixel resolution is reduced to 1280×720. Various other image scalers can be applied. In some examples, the normalization engine 118 can reduce the active rows, active columns, or both of the large image data. It should be noted that depending on the application, the normalization protocol described with reference to block 508 can be performed on other image data at block 308, and vice versa, as well as parsing pairs of normalized image data from corresponding different image sensors. In some examples, only a portion of the normalization protocol for block 508 (or block 308) is performed on its input image, and the remainder of the normalization protocol can be performed by other blocks on their input images.

[0073] The above description relates to block diagrams of the accompanying drawings. Alternative implementations of the examples represented by the block diagrams include one or more additional or alternative elements, processes, and / or devices. Additionally or alternatively, one or more of the example boxes in the figures may be combined, divided, rearranged, or omitted. The components represented by the boxes in the figures are implemented by hardware, software, firmware, and / or any combination of hardware, software, and / or firmware. In some examples, at least one of the components represented by the boxes is implemented by logic circuitry. As used herein, the term "logic circuitry" is expressly defined as a physical device that includes at least one hardware component configured (e.g., via operations based on a predetermined configuration and / or via execution of stored machine-readable instructions) to control one or more machines and / or perform one or more operations of one or more machines. Examples of logic circuitry include one or more processors, one or more coprocessors, one or more microprocessors, one or more controllers, one or more digital signal processors (DSPs), one or more application specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), one or more microcontroller units (MCUs), one or more hardware accelerators, one or more dedicated computer chips, and one or more system-on-chip (SoC) devices. Some example logic circuitry, such as an ASIC or an FPGA, is specially configured hardware for performing operations (e.g., one or more of the operations described herein and represented by the flowcharts (if any) of the present disclosure). Some example logic circuitry is hardware that executes machine-readable instructions to perform operations (e.g., one or more of the operations described herein and represented by the flowcharts (if any) of the present disclosure). Some example logic circuitry includes a combination of specially configured hardware and hardware that executes machine-readable instructions. The above description relates to the various operations described herein and the flowcharts that may be attached herein to illustrate the flow of those operations. Any such flowchart represents an example method disclosed herein. In some examples, the method represented by the flowchart implements the apparatus represented by the block diagram. Alternative implementations of the example methods disclosed herein may include additional or alternative operations. Additionally, the operations of the alternative implementations of the methods disclosed herein may be combined, divided, rearranged, or omitted. In some examples, the operations described herein are implemented by machine-readable instructions (e.g., software and / or firmware) stored on a medium (e.g., a tangible machine-readable medium) for execution by one or more logic circuits (e.g., one or more processors). In some examples, the operations described herein are implemented by one or more configurations of one or more specially designed logic circuits (e.g., one or more ASICs). In some examples, the operations described herein are implemented by a combination of one or more specially designed logic circuits and machine-readable instructions stored on a medium (e.g., a tangible machine-readable medium) for execution by one or more logic circuits.

[0074] As used herein, each of the terms "tangible machine-readable medium", "non-transitory machine-readable medium", and "machine-readable storage device" is expressly defined as a storage medium (e.g., a disk of a hard disk drive, digital versatile disk, optical disk, flash memory, read-only memory, random access memory, etc.) on which machine-readable instructions (e.g., program code in the form of software and / or firmware) are stored for any suitable duration (e.g., permanently, for an extended period (e.g., while the program associated with the machine-readable instructions is executing) and / or for a short period (e.g., while the machine-readable instructions are cached and / or in the process of being buffered)). Additionally, as used herein, each of the terms "tangible machine-readable medium", "non-transitory machine-readable medium", and "machine-readable storage device" is expressly defined to exclude propagated signals. That is, as used in any claim of this patent, any one of the terms "tangible machine-readable medium", "non-transitory machine-readable medium", and "machine-readable storage device" cannot be construed to be implemented by a propagated signal.

[0075] In the foregoing specification, specific embodiments have been described. However, those of ordinary skill in the art understand that various modifications and changes can be made without departing from the scope of the invention as set forth in the following claims. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of this teaching. Additionally, the described embodiments / examples / implementations should not be construed as mutually exclusive, but rather should be understood to be potentially combinable, if such combination is permitted in any way. In other words, any feature disclosed in any one of the foregoing embodiments / examples / implementations can be included in any of the other foregoing embodiments / examples / implementations.

[0076] These benefits, advantages, problem solutions, and any element(s) that may cause any benefit, advantage, or solution to occur or become more prominent are not to be construed as critical, required, or essential features or elements of any or all of the claims. The claimed invention is defined only by the appended claims, including any modifications made during the pendency of this application and all equivalents of those claims as issued.

[0077] In addition, in this document, relational terms such as first and second, top and bottom, etc. may be used solely to distinguish one entity or action from another entity or action, and do not necessarily require or imply any actual such relationship or order between such entities or actions. The terms “comprises,” “comprising,” “has,” “having,” “includes,” “including,” “contains,” “containing,” or any other variation thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises, has, includes, or contains a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element preceded by “comprises a,” “has a,” “includes a,” or “contains a” does not, without more constraints, preclude the presence of additional identical elements in the process, method, article, or apparatus that comprises, has, includes, or contains that element. The term “a / an” is defined as one or more, unless expressly stated otherwise herein. The terms “substantially,” “approximately,” “about,” or any other version of these terms are defined as being close as understood by one of ordinary skill in the art, and in one non-limiting embodiment, these terms are defined as within 10%, in another embodiment within 5%, in another embodiment within 1%, and in another embodiment within 0.5%. The term “coupled” as used herein is defined as connected, although not necessarily directly or mechanically. An apparatus or structure “configured” in a certain way is configured at least in that way, but may also be configured in ways not listed.

[0078] The abstract of the present disclosure is provided to allow the reader to quickly ascertain the nature of the technical disclosure. This abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. Additionally, in the foregoing detailed description, it can be seen that for the purpose of integrating the present disclosure as a whole, various features are grouped together in various embodiments. This method of disclosure should not be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, the inventive subject matter may lie in less than all of the features of a single disclosed embodiment. Accordingly, the following claims are hereby incorporated into the detailed description, where each claim stands on its own as a separately claimed subject matter.

Claims

1. A method for providing host processor processing of image data from an imaging sensor, the method comprising: capturing image data of a near field of an environment using one of the imaging sensors, the image data of the near field being captured in a first image size; capturing image data of a far field of the environment from another of the imaging sensors, the image data of the far field being captured in a second image size, the second image size being different from the first image size; transmitting the captured image data of the near field and the captured image data of the far field to a normalization processor; at the normalization processor, performing an image normalization process on at least one of the captured image data of the near field and the captured image data of the far field to normalize at least one of the first image size and the second image size before transmitting at least one of the captured image data of the near field and the captured image data of the far field to an external host processor coupled to the normalization processor via a communication interface; and at the host processor, performing image processing on at least one of the captured image data of the near field and the captured image data of the far field.

2. The method of claim 1, wherein the first image size is smaller than the second image size, and wherein performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a padding process to the captured image data of the near field to increase the first image size to be equal to the second image size.

3. The method of claim 1, wherein the first image size is smaller than the second image size, and wherein performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a cropping process to the captured image data of the far field to reduce the second image size to be equal to the first image size.

4. The method of claim 1, wherein the first image size is smaller than the second image size, and wherein performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a pixel merging process to the captured image data of the far field to reduce the second image size to be equal to the first image size.

5. The method of claim 1, wherein the first image size is smaller than the second image size, and wherein performing the image normalization process on at least one of the captured image data of the near field and the captured image data of the far field comprises: applying a scaling process to the captured image data of the far field to reduce the second image size to be equal to the first image size.

6. The method according to claim 1, wherein the first image size is smaller than the second image size, and wherein the image normalization process is performed on at least one of the captured image data of the near field of view and the captured image data of the far field of view. comprising: changing the aspect ratio of one or both of the captured image data of the far field of view and the captured image data of the near field of view such that the second image size is equal to the first image size.

7. The method according to claim 1, wherein the image normalization process is performed comprising: reducing the number of active lines of one or both of the captured image data of the far field of view and the captured image data of the near field of view such that the second image size is equal to the first image size.

8. The method according to claim 1, wherein performing the image normalization process results in an equal number of pixels in the first image size and the second image size.

9. The method according to claim 1, wherein the image normalization process is performed comprising: changing the first image size and / or the second image size until the captured image data of the near field of view and the captured image data of the far field of view are sent from the normalization processor to the host processor at substantially the same frame rate.

10. The method according to claim 9, wherein the substantially the same frame rate comprising: the frame rate of the captured image data of the near field of view is within + / - 10% of the frame rate of the captured image data of the far field of view.

11. The method according to claim 1, wherein the image normalization process is performed comprising: changing the frame rate of the image data of the near field of view and / or the frame rate of the image data of the far field of view before being transmitted to the host processor.

12. The method according to claim 1, further comprising: adding tag data to one or both of the captured image data of the far field of view and the captured image data of the near field of view, the tag data indicating the type of the image normalization process or the source imaging sensor for one or both of the first image data and the second image data.

13. The method according to claim 1, wherein performing the image processing comprising: decoding a decodable marker in at least one of the captured image data of the near field of view and the captured image data of the far field of view.

14. The method according to claim 1, wherein a near - field image sensor captures the image data of the near field of view and a far - field image sensor captures the image data of the far field of view, and wherein the near - field image sensor and the far - field image sensor are coupled to the normalization processor via respective data channels, each respective data channel having the same data throughput rate, and wherein the normalization processor is coupled to the host processor via an independent data channel having the same data throughput rate or a different data throughput rate.

15. The method according to claim 13, wherein the near-field image sensor and the far-field image sensor are respectively coupled to the normalization processor through a 1-channel, 2-channel or 4-channel MIPI data channel.

16. The method according to claim 13, wherein the normalization processor is coupled to the host processor through a 2-channel or 4-channel MIPI data channel.

17. An image sensor, comprising: a front end terminated in a communication interface, the front end being configured to communicate with an external host processor through the communication interface; the front end includes, an image sensor assembly, the image sensor assembly includes, a near-field image sensor configured to capture first image data in a first image size, and a far-field image sensor configured to capture second image data in a second image size different from the first image size, and a normalization processor configured to receive the first image data and the second image data, and further configured to perform an image normalization process on at least one of the first image data and the second image data to normalize at least one of the first image size and the second image to generate a normalized image data set for transmission to the host processor, the normalization processor being coupled to the communication interface.

18. The image sensor according to claim 17, further comprising: the external host processor coupled to the communication interface, the host processor being configured to perform image processing on the normalized image data.

19. The image sensor according to claim 17, wherein the normalization processor is configured to: apply a padding process to the first image data to increase the first image size to be equal to the second image size.

20. The image sensor according to claim 17, wherein the normalization processor is configured to: apply a cropping process to the second image data to reduce the second image size to be equal to the first image size.

21. The image sensor according to claim 17, wherein the normalization processor is configured to: apply a pixel binning process to the second image data to reduce the second image size to be equal to the first image size.

22. The image sensor according to claim 17, wherein the normalization processor is configured to: apply a scaling process to the second image data to reduce the second image size to be equal to the first image size.

23. The image sensor according to claim 17, wherein the normalization processor is configured to: change the aspect ratio of one or both of the first image data and the second image data such that the second image size is equal to the first image size.

24. The image sensor according to claim 17, wherein the normalization processor is configured to: Reduce the number of active lines in one or both of the first image data and the image data such that the second image size is equal to the first image size.

25. The image sensor of claim 17, wherein the normalization processor is configured to: Equalize the number of pixels in the first image size with the number of pixels in the second image size.

26. The image sensor of claim 17, wherein the normalization processor is configured to: Alter the first image size and / or the second image size until the first image data and the second image data have substantially the same frame rate at the communication interface.

27. The image sensor of claim 17, wherein the substantially the same frame rate Comprises: The frame rate of the first image data is within + / - 10% of the frame rate of the second image data.

28. The image sensor of claim 17, wherein the normalization processor is configured to: Alter the frame rate of the first image data and / or the frame rate of the second image data.

29. The image sensor of claim 17, wherein the normalization processor is configured to: Add tag data to one or both of the first image data and the second image data, the tag data indicating the type of the image normalization process or the source imaging sensor for one or both of the first image data and the second image data.

30. The image sensor of claim 17, further Comprises: The near-field image sensor coupled to the normalization processor via a first data channel and the far-field image sensor coupled to the normalization processor via a second data channel, the first data channel and the second data channel having the same data throughput rate, and Wherein the communication interface for communicating with the external host processor provides independent data channels, the independent data channels having the same data throughput rate as the first data channel and the second data channel or a different data throughput rate.

31. The image sensor of claim 30, wherein the first data channel and the second data channel are each a 1-channel, 2-channel or 4-channel MIPI data channel.

32. The image sensor of claim 30, wherein the independent data channel provided by the communication interface is a 2-channel or 4-channel MIPI data channel.

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