Electronic device, interface device including electronic device, and method of driving electronic device

Abstract

The invention provides an electronic device, an interface device and a driving method of the electronic device. The electronic device includes: a display layer; a sensor layer outputting k-th sensing data for a first input during a k-th sensing period in a first mode; and a sensor driver receiving k-th sensing data from the sensor layer, where k is an integer greater than or equal to 2. The sensor driver determines a period in which k-th sensing data is sensed from among a noise period and a noiseless period, and compares noise included in the k-th sensing data with predetermined reference noise when the k-th sensing data is data sensed in the noise period. When noise included in k-th sensing data is greater than reference noise, the sensor driver generates k-th compensation sensing data by interpolating the k-th sensing data, and generates coordinate information of the first input with respect to the k-th sensing period based on the k-th compensation sensing data.

Description

Technical Field

[0001] Embodiments of the present disclosure described herein relate to an electronic device capable of detecting an external input, an interface device including the electronic device, and a method of driving the electronic device. Background Art

[0002] An electronic device may detect an external input applied from outside the electronic device. The external input may be an input of a user. The input of the user may include various types of external inputs, such as a part of the user's body, light, heat, a pen, or pressure. The electronic device may identify coordinates of a pen in an electromagnetic resonance (EMR) scheme or an active electrostatic (AES) scheme. Summary of the Invention

[0003] Embodiments of the present disclosure provide an electronic device and an interface device including the electronic device having improved detection reliability in detecting an external input.

[0004] Embodiments of the present disclosure provide a method of driving an electronic device capable of improving detection reliability in detecting an external input.

[0005] According to an embodiment, an electronic device includes: a display layer that displays an image in units of frames; a sensor layer disposed on the display layer and operating in a first mode of sensing a first input, and outputting k-th sensing data for the first input during a k-th sensing period in the first mode; and a sensor driver that drives the sensor layer and receives the k-th sensing data from the sensor layer.

[0006] The sensor driver determines a period in which the k-th sensing data is sensed among a noise period and a noise-free period, compares noise included in the k-th sensing data with a predetermined reference noise when the k-th sensing data is data sensed in the noise period, generates k-th compensated sensing data by interpolating the k-th sensing data when the noise included in the k-th sensing data is greater than the reference noise, and generates coordinate information of the first input for the k-th sensing period based on the k-th compensated sensing data. Here, k is an integer greater than or equal to 2.

[0007] According to an embodiment, an interface device includes an electronic device and an input device communicating with the electronic device. The electronic device includes: a display layer that displays an image in units of frames; a sensor layer disposed on the display layer, detecting an input through the input device, and outputting k-th sensing data for the input during a k-th sensing period; and a sensor driver that drives the sensor layer and receives the k-th sensing data from the sensor layer.

[0008] The sensor driver determines the period in which the k-th sensed data is sensed from among a noisy period and a noise-free period, compares the noise included in the k-th sensed data with a predetermined reference noise when the k-th sensed data is data sensed in the noisy period, generates k-th compensated sensed data by interpolating the k-th sensed data when the noise included in the k-th sensed data is greater than the reference noise, and generates coordinate information about an input for the k-th sensing period based on the k-th compensated sensed data. Here, k is an integer greater than or equal to 2.

[0009] According to an embodiment, a driving method of an electronic device includes: displaying an image in units of frames; outputting k-th sensed data for an input during a k-th sensing period of a sensed input; determining the period in which the k-th sensed data is sensed from among a noisy period and a noise-free period; comparing the noise included in the k-th sensed data with a predetermined reference noise when the k-th sensed data is data sensed in the noisy period, generating k-th compensated sensed data by interpolating the k-th sensed data when the noise included in the k-th sensed data is greater than the reference noise, and generating coordinate information about an input for the k-th sensing period based on the k-th compensated sensed data. Here, k is an integer greater than or equal to 2. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other objects and features of the present disclosure will become more apparent by describing embodiments of the present disclosure in detail with reference to the accompanying drawings.

[0011] Figure 1 is a perspective view showing an interface device according to an embodiment of the present disclosure.

[0012] Figure 2 is a perspective view showing an interface device according to an embodiment of the present disclosure.

[0013] Figure 3 is a block diagram schematically showing an electronic device and an input device according to an embodiment of the present disclosure.

[0014] Figure 4A is a cross-sectional view of an electronic device according to an embodiment of the present disclosure.

[0015] Figure 4B is a cross-sectional view of an electronic device according to an embodiment of the present disclosure.

[0016] Figure 5 is a cross-sectional view of an electronic device according to an embodiment of the present disclosure.

[0017] Figure 6 is a block diagram of a display layer and a display driver according to an embodiment of the present disclosure.

[0018] Figure 7is a plan view showing a part of a display layer and a switching circuit according to an embodiment of the present disclosure.

[0019] Figure 8 is a block diagram of a sensor layer and a sensor driver according to an embodiment of the present disclosure.

[0020] Figure 9A is a diagram for describing operations of a display driver and a sensor driver according to an embodiment of the present disclosure.

[0021] Figure 9B is a diagram for describing operations of a display driver and a sensor driver according to an embodiment of the present disclosure.

[0022] Figure 10 is a block diagram showing a driving controller and a sensor controller according to an embodiment of the present disclosure.

[0023] Figures 11A to 11D is a waveform diagram showing a vertical synchronization signal and a horizontal synchronization signal according to an embodiment of the present disclosure.

[0024] Figure 12 is a flowchart showing an operation process of an electronic device according to an embodiment of the present disclosure. Detailed Embodiments

[0025] Embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. In all the drawings, the same reference numerals may refer to the same elements.

[0026] It will be understood that when a component such as a film, a region, a layer, etc. is referred to as being "on", "connected to", "coupled to" or "adjacent to" another component, it may be directly on, directly connected to, directly coupled to or directly adjacent to the other component, or there may be intervening components. It will also be understood that when a component is referred to as being "between" two components, it may be the only component between the two components, or there may also be one or more intervening components. It will also be understood that when a component is referred to as "covering" another component, it may be the only component covering the other component, or there may also be one or more intervening components covering the other component. Other words used to describe the relationship between components should be interpreted in a similar manner.

[0027] The term "and / or" includes one or more combinations of each of the related elements defined therein.

[0028] Although terms such as "first", "second", etc. may be used to describe various components, the components should not be construed as being limited by such terms. These terms are only used to distinguish one component from another. For example, without departing from the scope and spirit of the present disclosure, the first component may be referred to as the second component, and similarly, the second component may be referred to as the first component.

[0029] The articles "a", "an", and "the" are singular because they have a single referent, but the use of the singular form in the specification should not exclude the existence of more than one referent.

[0030] For ease of description, spatially relative terms such as "below", "beneath", "lower", "under", "above", "upper", etc. may be used herein to describe the relationship of one element or feature to another (or others) element or feature as shown in the figures. It will be understood that such spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is flipped, an element described as "below" or "beneath" or "under" other elements or features will then be oriented "above" the other elements or features. Thus, the exemplary terms "below" and "beneath" can include both an upper and a lower orientation.

[0031] It will be understood that the terms "comprises", "comprising", "has", etc. specify the presence of the features, numbers, steps, operations, elements, or components or combinations thereof described in the specification, but do not preclude the presence or additional possibility of one or more other features, numbers, steps, operations, elements, or components or combinations thereof.

[0032] In view of the measurements discussed and the errors associated with the measurement of a particular quantity (e.g., limitations of the measurement system), as used herein, the term "about" or "approximately" includes the recited value and means within an acceptable deviation range of a particular value as determined by one of ordinary skill in the art. For example, "about" or "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the recited value.

[0033] Figure 1 is a perspective view showing an interface device according to an embodiment of the present disclosure.

[0034] Reference Figure 1 , the interface device INF may include an electronic device 1000 and an input device 2000.

[0035] The electronic device 1000 may be a device activated according to an electrical signal. For example, the electronic device 1000 may be a mobile phone, a tablet computer, an automotive navigation system, a game console, a notebook computer, or a wearable device, but is not limited thereto. Figure 1An embodiment in which the electronic device 1000 is a tablet PC is shown.

[0036] A display area 1000A and a peripheral area 1000NA may be defined in the electronic device 1000. The electronic device 1000 may display an image IM through the display area 1000A. The display area 1000A may include a plane defined by a first direction DR1 and a second direction DR2. The peripheral area 1000NA may surround the display area 1000A. In an embodiment of the present disclosure, the peripheral area 1000NA may be omitted.

[0037] The thickness direction of the electronic device 1000 may be parallel to a third direction DR3 that intersects the first direction DR1 and the second direction DR2. Accordingly, a front surface (or an upper surface) and a rear surface (or a lower surface) of a component constituting the electronic device 1000 may be defined based on the third direction DR3.

[0038] The electronic device 1000 may display the image IM in the third direction DR3. The image IM may include a still image and a moving image (e.g., a video). In Figure 1 which, a clock and an icon are shown as examples of the image IM.

[0039] The electronic device 1000 may detect an input applied from the outside of the electronic device 1000. The external input may include various types of external inputs such as, for example, a part of a user's body, light, heat, pressure, or the like.

[0040] Figure 1 The electronic device 1000 shown in which may detect an input through a user's touch and an input through the input device 2000. The input device 2000 may refer to a device other than a user's body. The input through the input device 2000 may be referred to as a "first input", and the input through a user's body may be referred to as a "second input". For example, the input device 2000 may be an active pen, a stylus pen, a touch pen, or an electronic pen.

[0041] The electronic device 1000 and the input device 2000 may be capable of two-way communication. For example, the electronic device 1000 may provide an uplink signal to the input device 2000, and the input device 2000 may provide a downlink signal to the electronic device 1000. The electronic device 1000 may detect a signal provided from the input device 2000, and may generate coordinate information for the first input by using the detected signal.

[0042] Figure 2 is a perspective view of an interface device according to an embodiment of the present disclosure. In Figure 2 the description of, the same reference numerals are assigned to reference Figure 1the same components as described, and thus, for ease of explanation, redundant descriptions thereof are omitted.

[0043] Reference Figure 2 , the interface device INF-1 may include the electronic device 1000-1 and the input device 2000. Figure 2 An embodiment is shown in which the electronic device 1000-1 is a foldable mobile phone.

[0044] The electronic device 1000-1 may display an image through the display area 1000A-1. In a state where the electronic device 1000-1 is unfolded, the display area 1000A-1 may include a plane defined by a first direction DR1 and a second direction DR2.

[0045] The display area 1000A-1 may include a first area 1000A1, a second area 1000A2, and a third area 1000A3. The first area 1000A1, the second area 1000A2, and the third area 1000A3 may be sequentially defined in the first direction DR1. The second area 1000A2 may be bent around a folding axis 1000FX extending in the second direction DR2. Accordingly, the first area 1000A1 and the third area 1000A3 may be referred to as "non-folded areas", and the second area 1000A2 may be referred to as a "folded area".

[0046] When the electronic device 1000-1 is folded, the first area 1000A1 and the third area 1000A3 may face each other. Accordingly, while the electronic device 1000-1 is fully folded, the display area 1000A-1 may not be exposed to the outside. This operation may be referred to as "inward folding". However, this is merely an example, and the operation of the electronic device 1000-1 is not limited thereto.

[0047] For example, according to an embodiment of the present disclosure, when the electronic device 1000-1 is folded, the first area 1000A1 and the third area 1000A3 may be opposite to each other. Accordingly, in a state where the electronic device 1000-1 is folded, the display area 1000A-1 may be exposed to the outside. This operation may be referred to as "outward folding".

[0048] The electronic device 1000-1 may be implemented to perform only one of the inward folding operation and the outward folding operation. Alternatively, the electronic device 1000-1 may be implemented to perform both the inward folding operation and the outward folding operation. In this case, the same area (e.g., the second area 1000A2) of the electronic device 1000-1 may be inwardly folded and outwardly folded.

[0049] Figure 2A folded region and two non-folded regions are shown, but the number of folded regions and non-folded regions is not limited thereto. For example, according to an embodiment, the electronic device 1000-1 may include a plurality of non-folded regions having a number greater than 2 and a plurality of folded regions interposed between the non-folded regions adjacent to each other.

[0050] Figure 2 It is shown that the folding axis 1000FX extends in the second direction DR2, but the present disclosure is not limited thereto. For example, according to an embodiment, the folding axis 1000FX may extend in a direction parallel to the first direction DR1. In this case, the first region 1000A1, the second region 1000A2, and the third region 1000A3 may be sequentially arranged in the second direction DR2.

[0051] The display area 1000A-1 may overlap with one or more electronic modules. For example, the electronic module may include a camera module, a proximity sensor, an illuminance sensor, etc. The electronic module may receive an external input transmitted through the display area 1000A-1, or may provide an output through the display area 1000A-1. The portion of the display area 1000A-1 that overlaps with the camera module, the proximity sensor, the illuminance sensor, etc. may have a higher transmittance than other portions of the display area 1000A-1. Accordingly, an additional area for arranging a plurality of electronic modules in the peripheral area 1000NA-1 around the display area 1000A-1 may be omitted. As a result, the area ratio of the display area 1000A-1 to the front surface of the electronic device 1000-1 may be increased.

[0052] The electronic device 1000-1 and the input device 2000 may be capable of two-way communication. The electronic device 1000-1 may provide an uplink signal to the input device 2000. The input device 2000 may provide a downlink signal to the electronic device 1000-1. The electronic device 1000-1 may detect a signal provided from the input device 2000, and may generate coordinate information about a first input by using the detected signal.

[0053] Figure 3 is a block diagram schematically showing an electronic device and an input device according to an embodiment of the present disclosure.

[0054] Referring to Figure 3 , the electronic device 1000 may include a display layer 100, a sensor layer 200, a display driver 100C (also referred to as a display driving circuit), a sensor driver 200C (also referred to as a sensor driving circuit), and a main controller 1000C (also referred to as a main controller circuit).

[0055] The display layer 100 may be a component that substantially generates an image. The display layer 100 may be a light-emitting display layer. For example, the display layer 100 may be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic light-emitting display layer, a quantum dot display layer, a micro LED display layer, or a nano LED display layer.

[0056] The sensor layer 200 may be disposed on the display layer 100. The sensor layer 200 may sense a first input or a second input applied from the outside of the electronic device 1000. Each of the first input and the second input may be an input method capable of providing a capacitance change in the sensor layer 200 or an input method capable of inducing a current in the sensor layer 200. For example, the first input may be an input through an input device 2000 (e.g., a pen) or an input through an RFID tag. For example, the input device 2000 may include a passive pen or an active pen. The second input may be a passive input method such as the body 3000 of a user (e.g., a finger).

[0057] In an embodiment of the present disclosure, the input device 2000 may be a device that generates a magnetic field having a predetermined resonance frequency. The input device 2000 may be configured to transmit an output signal based on an electromagnetic resonance method. The input device 2000 may be referred to as an "input pen", a "magnetic pen", an "indicator pen", or an "electromagnetic resonance pen".

[0058] The input device 2000 may include an RLC resonance circuit, and the RLC resonance circuit may include an inductor L and a capacitor C. In an embodiment of the present disclosure, the RLC resonance circuit may be a variable resonance circuit that changes the resonance frequency. In this case, the inductor L may be a variable inductor, and / or the capacitor C may be a variable capacitor. However, the embodiments of the present disclosure are not limited thereto.

[0059] The inductor L generates a current through a magnetic field formed in the electronic device 1000 (e.g., the sensor layer 200). However, the embodiments of the present disclosure are not limited thereto. For example, when the input device 2000 operates as an active device, the input device 2000 may generate a current even when no magnetic field is received from the electronic device 1000. The generated current is transmitted to the capacitor C. The capacitor C charges the current input from the inductor L and discharges the charged current to the inductor L. Then, the inductor L may emit a magnetic field at the resonance frequency. An induced current may flow in the sensor layer 200 through the magnetic field emitted by the input device 2000, and the induced current may be transmitted to the sensor driver 200C as a received signal (or a sensed signal).

[0060] The main controller 1000C can control the overall operation of the electronic device 1000. For example, the main controller 1000C can control the operations of the display driver 100C and the sensor driver 200C. The main controller 1000C can include at least one microprocessor and can also include a graphics controller. The main controller 1000C can be referred to as an "application processor", a "central processing unit", or a "main processor".

[0061] The display driver 100C can drive the display layer 100. The display driver 100C can receive an image signal RGB (see Figure 6 ) and a control signal CTRL (see Figure 6 ) from the main controller 1000C. The control signal CTRL can include various signals. For example, the control signal CTRL can include a vertical synchronization signal, a horizontal synchronization signal, a main clock signal, and a data enable signal. The display driver 100C can generate a control signal (e.g., a scan control signal GCS or a data control signal DCS (see Figure 6 )) for controlling the timing of supplying signals to the display layer 100 based on the control signal CTRL.

[0062] The sensor driver 200C can drive the sensor layer 200. The sensor driver 200C can receive a control signal I-CS (see Figure 8 ) from the main controller 1000C. The control signal I-CS can include a clock signal for the sensor driver 200C. In addition, the control signal I-CS can also include a mode determination signal for determining the operation mode of the sensor driver 200C and the sensor layer 200.

[0063] The sensor driver 200C can be implemented as an integrated circuit (IC) and can be electrically connected to the sensor layer 200. For example, the sensor driver 200C can be directly mounted on the display panel in a predetermined area of the display panel or mounted on a separate printed circuit board by a chip-on-film (COF) method to be electrically connected to the sensor layer 200.

[0064] The sensor driver 200C and the sensor layer 200 can selectively operate in a first mode or a second mode. For example, the first mode can be a mode for sensing an input (e.g., a first input) through the input device 2000. The second mode can be a mode for sensing a touch input (e.g., a second input). The first mode can be referred to as a "pen sensing mode" or a "first sensing mode", and the second mode can be referred to as a "touch sensing mode" or a "second sensing mode".

[0065] The conversion between the first mode and the second mode can be implemented in various ways. For example, the sensor driver 200C and the sensor layer 200 can operate in the first mode and the second mode in a time-division method, and can sense the first input and the second input. Alternatively, the conversion between the first mode and the second mode can occur due to a user's selection or a user's specific action (or input), and the first mode or the second mode can be activated or deactivated by activating or deactivating a specific application, or one mode can be converted to another mode. Alternatively, when operating alternately in the first mode and the second mode, the sensor driver 200C and the sensor layer 200 can remain in the first mode when the first input is sensed, or can remain in the second mode when the second input is sensed.

[0066] The sensor driver 200C can calculate coordinate information about the input based on the signal received from the sensor layer 200, and can provide a coordinate signal I-SS with the coordinate information to the main controller 1000C (see Figure 8 ). The main controller 1000C can perform an operation corresponding to the user's input based on the coordinate signal I-SS. For example, the main controller 1000C can operate the display driver 100C so that a new application image is displayed on the display layer 100 based on the coordinate signal I-SS.

[0067] The power supply circuit 1000P can include a power management integrated circuit (PMIC). The power supply circuit 1000P can generate a plurality of driving voltages for driving the display layer 100, the sensor layer 200, the display driver 100C, and the sensor driver 200C. For example, the plurality of driving voltages can include a gate-on voltage, a gate-off voltage, a first driving voltage (e.g., ELVDD voltage), a second driving voltage (e.g., ELVSS voltage), an initialization voltage, etc. However, the embodiments of the present disclosure are not limited to the above examples.

[0068] Figure 4A is a cross-sectional view of an electronic device according to an embodiment of the present disclosure.

[0069] Reference Figure 4A , the electronic device 1000 can include a display layer 100 and a sensor layer 200. The display layer 100 can include a base layer 110, a circuit layer 120, a light-emitting element layer 130, and a packaging layer 140.

[0070] The base layer 110 can be a member that provides a base surface on which the circuit layer 120 is disposed. The base layer 110 can be, for example, a glass substrate, a metal substrate, or a polymer substrate. However, the embodiments of the present disclosure are not limited thereto. For example, the base layer 110 can be an inorganic layer, an organic layer, or a composite material layer.

[0071] The base layer 110 may have a multi-layer structure. For example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiO x ) layer disposed on the first synthetic resin layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and a second synthetic resin layer disposed on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer may be referred to as "base barrier layers".

[0072] The circuit layer 120 may be disposed on the base layer 110. The circuit layer 120 may include, for example, an insulating layer, a semiconductor pattern, a conductive pattern, and signal lines. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 by means such as, for example, coating, evaporation, or the like. Then, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by performing a photolithography process multiple times. Then, the semiconductor pattern, the conductive pattern, and the signal lines included in the circuit layer 120 may be formed.

[0073] The light-emitting element layer 130 may be disposed on the circuit layer 120. The light-emitting element layer 130 may include light-emitting elements. For example, the light-emitting element layer 130 may include an organic light-emitting material, an inorganic light-emitting material, an organic-inorganic light-emitting material, quantum dots, quantum rods, micro LEDs, or nano LEDs.

[0074] The encapsulation layer 140 may be disposed on the light-emitting element layer 130. The encapsulation layer 140 may protect the light-emitting element layer 130 from foreign substances such as, for example, moisture, oxygen, and dust particles.

[0075] The sensor layer 200 may be formed on the display layer 100 by a continuous process. In this case, the sensor layer 200 may be directly disposed on the display layer 100. "Directly disposed" means that no intermediate member is interposed between the sensor layer 200 and the display layer 100. That is, in an embodiment, no separate adhesive member is interposed between the sensor layer 200 and the display layer 100. Alternatively, the sensor layer 200 may be coupled to the display layer 100 through an adhesive member. The adhesive member may include, for example, a general adhesive or a general tackifier.

[0076] Figure 4B is a cross-sectional view of an electronic device according to an embodiment of the present disclosure.

[0077] Reference Figure 4B , the electronic device 1000a may include a display layer 100-1 and a sensor layer 200-1. The display layer 100-1 may include a base substrate 110-1, a circuit layer 120-1, a light-emitting element layer 130-1, an encapsulation substrate 140-1, and a coupling member 150-1.

[0078] Each of the base substrate 110-1 and the encapsulation substrate 140-1 may be, for example, a glass substrate, a metal substrate, a polymer substrate, or the like, but is not particularly limited thereto.

[0079] The coupling member 150-1 may be interposed between the base substrate 110-1 and the encapsulation substrate 140-1. The coupling member 150-1 may couple the encapsulation substrate 140-1 to the base substrate 110-1 or the circuit layer 120-1. The coupling member 150-1 may include an inorganic material or an organic material. For example, the inorganic material may include a glass seal, and the organic material may include a photocurable resin or a photoplastic resin. However, the material constituting the coupling member 150-1 is not limited to this example.

[0080] The sensor layer 200-1 may be directly disposed on the encapsulation substrate 140-1. "Directly disposed" means that no intermediate member is interposed between the sensor layer 200-1 and the encapsulation substrate 140-1. That is, in an embodiment, no separate adhesive member is interposed between the sensor layer 200-1 and the display layer 100-1. However, embodiments of the present disclosure are not limited thereto, and an adhesive layer may also be interposed between the sensor layer 200-1 and the encapsulation substrate 140-1.

[0081] Figure 5 is a cross-sectional view of an electronic device according to an embodiment of the present disclosure. In Figure 5 the description, the same reference numerals are assigned to the same components described with reference to Figure 4A and thus, for ease of explanation, redundant descriptions thereof are omitted.

[0082] Reference Figure 5 , at least one inorganic layer may be formed on the upper surface of the base layer 110. The inorganic layer may include, for example, at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed of multiple layers. The multiple inorganic layers may constitute a barrier layer and / or a buffer layer. In an embodiment, the display layer 100 is shown to include a buffer layer BFL.

[0083] The buffer layer BFL may increase the bonding force between the base layer 110 and the semiconductor pattern. The buffer layer BFL may include, for example, a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer may be alternately stacked.

[0084] A semiconductor pattern including a source region SC, a channel region AL, a drain region DR, and a connection signal line SCL may be disposed on the buffer layer BFL. The semiconductor pattern may include polysilicon. However, embodiments of the present disclosure are not limited thereto. For example, the semiconductor pattern may include amorphous silicon, low-temperature polysilicon, or an oxide semiconductor.

[0085] Figure 5 Only a part of the semiconductor pattern is shown, and the semiconductor pattern may also be provided in Figure 5 another area not shown in the figure. The semiconductor pattern may be arranged across pixels according to a specific rule. The semiconductor pattern may have different electrical characteristics depending on whether the semiconductor pattern is doped. The semiconductor pattern may include a first region having high conductivity including a source region SC, a drain region DR, and a connection signal line SCL, and a second region having low conductivity including a channel region AL. The first region may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a doped region doped with a P-type dopant, and the N-type transistor may include a doped region doped with an N-type dopant. The second region may be an undoped region or may be doped with a concentration lower than that in the first region.

[0086] The conductivity of each of the first regions is greater than that of the second region. The first region may substantially serve as an electrode or a signal line. The second region may substantially correspond to the channel region AL of the transistor. In other words, a part of the semiconductor pattern may be the channel region AL of the transistor 100PC, other parts of the semiconductor pattern may be the source region SC or the drain region DR of the transistor 100PC, and still other parts of the semiconductor pattern may be a connection electrode or a connection signal line SCL.

[0087] Each of the pixels may include an equivalent circuit including a plurality of transistors, at least one capacitor, and at least one light-emitting element. The equivalent circuit of the pixel may be modified in various forms. By way of example, one transistor 100PC and one light-emitting element 100PE included in the pixel are shown in Figure 5 the figure.

[0088] The source region SC, the channel region AL, and the drain region DR of the transistor 100PC may be formed of the semiconductor pattern. The source region SC and the drain region DR may extend from the channel region AL in opposite directions in a cross-sectional view. A part of the connection signal line SCL formed of the semiconductor pattern is shown in Figure 5 the figure. The connection signal line SCL may be connected to the drain region DR of the transistor 100PC in a plan view.

[0089] The first insulating layer 10 may be disposed on the buffer layer BFL. The first insulating layer 10 may commonly overlap with a plurality of pixels and may cover the semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include at least one of, for example, aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. In an embodiment, the first insulating layer 10 may be a silicon oxide layer having a single-layer structure. Not only the first insulating layer 10 but also the insulating layers of the circuit layer 120 to be described later may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the materials described above, but is not limited thereto.

[0090] The gate GT of the transistor 100PC is disposed on the first insulating layer 10. The gate GT may be part of a metal pattern. The gate GT overlaps with the channel region AL. In the process of forming the semiconductor pattern, the gate GT may be used as a mask.

[0091] The second insulating layer 20 is disposed on the first insulating layer 10 and may cover the gate GT. The second insulating layer 20 may commonly overlap with the pixels. The second insulating layer 20 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The second insulating layer 20 may include at least one of, for example, silicon oxide, silicon nitride, and silicon oxynitride. In an embodiment, the second insulating layer 20 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0092] The third insulating layer 30 may be disposed on the second insulating layer 20. The third insulating layer 30 may have a single-layer structure or a multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.

[0093] The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the connection signal line SCL through the contact hole CNT-1 passing through the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30.

[0094] The fourth insulating layer 40 may be disposed on the third insulating layer 30. The fourth insulating layer 40 may be a single silicon oxide layer. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer.

[0095] The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through the contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0096] The sixth insulating layer 60 may be disposed on the fifth insulating layer 50 and may cover the second connection electrode CNE2. The sixth insulating layer 60 may be an organic layer.

[0097] The light-emitting element layer 130 may be disposed on the circuit layer 120. The light-emitting element layer 130 may include a light-emitting element 100PE. For example, the light-emitting element layer 130 may include an organic light-emitting material, an inorganic light-emitting material, an organic-inorganic light-emitting material, quantum dots, quantum rods, micro LEDs, or nano LEDs. Hereinafter, it will be assumed that the light-emitting element 100PE is an organic light-emitting element, but the embodiments of the present disclosure are not limited thereto.

[0098] The light-emitting element 100PE may include a first electrode AE, a light-emitting layer EL, and a second electrode CE. The first electrode AE may be disposed on the sixth insulating layer 60. The first electrode AE may be connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60.

[0099] The pixel defining layer 70 may be disposed on the sixth insulating layer 60 and may cover a part of the first electrode AE. An opening 70-OP is defined in the pixel defining layer 70. The opening 70-OP of the pixel defining layer 70 exposes at least a part of the first electrode AE.

[0100] The display area 1000A (see Figure 1 ) may include an emission area PXA and a non-emission area NPXA disposed adjacent to the emission area PXA. The non-emission area NPXA may surround the emission area PXA. In an embodiment, the emission area PXA is defined to correspond to a partial area of the first electrode AE exposed by the opening 70-OP.

[0101] The light-emitting layer EL may be disposed on the first electrode AE. The light-emitting layer EL may be disposed in a region corresponding to the opening 70-OP. Figure 5 An example of the light-emitting layer EL disposed in the opening 70-OP is shown, but this arrangement is not particularly limited thereto. For example, in an embodiment, the light-emitting layer EL may extend to cover a part of the side surface of the pixel defining layer 70 that defines the opening 70-OP and the top surface of the pixel defining layer 70.

[0102] In an embodiment of the present disclosure, the light-emitting layer EL may be separately formed in each of a plurality of pixels. When the light-emitting layer EL is separately formed in each of the pixels, each of the light-emitting layers EL may emit light of at least one color among blue, red, and green. However, the embodiments of the present disclosure are not limited thereto. For example, in an embodiment, the light-emitting layer EL may be connected and commonly included in each of the pixels. In this case, the light-emitting layer EL may provide blue light or white light.

[0103] The second electrode CE may be disposed on the light-emitting layer EL. The second electrode CE may be commonly included in a plurality of pixels in an integrated shape.

[0104] In an embodiment of the present disclosure, a hole control layer may be interposed between the first electrode AE and the light-emitting layer EL. The hole control layer may be commonly provided in the emission region PXA and the non-emission region NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electron control layer may be interposed between the light-emitting layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer may be commonly formed in a plurality of pixels by using an aperture mask or an inkjet process.

[0105] The encapsulation layer 140 may be disposed on the light-emitting element layer 130. The encapsulation layer 140 may include, for example, an inorganic layer, an organic layer, and an inorganic layer stacked in sequence. However, the layers constituting the encapsulation layer 140 are not limited thereto. The inorganic layer may protect the light-emitting element layer 130 from, for example, moisture and oxygen, and the organic layer may protect the light-emitting element layer 130 from foreign substances such as, for example, dust particles. The inorganic layer may include, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, an aluminum oxide layer, or the like. The organic layer may include, for example, an acrylic-based organic layer.

[0106] The sensor layer 200 may include a base insulating layer 201, a first conductive layer 202, an intermediate insulating layer 203, a second conductive layer 204, and a cover insulating layer 205.

[0107] The base insulating layer 201 may be an inorganic layer including at least one of, for example, silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base insulating layer 201 may be an organic layer including, for example, an epoxy resin, an acrylate resin, or an imide-based resin. The base insulating layer 201 may have a single-layer structure or may have a multi-layer structure stacked in the third direction DR3.

[0108] Each of the first conductive layer 202 and the second conductive layer 204 may have a single-layer structure or may have a multi-layer structure in which layers are stacked in the third direction DR3.

[0109] Each of the first conductive layer 202 and the second conductive layer 204 of the single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include, for example, molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (IZTO), or the like. The transparent conductive layer may include a conductive polymer such as poly(3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, graphene, or the like.

[0110] Each of the first conductive layer 202 and the second conductive layer 204 of the multi-layer structure may include a metal layer. For example, the metal layer may have a three-layer structure of titanium / aluminum / titanium. The conductive layer of the multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0111] In an embodiment of the present disclosure, the thickness of the first conductive layer 202 may be greater than or approximately equal to the thickness of the second conductive layer 204. When the thickness of the first conductive layer 202 is greater than the thickness of the second conductive layer 204, the resistance of the components (e.g., electrodes, sensing patterns, or bridging patterns) included in the first conductive layer 202 may be reduced. In addition, since the first conductive layer 202 is disposed below the second conductive layer 204, even if the thickness of the first conductive layer 202 increases, the probability that the components included in the first conductive layer 202 are recognized due to external light reflection may be lower than that of the second conductive layer 204.

[0112] At least one of the intermediate insulating layer 203 and the covering insulating layer 205 may include an inorganic film. The inorganic film may include at least one of, for example, aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0113] At least one of the intermediate insulating layer 203 and the covering insulating layer 205 may include an organic film. The organic film may include at least one of, for example, acrylate-based resins, methacrylate-based resins, polyisoprene, ethylene-based resins, epoxy-based resins, polyurethane-based resins, cellulose-based resins, silicone-based resins, polyimide-based resins, polyamide-based resins, and perylene-based resins.

[0114] In the previous description, it was assumed that the sensor layer 200 includes a total of two conductive layers (e.g., the first conductive layer 202 and the second conductive layer 204). However, the embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the sensor layer 200 may include three or more conductive layers.

[0115] Figure 6 is a block diagram of a display layer and a display driver according to an embodiment of the present disclosure.

[0116] Reference Figure 6 , the display driver 100C includes a driving controller 100C1, a data driving circuit 100C2, a scanning driving circuit 100C3, and a switching circuit 100C4.

[0117] The display layer 100 includes driving scan lines SCL1, SCL2, and SCL3 to SCLn, sensing scan lines SSL1, SSL2, and SSL3 to SSLn, data lines DL11, DL12, DL21, DL22 to DLm1 and DLm2, and pixels PX. Here, "n" and "m" are integers greater than or equal to 1. The display layer 100 can be divided into an active area AA and an inactive area NAA. The pixels PX can be provided in the active area AA of the display layer 100. The scanning driving circuit 100C3 can be provided in the inactive area NAA of the display layer 100.

[0118] The driving scan lines SCL1 to SCLn and the sensing scan lines SSL1 to SSLn extend parallel to the first direction DR1 and are arranged (e.g., spaced apart from each other) in the second direction DR2. The second direction DR2 is a direction intersecting the first direction DR1. The data lines DL11 to DLm2 extend parallel to the second direction DR2 and are arranged (e.g., spaced apart from each other) in the first direction DR1.

[0119] A plurality of pixels PX are electrically connected to the driving scan lines SCL1 to SCLn, the sensing scan lines SSL1 to SSLn, and the data lines DL11 to DLm2. Each of the plurality of pixels PX can be electrically connected to two scan lines. However, the number of scan lines connected to each of the pixels PX is not limited thereto. For example, according to an embodiment, each pixel can be electrically connected to one or three scan lines. The display layer 100 may further include readout lines (also referred to as sensing lines) extending in the second direction DR2 and arranged in the first direction DR1. In this case, the plurality of pixels PX can be connected to the readout lines.

[0120] Each of the plurality of pixels PX includes a light-emitting element and a pixel circuit unit that controls the emission of the light-emitting element. The light-emitting element may include, for example, an organic light-emitting diode, an inorganic light-emitting diode, a micro LED, or a nano LED. The pixel circuit unit may include a plurality of transistors and at least one capacitor.

[0121] The driving controller 100C1 receives the input image signal RGB and the control signal CTRL from the main controller 1000C (see Figure 3 ). The driving controller 100C1 can generate image data DATA by converting the input image signal RGB.

[0122] The driving controller 100C1 generates a scan control signal GCS and a data control signal DCS based on a control signal CTRL. The data driving circuit 100C2 receives the data control signal DCS and image data DATA from the driving controller 100C1, and then converts the image data DATA into a data voltage (also referred to as a data signal) in response to the data control signal DCS. The data driving circuit 100C2 outputs the data voltage to a plurality of data lines DL11 to DLm2. The data voltage may be an analog voltage corresponding to the gray level value of the image data DATA.

[0123] Alternatively, the data driving circuit 100C2 may also be connected to a plurality of readout lines. In this case, the data driving circuit 100C2 may also receive a sensing control signal from the driving controller 100C1, and may sense the characteristics of elements included in each of the pixels PX of the display panel in response to the sensing control signal.

[0124] According to an embodiment of the present disclosure, the data driving circuit 100C2 may be formed in the form of at least one chip (or integrated circuit). The data driving circuit 100C2 may be disposed in the non-active area NAA of the display layer 100, but is not limited thereto. For example, the data driving circuit 100C2 may be mounted on a circuit film connected to the display layer 100.

[0125] According to an embodiment of the present disclosure, the switching circuit 100C4 may be disposed between the data lines DL11 to DLm2 and the data driving circuit 100C2. The data driving circuit 100C2 may be connected to the switching circuit 100C4 through channel lines CL1 to CLm (also referred to as fan-out lines). According to an embodiment of the present disclosure, the number (m) of the channel lines CL1 to CLm may be 1 / 2 of the number (2m) of the data lines DL11 to DLm2. When the number (m) of the channel lines CL1 to CLm is 1 / 2 of the number (2m) of the data lines DL11 to DLm2, the data lines DL11 to DLm2 may be divided into two groups (for example, a first data line group and a second data line group). During a first selection period, the switching circuit 100C4 electrically connects some of the data lines DL11 to DLm2 (for example, the first data line group) to the data driving circuit 100C2. During a second selection period, the switching circuit 100C4 electrically connects some of the data lines DL11 to DLm2 (for example, the second data line group) to the data driving circuit 100C2.

[0126] According to an embodiment of the present disclosure, the switching circuit 100C4 may be disposed in the non-active area NAA of the display layer 100. For example, the switching circuit 100C4 may be formed in the non-active area NAA by the same process as each pixel circuit unit in the pixel PX. The data lines DL11 to DLm2 may be selectively driven by using the switching circuit 100C4.

[0127] In Figure 6 it is described that the switching circuit 100C4 is implemented as a separate circuit. However, the embodiments of the present disclosure are not limited thereto. For example, the switching circuit 100C4 may be included in the data driving circuit 100C2, or may be mounted on a flexible circuit film or a printed circuit board (PCB) on which the data driving circuit 100C2 is mounted.

[0128] The scan driving circuit 100C3 receives a scan control signal GCS from the driving controller 100C1. The scan driving circuit 100C3 may output a scan signal in response to the scan control signal GCS. The scan driving circuit 100C3 may be disposed in the display layer 100. When the scan driving circuit 100C3 is disposed in the display layer 100, the scan driving circuit 100C3 may include transistors formed by the same process as each pixel circuit unit in the pixel PX. The scan driving circuit 100C3 may be disposed in the non-active area NAA of the display layer 100. However, the embodiments of the present disclosure are not limited thereto. The scan driving circuit 100C3 may overlap with the active area AA of the display layer 100.

[0129] The scan driving circuit 100C3 may generate a plurality of driving scan signals and a plurality of sensing scan signals in response to the scan control signal GCS. The plurality of driving scan signals are applied to the driving scan lines SCL1 to SCLn. The plurality of sensing scan signals are applied to the sensing scan lines SSL1 to SSLn.

[0130] According to an embodiment of the present disclosure, the scan driving circuit 100C3 includes a first scan driving circuit C31 and a second scan driving circuit C32. The first scan driving circuit C31 may be disposed on the left side of the active area AA, and the second scan driving circuit C32 may be disposed on the right side of the active area AA. The first scan driving circuit C31 may receive a first scan control signal GCS1 from the driving controller 100C1, and the second scan driving circuit C32 may receive a second scan control signal GCS2 from the driving controller 100C1. The first scan driving circuit C31 may generate a plurality of driving scan signals and a plurality of sensing scan signals in response to the first scan control signal GCS1. The second scan driving circuit C32 may generate a plurality of driving scan signals and a plurality of sensing scan signals in response to the second scan control signal GCS2.

[0131] Figure 6 A structure is shown in which a first scan driving circuit C31 and a second scan driving circuit C32 are respectively positioned on the left and right sides of an active area AA. However, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the scan driving circuit 100C3 may include only one of the first scan driving circuit C31 and the second scan driving circuit C32.

[0132] In an embodiment of the present disclosure, the display layer 100 may further include a light emission control line, and the display driver 100C may further include an emission driving circuit that provides an emission control signal to the light emission control line.

[0133] Each of the plurality of pixels PX may receive a first driving voltage ELVDD and a second driving voltage ELVSS.

[0134] The power supply circuit 1000P may generate voltages for the operation of the display layer 100. In an embodiment of the present disclosure, the power supply circuit 1000P generates a first driving voltage ELVDD and a second driving voltage ELVSS for the operation of the display layer 100. The first driving voltage ELVDD and the second driving voltage ELVSS may be provided to the display layer 100 through a first driving voltage line VL1 and a second driving voltage line VL2, respectively.

[0135] In addition to the first driving voltage ELVDD and the second driving voltage ELVSS, the power supply circuit 1000P may further generate various voltages (e.g., a gamma reference voltage, a data driving voltage, a gate-on voltage, and a gate-off voltage) for the operation of the data driving circuit 100C2 and the scan driving circuit 100C3.

[0136] Figure 7 is a plan view showing a part of a display layer and a switching circuit according to an embodiment of the present disclosure.

[0137] Reference Figure 6 and Figure 7, pixels PX are arranged in a matrix form within an effective area AA in a first direction DR1 and a second direction DR2. The pixels PX include a first pixel column PX_C1 parallel to the second direction DR2 and a second pixel column PX_C2 parallel to the first pixel column PX_C1. The first pixel column PX_C1 and the second pixel column PX_C2 are arranged adjacent to each other in the first direction DR1. In an embodiment of the present disclosure, each in the first pixel column PX_C1 includes a first pixel PX1 and a second pixel PX2. For example, the first pixel PX1 may output light of a first color, and the second pixel PX2 may output light of a second color different from the light of the first color. The light of the first color may be red light, and the light of the second color may be blue light. The first pixel PX1 and the second pixel PX2 may be arranged alternately in the second direction DR2. For example, the first pixel PX1 may be set in odd rows, and the second pixel PX2 may be set in even rows.

[0138] Each in the second pixel column PX_C2 includes a third pixel PX3 that outputs light of a third color. For example, the light of the third color may be different from the light of the first color and the light of the second color, and may be, for example, green light. The 3-1 pixel PX31 among the third pixels PX3 may be arranged adjacent to the first pixel PX1 in the first direction DR1, and the 3-2 pixel PX32 among the third pixels PX3 may be arranged adjacent to the second pixel PX2 in the first direction DR1. For example, the 3-1 pixel PX31 may be set in odd rows, and the 3-2 pixel PX32 may be set in even rows. The first pixel column PX_C1 and the second pixel column PX_C2 may be arranged repeatedly and alternately in the first direction DR1.

[0139] Each first pixel column PX_C1 may be connected to two data lines (for example, referred to as "the 1-1 data line DL11" and "the 1-2 data line DL12"), and each second pixel column PX_C2 may be connected to two data lines (for example, referred to as "the 2-1 data line DL21" and "the 2-2 data line DL22"). Here, the 1-1 data line DL11 and the 2-2 data line DL22 may be included in a first data line group, and the 1-2 data line DL12 and the 2-1 data line DL21 may be included in a second data line group.

[0140] The first - 1 data line DL11 can be disposed on the first side (e.g., the left side) of the first pixel column PX_C1 to connect to the first pixel PX1 of the first pixel column PX_C1. The first - 2 data line DL12 can be disposed on the second side (e.g., the right side) of the first pixel column PX_C1 to connect to the second pixel PX2 of the first pixel column PX_C1. The second - 1 data line DL21 can be disposed on the first side (e.g., the left side) of the second pixel column PX_C2 to connect to the 3 - 1 pixel PX31 of the second pixel column PX_C2. The second - 2 data line DL22 can be disposed on the second side (e.g., the right side) of the second pixel column PX_C2 to connect to the 3 - 2 pixel PX32 of the second pixel column PX_C2.

[0141] The switching circuit 100C4 can include a first switching element SW1 and a second switching element SW2 connected to the first pixel column PX_C1, and can include a third switching element SW3 and a fourth switching element SW4 connected to the second pixel column PX_C2. The first switching element SW1 is connected between the first - 1 data line DL11 and the data driving circuit 100C2. The second switching element SW2 is connected between the first - 2 data line DL12 and the data driving circuit 100C2. The first switching element SW1 and the second switching element SW2 are electrically connected to the data driving circuit 100C2 through a channel line (e.g., the first channel line CL1). The third switching element SW3 is connected between the second - 1 data line DL21 and the data driving circuit 100C2. The fourth switching element SW4 is connected between the second - 2 data line DL22 and the data driving circuit 100C2. The third switching element SW3 and the fourth switching element SW4 are electrically connected to the data driving circuit 100C2 through a channel line (e.g., the second channel line CL2).

[0142] The switching circuit 100C4 is connected to the first selection signal line CTL1 and the second selection signal line CTL2. The switching circuit 100C4 receives the first selection signal CLO through the first selection signal line CTL1, and the switching circuit 100C4 receives the second selection signal CLE through the second selection signal line CTL2. The switching circuit 100C4 can selectively connect the first channel line CL1 to one of the 1-1 data line DL11 and the 1-2 data line DL12 in response to the first selection signal CLO and the second selection signal CLE. The switching circuit 100C4 can selectively connect the second channel line CL2 to one of the 2-1 data line DL21 and the 2-2 data line DL22 in response to the first selection signal CLO and the second selection signal CLE. The first selection signal CLO and the second selection signal CLE can be alternately activated. In other words, in the period when the first selection signal CLO is activated, the second selection signal CLE is deactivated. In the period when the second selection signal CLE is activated, the first selection signal CLO is deactivated.

[0143] The first switching element SW1 can be connected to the 1-1 data line DL11, the first channel line CL1, and the first selection signal line CTL1. The second switching element SW2 can be connected to the 1-2 data line DL12, the first channel line CL1, and the second selection signal line CTL2. The third switching element SW3 can be connected to the 2-1 data line DL21, the second channel line CL2, and the second selection signal line CTL2. The fourth switching element SW4 can be connected to the 2-2 data line DL22, the second channel line CL2, and the first selection signal line CTL1.

[0144] When the switching circuit 100C4 receives the activated first selection signal CLO and the deactivated second selection signal CLE, the first switching element SW1 and the fourth switching element SW4 are turned on, and the second switching element SW2 and the third switching element SW3 are turned off. The turned-on first switching element SW1 and fourth switching element SW4 can respectively apply the first data voltage and the second data voltage provided through the first channel line CL1 and the second channel line CL2 to the first pixel PX1 and the 3-2 pixel PX32.

[0145] When the switching circuit 100C4 receives the activated second selection signal CLE and the deactivated first selection signal CLO, the second switching element SW2 and the third switching element SW3 are turned on, and the first switching element SW1 and the fourth switching element SW4 are turned off. The turned-on second switching element SW2 and third switching element SW3 can respectively apply the first data voltage and the second data voltage provided through the first channel line CL1 and the second channel line CL2 to the second pixel PX2 and the 3-1 pixel PX31.

[0146] Since the first - 1 data line DL11 is connected to the first pixel PX1 that outputs light of the first color, the first data voltage provided to the first - 1 data line DL11 includes only data information regarding the light of the first color. Similarly, since the first - 2 data line DL12 is connected to the second pixel PX2 that outputs light of the second color, the second data voltage provided to the first - 2 data line DL12 includes only data information regarding the light of the second color.

[0147] Thus, when dedicated data lines are set for each color, the time for applying data voltage to all pixels connected to the dedicated data lines (e.g., the time for writing data) can be shortened. As a result, the proportion of the time for writing data in one frame (which can be referred to as, for example, "data period", "first period", or "active period") decreases, and thus, the proportion of the blank period (which can be referred to as, for example, "second period" or "inactive period") increases by the decreased amount.

[0148] Figure 8 is a block diagram of a sensor layer and a sensor driver according to an embodiment of the present disclosure.

[0149] Reference Figure 8 , an effective sensing area 200A and an ineffective sensing area 200NA can be defined in the sensor layer 200. The effective sensing area 200A can be an area activated according to an electrical signal. For example, the effective sensing area 200A can be an area where an input is detected. The effective sensing area 200A can overlap with the effective area AA (see Figure 6 ) of the display layer 100 (see Figure 6 ). The ineffective sensing area 200NA can surround the effective sensing area 200A. The ineffective sensing area 200NA can be an area where no input is detected. The ineffective sensing area 200NA can overlap with the ineffective area NAA (see Figure 6 ) of the display layer 100 (see Figure 6 ).

[0150] The sensor layer 200 can include a plurality of first electrodes TE1, TE2, TE3, and TE4 (also referred to as emitting electrodes) and a plurality of second electrodes RE1, RE2, RE3, RE4, RE5, and RE6 (also referred to as receiving electrodes). Each of the plurality of first electrodes TE1 to TE4 can extend in the second direction DR2, and the plurality of first electrodes TE1 to TE4 can be arranged in the first direction DR1 (e.g., spaced apart from each other). Each of the plurality of second electrodes RE1 to RE6 can extend in the first direction DR1, and the plurality of second electrodes RE1 to RE6 can be arranged in the second direction DR2 (e.g., spaced apart from each other).

[0151] The sensor layer 200 may further include a plurality of first signal lines (or first traces) connected to the plurality of first electrodes TE1 to TE4, and a plurality of second signal lines (or second traces) connected to the plurality of second electrodes RE1 to RE6.

[0152] Each of the plurality of first electrodes TE1 to TE4 may include a first sensing portion 211 and a bridging portion 212. Two first sensing portions 211 disposed adjacent to each other may be electrically connected to each other through the bridging portion 212. However, embodiments of the present disclosure are not limited thereto. The first sensing portion 211 and the bridging portion 212 may be disposed on different layers from each other.

[0153] Each of the plurality of second electrodes RE1 to RE6 may include a second sensing portion 221 and a connection portion 222. The second sensing portion 221 and the connection portion 222 may be integrated with each other and may be disposed on the same layer as each other. Each of the plurality of first electrodes TE1 to TE4 may have a mesh shape, and each of the plurality of second electrodes RE1 to RE6 may have a mesh shape.

[0154] The first sensing portion 211 and the second sensing portion 221, the bridging portion 212 and the connection portion 222 may include a metal layer. The first sensing portion 211 and the second sensing portion 221, the bridging portion 212 and the connection portion 222 may each have a mesh shape.

[0155] The sensor driver 200C may receive a control signal I-CS from the main controller 1000C (see Figure 3 ), and may provide a coordinate signal I-SS to the main controller 1000C (see Figure 3 ).

[0156] The sensor driver 200C may include a sensor controller 200C1, a signal generation circuit 200C2, and an input detection circuit 200C3. The sensor controller 200C1, the signal generation circuit 200C2, and the input detection circuit 200C3 may be implemented in the form of a single chip. Alternatively, parts of the sensor controller 200C1, the signal generation circuit 200C2, and the input detection circuit 200C3 and another part thereof may be implemented in the form of different chips from each other.

[0157] The sensor controller 200C1 may control the operation of the signal generation circuit 200C2, and may calculate the coordinates of an external input based on the sensing signal received from the input detection circuit 200C3, or may analyze the information transmitted by the input device 2000 (see Figure 3 ) based on the modulation signal received from the input detection circuit 200C3.

[0158] The signal generation circuit 200C2 can output an output signal TS (or a transmission signal) to the sensor layer 200 (e.g., the first electrodes TE1 to TE4). The signal generation circuit 200C2 can output an output signal TS that matches the operation mode to the sensor layer 200.

[0159] The input detection circuit 200C3 can receive a sensing signal SS from the sensor layer 200 (e.g., the second electrodes RE1 to RE6). The input detection circuit 200C3 can convert an analog signal into a digital signal. For example, the input detection circuit 200C3 can amplify and then filter the received sensing signal SS in analog format, and can convert the filtered signal into a digital signal.

[0160] The sensor controller 200C1 can generate a coordinate signal I-SS based on the digital signal received from the input detection circuit 200C3. For example, the sensor controller 200C1 can generate a coordinate signal I-SS by using the digital signal.

[0161] Figure 9A is a diagram for describing the operations of a display driver and a sensor driver according to an embodiment of the present disclosure.

[0162] Reference Figure 6 、 Figure 8 and Figure 9A ,the display layer 100 can display an image in units of frames. Figure 9A shows four consecutive frames in time (referred to as the "first frame FR1, second frame FR2, third frame FR3, and fourth frame FR4").

[0163] The display driver 100C (specifically, the data driving circuit 100C2 (see Figure 6 )) can provide image data DATA to the display layer 100 in response to the operation frequency of each of the first frame FR1, second frame FR2, third frame FR3, and fourth frame FR4. The operation frequency of each of the first frame FR1, second frame FR2, third frame FR3, and fourth frame FR4 can be, for example, about 60 Hz, about 90 Hz, about 120 Hz, about 240 Hz, or the like, but is not limited thereto. In Figure 9A ,the first frame FR1, second frame FR2, third frame FR3, and fourth frame FR4 have the same operation frequency as each other, but the embodiments of the present disclosure are not limited thereto. For example, each of the first frame FR1, second frame FR2, third frame FR3, and fourth frame FR4 can have an operation frequency different from that of at least one other frame.

[0164] Each of the first frame FR1, the second frame FR2, the third frame FR3, and the fourth frame FR4 may include a blanking period BT and a data period DT. The data period DT (also referred to as the first period) is defined as the period during which a data voltage is written in the display layer 100 (e.g., the pixel PX). The blanking period BT (also referred to as the second period) is defined as the period during which no data voltage is written in the display layer 100 (e.g., the pixel PX). The blanking period BT may be defined as the period for maintaining the data voltage written in the pixel PX during the previous data period DT.

[0165] The duration of the blanking period BT may be the same as or different from the duration of the data period DT. According to an embodiment of the present disclosure, the duration of each of the blanking period BT and the data period DT may correspond to half of the duration of each of the frames FR1, FR2, FR3, and FR4. In this case, the blanking period BT and the data period DT may have the same duration as each other.

[0166] As Figure 7 and Figure 9A shown, when dedicated data lines are set for each color, the proportion of the data period DT in each of the frames FR1, FR2, FR3, and FR4 decreases, and thus the proportion of the blanking period BT increases by the reduced amount. In other words, a noise-free period can be sufficiently ensured in each of the frames FR1, FR2, FR3, and FR4, which can increase the sensing reliability.

[0167] Figure 9A It is shown that within each of the frames FR1, FR2, FR3, and FR4, the data period DT lags behind the blanking period BT. However, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, within each of the frames FR1, FR2, FR3, and FR4, the data period DT may be before the blanking period BT.

[0168] In the first mode, the sensor layer 200 may sense a first input made through the input device 2000. The sensor layer 200 may sense the first input by using a sensing period as a unit. Figure 9A Eight consecutive sensing periods SPk-3, SPk-2, SPk-1, SPk, SPk+1, SPk+2, SPk+3, and SPk+4 are shown. The operating frequency of each of the sensing periods SPk-3 to SPk+4 may be, for example, about 120 Hz, about 240 Hz, or the like, but is not limited thereto. The operating frequency of each of the sensing periods SPk-3 to SPk+4 may be higher than or equal to the operating frequency of each of the frames FR1, FR2, FR3, and FR4. Figure 9AIt is shown that the operating frequency of each of the sensing periods SPk-3 to SPk+4 is twice the operating frequency of each of the frames FR1, FR2, FR3, and FR4. However, embodiments of the present disclosure are not limited thereto.

[0169] The sensor layer 200 may output k-th sensing data SDk for a first input during the k-th sensing period SPk. The sensor driver 200C may receive the k-th sensing data SDk from the sensor layer 200 during the k-th sensing period SPk. The k-th sensing period SPk may be referred to as a "current sensing period". The k-th sensing data SDk may be referred to as "current sensing data". Here, "k" may be an integer of 2 or greater.

[0170] Sensing periods before the k-th sensing period SPk (e.g., the k-3-th sensing period SPk-3, the k-2-th sensing period SPk-2, and the k-1-th sensing period SPk-1) may be referred to as "previous sensing periods". Sensing periods that lag behind the k-th sensing period SPk (e.g., the k+1-th sensing period SPk+1, the k+2-th sensing period SPk+2, the k+3-th sensing period SPk+3, and the k+4-th sensing period SPk+4) may be referred to as "subsequent sensing periods".

[0171] When receiving the k-th sensing data SDk, the sensor driver 200C may determine a period during which the k-th sensing data SDk is sensed from among a noise period and a noise-free period. According to an embodiment of the present disclosure, the data period DT may correspond to a noise period in which noise due to a data voltage is relatively large. The blank period BT may correspond to a noise-free period in which noise caused by the data voltage is relatively small or does not occur.

[0172] As Figure 9A shown, when the k-th sensing period SPk corresponds to the data period DT (e.g., the noise period), the sensor driver 200C may calculate noise from the k-th sensing data SDk. The sensor driver 200C may compare the calculated noise with a predetermined reference noise. When the noise included in the k-th sensing data SDk is greater than the reference noise, the sensor driver 200C may generate k-th compensated sensing data C_SDk by interpolating the k-th sensing data SDk. The sensor driver 200C may generate coordinate information about the first input for the k-th sensing period SPk based on the k-th compensated sensing data C_SDk.

[0173] When the noise included in the k-th sensing data SDk is less than the reference noise, the sensor driver 200C does not interpolate the k-th sensing data SDk. In this case, the sensor driver 200C may generate coordinate information about the first input for the k-th sensing period SPk based on the k-th sensing data SDk.

[0174] Alternatively, when the k-th sensed data SDk corresponds to a blank period BT (e.g., a noise-free period), the sensor driver 200C may generate coordinate information of a first input regarding the k-th sensing period SPk based on the k-th sensed data SDk without interpolating the k-th sensed data SDk.

[0175] The sensor driver 200C may interpolate the k-th sensed data SDk based on at least one of a plurality of previous sensed data sensed during a previous sensing period. The plurality of previous sensed data sensed during the previous sensing period may be one of the (k-1)-th sensed data SDk-1 sensed during the (k-1)-th sensing period SPk-1, the (k-2)-th sensed data SDk-2 sensed during the (k-2)-th sensing period SPk-2, and the (k-3)-th sensed data SDk-3 sensed during the (k-3)-th sensing period SPk-3. According to an embodiment of the present disclosure, the sensor driver 200C may interpolate the k-th sensed data SDk based on the (k-1)-th sensed data SDk-1 sensed during the (k-1)-th sensing period SPk-1. Here, the (k-1)-th sensing period SPk-1 may correspond to a blank period BT (e.g., a noise-free period).

[0176] Alternatively, the sensor driver 200C may interpolate the k-th sensed data SDk based on the (k-1)-th sensed data SDk-1 and the (k-2)-th sensed data SDk-2 (or the (k-2)-th compensated sensed data C_SDk-2) generated during the (k-2)-th sensing period SPk-2. Here, the (k-1)-th sensing period SPk-1 corresponds to a blank period BT (e.g., a noise-free period), and the (k-2)-th sensing period SPk-2 corresponds to a data period DT (e.g., a noise period). Accordingly, the sensor driver 200C may determine whether to interpolate the (k-2)-th sensed data SDk-2 without interpolating the (k-1)-th sensed data SDk-1. For example, when the noise included in the (k-2)-th sensed data SDk-2 is greater than a reference noise, the sensor driver 200C may generate the (k-2)-th compensated sensed data C_SDk-2 by interpolating the (k-2)-th sensed data SDk-2. However, according to an embodiment, when the noise included in the (k-2)-th sensed data SDk-2 is less than the reference noise, the sensor driver 200C does not interpolate the (k-2)-th sensed data SDk-2.

[0177] Accordingly, the sensor driver 200C may interpolate the k-th sensed data SDk by using the (k-1)-th sensed data SDk-1 and the (k-2)-th sensed data SDk-2 or the (k-1)-th sensed data SDk-1 and the (k-2)-th compensated sensed data C_SDk-2.

[0178] Accordingly, the sensor driver 200C may interpolate the k-th sensed data SDk based on the (k-1)-th sensed data SDk-1, the (k-2)-th sensed data SDk-2 (or the (k-2)-th compensated sensed data C_SDk-2), and the (k-3)-th sensed data SDk-3. Here, the (k-1)-th sensing period SPk-1 corresponds to a blank period BT (e.g., a noise-free period), the (k-2)-th sensing period SPk-2 corresponds to a data period DT (e.g., a noise period), and the (k-3)-th sensing period SPk-3 corresponds to a blank period BT (e.g., a noise-free period).

[0179] In this way, even when the k-th sensed data SDk is sensed during a noise period, the sensor driver 200C may perform an interpolation operation by using the previous sensed data from the previous sensing periods (e.g., the (k-3)-th sensing period SPk-3, the (k-2)-th sensing period SPk-2, and the (k-1)-th sensing period SPk-1) to obtain accurate coordinate information for the current sensing period (e.g., the k-th sensing period SPk). As a result, the sensing reliability of the electronic device 1000 (see Figure 1 ) may be increased.

[0180] Figure 9B is a diagram for describing the operations of a display driver and a sensor driver according to an embodiment of the present disclosure. In Figure 9B 's description, the same reference numerals are assigned to the same components described with reference Figure 9A and thus, for ease of explanation, redundant descriptions thereof are omitted.

[0181] Reference Figure 9B , the display layer 100 may display an image in units of frames. Figure 9B shows two consecutive frames in time (e.g., a first frame FR1a and a second frame FR2a).

[0182] The display driver 100C (specifically, the data driving circuit 100C2 (see Figure 6 )) may provide image data DATA to the display layer 100 in response to the operation frequency of each of the first frame FR1a and the second frame FR2a. The operation frequency of each of the first frame FR1a and the second frame FR2a may be lower than Figure 9A the operation frequency of each of the first frame FR1, the second frame FR2, the third frame FR3, and the fourth frame FR4 shown in

[0183] Each of the first frame FR1a and the second frame FR2a may include a data period DTa and a blank period BTa. The data period DTa (also referred to as the first period) is defined as the period during which a data voltage is written in the display layer 100 (e.g., the pixel PX). The blank period BTa (also referred to as the second period) is defined as the period during which no data voltage is written in the display layer 100 (e.g., the pixel PX). The blank period BTa may be defined as the period for maintaining the data voltage written in the pixel PX during the previous data period DTa.

[0184] The duration of the blank period BTa may be greater than the duration of the data period DTa. According to an embodiment of the present disclosure, when reducing the operating frequency of each of the first frame FR1a and the second frame FR2a to reduce power consumption, the duration of the blank period BTa may be greater than the duration of the data period DTa, for example, it may be twice the duration of the data period DTa.

[0185] In the first mode, the sensor layer 200 may sense a first input made through the input device 2000. The sensor layer 200 may sense the first input by using a sensing period as a unit. Figure 9B Six consecutive sensing periods SPk-3, SPk-2, SPk-1, SPk, SPk+1, and SPk+2 are shown. The operating frequency of each of the sensing periods SPk-3 to SPk+2 may be, for example, about 120 Hz, about 240 Hz, or the like, but is not limited thereto. The operating frequency of each of the sensing periods SPk-3 to SPk+2 may be higher than the operating frequency of each of the frames FR1a and FR2a. Figure 9B It is shown that the operating frequency of each of the sensing periods SPk-3 to SPk+2 is three times the operating frequency of each of the frames FR1a and FR2a. However, the embodiments of the present disclosure are not limited thereto.

[0186] The sensor layer 200 may output the k-th sensing data SDk for the first input during the k-th sensing period SPk. The sensor driver 200C may receive the k-th sensing data SDk from the sensor layer 200 during the k-th sensing period SPk. The k-th sensing period SPk may be referred to as a current sensing period.

[0187] The sensing periods before the k-th sensing period SPk (e.g., the k-3rd sensing period SPk-3, the k-2nd sensing period SPk-2, and the k-1st sensing period SPk-1) may be referred to as "previous sensing periods". The sensing periods following the k-th sensing period SPk (e.g., the k+1st sensing period SPk+1 and the k+2nd sensing period SPk+2) may be referred to as "subsequent sensing periods".

[0188] When the k-th sensed data SDk is received, the sensor driver 200C determines a period during which the k-th sensed data SDk is sensed from among a noise period and a noise-free period. According to an embodiment of the present disclosure, the data period DTa may correspond to the noise period, and the blank period BTa may correspond to the noise-free period. As Figure 9B shown, when the k-th sensing period SPk corresponds to the data period DTa (e.g., the noise period), the sensor driver 200C may calculate noise from the k-th sensed data SDk. The sensor driver 200C compares the calculated noise with a predetermined reference noise. When the noise included in the k-th sensed data SDk is greater than the reference noise, the sensor driver 200C generates the k-th compensated sensed data C_SDk by interpolating the k-th sensed data SDk.

[0189] The sensor driver 200C may generate coordinate information of a first input regarding the k-th sensing period SPk based on the k-th compensated sensed data C_SDk.

[0190] When the noise included in the k-th sensed data SDk is less than the reference noise, the sensor driver 200C does not interpolate the k-th sensed data SDk. In this case, the sensor driver 200C may generate coordinate information of a first input regarding the k-th sensing period SPk based on the k-th sensed data SDk.

[0191] Alternatively, when the k-th sensed data SDk corresponds to the blank period BTa (e.g., the noise-free period), the sensor driver 200C may generate coordinate information of a first input regarding the k-th sensing period SPk based on the k-th sensed data SDk without interpolating the k-th sensed data SDk.

[0192] The sensor driver 200C may interpolate the k-th sensed data SDk based on at least one of a plurality of previous sensed data sensed during a previous sensing period. The plurality of previous sensed data sensed during the previous sensing period may be one of the k-1 sensed data SDk-1 sensed during the k-1 sensing period SPk-1, the k-2 sensed data SDk-2 sensed during the k-2 sensing period SPk-2, and the k-3 sensed data SDk-3 sensed during the k-3 sensing period SPk-3. According to an embodiment of the present disclosure, the sensor driver 200C may interpolate the k-th sensed data SDk based on the k-1 sensed data SDk-1 sensed during the k-1 sensing period SPk-1. Here, the k-1 sensing period SPk-1 may correspond to the blank period BTa (e.g., the noise-free period).

[0193] Alternatively, the sensor driver 200C may interpolate the k-th sensed data SDk based on the (k-1)-th sensed data SDk-1 and the (k-2)-th sensed data SDk-2 generated during the (k-2)-th sensing period SPk-2. Here, the (k-1)-th sensing period SPk-1 and the (k-2)-th sensing period SPk-2 correspond to a blank period BTa (e.g., a noise-free period). Thus, in an embodiment, the sensor driver 200C does not interpolate the (k-1)-th sensed data SDk-1 and the (k-2)-th sensed data SDk-2.

[0194] Thus, the sensor driver 200C interpolates the k-th sensed data SDk by using the (k-1)-th sensed data SDk-1 and the (k-2)-th sensed data SDk-2.

[0195] Alternatively, the sensor driver 200C may interpolate the k-th sensed data SDk based on the (k-1)-th sensed data SDk-1, the (k-2)-th sensed data SDk-2, and the (k-3)-th sensed data SDk-3 (or the (k-3)-th compensated sensed data C_SDk-3). Here, the (k-1)-th sensing period SPk-1 and the (k-2)-th sensed data SDk-2 correspond to a blank period BTa (e.g., a noise-free period), and the (k-3)-th sensing period SPk-3 corresponds to a data period DTa (e.g., a noisy period). Thus, the sensor driver 200C may determine whether to interpolate the (k-3)-th sensed data SDk-3. For example, when the noise included in the (k-3)-th sensed data SDk-3 is greater than a reference noise, the sensor driver 200C generates the (k-3)-th compensated sensed data C_SDk-3 by interpolating the (k-3)-th sensed data SDk-3. However, in an embodiment, when the noise included in the (k-3)-th sensed data SDk-3 is less than the reference noise, the sensor driver 200C does not interpolate the (k-3)-th sensed data SDk-3.

[0196] Thus, the sensor driver 200C interpolates the k-th sensed data SDk by using the (k-1)-th sensed data SDk-1, the (k-2)-th sensed data SDk-2, the (k-3)-th sensed data SDk-3, or by using the (k-1)-th sensed data SDk-1, the (k-2)-th sensed data SDk-2, and the (k-3)-th compensated sensed data C_SDk-3.

[0197] Thus, even when the k-th sensed data SDk is sensed during the noise period, the sensor driver 200C can obtain the accurate coordinate information of the current sensing period (e.g., the k-th sensing period SPk) by performing an interpolation operation using the previous sensed data from the previous sensing periods (e.g., the k-3rd sensing period SPk-3, the k-2nd sensing period SPk-2, and the k-1st sensing period SPk-1). As a result, the sensing reliability of the electronic device 1000 (see Figure 1 ) can be increased.

[0198] Figure 9A and Figure 9B illustrate performing an interpolation operation by using the previous sensed data from at least one of the previous sensing periods (e.g., the k-3rd sensing period SPk-3, the k-2nd sensing period SPk-2, and the k-1st sensing period SPk-1). However, embodiments of the present disclosure are not limited thereto. For example, according to an embodiment, the interpolation operation can be performed by using only the data sensed during the noise-free periods among the previous sensing periods.

[0199] Refer to Figure 9A and Figure 9B . It is described that in the first mode, the sensor driver 200C senses the first input by using both the data periods DT and DTa and the blank periods BT and BTa. However, in the second mode, the sensor driver 200C can sense the second input by using only the blank periods BT and BTa. In the second mode, the second input is sensed only during the noise-free periods (e.g., the blank periods BT and BTa), and thus, the execution of the interpolation operation can be omitted.

[0200] Figure 10 is a block diagram illustrating a driving controller and a sensor controller according to an embodiment of the present disclosure. Figures 11A to 11D is a waveform diagram illustrating a vertical synchronization signal and a horizontal synchronization signal according to an embodiment of the present disclosure.

[0201] Refer to Figure 10 . The sensor controller 200C1 can receive a synchronization signal from the driving controller 100C1. According to an embodiment of the present disclosure, the synchronization signal can include a vertical synchronization signal VSYNC and a horizontal synchronization signal HSYNC. The driving controller 100C1 can provide at least one of the vertical synchronization signal VSYNC and the horizontal synchronization signal HSYNC to the sensor controller 200C1.

[0202] Here, the vertical synchronization signal VSYNC can be a signal for determining the start time point of each of the frames FR1 to FR4 (see Figure 9A ). The horizontal synchronization signal HSYNC can be a signal for determining the data period DT within each of the frames FR1 to FR4 (seeFigure 9A ) start time point or blank period BT (see Figure 9A ) end time point signal.

[0203] The drive controller 100C1 can process the synchronization signal to include information about the start time point of the data period DT (referred to as "first information") and information about the start time point of the blank period BT (referred to as "second information"), and then can send the processed synchronization signal to the sensor controller 200C1. According to an embodiment of the present disclosure, the first information and the second information can be represented by using the vertical synchronization signal VSYNC and the horizontal synchronization signal HSYNC.

[0204] Reference Figures 11A to 11D , the vertical synchronization signal VSYNC can include vertical activation periods VAP1 and VAP2 and vertical deactivation periods VNAP1 and VNAP2. According to an embodiment of the present disclosure, the vertical activation periods VAP1 and VAP2 are low-level periods, and the vertical deactivation periods VNAP1 and VNAP2 are high-level periods. However, the embodiments of the present disclosure are not limited thereto. Alternatively, the vertical activation periods VAP1 and VAP2 can be high-level periods, and the vertical deactivation periods VNAP1 and VNAP2 can be low-level periods. The drive controller 100C1 can adjust the duration of each of the vertical activation periods VAP1 and VAP2 according to the operating frequency of each of the frames FR1 to FR4.

[0205] The horizontal synchronization signal HSYNC can include horizontal activation periods HAP1 and HAP2 located within the vertical activation periods VAP1 and VAP2. According to an embodiment of the present disclosure, the horizontal activation periods HAP1 and HAP2 can be low-level periods, but are not limited thereto. Alternatively, the horizontal activation periods HAP1 and HAP2 can be high-level periods. The drive controller 100C1 can adjust the duration of each of the horizontal activation periods HAP1 and HAP2 according to the duty cycle of the data period DT.

[0206] The horizontal synchronization signal HSYNC can be activated based on one horizontal scan period HSP. In other words, the horizontal scan period HSP can be defined as one period of the horizontal synchronization signal HSYNC. According to an embodiment of the present disclosure, the vertical activation periods VAP1 and VAP2 can have a duration corresponding to "j" times the horizontal scan period HSP. Here, "j" is an integer of 1 or greater.

[0207] According to an embodiment of the present disclosure, the vertical synchronization signal VSYNC may have a first vertical activation period VAP1 and a second vertical activation period VAP2. According to an embodiment of the present disclosure, the first vertical activation period VAP1 may correspond to 1 times the horizontal scan period HSP, and the second vertical activation period VAP2 may correspond to 2 times the horizontal scan period HSP. Figures 11A to 11D It is shown that each of the first vertical activation period VAP1 and the second vertical activation period VAP2 is an integer multiple of the horizontal scan period HSP. However, embodiments of the present disclosure are not limited thereto.

[0208] According to an embodiment of the present disclosure, when the duration of the first vertical activation period VAP1 is set to 1 times the duration of the horizontal scan period HSP at an operating frequency of about 60 Hz, when the operating frequency is about 120 Hz, the duration of the second vertical activation period VAP2 may be set to twice the duration of the horizontal scan period HSP.

[0209] The operating frequency can be identified by comparing the duration of each of the vertical activation periods VAP1 and VAP2 with the duration of the horizontal scan period HSP, and information about the start time point of each of the frames FR1 to FR4 (or the start time point of the blank period BT) can be obtained.

[0210] According to an embodiment of the present disclosure, the vertical synchronization signal VSYNC may have a first horizontal activation period HAP1 and a second horizontal activation period HAP2. According to an embodiment of the present disclosure, the duration of the second horizontal activation period HAP2 may be greater than the duration of the first horizontal activation period HAP1. When the first horizontal activation period HAP1 indicates that the duty ratio of the data period DT is about 40%, the second horizontal activation period HAP2 may indicate that the duty ratio of the data period DT is about 50%.

[0211] As Figure 11A shown, the duration of each frame is set to about 16.667 ms, and the data period DT starts at a time point when the time has elapsed about 10 ms (about 60% of 16.667 ms) from the start time point of each frame when the vertical synchronization signal VSYNC has the first vertical activation period VAP1 and the horizontal synchronization signal HSYNC has the first horizontal activation period HAP1.

[0212] As Figure 11BAs shown, the duration of each frame is set to approximately 16.667 ms, and the data period DT starts at a time point at which the time has elapsed approximately 8.33 ms (about 50% of 16.667 ms) from the start time point of each frame at which the vertical synchronization signal VSYNC has a first vertical activation period VAP1 and the horizontal synchronization signal HSYNC has a second horizontal activation period HAP2.

[0213] As Figure 11C shown, the duration of each frame is set to approximately 8.33 ms, and the data period DT starts at a time point at which the time has elapsed approximately 5 ms (about 60% of 8.33 ms) from the start time point of each frame at which the vertical synchronization signal VSYNC has a second vertical activation period VAP2 and the horizontal synchronization signal HSYNC has a first horizontal activation period HAP1.

[0214] As Figure 11D shown, the duration of each frame is set to approximately 8.33 ms, and the data period DT starts at a time point at which the time has elapsed approximately 4.16 ms (about 50% of 8.33 ms) from the start time point of each frame at which the vertical synchronization signal VSYNC has a second vertical activation period VAP2 and the horizontal synchronization signal HSYNC has a second horizontal activation period HAP2.

[0215] In this way, the sensor controller 200C1 can obtain information about the start time point of the data period DT and information about the start time point of the blank period BT by using the vertical synchronization signal VSYNC and the horizontal synchronization signal HSYNC provided from the drive controller 100C1.

[0216] Figure 12 is a flowchart showing an operation process of an electronic device according to an embodiment of the present disclosure.

[0217] Referring Figure 9A and Figure 12 , the sensor layer 200 may perform a sensing operation in a first mode. The sensor layer 200 may sense an input (or a first input) by using a sensing period as a unit.

[0218] The sensor layer 200 may output k-th sensing data SDk for the input during the k-th sensing period SPk (S110). The k-th sensing period SPk may be referred to as a current sensing period.

[0219] The sensor driver 200C may receive the k-th sensing data SDk from the sensor layer 200 during the k-th sensing period SPk. When the k-th sensing data SDk is received, the sensor driver 200C determines whether the k-th sensing data SDk is sensed during a noise-free period among a noise period and a noise-free period (S120). According to an embodiment of the present disclosure, the data period DT may correspond to a noise period in which noise due to a data voltage is relatively large. The blank period BT may correspond to a noise-free period in which noise due to a data voltage is relatively small or does not occur.

[0220] When the k-th sensing period SPk corresponds to the data period DT (e.g., the noise period), the sensor driver 200C may calculate noise from the k-th sensing data SDk (S130). The sensor driver 200C compares the calculated noise with a predetermined reference noise (S140). When the noise included in the k-th sensing data SDk is greater than the reference noise, the sensor driver 200C generates the k-th compensated sensing data C_SDk by interpolating the k-th sensing data SDk (S150). The sensor driver 200C may generate coordinate information about an input for the k-th sensing period SPk based on the k-th compensated sensing data C_SDk (S160).

[0221] When the noise included in the k-th sensing data SDk is less than the reference noise, the sensor driver 200C does not interpolate the k-th sensing data SDk. In this case, the sensor driver 200C may generate coordinate information about an input for the k-th sensing period SPk based on the k-th sensing data SDk (S160).

[0222] When the k-th sensing data SDk corresponds to the blank period BT (e.g., the noise-free period), the sensor driver 200C may generate coordinate information about an input for the k-th sensing period SPk based on the k-th sensing data SDk without interpolating the k-th sensing data SDk (S160).

[0223] The sensor driver 200C may interpolate the k-th sensing data SDk based on at least one of a plurality of previous sensing data sensed during a previous sensing period.

[0224] Thus, even when the k-th sensing data SDk is sensed during a noise period, the sensor driver 200C may perform an interpolation operation by using previous sensing data from a previous sensing period (e.g., the k-3rd sensing period SPk-3, the k-2nd sensing period SPk-2, and the k-1st sensing period SPk-1) to obtain accurate coordinate information for the current sensing period (e.g., the k-th sensing period SPk). As a result, the electronic device 1000 (see Figure 1) sensing reliability.

[0225] As described above, even if the current sensed data is affected by noise, accurate coordinate information for the current sensing period can be obtained by interpolating the current sensed data using the previous sensed data from the previous sensing period. As a result, the sensing reliability of the electronic device for sensing an input made through the input device can be increased.

[0226] As is customary in the art of the present disclosure, embodiments are described and illustrated in the drawings with reference to functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc.) that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In cases where the blocks, units, and / or modules are implemented by a microprocessor or similar element, they can be programmed with software (e.g., microcode) to perform the various functions discussed herein, and optionally driven by firmware and / or software. Alternatively, each block, unit, and / or module can be implemented by dedicated hardware or as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuits) for performing other functions.

[0227] Although the present disclosure has been described with reference to embodiments of the present disclosure, it will be apparent to those of ordinary skill in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present disclosure as set forth in the appended claims.

Claims

1. Electronic equipment, including: A display layer configured to display images in units of frames; a sensor layer disposed on the display layer and configured to operate in a first mode of sensing a first input and output kth sensing data for the first input during a kth sensing period in the first mode, wherein k is an integer greater than or equal to 2; and Sensor driver, configured as: driving the sensor layer, and receiving the kth sensing data from the sensor layer; determining a period during which the k-th sensing data is sensed from among a noise period and a noise-free period; When the k-th sensing data is data sensed in the noise period, comparing noise included in the k-th sensing data with a predetermined reference noise; and When the noise included in the kth sensing data is greater than the reference noise, kth compensated sensing data is generated by interpolating the kth sensing data, and coordinate information about the first input of the kth sensing period is generated based on the kth compensated sensing data.

2. The electronic device according to claim 1, wherein: When the kth sensing data is data sensed in the noiseless period, the sensor driver generates the coordinate information of the first input regarding the kth sensing period based on the kth sensing data.

3. The electronic device according to claim 1, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing period before the kth sensing period, and The k-1th sensing period corresponds to the noise-free period.

4. The electronic device according to claim 1, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle and the k-2th sensing data or the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, wherein the k-1th sensing period corresponds to the noise-free period, and The k-2th sensing period corresponds to the noise period.

5. The electronic device according to claim 1, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle, the k-2th sensing data or the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, and the k-3th sensing data sensed during the k-3th sensing cycle before the k-2th sensing cycle, The k-1th sensing period corresponds to the noise-free period. wherein the k-2th sensing period corresponds to the noise period, and The k-3th sensing period corresponds to the noise-free period.

6. The electronic device according to claim 1, wherein: The display layer includes a plurality of pixels. The frame includes a first period and a second period that are continuous, and One of the first period and the second period corresponds to a data period in which a data voltage is written in the pixel, and the other of the first period and the second period corresponds to a blank period in which the data voltage is not written in the pixel.

7. The electronic device according to claim 6, wherein: The blank period corresponds to the noiseless period, and the data period corresponds to the noise period, and The kth sensing period corresponds to the data period.

8. The electronic device according to claim 6, wherein: The pixels are arranged in a first direction and in a second direction intersecting the first direction, and wherein a first pixel column extending in the second direction includes first pixels having a first color and second pixels having a second color different from the first color, and The display layer further includes a 1-1 data line extending in the second direction and connected to the first pixel and a 1-2 data line extending in the second direction and connected to the second pixel.

9. The electronic device according to claim 8, further comprising: a data driving circuit configured to output the data voltage; as well as a switch circuit configured to switch the electrical connection between the data driving circuit and the 1-1 data line and the 1-2 data line, The switch circuit includes a first switch element connected between the 1-1 data line and the data driving circuit and a second switch element connected between the 1-2 data line and the data driving circuit, and The first switch element and the second switch element are turned on alternately.

10. The electronic device according to claim 6, wherein: The sensor layer further operates in a second mode different from the first mode, and The second mode is a mode for detecting a second input different from the first input.

11. The electronic device according to claim 10, wherein: the sensor layer outputting sensing data for the second input during a sensing period in the second mode, Wherein, the sensor driver is further configured to: receiving the sensing data in the second mode; and generating coordinate information about the second input based on the sensing data, and The sensing period corresponds to the blank period.

12. The electronic device according to claim 6, further comprising: a display driver configured to drive the display layer, The sensor driver receives a synchronization signal from the display driver, and determines a period in which the kth sensing data is sensed from among the noise period and the noise-free period.

13. The electronic device according to claim 12, wherein: The synchronization signal includes a vertical synchronization signal that determines a start time point of the frame and a horizontal synchronization signal that determines a start time point of writing the data voltage in the pixel of the data cycle.

14. Interface equipment, including: Electronic equipment; as well as an input device configured to communicate with the electronic device, Wherein, the electronic equipment comprises: A display layer configured to display images in units of frames; a sensor layer disposed on the display layer and configured to detect an input from the input device and output kth sensing data for the input during a kth sensing period, wherein k is an integer greater than or equal to 2; and Sensor driver, configured as: driving the sensor layer, and receiving the kth sensing data from the sensor layer; determining a period during which the k-th sensing data is sensed from among a noise period and a noise-free period; When the k-th sensing data is data sensed in the noise period, comparing noise included in the k-th sensing data with a predetermined reference noise; and When the noise included in the kth sensing data is greater than the reference noise, kth compensated sensing data is generated by interpolating the kth sensing data, and coordinate information about the input of the kth sensing period is generated based on the kth compensated sensing data.

15. The interface device according to claim 14, wherein: When the kth sensing data is data sensed in the noiseless period, the sensor driver generates the coordinate information about the input of the kth sensing period based on the kth sensing data.

16. The interface device according to claim 14, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing period before the kth sensing period, and The k-1th sensing period corresponds to the noise-free period.

17. The interface device according to claim 14, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle and the k-2th sensing data or the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, wherein the k-1th sensing period corresponds to the noise-free period, and The k-2th sensing period corresponds to the noise period.

18. The interface device according to claim 14, wherein: The sensor driver is further configured to: generating the kth compensated sensing data by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle, the k-2th sensing data or the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, and the k-3th sensing data sensed during the k-3th sensing cycle before the k-2th sensing cycle, The k-1th sensing period corresponds to the noise-free period. wherein the k-2th sensing period corresponds to the noise period, and The k-3th sensing period corresponds to the noise-free period.

19. A driving method for an electronic device, the driving method comprising: Display images in frames; outputting kth sensing data for the input during a kth sensing period of sensing the input, wherein k is an integer greater than or equal to 2; determining a period during which the k-th sensing data is sensed from among a noise period and a noise-free period; when the kth sensing data is data sensed in the noise period, comparing noise included in the kth sensing data with a predetermined reference noise; generating k th compensated sensing data by interpolating the k th sensing data when the noise included in the k th sensing data is greater than the reference noise; and Coordinate information of the input regarding the kth sensing period is generated based on the kth compensated sensing data.

20. The driving method according to claim 19, further comprising: When the kth sensing data is data sensed in the noiseless period, the coordinate information about the input of the kth sensing period is generated based on the kth sensing data.

21. The driving method according to claim 19, wherein: The kth compensated sensing data is generated by interpolating the kth sensing data based on the k-1th sensing data sensed during a k-1th sensing period before the kth sensing period, and The k-1th sensing period corresponds to the noise-free period.

22. The driving method according to claim 19, wherein: the kth compensated sensing data is generated by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle and the k-2th sensing data or the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, wherein the k-1th sensing period corresponds to the noise-free period, and The k-2th sensing period corresponds to the noise period.

23. The driving method according to claim 19, wherein: The kth compensated sensing data is generated by interpolating the kth sensing data based on the k-1th sensing data sensed during the k-1th sensing cycle before the k-1th sensing cycle, the k-2th compensated sensing data generated during the k-2th sensing cycle before the k-1th sensing cycle, and the k-3th sensing data sensed during the k-3th sensing cycle before the k-2th sensing cycle, The k-1th sensing period corresponds to the noise-free period. wherein the k-2th sensing period corresponds to the noise period, and The k-3th sensing period corresponds to the noise-free period.

24. The driving method according to claim 19, wherein: The frame includes a first period and a second period that are consecutive, wherein one of the first period and the second period corresponds to a data period in which data voltages are written in a plurality of pixels, and the other of the first period and the second period corresponds to a blank period in which the data voltages are not written in the pixels, and Wherein, determining the period in which the k-th sensing data is sensed from among the noise period and the noise-free period is performed based on a synchronization signal.

25. The driving method according to claim 24, wherein: The synchronization signal includes a vertical synchronization signal that determines a start time point of the frame and a horizontal synchronization signal that determines a start time point of writing the data voltage in the pixel of the data cycle.

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