Three-dimensional geographic information data fusion model display system

Abstract

The invention discloses a three-dimensional geographic information data fusion model display system, and belongs to the technical field of visualization of data centers. The three-dimensional geographic information data fusion model display system comprises a geographic information acquisition module, a data preprocessing cache module, a microprocessor module, a three-dimensional image reconstruction module, a data arrangement module, a visualization server and a visualization display module. According to the method, quick response, rich scenes and high interaction can be achieved, deep and multi-dimensional analysis of data can be achieved especially for a large complex data set, the analysis result is visually displayed to a user in a multi-visual-scene mode, visual scene conversion is achieved through man-machine interaction, effective information communication is achieved, and the user experience is improved. A user can find potential laws and internal values of the data in an easy-to-understand manner; and integration, three-dimensional all-around delivery and analysis of geographic information are realized, and observation and analysis of a user are facilitated.

Description

Technical Field

[0001] The present invention belongs to the technical field of three-dimensional visualization, and particularly relates to a three-dimensional geographic information data fusion model display system. Background Art

[0002] In recent years, with the continuous development of technology, more and more geographic information industries have penetrated into various fields of economic society and people's daily lives. Generally, geographic information refers to various information related to geographical locations. For example, mountains, rivers, lakes, transportation, towns, etc. on the earth's surface, and all information related to geographical locations and implicitly having geographical location attributes can be called geographic information.

[0003] Traditional geographic information is generally presented by paper maps. When integrating geographic information data, it is necessary to reduce the basic surveying and mapping data collected in the research area to a preset ratio and draw it on the map for display to users. With the progress of technology, the presentation methods of geographical locations have become more and more diverse. When integrating surveying and mapping data, it is usually displayed through modern software such as electronic maps and three-dimensional maps after integrating geographic information data, so as to more intuitively and vividly display geographic information data.

[0004] However, existing software such as electronic maps and three-dimensional maps generally has defects such as being unable to achieve all-round display and analysis of geographic information, resulting in poor correlation between data. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a three-dimensional geographic information data fusion model display system in view of the deficiencies of the background art, which realizes all-round display and analysis of geographic information.

[0006] The present invention adopts the following technical solutions to solve the above technical problems: A three-dimensional geographic information data fusion model display system includes a geographic information acquisition module, a data preprocessing and caching module, a microprocessor module, a three-dimensional image reconstruction module, a data sorting module, a visualization server, and a visualization display module; Among them, the geographic information acquisition module is used to collect geographic information data and send the obtained geographic information data to the data preprocessing and caching module; The data preprocessing and caching module is used to efficiently cache the geographic information parameters collected by the geographic information acquisition module, adopt a three-level data caching mechanism, and use the high-efficiency read and write performance of the internal FIFO and the large-capacity off-chip DDR2 storage for real-time upload; The 3D image reconstruction module acquires the depth data of the image for the geographic information, triangulates the obtained image depth data, then fuses all the triangulated depth images in the scale space to construct a hierarchical directed distance field, applies the global triangulation algorithm to all the voxels in the distance field to generate a convex hull covering all the voxels, constructs the isosurface, completes the 3D image reconstruction, and sends the reconstructed data to the data arrangement module; The data arrangement module is used to convert the text description information into audio data, mark it on the corresponding 3D image, and complete the compilation of the 3D image playback track in a preset template. During playback, each 3D image is played in a mode of rotating clockwise from left to right. During playback, the image at the current position is automatically enlarged, dissected, and the corresponding audio data is played; The visualization server includes a visualization module, an interaction control module, and a scene vision module. The visualization module is connected to the data mining server and is used to receive data from the data mining server; The visualization display module is used to interact with the interaction control module and display the relevant data visualization screen.

[0007] As a further preferred solution of a 3D geographic information data fusion model display system of the present invention, it further includes a memory module, a clock module, a data transmission module, and a power supply module; Among them, the memory module is used to store the geographic information data collected by the geographic information acquisition module; The clock module is used to record time; The data transmission module is used for the data transmission of the geographic information data; The power supply module is used to provide the electric energy required by the 3D geographic information visualization system.

[0008] As a further preferred solution of a 3D geographic information data fusion model display system of the present invention, it further includes a network crawling module, a target data acquisition module, a human-computer interaction module, and an image stitching module. The network crawling module, the target data acquisition module, the human-computer interaction module, and the image stitching module are respectively connected to the microprocessor module; Among them, the network crawling module is used to crawl the corresponding satellite image on the network according to the feature information of the collected image, so as to obtain the image longitude and latitude information; the network crawler module calculates the feature information based on the CCIPCA algorithm according to the text description information corresponding to the image; The target data acquisition module is internally provided with an algorithm call module, which is used to realize the calculation and analysis of the 3D image by calling different algorithms, so as to obtain the corresponding target data; The human-computer interaction module is used for the input of various control commands; An image stitching module, which is used to stitch each image according to the latitude and longitude information of each image, so as to construct an overall three-dimensional image.

[0009] As a further preferred solution of a three-dimensional geographic information data fusion model display system of the present invention, the data preprocessing cache module includes an input FIFO module, a DDR controller, an image parameter calculation module, a DDR2 SDRAM, and an output FIFO module. The output end of the video acquisition module is connected to the input end of the input FIFO module, the output end of the input FIFO module is connected to the input end of the DDR2 SDRAM, the output end of the DDR2 SDRAM is connected to the input end of the output FIFO module, the output end of the image parameter calculation module is also connected to the input end of the DDR2 SDRAM through the DDR controller, and the output end of the output FIFO module is connected to the input end of the FPGA control module.

[0010] As a further preferred solution of a three-dimensional geographic information data fusion model display system of the present invention, the microprocessor module includes a data acquisition control module, a data processing module, a RAM read / write module, an interface chip control unit, a synchronous clock control module, a command deframing module, a data interpretation module, as well as a power supply circuit, a reset circuit, a crystal oscillator circuit, a download circuit, and a configuration SPI Flash circuit. The data acquisition control module, the interface chip control unit, the synchronous clock control module, the command deframing module, the data interpretation module, as well as the power supply circuit, the reset circuit, the crystal oscillator circuit, the download circuit, and the configuration SPI Flash circuit are respectively connected to the data processing module and the RAM read / write module.

[0011] As a further preferred solution of a three-dimensional geographic information data fusion model display system of the present invention, the power supply module includes a voltage source and an overvoltage protection circuit connected thereto. The overvoltage protection circuit includes a reference voltage circuit and a feedback control circuit; Among them, the reference voltage circuit is used to generate a reference voltage according to the source voltage when the source voltage exceeds the clamping voltage; The feedback control circuit is used to receive the reference voltage and clamp the output voltage to the clamping voltage; Specifically, it includes a first diode Z1, a second diode Z2, a third diode Z3, a fourth diode Z4, a fifth diode Z5, a first resistor R1, a second resistor R2, a third resistor R3, a PMOS transistor M1, a PMOS transistor M2, a PMOS transistor M3, and a PMOS transistor M4; the anode of the first diode Z1 is connected to one end of the first resistor R1, the cathode of the first diode Z1 is connected to the cathode of the second diode Z2, the anode of the second diode Z2 is connected to the cathode of the third diode Z3, the anode of the third diode Z3 is respectively connected to one end of the second resistor R2, the anode of the fourth diode Z4, one end of the third resistor R3, the anode of the fifth diode Z5, and the source of the PMOS transistor M1, the other end of the first resistor R1 is respectively connected to the drain of the PMOS transistor M3, the gate of the PMOS transistor M3, and the gate of the PMOS transistor M4, the source of the PMOS transistor M3 is respectively connected to the source of the PMOS transistor M4, the drain of the PMOS transistor M2, and the drain of the PMOS transistor M1, the drain of the PMOS transistor M4 is respectively connected to the other end of the second resistor R2, the cathode of the fourth diode Z4, and the gate of the PMOS transistor M2, the source of the PMOS transistor M2 is respectively connected to the other end of the third resistor R3, the cathode of the fifth diode Z5, and the gate of the PMOS transistor M1.

[0012] As a further preferred embodiment of a three-dimensional geographic information data fusion model display system of the present invention, the data transmission module includes an antenna ANT1, capacitors C11, C12, C13, C14, C15, C16, resistors R21, R22, inductors L11, L12, chips U1, U2, U3. One end of the antenna ANT1 is respectively connected to one end of the inductor L11 and one end of the capacitor C16. The other end of the inductor L11 is grounded. The other end of the capacitor C16 is respectively connected to one end of the inductor L12 and pin 2 of the chip U1. The other end of the inductor L12 is grounded. Pin 3 and pin 4 of the chip U1 are respectively connected to one end of the capacitor C14, one end of the capacitor C15 and the VDD terminal. The other ends of the capacitor C14 and the capacitor C15 are respectively grounded. Pin 1 of the chip U1 is respectively connected to one end of the capacitor C13, the VDD terminal, pin 30 and pin 29 of the chip U1. The other end of the capacitor C13 is grounded. Pin 31 of the chip U1 is connected to one end of the resistor R21. The other end of the resistor R21 is grounded. Pin 28 of the chip U1 is respectively connected to one end of the capacitor C11 and pin 1 of the chip U2. Pin 2 of the chip U2 is grounded. The other end of the capacitor C11 is grounded. Pin 4 of the chip U2 is grounded. Pin 3 of the chip U2 is respectively connected to one end of the capacitor C12 and pin 27 of the chip U1. The other end of the capacitor C12 is grounded. Pin 18 of the chip U1 is connected to pin 7 of the chip U3. Pin 19 of the chip U1 is connected to pin 3 of the chip U3. Pin 20 of the chip U1 is connected to pin 1 of the chip U3. Pin 21 of the chip U1 is connected to pin 6 of the chip U3 through the resistor R22. Pin 22 of the chip U1 is connected to pin 2 of the chip U3. Pin 23 of the chip U1 is connected to pin 5 of the chip U3. Pin 17 of the chip U1 is respectively connected to pin 11 of the chip U1 and the VDD terminal.

[0013] As a further preferred embodiment of a three-dimensional geographic information data fusion model display system of the present invention, the clock module includes a clock chip DS3231, capacitors C4, resistors R25, R26, R27, R28. The VCC terminal is respectively connected to one end of the resistor R25 and one end of the resistor R26. The other end of the resistor R25 is connected to the SDA terminal of the clock chip DS3231. The other end of the resistor R26 is connected to the SCL terminal of the clock chip DS3231. The VDD terminal is respectively connected to one end of the resistor R27, one end of the resistor R28, one end of the capacitor C4 and port 2 of the clock chip DS3231. The other end of the resistor R27 is connected to port 1 of the clock chip DS3231. The other end of the resistor R28 is connected to port 3 of the clock chip DS3231. The other end of the capacitor C4 is grounded.

[0014] As a further preferred solution of a three-dimensional geographic information data fusion model display system of the present invention, the data cache module selects the MT41J256M16HA-125, a 4 Gbit-capacity DDR3-SDRAM storage chip of Micron Corporation, as the cache medium.

[0015] As a further preferred solution of a three-dimensional geographic information data fusion model display system of the present invention, the crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, a resistor R22, a resistor R23, a resistor R24, a capacitor C69, and a voltage VCC terminal. The 8 interface of the control chip 7N10.000MBP is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C45, the 9 interface of the control chip 7N10.000MBP, one end of the resistor R23, and the voltage VCC terminal. The other end of the capacitor C45 is grounded. The other end of the resistor R23 is connected to one end of the resistor R24, and the other end of the resistor R24 is grounded. The 10 interface of the control chip 7N10.000MBP is connected to one end of the capacitor C69, and the other end of the capacitor C69 is grounded.

[0016] When the present invention adopts the above technical solutions compared with the prior art, it has the following technical effects: A three-dimensional geographic information data fusion model display system of the present invention collects geographic information data through a geographic information collection module and sends the obtained geographic information data to a data preprocessing cache module; the data preprocessing cache module realizes efficient caching of the geographic information parameters collected by the geographic information collection module, adopts a three-level data caching mechanism, and uses the high-efficiency read-write performance of the internal FIFO and the large-capacity off-chip DDR2 storage for real-time upload; the three-dimensional image reconstruction module obtains the image depth data of the geographic information, triangulates the obtained image depth data, and then fuses all the triangulated depth images in the scale space to construct a hierarchical directed distance field, applies the global triangulation algorithm to all the voxels in the distance field to generate a convex hull covering all the voxels, constructs an isosurface, completes the reconstruction of the three-dimensional image, and sends the obtained data after reconstruction to the data sorting module; the data sorting module converts the text description information into audio data, marks it on the corresponding three-dimensional image, and completes the compilation of the three-dimensional image playback track in a preset template. During playback, each three-dimensional image is played in a mode of rotating clockwise from left to right. During playback, the image at the current position is automatically enlarged, dissected, and the corresponding audio data is played; through a visualization server, including a visualization module, an interactive control module, and a scene vision module, the visualization module is connected to a data mining server to receive data from the data mining server for receiving data from the data mining server; through a visualization display module, it is used to interact with the interactive control module and display relevant data visualization screens; the present invention can respond quickly, has rich scenes and high interactivity. Especially for large and complex data sets, it can realize in-depth and multi-dimensional analysis of the data, and intuitively display the analysis results to users in the form of multiple visual scenes, and realize the transformation of the visual scene through human-computer interaction to achieve effective communication of information, enabling users to discover the potential laws and internal values of the data in a more understandable way; it realizes the integration, three-dimensional all-round placement and analysis of geographic information, facilitating the observation and analysis of users. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0018] Figure 1 It is the structural schematic diagram of a three-dimensional geographic information data fusion model display system of the present invention; Figure 2 It is the structural schematic diagram of the data preprocessing cache module of the present invention; Figure 3 is the structural schematic diagram of the microprocessor module of the present invention; Figure 4 is the circuit diagram of the power supply module of the present invention; Figure 5 is the circuit diagram of the data transmission module of the present invention; Figure 6 is the circuit diagram of the clock module of the present invention; Figure 7 is the circuit diagram of the crystal oscillator module of the present invention. Specific Embodiments

[0019] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings: The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present invention. The present invention will be described in detail below according to the accompanying drawings and preferred embodiments, and the purpose and effect of the present invention will become more apparent. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0020] A three-dimensional geographic information data fusion model display system, as Figure 1 shown, includes a geographic information collection module, a data preprocessing and caching module, a microprocessor module, a three-dimensional image reconstruction module, a data sorting module, a visualization server, and a visualization display module; the geographic information collection module is connected to the microprocessor module through the data preprocessing and caching module, and the microprocessor module is sequentially connected to the visualization display module through the three-dimensional image reconstruction module, the data sorting module, and the visualization server.

[0021] Among them, the geographic information collection module is used to collect geographic information data and send the obtained geographic information data to the data preprocessing and caching module; The data preprocessing and caching module is used to efficiently cache the geographic information parameters collected by the geographic information collection module, adopts a three-level data caching mechanism, and uses the high-efficiency read and write performance of the internal FIFO and the large-capacity off-chip DDR2 storage for real-time upload; The three-dimensional image reconstruction module obtains the image depth data of the geographic information, triangulates the obtained image depth data, then fuses all the triangulated depth images in the scale space to construct a hierarchical directed distance field, applies the global triangulation algorithm to all the voxels in the distance field to generate a convex hull covering all the voxels, constructs an isosurface, completes the reconstruction of the three-dimensional image, and sends the data obtained after the reconstruction to the data sorting module; A data sorting module, which is used to convert the text description information into audio data, mark it on the corresponding 3D image, and complete the compilation of the 3D image playback track with a preset template. During playback, each 3D image is played in a mode of rotating clockwise from left to right. During playback, the image at the current position is automatically enlarged, dissected, and the corresponding audio data is played. A visualization server, which includes a visualization module, an interactive control module, and a scene vision module. The visualization module is connected to the data mining server and is used to receive data from the data mining server. A visualization display module, which is used to interact with the interactive control module and display relevant data visualization screens.

[0022] It also includes a memory module, a clock module, a data transmission module, and a power supply module. Among them, the memory module is used to store the geographical information data collected by the geographical information collection module. The clock module is used to record time. The data transmission module is used for the data transmission of geographical information data. The power supply module is used to provide the electric energy required by the 3D geographical information visualization system.

[0023] It also includes a network crawling module, a target data acquisition module, a human-computer interaction module, and an image stitching module. The network crawling module, the target data acquisition module, the human-computer interaction module, and the image stitching module are respectively connected to the microprocessor module. Among them, the network crawling module is used to crawl the corresponding satellite image on the network according to the feature information of the collected image, so as to obtain the image longitude and latitude information. The network crawler module calculates the feature information based on the CCIPCA algorithm according to the text description information corresponding to the image. The target data acquisition module is internally provided with an algorithm call module, which is used to calculate and analyze 3D images by calling different algorithms, so as to obtain the corresponding target data. The human-computer interaction module is used for the input of various control commands. The image stitching module is used to stitch each image according to the longitude and latitude information of each image, so as to realize the construction of the overall 3D image.

[0024] The present invention can respond quickly, has rich scenarios and high interactivity. Especially for large and complex data sets, it can achieve in-depth and multi-dimensional analysis of the data, and intuitively present the analysis results to users in the form of multiple visual scenarios. Through human-computer interaction, it can realize the transformation of visual scenarios, achieve effective communication of information, and enable users to discover the potential laws and internal values of the data in a more understandable way; it realizes the integration, three-dimensional all-round projection and analysis of geographical information, which is convenient for users to observe and analyze.

[0025] As Figure 2 shown, the data preprocessing cache module includes an input FIFO module, a DDR controller, an image parameter calculation module, a DDR2 SDRAM, and an output FIFO module. The output end of the video acquisition module is connected to the input end of the input FIFO module, the output end of the input FIFO module is connected to the input end of the DDR2 SDRAM, the output end of the DDR2 SDRAM is connected to the input end of the output FIFO module, the output end of the image parameter calculation module is also connected to the input end of the DDR2 SDRAM through the DDR controller, and the output end of the output FIFO module is connected to the input end of the FPGA control module.

[0026] As Figure 3 shown, the microprocessor module includes a data acquisition control module, a data processing module, a RAM read / write module, an interface chip control unit, a synchronous clock control module, a command deframing module, a data interpretation module, as well as a power supply circuit, a reset circuit, a crystal oscillator circuit, a download circuit, and a configuration SPI Flash circuit. The data acquisition control module, the interface chip control unit, the synchronous clock control module, the command deframing module, the data interpretation module, as well as the power supply circuit, the reset circuit, the crystal oscillator circuit, the download circuit, and the configuration SPI Flash circuit are respectively connected to the data processing module and the RAM read / write module.

[0027] The chip selected for the system control core is the XC6SLX45 of the Spartan6 series of Xilinx. The sixth-generation Spartan series product, Spartan6 FPGA, is based on the recognized low-power 45 nm, 9-metal copper layer, double-gate oxide layer process technology, providing advanced power management technology, 150,000 logic units, a hard-core DRAM memory, and a variety of IPs. It is a very widely used and technically mature FPGA series of Xlinx. The FPGA main control module mainly completes the configuration of the camera and the acquisition of video data, the access of DDR3-SDRAM data, the configuration of the HDMI interface chip, and the sending of video data. Its hardware circuit also includes a power supply circuit, a reset circuit, a crystal oscillator circuit, a download circuit, and a configuration SPI Flash circuit.

[0028] OV5640 has certain requirements for the power-on timing, so a module that meets this power-on timing is essential. After initialization, first determine the working mode of OV5640, which can be completed through the SCCB bus. 303 registers are configured in this system. After OV5640 is configured and the DDR3-SDRAM initialization and calibration are completed, video data can be obtained. To control OV5640, a system clock XVCLK of 192 MHz needs to be provided first, and then the pixel output clock (PCLK), field synchronization signal (VSYNC), and line synchronization signal (HREF) are identified to obtain data. The falling edge of the field synchronization signal indicates the start of a frame of data. When the line synchronization signal is at a high level, valid data is output. Between the low levels of the field synchronization signal, the line synchronization signal will be at a high level 1,080 times, representing that a frame of data has 1,080 lines of data. During the high level of the line synchronization signal, 1,920 pixel output clocks will be continuous, representing that each line has 1,920 pixel points.

[0029] To solve the problem of caching high-speed and large-capacity video data, this system selects the Micron 4 Gbit capacity DDR3-SDRAM memory chip MT41J256M16HA-125 as the caching medium. A0 to A14 are the address buses, B0 to B3 are the Bank addresses. The FPGA can control the storage location of data in the DDR3-SDRAM by controlling the address buses and Bank addresses. D0 to D15 are the data buses, which are connected in parallel with the FPGA. CLK-N and CLK-P are the differential clock input ports. In this system, the clock frequency is set to 312.5 MHz. The FPGA controls the reading and writing of the DDR3-SDRAM through the column address selection signal (CAS), row address selection signal (RAS), and write enable signal (WE), and optimizes the performance by controlling the ODT to enable the on-chip resistance to prevent data line interruption reflection. DQS is the synchronization signal between the DDR3-SDRAM and the controller. It is a bidirectional signal. When writing data, it is issued by the controller, and when reading data, it is issued by the memory. DM is the data masking signal. Since only Bank1 and Bank3 of the Spartan6 series FPAG have MCB hard cores, in this system, Bank3 in the FPGA is selected to be connected to the DDR3-SDRAM. The port voltage standard is 1.5 V, and in the FPAG UCF, the IO standard needs to be set to SSTL15_II.

[0030] As Figure 4 shown, the power supply module includes a voltage source and an overvoltage protection circuit connected thereto. The overvoltage protection circuit includes a reference voltage circuit and a feedback control circuit; Among them, the reference voltage circuit is used to generate a reference voltage according to the source voltage when the source voltage exceeds the clamping voltage; A feedback control circuit for receiving a reference voltage and clamping an output voltage to a clamping voltage; Specifically, it includes a first diode Z1, a second diode Z2, a third diode Z3, a fourth diode Z4, a fifth diode Z5, a first resistor R1, a second resistor R2, a third resistor R3, a PMOS transistor M1, a PMOS transistor M2, a PMOS transistor M3, and a PMOS transistor M4. The anode of the first diode Z1 is connected to one end of the first resistor R1, the cathode of the first diode Z1 is connected to the cathode of the second diode Z2, the anode of the second diode Z2 is connected to the cathode of the third diode Z3, the anode of the third diode Z3 is respectively connected to one end of the second resistor R2, the anode of the fourth diode Z4, one end of the third resistor R3, the anode of the fifth diode Z5, and the source of the PMOS transistor M1. The other end of the first resistor R1 is respectively connected to the drain of the PMOS transistor M3, the gate of the PMOS transistor M3, and the gate of the PMOS transistor M4. The source of the PMOS transistor M3 is respectively connected to the source of the PMOS transistor M4, the drain of the PMOS transistor M2, and the drain of the PMOS transistor M1. The drain of the PMOS transistor M4 is respectively connected to the other end of the second resistor R2, the cathode of the fourth diode Z4, and the gate of the PMOS transistor M2. The source of the PMOS transistor M2 is respectively connected to the other end of the third resistor R3, the cathode of the fifth diode Z5, and the gate of the PMOS transistor M1.

[0031] The reference voltage path is composed of the first diode Z1, the second diode Z2, and the third diode Z3. The two PMOS transistors M3 and M4 form a current mirror for generating a reference current. The PMOS transistor M2 is a driving transistor for generating the turn-on current of the PMOS transistor M1. The PMOS transistor M1 is a discharging transistor for releasing surge current. When the surge voltage is greater than the breakdown voltage of the diode string, the diode string generates a reference voltage, that is, the voltage value of Vx remains unchanged. At the same time, a reference current is generated on one side of the PMOS transistor M3. Through the current replication of the current mirror, it acts on the PMOS transistor M4. This current can raise the voltage across the resistor R2, so that the gate of the driving transistor PMOS transistor M2 is greater than its threshold voltage, turning on the PMOS transistor M2. After the PMOS transistor M2 is turned on, the driving current generated raises the voltage across the resistor R3, so that the main discharging device M1 is turned on. M1 can discharge a large amount of current, clamping the entire chip at a certain voltage. Since the size of M1 is large, M2 needs to generate enough driving current to turn on M1.

[0032] Normally, a current of dozens of microamperes is sufficient to drive the discharging transistor. In addition, to improve the discharging efficiency of M1, the gate voltage of M1 can be appropriately raised. Raising the instantaneous gate voltage of M1 above its maximum gate voltage is beneficial to enhancing its discharging ability.

[0033] As the source voltage Vsource increases, more current is injected into the buffer transistor M2, which in turn further raises the gate voltage of the main clamping device M1, allowing more current to be discharged, and thus regulating the output voltage to the clamping voltage in sequence.

[0034] Through feedback control, the output voltage can be accurately clamped to the desired clamping voltage, regardless of the current discharged by the main clamping transistor. As a result, the final dynamic resistance of the protection circuit can be almost zero.

[0035] As Figure 5 As shown, the data transmission module includes an antenna ANT1, capacitors C11, C12, C13, C14, C15, C16, resistors R21, R22, inductors L11, L12, and chips U1, U2, U3. One end of the antenna ANT1 is connected to one end of the inductor L11 and one end of the capacitor C16. The other end of the inductor L11 is grounded. The other end of the capacitor C16 is connected to one end of the inductor L12 and pin 2 of the chip U1. The other end of the inductor L12 is grounded. Pin 3 and pin 4 of the chip U1 are respectively connected to one end of the capacitor C14, one end of the capacitor C15, and the VDD terminal. The other ends of the capacitor C14 and the capacitor C15 are respectively grounded. Pin 1 of the chip U1 is respectively connected to one end of the capacitor C13, the VDD terminal, pin 30 of the chip U1, and pin 29 of the chip U1. The other end of the capacitor C13 is grounded. Pin 31 of the chip U1 is connected to one end of the resistor R21, and the other end of the resistor R21 is grounded. Pin 28 of the chip U1 is respectively connected to one end of the capacitor C11 and pin 1 of the chip U2. Pin 2 of the chip U2 is grounded. The other end of the capacitor C11 is grounded. Pin 4 of the chip U2 is grounded. Pin 3 of the chip U2 is respectively connected to one end of the capacitor C12 and pin 27 of the chip U1. The other end of the capacitor C12 is grounded. Pin 18 of the chip U1 is connected to pin 7 of the chip U3. Pin 19 of the chip U1 is connected to pin 3 of the chip U3. Pin 20 of the chip U1 is connected to pin 1 of the chip U3. Pin 21 of the chip U1 is connected to pin 6 of the chip U3 through the resistor R22. Pin 22 of the chip U1 is connected to pin 2 of the chip U3. Pin 23 of the chip U1 is connected to pin 5 of the chip U3. Pin 17 of the chip U1 is respectively connected to pin 11 of the chip U1 and the VDD terminal. It uses ESP8266 as the main control chip. Additionally, when used as a communication module, the terminal device is connected to the Internet for data transmission through a serial port to WIFI. The communication method adopts a basic network topology structure. ESP8266 is a serial port to wireless module chip with built-in firmware, making it easy for users to operate without the need to write timing signals, etc.

[0036] As Figure 6As shown in the figure, the clock module includes a clock chip DS3231, a capacitor C4, a resistor R25, a resistor R26, a resistor R27, and a resistor R28. The VCC terminal is respectively connected to one end of the resistor R25 and one end of the resistor R26. The other end of the resistor R25 is connected to the SDA terminal of the clock chip DS3231, and the other end of the resistor R26 is connected to the SCL terminal of the clock chip DS3231. The VDD terminal is respectively connected to one end of the resistor R27, one end of the resistor R28, one end of the capacitor C4, and the 2-port of the clock chip DS3231. The other end of the resistor R27 is connected to the 1-port of the clock chip DS3231, the other end of the resistor R28 is connected to the 3-port of the clock chip DS3231, and the other end of the capacitor C4 is grounded.

[0037] The clock circuit is designed and implemented using a low-cost and high-precision real-time clock chip DS3231. The register addresses of DS3231 are 00h to 12h. It obtains clock and date information by reading appropriate register bytes. It also obtains clock and calendar information by writing appropriate register bytes. Clock and calendar data can be set or initialized by writing appropriate register bytes.

[0038] The data cache module selects the Micron 4 Gbit capacity DDR3-SDRAM memory chip MT41J256M16HA-125 as the cache medium. To solve the cache problem of high-speed and large-capacity video data, this system selects the Micron 4 Gbit capacity DDR3-SDRAM memory chip MT41J256M16HA-125 as the cache medium. A0 to A14 are the address buses, B0 to B3 are the Bank addresses. The FPGA can control the storage location of data in the DDR3-SDRAM by controlling the address buses and the Bank addresses; D0 to D15 are the data buses, which are connected in parallel with the FPGA; CLK-N and CLK-P are differential clock input ports. In this system, the clock frequency is set to 312.5 MHz; the FPGA controls the read and write of the DDR3-SDRAM through the column address selection signal (CAS), row address selection signal (RAS), and write enable signal (WE), and optimizes the performance by controlling the ODT to enable the on-chip resistor to prevent data line interruption reflection; DQS is the synchronization signal between the DDR3-SDRAM and the controller, which is a bidirectional signal. When writing data, it is issued by the controller, and when reading data, it is issued by the memory; DM is the data masking signal. Since only Bank1 and Bank3 of the Spartan6 series FPAG have MCB hard cores, in this system, Bank3 in the FPGA is selected to be connected to the DDR3-SDRAM, the port voltage standard is 1.5 V, and in the FPAG UCF, the IO standard needs to be set to SSTL15_II.

[0039] AsFigure 7 As shown in the figure, the crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, a resistor R22, a resistor R23, a resistor R24, a capacitor C69, and a voltage VCC terminal. The 8 interface of the control chip 7N10.000MBP is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C45, the 9 interface of the control chip 7N10.000MBP, one end of the resistor R23, and the voltage VCC terminal. The other end of the capacitor C45 is grounded. The other end of the resistor R23 is connected to one end of the resistor R24, and the other end of the resistor R24 is grounded. The 10 interface of the control chip 7N10.000MBP is connected to one end of the capacitor C69, and the other end of the capacitor C69 is grounded.

[0040] Those of ordinary skill in the art can understand that the above are only preferred examples of the invention and are not used to limit the invention. Although the invention has been described in detail with reference to the foregoing examples, for those skilled in the art, they can still modify the technical solutions described in the foregoing examples, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, etc. made within the spirit and principle of the invention shall be included within the protection scope of the invention. All technical features in this embodiment can be freely combined according to actual needs.

[0041] Finally, it should be noted that the above are only preferred embodiments of the present invention and are not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A three-dimensional geographic information data fusion model display system, characterized by: It includes geographic information acquisition module, data preprocessing cache module, microprocessor module, three-dimensional image reconstruction module, data sorting module, visualization server, and visualization display module; The geographic information acquisition module is used to collect geographic information data and send the acquired geographic information data to the data preprocessing cache module; The data preprocessing cache module is used to realize the efficient cache of the geographic information parameters collected by the geographic information acquisition module. It adopts a three-level data cache mechanism and uses the efficient read and write performance of the internal FIFO and the off-chip DDR2 large-capacity storage for real-time upload; The 3D image reconstruction module acquires image depth data of geographic information and triangulates the obtained image depth data. Then, it fuses all triangulated depth images in scale space to construct a hierarchical directed distance field. It applies the overall triangulation algorithm to all voxels in the distance field to generate a convex hull covering all voxels, constructs an isosurface, completes the reconstruction of the 3D image, and sends the reconstructed data to the data sorting module. A data arrangement module is used to convert the text description information into audio data, mark it on the corresponding three-dimensional image, and complete the compilation of the three-dimensional image playback trajectory with a preset template. During playback, each three-dimensional image is played in a clockwise rotation mode from left to right. During playback, the image at the current position is automatically magnified and dissected, and the corresponding audio data is played; A visualization server includes a visualization module, an interactive control module and a scene vision module. The visualization module is connected to the data mining server and receives data from the data mining server. The visualization display module is used to interact with the interactive control module and display relevant data visualization pictures.

2. A three-dimensional geographic information data fusion model display system according to claim 1, characterized in that: It also includes a memory module, a clock module, a data transmission module and a power module; The memory module is used to store the geographic information data collected by the geographic information collection module; Clock module, used to record time; Data transmission module, used for data transmission of geographic information data; The power module is used to provide the electric energy required by the three-dimensional geographic information visualization system.

3. A three-dimensional geographic information data fusion model display system according to claim 1, characterized in that: It also includes a network crawling module, a target data acquisition module, a human-computer interaction module, and an image splicing module, wherein the network crawling module, the target data acquisition module, the human-computer interaction module, and the image splicing module are respectively connected to the microprocessor module; Among them, the network crawling module is used to crawl the corresponding satellite image on the network according to the feature information of the collected image, so as to obtain the latitude and longitude information of the image; the network crawler module calculates the feature information according to the text description information corresponding to the image based on the CCIPCA algorithm; The target data acquisition module has an algorithm calling module built in it, which is used to realize the calculation and analysis of the three-dimensional image by calling different algorithms to obtain the corresponding target data; Human-computer interaction module, used for inputting various control commands; The image stitching module is used to stitch the images together according to the latitude and longitude information of each image, thereby constructing an overall three-dimensional image.

4. The three-dimensional geographic information data fusion model display system according to claim 1, characterized in that: The data preprocessing cache module comprises an input FIFO module, a DDR controller, an image parameter calculation module, a DDR2 SDRAM and an output FIFO module. The output end of the video acquisition module is connected to the input end of the input FIFO module, the output end of the input FIFO module is connected to the input end of the DDR2 SDRAM, the output end of the DDR2 SDRAM is connected to the input end of the output FIFO module, the output end of the image parameter calculation module is also connected to the input end of the DDR2 SDRAM through the DDR controller, and the output end of the output FIFO module is connected to the input end of the FPGA control module.

5. The three-dimensional geographic information data fusion model display system according to claim 1, characterized in that: The microprocessor module includes a data acquisition control module, a data processing module and a RAM read-write module, an interface chip control unit, a synchronous clock control module, a command de-framing module, a data reading module, a power supply circuit, a reset circuit, a crystal oscillator circuit, a download circuit and a configuration SPI Flash circuit. The data acquisition control module, the interface chip control unit, the synchronous clock control module, the command de-framing module, the data reading module, the power supply circuit, the reset circuit, the crystal oscillator circuit, the download circuit and the configuration SPI Flash circuit are respectively connected to the data processing module and the RAM read-write module.

6. A three-dimensional geographic information data fusion model display system according to claim 2, characterized in that: The power supply module comprises a voltage source and an overvoltage protection circuit connected thereto, wherein the overvoltage protection circuit comprises a reference voltage circuit and a feedback control circuit; Wherein, the reference voltage circuit is used to generate a reference voltage according to the source voltage when the source voltage exceeds the clamping voltage; a feedback control circuit for receiving a reference voltage and clamping an output voltage to a clamping voltage; Specifically, it includes a first diode Z1, a second diode Z2, a third diode Z3, a fourth diode Z4, a fifth diode Z5, a first resistor R1, a second resistor R2, a third resistor R3, a PMOS tube M1, a PMOS tube M2, a PMOS tube M3, and a PMOS tube M4; the anode of the first diode Z1 is connected to one end of the first resistor R1, the anode and cathode of the first diode Z1 are connected to the cathode of the second diode Z2, the anode of the second diode Z2 is connected to the cathode of the third diode Z3, and the anode of the third diode Z3 is connected to one end of the second resistor R2, the anode of the fourth diode Z4, and one end of the third resistor R3 respectively , the anode of the fifth diode Z5, and the source of the PMOS tube M1, the other end of the first resistor R1 is respectively connected to the drain of the PMOS tube M3, the gate of the PMOS tube M3, and the gate of the PMOS tube M4, the source of the PMOS tube M3 is respectively connected to the source of the PMOS tube M4, the drain of the PMOS tube M2, and the drain of the PMOS tube M1, the drain of the PMOS tube M4 is respectively connected to the other end of the second resistor R2, the cathode of the fourth diode Z4, and the gate of the PMOS tube M2, the source of the PMOS tube M2 is respectively connected to the other end of the third resistor R3, the cathode of the fifth diode Z5, and the gate of the PMOS tube M1.

7. The three-dimensional geographic information data fusion model display system according to claim 2, characterized in that: The data transmission module includes an antenna ANT1, a capacitor C11, a capacitor C12, a capacitor C13, a capacitor C14, a capacitor C15, a capacitor C16, a resistor R21, a resistor R22, an inductor L11, an inductor L12, a chip U1, a chip U2, and a chip U3. The antenna ANT1 is respectively connected to one end of the inductor L11 and one end of the capacitor C16, the other end of the inductor L11 is grounded, the other end of the capacitor C16 is respectively connected to one end of the inductor L12 and a pin 2 of the chip U1, the other end of the inductor L12 is grounded, the pin 3 of the chip U1 and the pin 4 of the chip U1 are respectively connected to one end of the capacitor C14, one end of the capacitor C15 and a VDD end, the other end of the capacitor C14 and the other end of the capacitor C15 are respectively grounded, the pin 1 of the chip U1 is respectively connected to one end of the capacitor C13, the VDD end, the pin 30 of the chip U1 and the pin 29 of the chip U1, the other end of the capacitor C13 is grounded, and the pin 31 of the chip U1 is connected to the resistor R 21, the other end of the resistor R21 is grounded, the pin 28 of the chip U1 is respectively connected to one end of the capacitor C11 and the pin 1 of the chip U2, the pin 2 of the chip U2 is grounded, the other end of the capacitor C11 is grounded, the pin 4 of the chip U2 is grounded, the pin 3 of the chip U2 is respectively connected to one end of the capacitor C12 and the pin 27 of the chip U1, the other end of the capacitor C12 is grounded, the pin 18 of the chip U1 is connected to the pin 7 of the chip U3, the pin 19 of the chip U1 is connected to the pin 3 of the chip U3, the pin 20 of the chip U1 is connected to the pin 1 of the chip U3, the pin 21 of the chip U1 is connected to the pin 6 of the chip U3 through the resistor R22, the pin 22 of the chip U1 is connected to the pin 2 of the chip U3, the pin 23 of the chip U1 is connected to the pin 5 of the chip U3, and the pin 17 of the chip U1 is respectively connected to the pin 11 of the chip U1 and the VDD end.

8. The three-dimensional geographic information data fusion model display system according to claim 2, characterized in that: The clock module includes a clock chip DS3231, a capacitor C4, a resistor R25, a resistor R26, a resistor R27, and a resistor R28. The VCC end is respectively connected to one end of the resistor R25 and one end of the resistor R26, the other end of the resistor R25 is connected to the SDA end of the clock chip DS3231, the other end of the resistor R26 is connected to the SCL end of the clock chip DS3231, the VDD end is respectively connected to one end of the resistor R27, one end of the resistor R28, one end of the capacitor C4, and port 2 of the clock chip DS3231, the other end of the resistor R27 is connected to port 1 of the clock chip DS3231, the other end of the resistor R28 is connected to port 3 of the clock chip DS3231, and the other end of the capacitor C4 is grounded.

9. The three-dimensional geographic information data fusion model display system according to claim 2, characterized in that: The data cache module uses Micron's 4 Gbit DDR3-SDRAM memory chip MT41J256M16HA-125 as a cache medium.

10. The three-dimensional geographic information data fusion model display system according to claim 5, characterized in that: The crystal oscillator module includes a control chip 7N10.000MBP, a capacitor C45, a resistor R22, a resistor R23, a resistor R24, a capacitor C69 and a voltage VCC end. The 8-interface of the control chip 7N10.000MBP is connected to one end of the resistor R22, and the other end of the resistor R22 is respectively connected to one end of the capacitor C45, the 9-interface of the control chip 7N10.000MBP, one end of the resistor R23 and the voltage VCC end. The other end of the capacitor C45 is grounded, the other end of the resistor R23 is connected to one end of the resistor R24, and the other end of the resistor R24 ​​is grounded. The 10-interface of the control chip 7N10.000MBP is connected to one end of the capacitor C69, and the other end of the capacitor C69 is grounded.

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