Pixel circuit and micro LED display device including same

Abstract

The present disclosure provides a pixel circuit capable of outputting a uniform driving current regardless of a process distribution of a micro LED element, and a micro LED display device including the same. The pixel circuit includes: a micro LED; a driving transistor that controls a driving current of the micro LED; a storage capacitor that samples a data voltage that determines the magnitude of the drive current; and an internal compensation circuit that directly resets a first node and a second node respectively corresponding to two opposing electrodes of the storage capacitor before the storage capacitor samples the data voltage.

Description

Technical Field

[0001] The present disclosure relates to a display device, and more particularly, to a pixel circuit and a micro-LED display device including the pixel circuit. Background Art

[0002] A display device having self-luminous elements can be implemented to be thinner than a display device having a built-in light source, and can implement a flexible and foldable display device.

[0003] A display device having self-luminous elements may include an organic light-emitting display device having a light-emitting layer made of an organic material and a micro-LED display device using a micro-LED element as a light-emitting element. The organic light-emitting display device or the micro-LED display device does not require a separate light source, and thus can be implemented as a thinner or more diverse display device.

[0004] However, an organic light-emitting display device using an organic material is likely to have defective pixels due to moisture and oxygen. Therefore, various technical designs are additionally required to minimize the penetration of oxygen and moisture.

[0005] Recently, research and development on a display device using a micro-LED element as a light-emitting element have been underway. Such a display device has high image quality and high reliability, and thus has attracted much attention as a next-generation display device.

[0006] The micro-LED element is made of an inorganic material. Therefore, a large current can be injected into it to achieve high brightness. The micro-LED element is less sensitive to environmental influences such as heat, moisture, and oxygen, and thus has high reliability. In addition, the influence of oxygen and moisture on the micro-LED element is very small, so that a separate encapsulation film is not required. This can minimize the non-display area of the display device including the micro-LED element.

[0007] However, due to the process distribution of the micro-LED element, there are problems of uneven brightness and flicker in the micro-LED display device. Summary of the Invention

[0008] An object of the present disclosure is to provide a pixel circuit that can output a uniform driving current regardless of the process distribution of the micro-LED element, and a micro-LED display device including the pixel circuit.

[0009] An object of the present disclosure is to provide a pixel circuit that can reduce leakage current by applying a direct internal compensation circuit to remove uneven brightness and flicker, and a micro-LED display device including the pixel circuit.

[0010] The objects according to the present disclosure are not limited to the above objects. Other objects and advantages according to the present disclosure not mentioned can be understood based on the following description and can be more clearly understood based on the embodiments according to the present disclosure. In addition, it will be readily understood that the objects and advantages according to the present disclosure can be achieved by using the means shown in the claims or combinations thereof.

[0011] An embodiment of the present disclosure provides a pixel circuit, including: a micro LED; a driving transistor configured to control a driving current of the micro LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; and an internal compensation circuit configured to directly reset a first node and a second node respectively corresponding to opposite two electrodes of the storage capacitor before the storage capacitor samples the data voltage.

[0012] Another embodiment of the present disclosure provides a micro LED display device including at least one sub-pixel, wherein each of the at least one sub-pixel includes: a micro LED; a driving transistor configured to control a driving current of the micro LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect a gate and a drain of the driving transistor in response to the first scan signal; a first reset transistor configured to reset a first node between the gate of the driving transistor and one of the opposite two electrodes of the storage capacitor in response to a second scan signal; and a second reset transistor configured to reset a second node between the first transistor and the other of the opposite two electrodes of the storage capacitor in response to the second scan signal.

[0013] Another embodiment of the present disclosure provides a micro-LED display device, including: a micro-LED configured to emit light based on a driving current; a driving transistor configured to receive a power supply voltage and control the driving current; a storage capacitor having one electrode corresponding to a first node and connected to the gate of the driving transistor, and another electrode corresponding to a second node and connected to a first transistor configured to transmit a data voltage, wherein the storage capacitor is configured to sample the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect the gate and the drain of the driving transistor to each other in response to the first scan signal; a third transistor configured to transmit a reference voltage to the second node in response to a light emission signal; a fourth transistor connected to and disposed between the driving transistor and the micro-LED, and configured to be turned on in response to the light emission signal to activate a current path of the driving current to the driving transistor; a fifth transistor configured to transmit the reference voltage to the first node in response to a second scan signal; a sixth transistor configured to transmit the data voltage to the second node in response to the second scan signal; and a stabilization capacitor connected to and disposed between the source and the gate of the driving transistor.

[0014] Another embodiment of the present disclosure provides a pixel circuit, including: a micro-LED; a driving transistor configured to control a driving current of the micro-LED; a storage capacitor configured to sample a data voltage, wherein a magnitude of the driving current is based on the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; and an internal compensation circuit configured to simultaneously reset two opposite electrodes of the storage capacitor in response to a second scan signal, wherein an enabling period of the first scan signal and an enabling period of the second scan signal do not overlap with each other.

[0015] According to an embodiment of the present disclosure, a uniform driving current can be output regardless of a process distribution of the micro-LED elements.

[0016] In addition, according to an embodiment of the present disclosure, the problem of luminance non-uniformity and flicker can be removed by reducing leakage current by applying a direct reset compensation circuit.

[0017] The effects of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those of ordinary skill in the art from the description set forth below.

[0018] In addition to the above effects, while describing specific details for implementing the present disclosure, the specific effects of the present disclosure are described together. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1It is a schematic plan view of a micro-LED display device having a plurality of sub-pixels according to an embodiment of the present disclosure.

[0020] Figure 2 A pixel circuit according to a first embodiment of the present disclosure is shown.

[0021] Figure 3 A pixel circuit according to a second embodiment of the present disclosure is shown.

[0022] Figure 4 is as Figure 3 A timing diagram of the pixel circuit shown is presented.

[0023] Figure 5 is as Figure 3 A current measurement diagram of the pixel circuit shown is presented.

[0024] Figure 6 A pixel circuit according to a third embodiment of the present disclosure is shown.

[0025] Figure 7 A timing diagram of the pixel circuit according to the third embodiment of the present disclosure is presented.

[0026] Figure 8 A part of a pixel circuit having a common anode structure according to the present disclosure is shown.

[0027] Figure 9 An analog result of a pixel circuit having a common anode structure according to the present disclosure is shown.

[0028] Figure 10 A part of a pixel circuit having a common cathode structure according to the present disclosure is shown.

[0029] Figure 11 An analog result of a pixel circuit having a common cathode structure according to the present disclosure is shown. Detailed Description of the Embodiments

[0030] Advantages and features of the present disclosure, and methods for achieving these advantages and features, will become apparent by referring to the embodiments described in detail below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms. Therefore, these embodiments are described only to make the present disclosure complete and to fully inform those of ordinary skill in the art to which the present disclosure pertains of the scope of the present disclosure, and the present disclosure is defined only by the scope of the claims.

[0031] For simplicity and clarity of illustration, the elements in the figures are not necessarily drawn to scale. The same reference numerals in different figures denote the same or similar elements and thus perform similar functions. Additionally, for simplicity of description, the description and details of well-known steps and elements are omitted. Further, in the following detailed description of the present disclosure, numerous specific details are set forth to provide a thorough understanding of the present disclosure. However, it will be understood that the present disclosure may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present disclosure. Examples of various embodiments are further illustrated and described below. It will be understood that the description herein is not intended to limit the claims to the specific embodiments described. Instead, it is intended to cover alternatives, modifications, and equivalents as may be included in the spirit and scope of the present disclosure as defined by the appended claims.

[0032] The shapes, sizes, ratios, angles, quantities, etc. disclosed in the figures used to illustrate embodiments of the present disclosure are illustrative, and the present disclosure is not limited thereto.

[0033] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the present disclosure. As used herein, the singular forms “a,” “an” are intended to also include the plural forms unless the context clearly indicates otherwise. It will be further understood that when the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having” are used in this specification, they specify the presence of the stated features, integers, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one” before a list of elements can modify the entire list of elements and may not modify a single element of the list. In the interpretation of numerical values, errors or tolerances may occur even if not explicitly described therein.

[0034] Furthermore, it will also be understood that when a first element or layer is referred to as being “on” a second element or layer, the first element may be directly disposed on the second element, or may be indirectly disposed on the second element with a third element or layer interposed between the first element or layer and the second element or layer. It will be understood that when an element or layer is referred to as “connected to” or “coupled to” another element or layer, it may be directly on, coupled to, or connected to the other element or layer, or there may be one or more intermediate elements or layers. Furthermore, it will also be understood that when an element or layer is referred to as being “between” two elements or layers, it may be the only element or layer between the two elements or layers, or there may also be one or more intermediate elements or layers.

[0035] In the description of temporal relationships, such as temporal precedence relationships like "after", "subsequently", "before", etc. between two events, unless it is stated as "directly after", "directly subsequently", "directly before", another event may occur in between.

[0036] When a particular embodiment can be implemented differently, the functions or operations specified in a particular block may occur in an order different from the order specified in the flowchart. For example, two consecutive blocks may actually be executed substantially simultaneously, or the two blocks may be executed in the reverse order depending on the functions or operations involved.

[0037] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or section from another. Thus, without departing from the spirit and scope of the present disclosure, the first element, component, region, layer, or section described below may be referred to as the second element, component, region, layer, or section.

[0038] When an embodiment can be implemented differently, the functions or operations specified within a particular block may be executed in an order different from the order specified in the flowchart. For example, two consecutive blocks may actually be executed substantially simultaneously, or the blocks may be executed in the reverse order depending on the relevant functions or operations.

[0039] The features of the various embodiments of the present disclosure can be partially or fully combined with each other and can be technically related or interoperable with each other. The embodiments can be implemented independently of each other and can also be implemented together in an associated relationship.

[0040] When interpreting a numerical value, unless there is a separate and explicit description of it, the numerical value is interpreted as including the error range.

[0041] It will be understood that when an element or layer is referred to as "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer, directly connected to or coupled to the other element or layer, or there may be one or more intermediate elements or layers. Further, it will also be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or there may also be one or more intermediate elements or layers.

[0042] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this inventive concept belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0043] As used herein, "embodiment", "example", "aspect", etc. should not be construed so as to make any aspect or design described superior or better than other aspects or designs.

[0044] In addition, the term "or" means "inclusive or" rather than "exclusive or". That is, unless otherwise stated or clear from the context, the statement "x uses a or b" means any one of the permutations is naturally included.

[0045] The terms used in the description set forth below have been chosen to be common and general in the relevant technical field. However, depending on the development and / or change of the technology, convention, preference of those skilled in the art, etc., there may be other terms in addition to this term. Therefore, the terms used in the description set forth below should not be construed as limiting the technical concept, but should be understood as examples of terms for illustrating embodiments.

[0046] In addition, in a specific case, the term can be arbitrarily selected by the applicant, and in such a case, its detailed meaning will be described in the corresponding description part. Therefore, the terms used in the description set forth below should be understood not only based on the name of the term but also based on the meaning of the term and the content throughout the specific implementation.

[0047] When describing signal flow, for example, when a signal is transmitted from node A to node B, unless the phrase "immediately transmitted" or "directly transmitted" is used, it may include the case where the signal is transmitted from node A to node B via another node.

[0048] Throughout this disclosure, "A and / or B" means A, B, or A and B, unless otherwise specified, and "C to D" means inclusive C to inclusive D, unless otherwise specified.

[0049] "At least one" should be understood to include any combination of one or more of the listed components. For example, at least one of the first component, the second component, and the third component not only means the first component, the second component, or the third component, but also means all combinations of two or more of the first component, the second component, and the third component.

[0050] Hereinafter, a pixel circuit and a micro LED display device including the pixel circuit will be described according to several embodiments.

[0051] Figure 1 It is a schematic plan view of a micro-LED display device having a plurality of sub-pixels according to an embodiment of the present disclosure.

[0052] Referring to Figure 1 , the micro-LED display device 100 according to an embodiment of the present disclosure includes a display panel 110, and a display area AA and a non-display area NA are defined in the display panel 110.

[0053] A unit pixel on the front surface of the display panel 110 may be composed of a plurality of sub-pixels SP. Generally, a unit pixel may include sub-pixels SP that respectively emit light beams of red, blue, and green. However, the embodiments of the present disclosure are not limited thereto. A unit pixel may further include a sub-pixel that emits white light, etc.

[0054] The display panel 110 may include a thin-film transistor array substrate. The substrate may be made of glass or plastic, or may be formed by bonding two or more substrates, or may be composed of two or more layers. The non-display area NA may be defined as an area of the display panel 110 that does not include the display area AA, and may have a relatively very narrow width, and may be defined as a border area.

[0055] Each of the plurality of unit pixels is provided in the display area AA. In this regard, the plurality of unit pixels may be arranged in the display area AA at a first reference pixel pitch preset in the X-axis direction (or row direction) and a second reference pixel pitch preset in the Y-axis direction (or column direction). The first reference pixel pitch may be defined as the distance between the centers of adjacent unit pixels in the X-axis direction. In a manner similar to the first reference pixel pitch, the second reference pixel pitch may be defined as the distance between the centers of adjacent unit pixels in the Y-axis direction.

[0056] The sub-pixels SP constituting the unit pixel may also be arranged in the display area AA at a first reference sub-pixel pitch and a second reference sub-pixel pitch. The first reference sub-pixel pitch may be defined as the distance between the centers of adjacent sub-pixels in the X-axis direction. The second reference sub-pixel pitch may be defined as the distance between the centers of adjacent sub-pixels in the Y-axis direction.

[0057] The width of the non-display area NA of the micro-LED display device 100 may be less than the reference pixel pitch or the reference sub-pixel pitch as described above. The micro-LED display devices 100 may be arranged to form a multi-screen display device, each micro-LED display device having a non-display area NA with a length equal to or less than the reference pixel pitch or the reference sub-pixel pitch. Since the length of the non-display area NA is less than the reference pixel pitch or the reference sub-pixel pitch, a multi-screen display device with substantially no bezel area can be achieved.

[0058] Figure 2 A pixel circuit having a common anode structure according to a first embodiment of the present disclosure is shown.

[0059] Referring Figure 1 and Figure 2 will describe the configuration and circuit structure of the sub-pixels SP that make up the unit pixel of the micro-LED display device 100. Pixel signal lines supply necessary signals to each of the plurality of sub-pixels SP. The pixel signal lines include a plurality of gate lines GL, a plurality of data lines DL, and a plurality of power lines. The plurality of power lines may include a power line that supplies a power supply voltage VDD to the sub-pixels and a power line that supplies a ground voltage VSS to the sub-pixels.

[0060] The gate line GL may include a first gate line and a second gate line. A first scan signal SC1 may be applied to the first gate line, and a second scan signal SC2 may be applied to the second gate line. A data voltage VDATA may be applied to the data line DL.

[0061] The plurality of gate lines GL extend in an elongated manner along the first horizontal axis direction X of the display panel 110 and are arranged to be spaced apart from each other at equal intervals along the second horizontal axis direction Y. The plurality of data lines DL extend in a manner intersecting the plurality of gate lines GL, and extend in an elongated manner along the second horizontal axis direction Y of the display panel 110 and are arranged to be spaced apart from each other at equal intervals along the first horizontal axis direction X.

[0062] Each of the plurality of sub-pixels SP is provided in a sub-pixel region defined by the gate line GL and the data line DL. Each of the plurality of sub-pixels SP may be defined as the smallest unit area that actually emits light.

[0063] At least three adjacent sub-pixels SP to each other may constitute a unit pixel for color display. For example, a unit pixel may include a red sub-pixel SP, a green sub-pixel SP, and a blue sub-pixel SP adjacent to each other along the first horizontal axis direction X, and may further include a white sub-pixel SP to improve brightness.

[0064] Each of the plurality of sub-pixels SP according to the first embodiment includes a driving circuit and a micro-LED element μLED.

[0065] The cathodes of the micro LED elements μLED are commonly connected to a ground voltage (or a low potential voltage) VSS, and their anodes are connected to a driving transistor DT of a driving circuit. The micro LED element pLED is provided in each of a plurality of sub-pixels SP. The micro LED element μLED is electrically connected to the driving circuit and a power supply line of the corresponding sub-pixel SP, and emits light based on a current flowing in a direction from a power supply voltage (or a high potential voltage VDD), via the driving transistor DT, to the ground voltage VSS.

[0066] The micro LED element μLED may be a light-emitting element or a light-emitting diode chip that emits one of red light, green light, blue light, and white light.

[0067] The driving circuit is provided in a circuit region defined in each sub-pixel SP and is connected to a gate line GL, a data line DL, and a power supply line adjacent thereto. The driving circuit controls the current flowing in the micro LED element μLED based on a data voltage from the data line DL at a power supply voltage VDD supplied from the power supply line in response to a scanning signal from the gate line GL.

[0068] The driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a driving transistor DT, a storage capacitor Cst, and a capacitor C1. An example is described in which each of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the driving transistor DT is implemented as a thin film transistor and a PMOS transistor. However, embodiments of the present disclosure are not limited thereto, and at least one of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the driving transistor DT may be implemented as an NMOS transistor or a PMOS transistor.

[0069] The first transistor T1 is connected to and provided between the data voltage VDATA and the storage capacitor Cst, and transmits the data voltage VDATA to the storage capacitor Cst in response to a first scanning signal SC1.

[0070] The second transistor T2 is connected to and provided between the gate and the drain of the driving transistor DT, and connects the gate and the drain of the driving transistor DT to each other in response to the first scanning signal SC1. The gate of the driving transistor DT corresponds to the first node N1.

[0071] The third transistor T3 is connected to and provided between the reference voltage VREF and the second node N2, and transmits the reference voltage VREF to the second node N2 in response to a light emission signal EM. In this regard, the second node N2 corresponds to the node between the first transistor T1 and the storage capacitor Cst.

[0072] The fourth transistor T4 is connected to and disposed between the driving transistor DT and the micro LED element μLED. The fourth transistor T4 is turned on in response to the light emission signal EM to activate the current path of the driving current to the driving transistor DT.

[0073] The fifth transistor T5 is connected to and disposed between the reference voltage VREF and the drain of the driving transistor DT, and transmits the reference voltage VREF to the drain of the driving transistor DT in response to the second scan signal SC2.

[0074] The driving transistor DT is connected to and disposed between the power supply voltage VDD and the fourth transistor T4, and controls the amount of the driving current flowing in the micro LED element μLED based on the data voltage VDATA sampled by the storage capacitor Cst.

[0075] The storage capacitor Cst is connected to and disposed between the first transistor T1 and the first node N1 corresponding to the gate of the driving transistor DT, and samples the data voltage VDATA transmitted from the first transistor T1.

[0076] The first capacitor C1 is connected to and disposed between the gate and the source of the driving transistor DT. The output of the driving transistor DT can be stabilized by the first capacitor C1.

[0077] However, in the pixel circuit according to the first embodiment, the level of the reference voltage VREF may change due to the leakage current during the period when the enabling periods of the first scan signal SC1 and the second scan signal SC2 overlap with each other. The change in the level of the reference voltage VREF caused by the leakage current may cause a reduction in the brightness uniformity.

[0078] Figure 3 A pixel circuit having a common anode structure according to a second embodiment of the present disclosure is shown.

[0079] Referring to Figure 1 and Figure 3 , each of the plurality of sub-pixels SP according to the second embodiment includes a driving circuit and a micro LED element μLED.

[0080] The micro LED element μLED has a common anode connected to the power supply voltage VDD and a cathode connected to the driving transistor DT of the driving circuit. The micro LED element μLED is disposed in each of the plurality of sub-pixels SP. The micro LED element μLED is electrically connected to the driving circuit and the power supply line of the corresponding sub-pixel SP, and emits light based on the current flowing in the direction from the power supply voltage VDD through the driving transistor DT to the ground voltage VSS.

[0081] The driving circuit is disposed in a circuit region defined in each sub-pixel SP and is connected to a gate line GL, a data line DL, and a power supply line adjacent thereto. The driving circuit controls a current flowing through the micro LED element μLED based on a data voltage from the data line DL at a power supply voltage VDD supplied from the power supply line in response to a scan signal from the gate line GL.

[0082] The driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a driving transistor DT, a storage capacitor Cst, a first capacitor C1, and a second capacitor C2. Examples are described in which each of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the driving transistor DT is implemented as a thin film transistor and a PMOS transistor. However, embodiments of the present disclosure are not limited thereto, and at least one of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the driving transistor DT may be implemented as an NMOS transistor or a PMOS transistor.

[0083] The first transistor T1 is connected to and disposed between the data voltage VDATA and the storage capacitor Cst, and transfers the data voltage VDATA to the storage capacitor Cst in response to a first scan signal SC1.

[0084] The second transistor T2 is connected to and disposed between the gate and the drain of the driving transistor DT, and connects the gate and the drain to each other in response to a first scan signal SC1. The gate of the driving transistor DT corresponds to a first node N1, the drain of the driving transistor DT corresponds to a third node N3, and the source of the driving transistor DT corresponds to a fourth node N4.

[0085] The third transistor T3 is connected to and disposed between a reference voltage VREF and a second node N2, and transfers the reference voltage VREF to the second node N2 in response to a light emission signal EM. In this regard, the second node N2 corresponds to a node between the first transistor T1 and the storage capacitor Cst.

[0086] The fourth transistor T4 is connected to and disposed between the driving transistor DT and the ground voltage VSS. The fourth transistor T4 is turned on in response to the light emission signal EM to activate a current path of the driving current to the driving transistor DT.

[0087] The fifth transistor T5 is connected to and disposed between the reference voltage VREF and the third node N3, and transmits the reference voltage VREF to the third node N3 in response to the second scan signal SC2. In this regard, the third node N3 is a node corresponding to the drain of the driving transistor DT.

[0088] The sixth transistor T6 is connected in parallel with the micro LED element μLED, and transmits the power supply voltage VDD to the fourth node N4 corresponding to the source of the driving transistor DT in response to the first scan signal SC1.

[0089] The driving transistor DT is connected to and disposed between the micro LED element μLED and the fourth transistor T4, and controls the amount of driving current flowing in the micro LED element μLED based on the data voltage VDATA sampled by the storage capacitor Cst.

[0090] The storage capacitor Cst is connected to and disposed between the first transistor T1 and the first node N1 corresponding to the gate of the driving transistor DT, and samples the data voltage VDATA transmitted from the first transistor T1.

[0091] The first capacitor C1 is connected to and disposed between the gate and the source of the driving transistor DT. The second capacitor C2 is connected in parallel with the micro LED element μLED and in series with the first capacitor C1. The output of the driving transistor DT can be stabilized by the first capacitor C1 and the second capacitor C2.

[0092] Figure 4 is as Figure 3 shown in the timing diagram of the pixel circuit. Figure 5 is as Figure 3 shown in the current measurement diagram of the pixel circuit.

[0093] Referring to Figure 4 , the enable period of the first scan signal SC1 and the enable period of the second scan signal SC2 partially overlap each other. The pixel circuit is configured such that the fifth transistor T5 operates in response to the second scan signal SC2, and the second transistor T2 and the sixth transistor T6 operate in response to the first scan signal SC1 to reset the first node N1 corresponding to the gate of the driving transistor DT.

[0094] In this pixel circuit, the level of the reference voltage VREF may change due to leakage current during the period when the enable period of the first scan signal SCl and the enable period of the second scan signal SC2 overlap each other. The change in the level of the reference voltage VREF caused by the leakage current may cause a decrease in brightness uniformity.

[0095] In addition, reference voltages VREF applied to different pixels adjacent to different power supply lines may be different from each other. For example, there may be a difference between the reference voltage VREF of a pixel adjacent to a power supply line to which a power supply voltage VDD is applied and the reference voltage VREF of a pixel adjacent to a power supply line to which a ground voltage VSS is applied. This may result in a reduction in brightness uniformity.

[0096] The present disclosure aims to provide a pixel circuit that can output a uniform driving current regardless of the process distribution of micro-LED elements, and a micro-LED display device including the pixel circuit.

[0097] In addition, the present disclosure aims to provide a pixel circuit that can reduce leakage current by applying a direct internal compensation circuit to remove brightness non-uniformity and flicker problems, and a micro-LED display device including the pixel circuit.

[0098] Figure 6 A pixel circuit having a common cathode structure according to a third embodiment of the present disclosure is shown. Figure 7 is as Figure 6 shown in the timing diagram of the pixel circuit.

[0099] Referring to Figure 6 and Figure 7 , the pixel circuit according to the third embodiment includes a micro-LED element μLED and a driving circuit.

[0100] The driving circuit includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a driving transistor DT, a storage capacitor Cst, and a stabilization capacitor C1. Examples are described in which each of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the driving transistor DT is implemented as a thin film transistor and a PMOS transistor. However, the embodiments of the present disclosure are not limited thereto, and at least one of the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the driving transistor DT may be implemented as an NMOS transistor or a PMOS transistor. In addition, the NMOS transistor may be an oxide thin film transistor, and the PMOS thin film transistor may be a polysilicon thin film transistor.

[0101] The micro-LED element μLED may include an anode and a cathode. The anode of the micro-LED element μLED is connected to the fourth transistor T4. The cathodes of the micro-LED elements are commonly connected to a ground voltage (or a low potential voltage VSS). The micro-LED element μLED is provided in each of a plurality of sub-pixels SP.

[0102] The micro-LED element μLED is electrically connected to the driving circuit and the power line of the corresponding sub-pixel SP, and emits light based on the current flowing in the direction from the power supply voltage (or high potential voltage VDD) through the driving transistor DT to the ground voltage VSS. The micro-LED element μLED may be a light-emitting element or a light-emitting diode chip that emits one of red light, green light, blue light, and white light. According to an embodiment, the color of the light emitted from the micro-LED element μLED is not limited to the above examples.

[0103] The first transistor T1 is connected to and disposed between the data voltage VDATA and the storage capacitor Cst, and transmits the data voltage VDATA to the storage capacitor Cst in response to the first scan signal SC1.

[0104] The second transistor T2 is connected to and disposed between the gate and the drain of the driving transistor DT, and connects the gate and the drain of the driving transistor DT to each other in response to the first scan signal SC1. The gate of the driving transistor DT corresponds to the first node N1, the drain of the driving transistor DT corresponds to the third node N3, and the source of the driving transistor DT corresponds to the fourth node N4.

[0105] The third transistor T3 is connected to and disposed between the reference voltage VREF and the second node N2, and transmits the reference voltage VREF to the second node N2 in response to the light-emitting signal EM. In this regard, the second node N2 corresponds to the node between the first transistor T1 and the storage capacitor Cst.

[0106] The fourth transistor T4 is connected to and disposed between the drain of the driving transistor DT and the anode of the micro-LED element μLED. The fourth transistor T4 is turned on in response to the light-emitting signal EM to activate the current path of the driving current to the driving transistor DT.

[0107] The fifth transistor T5 is connected to and disposed between the reference voltage VREF and the first node N1, and transmits the reference voltage VREF to the first node N1 in response to the second scan signal SC2. In this regard, the first node N1 is the node between the gate of the driving transistor DT and one electrode of the storage capacitor Cst and is the node corresponding to the gate of the driving transistor DT. The fifth transistor T5 performs the function of resetting one electrode of the storage capacitor Cst to the reference voltage VREF in response to the second scan signal SC2.

[0108] The sixth transistor T6 is connected to and disposed between the data voltage VDATA and the second node N2, and transmits the data voltage VDATA to the second node N2 in response to the second scan signal SC2. In this regard, the second node N2 is the node between the first transistor T1 and the storage capacitor Cst and is the node corresponding to the other electrode of the storage capacitor Cst. The sixth transistor T6 performs the function of resetting the other electrode of the storage capacitor Cst to the data voltage VDATA in response to the second scan signal SC2.

[0109] Therefore, the fifth transistor T5 and the sixth transistor T6 operate in response to the same second scan signal SC2. The opposite two electrodes of the storage capacitor Cst can be simultaneously reset by the fifth transistor T5 and the sixth transistor T6 that operate in response to the same second scan signal SC2.

[0110] The driving transistor DT is connected to and disposed between the power supply voltage VDD and the fourth transistor T4, and controls the amount of driving current flowing through the micro LED element μLED based on the voltage applied to its gate. The voltage applied to its gate can vary according to the data voltage VDATA sampled by the storage capacitor Cst. Therefore, the driving transistor DT can control the amount of driving current flowing through the micro LED element μLED based on the data voltage VDATA.

[0111] The storage capacitor Cst is connected to and disposed between the first transistor T1 and the first node N1 corresponding to the gate of the driving transistor DT, and samples the data voltage VDATA transmitted from the first transistor T1.

[0112] The first capacitor C1 is connected to and disposed between the gate and the source of the driving transistor DT. The output of the driving transistor DT can be stabilized by the first capacitor C1. The first capacitor C1 can be referred to as an output stabilizing capacitor.

[0113] The pixel circuit according to an aspect of the present disclosure may include a micro LED element μLED, a driving transistor DT that controls the driving current of the micro LED element μLED, a storage capacitor Cst that samples the data voltage VDATA, and an internal compensation circuit that directly resets the first node N1 and the second node N2 corresponding to the opposite two electrodes of the storage capacitor Cst, respectively, before the storage capacitor Cst samples the data voltage VDATA.

[0114] The cathodes of the micro LED elements μLED may be commonly connected to the ground voltage (or low potential voltage VSS).

[0115] The internal compensation circuit may include a first reset transistor (or fifth transistor T5) and a second reset transistor (or sixth transistor T6). The first reset transistor T5 resets a first node N1 between the gate of the driving transistor DT and one electrode of the storage capacitor Cst. The second reset transistor T6 resets a second node N2 between the first transistor T1 for transmitting the data voltage VDATA and the other electrode of the storage capacitor Cst.

[0116] In this regard, the first reset transistor T5 and the second reset transistor T6 may simultaneously reset the first node N1 and the second node N2 respectively in response to the same second scan signal SC2. For example, the first reset transistor T5 may reset the first node N1 to the reference voltage VREF, and the second reset transistor T6 may reset the second node N2 to the data voltage VDATA. In this regard, as Figure 7 shown, the first scan signal SC1 and the second scan signal SC2 may be set such that their enabling periods do not overlap with each other.

[0117] The pixel circuit is configured such that the first reset transistor T5 and the second reset transistor T6 operate in response to the same second scan signal SC2 to directly reset the first node N1 and the second node N2 corresponding to the opposite two electrodes of the storage capacitor Cs respectively before the storage capacitor Cst samples the data voltage VDATA. The pixel circuit has a structure in which the first scan signal SC1 and the second scan signal SC2 do not overlap with each other to suppress the leakage of the reference voltage VREF, so that the luminance uniformity of the pixel can be improved.

[0118] Figure 8 Fig. shows a part of a pixel circuit having a common anode structure according to the present disclosure. Figure 9 Fig. shows the simulation results of a pixel circuit having a common anode structure according to the present disclosure.

[0119] As Figure 8 shown, the driving transistor DT and the fourth transistor T4 between the power supply voltage VDD and the ground voltage VSS may form a current path for the driving current ILED. The magnitude of the driving current ILED is based on the level of the data voltage VDATA.

[0120] Equation 1

[0121]

[0122] In a pixel circuit having a common anode structure, the voltage drop VLED caused by the micro LED affects the operation of the driving transistor DT, as shown in Equation 1. As Figure 9 shown, the voltage drop caused by the micro LED has a greater impact on the pixel current as the data voltage increases.

[0123] Figure 10 Shows a part of a pixel circuit having a common cathode structure according to the present disclosure. Figure 11 Shows the simulation results of a pixel circuit having a common cathode structure according to the present disclosure.

[0124] As Figure 10 shown, the driving transistor DT and the fourth transistor T4 between the power supply voltage VDD and the ground voltage VSS can form a current path for driving the current ILED. The magnitude of the driving current ILED is based on the level of the data voltage VDATA.

[0125] Equation 2

[0126]

[0127] In a pixel circuit having a common cathode structure, the voltage drop caused by the micro LED does not affect the operation of the driving transistor DT, as shown in Equation 2. Therefore, the pixel circuit can output a constant current regardless of the process distribution of the micro LED. In this regard, the process distribution can be defined as the difference between the characteristics of the respective micro LEDs of the pixel caused by the micro LED process environment. In one example, the characteristics of the micro LED can include the threshold voltage, electron mobility, etc.

[0128] The pixel circuit and the display device according to some aspects and embodiments of the present disclosure can be described as follows:

[0129] A first aspect of the present disclosure provides a pixel circuit, including: a micro LED; a driving transistor configured to control the driving current of the micro LED; a storage capacitor configured to sample the data voltage, wherein the magnitude of the driving current is based on the data voltage; and an internal compensation circuit configured to directly reset a first node and a second node respectively corresponding to opposite two electrodes of the storage capacitor before the storage capacitor samples the data voltage.

[0130] According to some embodiments of the first aspect of the present disclosure, the cathodes of the micro LEDs are commonly connected to a low potential voltage.

[0131] According to some embodiments of the first aspect of the present disclosure, the internal compensation circuit includes: a first reset transistor configured to reset the first node between the gate of the driving transistor and one of the opposite two electrodes of the storage capacitor; and a second reset transistor configured to reset the second node between the first transistor configured to transmit the data voltage and the other of the opposite two electrodes of the storage capacitor.

[0132] According to some embodiments of the first aspect of the present disclosure, the first transistor is configured to transmit the data voltage to the storage capacitor in response to a first scan signal.

[0133] According to some embodiments of the first aspect of the present disclosure, the first reset transistor and the second reset transistor are configured to reset the first node and the second node respectively in response to the same second scan signal.

[0134] According to some embodiments of the first aspect of the present disclosure, the enable period of the first scan signal and the enable period of the second scan signal do not overlap with each other.

[0135] According to some embodiments of the first aspect of the present disclosure, the first reset transistor is configured to reset the first node to a reference voltage.

[0136] According to some embodiments of the first aspect of the present disclosure, the second reset transistor is configured to reset the second node to a data voltage.

[0137] According to some embodiments of the first aspect of the present disclosure, the pixel circuit further includes: a first transistor configured to transfer a data voltage to a storage capacitor in response to a first scan signal; and a second transistor configured to connect the gate and the drain of the driving transistor to each other in response to the first scan signal.

[0138] According to some embodiments of the first aspect of the present disclosure, the pixel circuit further includes: a third transistor configured to transfer a reference voltage to the second node in response to a light emitting signal; and a fourth transistor configured to conduct in response to the light emitting signal to activate a current path of a driving current to the driving transistor.

[0139] According to some embodiments of the first aspect of the present disclosure, the pixel circuit further includes a stabilization capacitor connected to and disposed between the source and the gate of the driving transistor and configured to stabilize the output of the driving transistor.

[0140] The second aspect of the present disclosure provides a micro-LED display device including: at least one sub-pixel, wherein each of the at least one sub-pixel includes: a micro-LED; a driving transistor configured to control a driving current of the micro-LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; a first transistor configured to transfer the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect the gate and the drain of the driving transistor in response to the first scan signal; a first reset transistor configured to reset a first node between the gate of the driving transistor and one of two opposite electrodes of the storage capacitor in response to a second scan signal; and a second reset transistor configured to reset a second node between the first transistor and the other of the two opposite electrodes of the storage capacitor in response to the second scan signal.

[0141] According to some embodiments of the second aspect of the present disclosure, the cathodes of the micro LEDs are commonly connected to a low-potential voltage.

[0142] According to some embodiments of the second aspect of the present disclosure, the enable period of the first scan signal and the enable period of the second scan signal do not overlap with each other.

[0143] According to some embodiments of the second aspect of the present disclosure, the first reset transistor is configured to reset the first node to a reference voltage, and the second reset transistor is configured to reset the second node to a data voltage.

[0144] According to some embodiments of the second aspect of the present disclosure, each of at least one sub-pixel further includes: a third transistor configured to transmit the reference voltage to the second node in response to a light-emitting signal; and a fourth transistor configured to conduct in response to the light-emitting signal to activate a current path of a driving current to the driving transistor.

[0145] According to some embodiments of the second aspect of the present disclosure, each of at least one sub-pixel further includes a stabilization capacitor connected to and disposed between the source and the gate of the driving transistor and configured to stabilize the output of the driving transistor.

[0146] A third aspect of the present disclosure provides a micro LED display device, including: a micro LED configured to emit light based on a driving current; a driving transistor configured to receive a power supply voltage and control the driving current; a storage capacitor having one electrode corresponding to the first node and connected to the gate of the driving transistor, and another electrode corresponding to the second node and connected to a first transistor configured to transmit a data voltage, wherein the storage capacitor is configured to sample the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect the gate and the drain of the driving transistor to each other in response to the first scan signal; a third transistor configured to transmit the reference voltage to the second node in response to a light-emitting signal; a fourth transistor connected to and disposed between the driving transistor and the micro LED and configured to conduct in response to the light-emitting signal to activate a current path of a driving current to the driving transistor; a fifth transistor configured to transmit the reference voltage to the first node in response to a second scan signal; a sixth transistor configured to transmit the data voltage to the second node in response to the second scan signal; and a stabilization capacitor connected to and disposed between the source and the gate of the driving transistor.

[0147] According to some embodiments of the third aspect of the present disclosure, the fifth transistor and the sixth transistor are configured to directly reset the first node to the reference voltage and the second node to the data voltage respectively in response to the same second scan signal.

[0148] According to some embodiments of the third aspect of the present disclosure, the cathodes of the micro-LEDs are commonly connected to a ground voltage, wherein the enable period of the first scan signal and the enable period of the second scan signal do not overlap with each other.

[0149] A fourth aspect of the present disclosure provides a pixel circuit, including: a micro-LED; a driving transistor configured to control a driving current of the micro-LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; and an internal compensation circuit configured to simultaneously reset two opposite electrodes of the storage capacitor in response to a second scan signal, wherein the enable period of the first scan signal and the enable period of the second scan signal do not overlap with each other.

[0150] According to embodiments of the present disclosure, a uniform driving current can be output regardless of the process distribution of the micro-LED elements.

[0151] In addition, according to embodiments of the present disclosure, the leakage current can be reduced, and the brightness non-uniformity and flicker problems can be eliminated by applying a direct reset compensation circuit.

[0152] Although the embodiments of the present disclosure have been described with reference to the accompanying drawings, the present disclosure is not limited to the above embodiments and can be implemented in various different forms. Those skilled in the art can understand that the present disclosure can be implemented in other specific forms without changing the technical spirit or essential features of the present disclosure. Therefore, it should be recognized that the embodiments described above are illustrative rather than restrictive in all aspects.

Claims

1. A pixel circuit, comprising: Micro LED; a driving transistor configured to control a driving current of the micro LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; as well as The internal compensation circuit is configured to directly reset a first node and a second node respectively corresponding to two opposite electrodes of the storage capacitor before the storage capacitor samples the data voltage.

2. The pixel circuit according to claim 1, wherein: The cathodes of the micro LEDs are commonly connected to a low potential voltage.

3. The pixel circuit according to claim 1, wherein: The internal compensation circuit comprises: a first reset transistor configured to reset the first node between the gate of the drive transistor and one of two opposite electrodes of the storage capacitor; and A second reset transistor is configured to reset the second node between the first transistor configured to transmit the data voltage and the other of the two opposing electrodes of the storage capacitor.

4. The pixel circuit according to claim 3, wherein: The first transistor is configured to transfer the data voltage to the storage capacitor in response to a first scan signal.

5. The pixel circuit according to claim 4, wherein: The first reset transistor and the second reset transistor are configured to reset the first node and the second node, respectively, in response to a same second scan signal.

6. The pixel circuit according to claim 5, wherein: An enable period of the first scan signal and an enable period of the second scan signal do not overlap with each other.

7. The pixel circuit according to claim 3, wherein: The first reset transistor is configured to reset the first node to a reference voltage.

8. The pixel circuit according to claim 3, wherein: The second reset transistor is configured to reset the second node to the data voltage.

9. The pixel circuit according to claim 1, wherein: The pixel circuit further comprises: a first transistor configured to transfer the data voltage to the storage capacitor in response to a first scan signal; and The second transistor is configured to connect the gate and the drain of the driving transistor to each other in response to the first scan signal.

10. The pixel circuit according to claim 1, wherein: The pixel circuit further comprises: a third transistor configured to transmit a reference voltage to the second node in response to a light emitting signal; and The fourth transistor is configured to be turned on in response to the light emitting signal to activate a current path of the driving current to the driving transistor.

11. The pixel circuit according to claim 10, wherein: The pixel circuit further includes a stabilization capacitor connected to and disposed between a source and a gate of the driving transistor and configured to stabilize an output of the driving transistor.

12. A micro LED display device, comprising: at least one sub-pixel, wherein each of the at least one sub-pixel comprises: Micro LED; a driving transistor configured to control a driving current of the micro LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect the gate and the drain of the driving transistor in response to the first scanning signal; a first reset transistor configured to reset a first node between the gate of the driving transistor and one of two opposing electrodes of the storage capacitor in response to a second scan signal; and A second reset transistor is configured to reset a second node between the first transistor and the other of the two opposite electrodes of the storage capacitor in response to the second scan signal.

13. The display device according to claim 12, wherein: The cathodes of the micro LEDs are commonly connected to a low potential voltage.

14. The display device according to claim 12, wherein: An enable period of the first scan signal and an enable period of the second scan signal do not overlap with each other.

15. The display device according to claim 12, wherein: The first reset transistor is configured to reset the first node to a reference voltage, The second reset transistor is configured to reset the second node to the data voltage.

16. The display device according to claim 12, wherein: Each of the at least one sub-pixel further comprises: a third transistor configured to transmit a reference voltage to the second node in response to a light emitting signal; and The fourth transistor is configured to be turned on in response to the light emitting signal to activate a current path of the driving current to the driving transistor.

17. The display device according to claim 16, wherein: Each of the at least one sub-pixel further includes a stabilization capacitor connected to and disposed between a source and a gate of the driving transistor and configured to stabilize an output of the driving transistor.

18. A micro LED display device, comprising: a micro LED configured to emit light based on a driving current; a driving transistor configured to receive a power supply voltage and control the driving current; a storage capacitor having one electrode corresponding to the first node and connected to the gate of the driving transistor, and another electrode corresponding to the second node and connected to the first transistor configured to transmit a data voltage, wherein the storage capacitor is configured to sample the data voltage; a first transistor configured to transmit the data voltage to the storage capacitor in response to a first scan signal; a second transistor configured to connect the gate and the drain of the driving transistor to each other in response to the first scan signal; a third transistor configured to transmit a reference voltage to the second node in response to a light emitting signal; a fourth transistor connected to and disposed between the driving transistor and the micro LED and configured to be turned on in response to the light emission signal to activate a current path of the driving current to the driving transistor; a fifth transistor configured to transmit the reference voltage to the first node in response to a second scan signal; a sixth transistor configured to transmit the data voltage to the second node in response to the second scan signal; and A stabilizing capacitor is connected to and arranged between the source and the gate of the driving transistor.

19. The display device according to claim 18, wherein: The fifth transistor and the sixth transistor are configured to respectively reset the first node directly to the reference voltage and the second node directly to the data voltage in response to the same second scan signal.

20. The display device according to claim 18, wherein: The cathodes of the micro LEDs are commonly connected to a ground voltage. The enabling period of the first scanning signal and the enabling period of the second scanning signal do not overlap with each other.

21. A pixel circuit, comprising: Micro LED; a driving transistor configured to control a driving current of the micro LED; a storage capacitor configured to sample a data voltage, wherein the magnitude of the driving current is based on the data voltage; a first transistor configured to transfer the data voltage to the storage capacitor in response to a first scan signal; and an internal compensation circuit configured to simultaneously reset two opposite electrodes of the storage capacitor in response to a second scanning signal, The enabling period of the first scanning signal and the enabling period of the second scanning signal do not overlap with each other.

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