Display panel and display device

Abstract

The application provides a display panel and a display device, relates to the technical field of display, and is used for optimizing the structural design of a cathode layer so that the cathode layer can better adapt to the requirements of different display areas on cathode voltage. The display panel comprises a display area and a non-display area, wherein the display area comprises a first display area and a second display area surrounding the first display area, the transmittance of at least part of the first display area is greater than that of the second display area; a substrate; a light-emitting device layer comprising a cathode layer, the cathode layer comprises a first cathode part located at least in the first display area and a second cathode part located in the second display area, and the first cathode part and the second cathode part have a spacing therebetween; and a first cathode trace located in the non-display area, the first cathode trace is electrically connected with the first cathode part through a first connecting line.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diode (OLED) display panels are widely used in various display fields due to their advantages such as excellent color performance, high contrast, and fast response speed.

[0003] Currently, the cathode layer in this type of display panel is typically a full-coverage film layer covering the entire display area. However, this design has certain limitations, making it difficult to accurately adapt to the cathode voltage requirements of different display areas, and thus hindering further optimization of the display effect. Summary of the Invention

[0004] This invention provides a display panel and display device for optimizing the structural design of the cathode layer so that it can better adapt to the cathode voltage requirements of different display areas.

[0005] In a first aspect, embodiments of the present invention provide a display panel, comprising:

[0006] The display area includes a display area and a non-display area, wherein the display area includes a first display area and a second display area surrounding the first display area, and at least a portion of the first display area has a higher transmittance than the second display area;

[0007] Substrate;

[0008] The light-emitting device layer includes a cathode layer, the cathode layer including at least a first cathode portion located in the first display area and a second cathode portion located in the second display area, with a gap between the first cathode portion and the second cathode portion;

[0009] The first cathode trace is located in the non-display area, and the first cathode trace is electrically connected to the first cathode portion through a first connecting line.

[0010] Secondly, based on the same inventive concept, embodiments of the present invention also provide a display device, including the aforementioned display panel.

[0011] The technical solution provided by the embodiments of the present invention has the following beneficial effects:

[0012] In this embodiment of the invention, the cathode layer is divided into a first cathode portion corresponding to the first display area and a second cathode portion corresponding to the second display area, with the two cathode portions being independent of each other. The first cathode portion is connected to a single first cathode trace via a first connecting line. Thus, after a cathode signal is provided to the end of the first cathode trace by a signal pin, the cathode signal is transmitted only from the left and right borders to near the top border, and then transmitted to the first cathode portion via the first connecting line. This cathode signal does not need to flow through the second cathode portion; therefore, the cathode signal on the first cathode portion is not affected by the voltage drop of the signal on the second cathode portion. The cathode voltage on the first cathode portion can be more negative, thereby better meeting the brightness requirements of the first display area and improving the display uniformity of the display panel. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of a display panel structure in related technologies;

[0015] Figure 2 This is a schematic diagram of a display panel provided in an embodiment of the present invention;

[0016] Figure 3 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0017] Figure 4 A cross-sectional view of a display panel provided in an embodiment of the present invention;

[0018] Figure 5 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention;

[0019] Figure 6 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0020] Figure 7 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0021] Figure 8 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0022] Figure 9 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0023] Figure 10 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0024] Figure 11 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0025] Figure 12 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0026] Figure 13 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0027] Figure 14 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0028] Figure 15 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0029] Figure 16 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0030] Figure 17 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0031] Figure 18 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention;

[0032] Figure 19 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0033] Figure 20 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0034] Figure 21 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0035] Figure 22 A top view of a conductive part provided in an embodiment of the present invention;

[0036] Figure 23 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention;

[0037] Figure 24 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0038] Figure 25This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention;

[0039] Figure 26 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention;

[0040] Figure 27 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention;

[0041] Figure 28 This is a schematic diagram of a display device provided in an embodiment of the present invention. Detailed Implementation

[0042] To better understand the technical solution of the present invention, the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0043] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0044] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0045] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0046] Before describing the technical solutions provided by the embodiments of the present invention, the present invention first explains the problems existing in the related technologies.

[0047] In related technologies, such as Figure 1 As shown, Figure 1 This is a schematic diagram of a display panel in related technologies. The display panel includes a display area 101 and a non-display area 102. The display area 101 includes a first display area 103 and a second display area 104. Optical components such as a camera are correspondingly disposed in the first display area 103, and the second display area 104 is a conventional display area surrounding the first display area 103.

[0048] The display panel also includes a cathode layer 105 and cathode traces 106. The cathode layer 105 is a full-coverage film layer covering the display area 101, and the cathode traces 106 are located in the non-display area 102. The cathode layer 105 is connected to the cathode traces 106 by an overlap metal 107.

[0049] Currently, to further improve the transmittance of the first display area 103, the density of light-emitting elements in the first display area 103 is generally set to be lower than the density of light-emitting elements in the second display area 104. In this structure, to mitigate the brightness difference between the first display area 103 and the second display area 104 and optimize the display uniformity of the entire display area 101, the light-emitting elements in the first display area 103 need to emit brighter light. At this time, the data voltage corresponding to the pixel circuit connected to the light-emitting elements in the first display area 103 needs to be lower so that the pixel circuit can provide a larger output current. The cathode voltage on the cathode layer 105 in the first display area 103 also needs to be lower.

[0050] However, based on the above structure, the cathode signal received by the cathode layer 105 in the first display area 103 comes from the cathode layer 105 in the surrounding second display area 104. In addition, the first display area 103 is often located on top of the display area 101, which will result in a large cathode signal voltage drop on the cathode layer 105 in the first display area 103, making it difficult to meet the display requirements of the first display area 103.

[0051] For example, if the current cathode voltage is negative, such as -3V, when the cathode signal on the cathode trace 106 is transmitted through the cathode layer 105 in the second display area 104 to the cathode layer 105 in the first display area 103, a large voltage drop will occur. This will cause the actual voltage of the cathode signal received by the cathode layer 105 in the first display area 103 to be less negative, for example, it will become -2V. Consequently, the cathode voltage corresponding to the first display area 103 will be difficult to meet the brightness requirements of the light-emitting element.

[0052] In response, this invention provides a display panel in which the cathode voltage corresponding to the first display area can be adjusted to meet its display requirements by adjusting the structure of the cathode layer.

[0053] like Figure 2 As shown, Figure 2 This is a schematic diagram of a display panel provided in an embodiment of the present invention. The display panel includes a display area 1 and a non-display area 2. The display area 1 includes a first display area 3 and a second display area 4 surrounding the first display area 3. The transmittance of at least a portion of the first display area 3 is greater than the transmittance of the second display area 4.

[0054] In this embodiment of the invention, an optical component such as a camera is correspondingly disposed in the first display area 3. At least a portion of the first display area 3 is a high-transmittance area, allowing ambient light to pass through the high-transmittance area and enter the optical component below the screen, enabling the optical component to collect external light and thus enabling the display panel to perform functions such as image capture. The second display area 4 is a conventional display area surrounding the first display area 3.

[0055] In a more specific structure, see Figure 2 The first display area 3 includes a first sub-display area 5 and a second sub-display area 6.

[0056] The first sub-display area 5 is a high-transmittance area, and its transmittance is greater than that of the second display area 4. Furthermore, the density of light-emitting elements in the first sub-display area 5 can be less than the density of light-emitting elements in the second display area 4.

[0057] The second sub-display area 6 is a transition area. To further improve the transmittance of the first sub-display area 5, the pixel circuits connected to the light-emitting elements in the first sub-display area 5 can be located in the second sub-display area 6. The pixel circuits and light-emitting elements in the second sub-display area 6 can have a one-to-one relationship, meaning one pixel circuit is connected to only one light-emitting element, or a one-to-many relationship, meaning one pixel circuit is connected to at least two light-emitting elements. Furthermore, the density of light-emitting elements in the second sub-display area 6 can be between the density of light-emitting elements in the first sub-display area 5 and the density of light-emitting elements in the second display area 4.

[0058] like Figure 3 and Figure 4 As shown, Figure 3 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 4 This is a cross-sectional view of a display panel provided in an embodiment of the present invention. The display panel also includes a substrate 7, which can be a rigid substrate such as glass or a flexible substrate such as polyimide.

[0059] The display panel also includes a light-emitting device layer 8, which includes a cathode layer 9. The cathode layer 9 includes a first cathode portion 10 and a second cathode portion 11, which are disposed on the same layer. The first cathode portion 10 is located at least in the first display area 3, and the second cathode portion 11 is located in the second display area 4. Furthermore, there is a gap between the first cathode portion 10 and the second cathode portion 11.

[0060] Specifically, the interval between the first cathode portion 10 and the second cathode portion 11 means that the first cathode portion 10 and the second cathode portion 11 are not connected and are disconnected.

[0061] The display panel also includes a first cathode trace 12, which is located in the non-display area 2 and is electrically connected to the first cathode portion 10 via a first connecting line 13. In this embodiment of the invention, the first cathode trace 12 may only be used to provide a cathode signal to the first cathode portion 10, and the first cathode trace 12 is not connected to the second cathode portion 11.

[0062] In this embodiment of the invention, the cathode layer 9 is divided into a first cathode portion 10 corresponding to the first display area 3 and a second cathode portion 11 corresponding to the second display area 4, with the two cathode portions being independent of each other. The first cathode portion 10 is connected to a first cathode trace 12 via a first connecting line 13. Thus, after the signal pin provides a cathode signal to the end of the first cathode trace 12, the cathode signal is transmitted only from the left and right borders to near the top border, and then transmitted to the first cathode portion 10 via the first connecting line 13. This cathode signal does not need to flow through the second cathode portion 11, therefore the cathode signal on the first cathode portion 10 is not affected by the voltage drop of the signal on the second cathode portion 11. The cathode voltage on the first cathode portion 10 can be more negative, thereby better meeting the brightness requirements of the first display area 3 and improving the display uniformity of the display panel.

[0063] In one feasible implementation, such as Figure 5 As shown, Figure 5 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention. The display panel further includes an array layer 14, which is located between the substrate 7 and the light-emitting device layer 8. The array layer 14 includes a first metal layer 15.

[0064] The first connecting line 13 is located in the first metal layer 15.

[0065] The array layer 14 is a film layer in the display panel used to set up various circuits and wiring. The array layer 14 typically includes multiple metal layers. The first connecting line 13 is located in the array layer 14, and the choice of the film layer position of the first connecting line 13 has greater flexibility. For example, a new metal layer can be added in the array layer 14 as the first metal layer 15 to route the first connecting line 13, or an existing metal layer can be used as the first metal layer 15 to route the first connecting line 13, depending on the wiring of each metal layer in the array layer 14.

[0066] Regarding the first metal layer 15, in one feasible embodiment, see [link to relevant documentation]. Figure 5 The array layer 14 also includes a circuit layer 16, which includes transistors 17.

[0067] The first metal layer 15 is located between the substrate 7 and the circuit layer 16. The first metal layer 15 also includes a shielding portion 18, which overlaps with the channel of the transistor 17 in a direction perpendicular to the plane of the substrate 7, so as to prevent external light from shining into the channel of the transistor 17, avoid affecting the carrier concentration of the transistor 17, and improve device stability.

[0068] The above structure uses the original shielding metal layer in the array layer 14, which was originally used to set the shielding part 18, as the first metal layer 15. This eliminates the need to add other film layers for the first connecting line 13. Consequently, there is no need to add other mask plates in the process of manufacturing the display panel, thus saving process costs.

[0069] Moreover, compared to other metal layers, the wiring in the shielding metal layer is relatively simple, and there is more space to accommodate the first connection line 13. The design of the arrangement direction and number of the first connection line 13 is more flexible. In other words, the first connection line 13 is located in the shielding metal layer, which can also reduce the impact of the first connection line 13 on the original wiring in the array layer 14.

[0070] In an embodiment of the present invention, see Figure 10 When the first display area 3 includes a first sub-display area 5 and a second sub-display area 6, since the pixel circuit connected to the light-emitting element in the first sub-display area 5 is located in the second sub-display area 6, the blocking portion 18 in the first display area 3 can be located only in the second sub-display area 6, and not in the first sub-display area 5. Furthermore, the shape, area, and arrangement density of the blocking portion 18 in the second sub-display area 6 can be the same as or different from the shape, area, and arrangement density of the blocking portion 18 in the second display area 4, and can be adjusted accordingly based on the layout design of the pixel circuits in the two areas.

[0071] In one feasible implementation, such as Figure 6 and Figure 7 As shown, Figure 6 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 7 This is another structural schematic diagram of a display panel provided in an embodiment of the present invention, and, as shown... Figure 8 and Figure 9 As shown, Figure 8 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 9 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention. The second display area 4 includes a first sub-area 20 and a second sub-area 21 located on opposite sides of the first display area 3. A first connecting line 13 passes through the first sub-area 20, and the extension direction of the first connecting line 13 is the same as the arrangement direction of the first sub-area 20 and the second sub-area 21.

[0072] The first metal layer 15 also includes a first signal line 19 for receiving a first constant voltage signal. The first signal line 19 includes a first trace 22 located in the first sub-region 20, the first trace 22 extending in the same direction as the first connecting line 13, and at least partially adjacent first traces 22 are connected by the first connecting line 13.

[0073] by Figure 7 Taking the first display area 3 shown, which includes a first sub-area 20 and a second sub-area 21 on its upper and lower sides, as an example, the first connecting line 13 runs through the first sub-area 20, meaning that the first cathode portion 10 is connected to the first cathode trace 12 on the upper or lower side via the longitudinally extending first connecting line 13. When the first metal layer 15 also includes a first signal line 19 for receiving constant voltage signals, to match the arrangement of the first connecting line 13 in the first sub-area 20, the first signal line 19 in the first sub-area 20 can be designed to include multiple longitudinally extending first traces 22, with the first connecting line 13 interspersed among the first traces 22. In this way, the first traces 22 and the first connecting line 13 in the first sub-area 20 extend in the same direction, and a reasonable arrangement can be achieved. Figure 9 The first display area 3 shown includes a first sub-area 20 and a second sub-area 21 on the left and right sides, respectively, which will not be described again here.

[0074] Further, see Figure 5 The array layer 14 also includes a circuit layer 16, which includes transistors 17. A first metal layer 15 is located between the substrate 7 and the circuit layer 16. The first metal layer 15 also includes a shielding portion 18, which overlaps with the channel of the transistor 17 in a direction perpendicular to the plane of the substrate 7.

[0075] like Figure 10 As shown, Figure 10 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention, wherein the first signal line 19 is connected to the blocking part 18.

[0076] In this structure, the first metal layer 15 where the first connecting line 13 is located is a shielding metal layer, and the first signal line 19 is a signal line connected to the shielding part 18. The first signal line 19 transmits a constant voltage signal to the shielding part 18, which can prevent the shielding part 18 from floating and thus prevent static electricity from accumulating on the shielding part 18.

[0077] When the first signal line 19 is a signal line connected to the shielding part 18, the first signal line 19 generally has a grid-like structure with horizontal and vertical intersections. In this embodiment of the invention, in order to achieve rational wiring of the first signal line 19 and the first connecting line 13 in the first sub-area 20, the first signal line 19, which was originally grid-like in the first sub-area 20, is vertically separated, and the first connecting line 13 is interspersed in the vertically separated positions. However, in the second display area 4, in areas other than the first sub-area 20, the first signal line 19 can still have a grid-like structure.

[0078] In one feasible implementation, see Figures 6-9 The non-display area 2 also includes a constant voltage line 23 electrically connected to the first signal line 19. The constant voltage line 23 is used to provide a first constant voltage signal to the first signal line 19. To facilitate the first trace 22 in the first sub-area 20 receiving the first constant voltage signal, the first trace 22 can be connected to the constant voltage line 23 on the side of the first sub-area 20 away from the first display area 3. For example, the first trace 22 can extend vertically directly to the upper frame and be connected to the constant voltage line 23 within the upper frame.

[0079] In this embodiment of the invention, the constant voltage line 23 may include a power line for providing a power signal to the pixel circuit, or a reset line for providing a reset signal to the pixel circuit, etc.

[0080] In one feasible implementation, such as Figure 11 and Figure 12 As shown, Figure 11 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 12 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. The first signal line 19 further includes a second trace 24 located in the first display area 3 and a third trace 25 located at least in the second sub-area 21.

[0081] When the first display area 3 includes the first sub-display area 5 and the second sub-display area 6, the second wiring 24 is located only in the second sub-display area 6 and not in the first sub-display area 5, so as to avoid blocking the light in the first sub-display area 5.

[0082] The first metal layer 15 also includes a second connecting line 26, which extends at least along the edge of the first display area 3 near the second sub-area 21. Furthermore, at least a portion of the second trace 24 is connected to the third trace 25 via the second connecting line 26.

[0083] In the above configuration, at least a portion of the second trace 24 can extend directly to the second connecting line 26, with its end connected to the second connecting line 26. This allows for a connection with the third trace 25 via the second connecting line 26, enabling the reception of the first constant voltage signal transmitted from the third trace 25. For example, see [link to example]. Figure 11 When the first sub-area 20 and the second sub-area 21 are located on the upper and lower sides of the first display area 3, the second wiring 24 located on the left and right sides of the first sub-display area 5 in the first display area 3 is directly connected to the second connecting line 26 at the lower end.

[0084] This design allows for more flexible routing of the second trace 24 and the third trace 25. For example, still using... Figure 11 For example, the second trace 24 extends vertically, and the third trace 25 is in a grid pattern. When at least a portion of the second trace 24 is connected to the third trace 25 via the second connecting line 26, the connection between the second trace 24 and the third trace 25 is not affected regardless of whether the vertically extending portions of the second trace 24 and the third trace 25 are aligned or misaligned. Furthermore, when the first signal line 19 is a signal line connected to the blocking portion 18, the arrangement of the second trace 24 is more flexible, which means that the design of the blocking portion 18 and the pixel circuit in the first display area 3 can be more free.

[0085] In this embodiment of the invention, to improve connection reliability, the line width of the second connecting line 26 can be greater than the line widths of the second trace 24 and the third trace 25.

[0086] Furthermore, in this embodiment of the invention, when the second connecting line 26 extends at least along the edge of the first display area 3 near the second sub-area 21, the second connecting line 26 can be in the form of... Figure 11 and Figure 12 It can be stepped, as shown, or it can be a smooth arc.

[0087] In one feasible implementation, such as Figure 13 and Figure 14 As shown, Figure 13 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 14 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention. In the direction perpendicular to the plane where the substrate 7 is located, the projection of the second connecting line 26 surrounds the projection of the first cathode portion 10, that is, the second connecting line 26 is located on the periphery of the first cathode portion 10.

[0088] The first display area 3 includes a first sub-display area 5 and a second sub-display area 6 surrounding the first sub-display area 5. The transmittance of the first sub-display area 5 is greater than that of the second display area 4. The second trace 24 is located in the second sub-display area 6, wherein the second trace 24 includes multiple first sub-traces 27 extending in the same direction.

[0089] The first sub-line 27 includes a first type of first sub-line 28, the end of which is connected to the second connecting line 26.

[0090] The first sub-routes 27 also include a second type of first sub-routes 29. At least a portion of the second type of first sub-routes 29 are located between the first sub-display area 5 and the first sub-area 20. See also... Figure 13 At least one end of the second type first sub-trace 29 is connected to the first trace 22, and / or, see Figure 14 At least one second-type first sub-trace 29 is electrically connected to the first trace 22 or the first-type first sub-trace 28 via a third connecting line 30, wherein the third connecting line 30 is located in the first metal layer 15, and the extension direction of the third connecting line 30 intersects the extension direction of the first sub-trace 27.

[0091] In this embodiment of the invention, when the second type of first sub-trace 29 is electrically connected to the first trace 22 through the third connecting line 30, it may include at least the following two situations.

[0092] In the first scenario, at least one second-type first sub-trace 29 is directly connected to the first trace 22 via the third connecting line 30. That is, a certain second-type first sub-trace 29 is directly connected to the third connecting line 30, and the third connecting line 30 is directly connected to the first trace 22.

[0093] In the second scenario, at least one second-type first sub-line 29 is indirectly connected to the first line 22 via a third connecting line 30. For example, a second-type first sub-line 29 is connected to a third connecting line 30, and the third connecting line 30 is indirectly connected to the first line 22 via another second-type first sub-line 29 and another third connecting line 30.

[0094] The second type of first sub-line 29 is electrically connected to the first type of first sub-line 28 through the third connecting line 30 in the same way, which will not be repeated here.

[0095] In the above structure, the second connecting line 26 is located on the periphery of the first cathode portion 10. In order to avoid short circuit between the second connecting line 26 and the first connecting line 13, the second connecting line 26 only surrounds part of the edge of the first cathode portion 10.

[0096] by Figure 13Taking the first sub-area 20 located above the first display area 3 as an example, the portion of the first sub-line 27 located on the left and right sides of the first sub-display area 5 in the first display area 3 can be directly connected to the second connecting line 26. This portion of the first sub-line 27 can serve as the aforementioned first type of first sub-line 28. The portion of the first sub-line 27 located between the first sub-display area 5 and the first sub-area 20 in the first display area 3 is not convenient to connect directly to the second connecting line 26. Therefore, it can be configured to be directly connected to the first line 22, or connected to the first line 22 or the first type of first sub-line 28 via the third connecting line 30. This portion of the first sub-line 27 can serve as the aforementioned second type of first sub-line 29. This configuration facilitates the first sub-line 27 in the first display area 3 receiving the first constant voltage signal.

[0097] Alternatively, in another feasible implementation, such as Figure 15 As shown, Figure 15 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention. In the direction perpendicular to the plane where the substrate 7 is located, the projection of the second connecting line 26 is located within the projection of the first cathode portion 10. The second connecting line 26 extends along the edge of the first cathode portion 10 and has a closed structure. All the second traces 24 are connected to the second connecting line 26.

[0098] Taking the first sub-region 20 and the second sub-region 21 arranged longitudinally as an example, in the above structure, the projection of the second connecting line 26 is located within the projection of the first cathode portion 10. The second connecting line 26 can avoid the first trace 22 and the first connecting line 13, thus forming a closed structure extending along the edge of the first cathode portion 10. In this structure, all the second traces 24 can be connected to the second connecting line 26, making the connection simpler.

[0099] In one feasible implementation, such as Figure 16 and Figure 17 As shown, Figure 16 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 17 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. The circuit layer 16 includes a data line 31, which extends along a first direction x.

[0100] The first display area 3 includes a first sub-area 20 and a second sub-area 21 on the opposite side in the first direction x, and / or the first display area 3 includes a first sub-area 20 and a second sub-area 21 on the opposite side in the second direction y, where the second direction y intersects the first direction x.

[0101] When the upper and lower sides of the first display area 3 include the first sub-area 20 and the second sub-area 21, the first cathode portion 10 is connected to the first cathode trace 12 on the upper or lower side of the first display area 3 via the first connecting line 13; when the left and right sides of the first display area 3 include the first sub-area 20 and the second sub-area 21, the first cathode portion 10 is connected to the first cathode trace 12 on the left or right side of the first display area 3 via the first connecting line 13.

[0102] In this embodiment of the invention, the first display area 3 may include a first sub-area 20 and a second sub-area 21 on both sides of the first direction x, or it may include a first sub-area 20 and a second sub-area 21 on both sides of the second direction y, or it may include a first sub-area 20 and a second sub-area 21 on both sides of the first direction x, and also include a first sub-area 20 and a second sub-area 21 on both sides of the second direction y.

[0103] In one feasible implementation, see Figure 16 and Figure 17 The second display area 4 includes a first sub-area 20 and a second sub-area 21 located on opposite sides of the first display area 3, with a first connecting line 13 passing through the first sub-area 20. The distance between the first display area 3 on one side of the first sub-area 20 and the outer edge of the display panel is less than the distance between the first display area 3 on one side of the second sub-area 21 and the outer edge of the display panel, thereby shortening the extension distance of the first connecting line 13 and further reducing the voltage drop of the cathode signal received by the first cathode portion 10.

[0104] In one feasible implementation, such as Figure 18 As shown, Figure 18 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention. The light-emitting device layer 8 further includes an anode 32, a pixel definition layer 33, a light-emitting layer 34, and a light-emitting functional layer 35. The light-emitting functional layer 35 includes film layers such as a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.

[0105] The first cathode portion 10 is electrically connected to the first connecting line 13 via at least one conductive portion 36, wherein the conductive portion 36 includes a first conductive portion 37 disposed in the same layer as the anode 32.

[0106] The light-emitting device layer 8 includes a first opening 38 that penetrates the pixel definition layer 33 and the light-emitting functional layer 35. The first opening 38 exposes a first conductive portion 37, and the first cathode portion 10 overlaps with the first conductive portion 37 at the first opening 38. The first opening 38 can be removed by laser.

[0107] When the first connecting line 13 is located in the first metal layer 15 in the array layer 14, the first cathode portion 10 and the first connecting line 13 are longitudinally far apart, and the two are connected by at least one conductive part 36 as an intermediate connecting metal, which can improve the reliability of the connection between the two.

[0108] The first conductive part 37 is disposed on the same layer as the anode 32 and is the conductive part 36 closest to the first cathode part 10. By providing a first opening 38 in the light-emitting device layer 8 that penetrates the pixel definition layer 33 and the light-emitting function layer 35, and by allowing the first cathode part 10 to directly overlap with the first conductive part 37 within the first opening 38, the contact area between the first cathode part 10 and the first conductive part 37 can be increased, making the connection between the first cathode part 10 and the first connecting line 13 more stable.

[0109] In this embodiment of the invention, to optimize the layout design, the shape of the first conductive portion 37 can be the same as the shape of the anode 32. For example, as Figure 19 As shown, Figure 19 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention. When the anode 32 is circular, the first conductive part 37 can also be circular.

[0110] Furthermore, in embodiments of the present invention, one or more first conductive portions 37 may be provided in a light-emitting repeating unit cycle, depending on the spatial selection.

[0111] For example, see Figure 19 The display panel includes multiple light-emitting repeating units 60, each comprising a first light-emitting element group 40, a second light-emitting element group 41, a third light-emitting element group 42, and a fourth light-emitting element group 43 arranged alternately along a second direction y. The first light-emitting element group 40 and the third light-emitting element group 42 each include a red light-emitting element 39-R and a blue light-emitting element 39-B arranged along a first direction x, and the red light-emitting element 39-R in the first light-emitting element group 40 and the blue light-emitting element 39-B in the third light-emitting element group 42 are aligned. The second light-emitting element group 41 and the fourth light-emitting element group 43 each include a green light-emitting element 39-G arranged along the first direction x, and the green light-emitting element 39-G in the second light-emitting element group 41 and the green light-emitting element 39-G in the fourth light-emitting element group 43 are aligned.

[0112] In one feasible implementation, the first conductive part 37 is located between the anodes 32 of the red light-emitting element 39-R and the blue light-emitting element 39-B of the first light-emitting element group 40 in the light-emitting repeating unit 60, or between the anodes 32 of the two green light-emitting elements 39-G of the second light-emitting element group 41 in the light-emitting repeating unit 60, or between the anodes 32 of the blue light-emitting element 39-B and the red light-emitting element 39-R of the third light-emitting element group 42 in the light-emitting repeating unit 60, or between the anodes 32 of the two green light-emitting elements 39-G of the fourth light-emitting element group 43 in the light-emitting repeating unit 60.

[0113] In one feasible implementation, combined with Figure 18 ,like Figure 20 and Figure 21 As shown, Figure 20 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 21 This is another structural schematic diagram of the display panel provided in an embodiment of the present invention. The first cathode portion 10 is electrically connected to the first connecting line 13 through at least one conductive portion 36. The conductive portion 36 includes a first conductive portion 37 that is closest to the first cathode portion 10. The first conductive portion 37 can be the aforementioned conductive portion 36 that is disposed on the same layer as the anode 32.

[0114] In this embodiment, at least two first connecting lines 13 are connected and linked to the same first conductive part 37. The accompanying drawings of this embodiment are all schematic diagrams with two first connecting lines 13 connected to the same first conductive part 37 as an example. In other cases, three or more first connecting lines 13 may be connected to the same first conductive part 37.

[0115] Compared to providing a first conductive part 37 for each first connecting line 13, the above structure can reduce the number of first conductive parts 37 and vias, saving the overlap space between the first cathode part 10 and the first connecting line 13.

[0116] In one feasible implementation, see again Figure 20 and Figure 21 The first cathode portion 10 is electrically connected to the first connecting line 13 through at least one conductive portion 36. The conductive portion 36 includes a first conductive portion 37 that is closest to the first cathode portion 10. The first conductive portion 37 can be the conductive portion 36 that is disposed in the same layer as the anode 32.

[0117] To optimize the arrangement of the first conductive parts 37, multiple first conductive parts 37 can be arranged along the edge of the first display area 3. For example, the connection line of multiple first conductive parts 37 can be an arc.

[0118] In one feasible implementation, combined with Figure 18 and Figure 22 , Figure 22 This is a top view of the conductive part 36 provided in an embodiment of the present invention. The first cathode part 10 is electrically connected to the first connecting line 13 through a plurality of stacked conductive parts 36, and adjacent conductive parts 36 are electrically connected through a first via 44.

[0119] Among them, the two first vias 44 corresponding to three adjacent conductive parts 36 do not overlap in the direction perpendicular to the plane of the substrate 7. Among the three first vias 44 corresponding to four adjacent conductive parts 36, two of the first vias 44 overlap in the direction perpendicular to the plane of the substrate 7.

[0120] It should be noted that the two first vias 44 corresponding to three adjacent conductive parts 36 refer to the first via 44 between the first conductive part 36 and the second conductive part 36, and the first via 44 between the second conductive part 36 and the third conductive part 36. The three first vias 44 corresponding to four adjacent conductive parts 36 refer to the first via 44 between the first conductive part 36 and the second conductive part 36, the first via 44 between the second conductive part 36 and the third conductive part 36, and the first via 44 between the third conductive part 36 and the fourth conductive part 36.

[0121] In the above configuration, on the one hand, the layout space occupied by the vias between multiple conductive parts 36 can be saved, and on the other hand, the connection between the conductive parts 36 can be made more stable, enhancing the load-bearing capacity and deformation resistance of the entire structure, improving the connection strength between the first cathode part 10 and the first connecting line 13, and dispersing the stress between the two metal layers more evenly to avoid stress concentration.

[0122] In one feasible implementation, such as Figure 23 As shown, Figure 23 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention. The first cathode portion 10 is electrically connected to the first connecting line 13 through at least one conductive portion 36.

[0123] The conductive portion 36 includes a second conductive portion 45, which is electrically connected to the first connecting line 13 through a through-hole second via 46 and a third via 47. The third via 47 is located on the side of the second via 46 away from the substrate 7, and the area of ​​the orthographic projection of the third via 47 onto the substrate 7 is larger than the area of ​​the orthographic projection of the second via 46 onto the substrate 7.

[0124] The second conductive part 45 is the conductive part 36 closest to the first connecting line 13. A through-hole design is used between the second conductive part 45 and the first connecting line 13, with the upper hole (second through-hole 46) having a larger diameter. The larger upper hole diameter allows for more space to fill the connecting material during connection, increasing the contact area and connection strength. The smaller lower hole (third through-hole 47) diameter allows for better control of the connection depth and precision while ensuring a secure connection, making the connection between the second conductive part 45 and the first connecting line 13 more stable and reliable, reducing the risk of failure due to weak connections.

[0125] Moreover, in the design of sleeves with different apertures, the upper hole with a larger aperture can buffer and disperse the stress generated by external forces to a certain extent, while the lower hole with a smaller aperture can transmit the remaining stress more evenly to the first connecting line 13 of the lower layer, avoiding stress concentration at a certain point or in a certain area, thereby improving the stability of the metal structure under stress and reducing the possibility of cracks or fractures.

[0126] In addition, see again Figure 23 The conductive portion 36 may further include a third conductive portion 48, which is located between the first conductive portion 37 and the second conductive portion 45. At least one third conductive portion 48 comprises a metallic material, and / or at least one third conductive portion 48 comprises indium tin oxide (ITO) material.

[0127] In one feasible implementation, such as Figure 24 and Figure 25 As shown, Figure 24 This is a schematic diagram of another structure of the display panel provided in an embodiment of the present invention. Figure 25 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention. The display panel also includes a blocking structure 49, which is located between the first cathode portion 10 and the second cathode portion 11, for example, it can be arranged around the first cathode portion 10.

[0128] The blocking structure 49 is used to separate the first cathode portion 10 and the second cathode portion 11, ensuring the isolation of the cathode signal between the first cathode portion 10 and the second cathode portion 11, thereby ensuring that the cathode signal received by the first cathode portion 10 does not flow through the second cathode portion 11, so that the cathode signal on the first cathode portion 10 has a smaller voltage drop.

[0129] In one feasible implementation, see again Figure 3 The first cathode trace 12 surrounds the display area 1, so that no matter where the first display area 3 is located in the display area 1, it is convenient for the first cathode portion 10 to lead out the first connecting line 13 and connect it to the first cathode trace 12.

[0130] In this embodiment of the invention, the first cathode trace 12 can be a single-layer metal or a multilayer metal structure. For example, to enable the first cathode trace 12 to have a smaller load, the first cathode trace 12 can be a multilayer metal structure of titanium, aluminum, and titanium.

[0131] In one feasible implementation, the linewidth of the first cathode trace 12 is greater than or equal to 30 μm and less than or equal to 70 μm, so that it has sufficient width to avoid excessive load on the first cathode trace 12.

[0132] In one feasible implementation, such as Figure 26 As shown, Figure 26 This is another schematic diagram of the structure of the display panel provided in an embodiment of the present invention. The non-display area 2 further includes a second cathode trace 50, and the second cathode portion 11 is electrically connected to the second cathode trace 50. The second cathode trace 50 and the first cathode trace 12 can be arranged on the same layer or on different layers.

[0133] In embodiments of the present invention, such as Figure 27 As shown, Figure 27 This is a schematic diagram of another film layer structure of the display panel provided in an embodiment of the present invention. The second cathode portion 11 is connected to the second cathode portion 11 through at least one overlapping metal 51, wherein at least one overlapping metal 51 can be in the same layer as at least one conductive portion 36.

[0134] In a direction perpendicular to the plane of the substrate 7, the projection of the first cathode trace 12 is located on the side of the second cathode trace 50 that is away from the projection of the display area 1.

[0135] Compared to the first display area 3, the second display area 4 has a larger area and contains more light-emitting elements, thus having a greater impact on the display effect. Therefore, placing the second cathode trace 50 closer to the display area 1 can also reduce the voltage drop of the cathode signal received by the second cathode section 11.

[0136] Based on the same inventive concept, embodiments of the present invention also provide a display device, such as... Figure 28 As shown, Figure 28 This is a schematic diagram of a display device provided in an embodiment of the present invention, the display device including the aforementioned display panel 100. Of course, Figure 28 The display device shown is for illustrative purposes only. The display device can be any electronic device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader or television.

[0137] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0138] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that, include: The display area includes a display area and a non-display area, wherein the display area includes a first display area and a second display area surrounding the first display area, and at least a portion of the first display area has a higher transmittance than the second display area; Substrate; The light-emitting device layer includes a cathode layer, the cathode layer including at least a first cathode portion located in the first display area and a second cathode portion located in the second display area, with a gap between the first cathode portion and the second cathode portion; The first cathode trace is located in the non-display area, and the first cathode trace is electrically connected to the first cathode portion through a first connecting line; The second display area includes a first sub-area and a second sub-area located on opposite sides of the first display area, and the first connecting line passes through the first sub-area; Wherein, the distance between the first display area on one side of the first sub-area and the outer edge of the display panel is less than the distance between the first display area on one side of the second sub-area and the outer edge of the display panel.

2. The display panel according to claim 1, characterized in that, The display panel further includes an array layer, which is located between the substrate and the light-emitting device layer, and the array layer includes a first metal layer. The first connecting line is located in the first metal layer.

3. The display panel according to claim 2, characterized in that, The array layer further includes a circuit layer, which includes transistors; The first metal layer is located between the substrate and the circuit layer. The first metal layer also includes a shielding portion, which overlaps with the channel of the transistor in a direction perpendicular to the plane of the substrate.

4. The display panel according to claim 2, characterized in that, The first metal layer further includes a first signal line for receiving a first constant voltage signal; The extension direction of the first connecting line is the same as the arrangement direction of the first sub-region and the second sub-region; The first signal line includes a first trace located in the first sub-region, the first trace extending in the same direction as the first connecting line, and the first connecting line being included between at least a portion of adjacent first traces.

5. The display panel according to claim 4, characterized in that, The array layer further includes a circuit layer, which includes transistors; The first metal layer is located between the substrate and the circuit layer. The first metal layer also includes a shielding portion, which overlaps with the channel of the transistor in a direction perpendicular to the plane of the substrate. The first signal line is connected to the shielding part.

6. The display panel according to claim 4, characterized in that, The non-display area also includes a constant voltage line electrically connected to the first signal line, and the first trace is connected to the constant voltage line on the side of the first sub-area away from the first display area.

7. The display panel according to claim 4, characterized in that, The first signal line also includes a second trace located in the first display area and a third trace located at least in the second sub-area; The first metal layer further includes a second connecting line, which extends at least along the edge of the first display area near the second sub-area, and at least a portion of the second trace is connected to the third trace via the second connecting line.

8. The display panel according to claim 7, characterized in that, In a direction perpendicular to the plane of the substrate, the projection of the second connecting line surrounds the projection of the first cathode portion; The first display area includes a first sub-display area and a second sub-display area surrounding the first sub-display area, wherein the transmittance of the first sub-display area is greater than the transmittance of the second display area; The second trace is located in the second sub-display area, wherein the second trace includes multiple first sub-traces extending in the same direction; The first sub-routing includes a first type of first sub-routing and a second type of first sub-routing; The end of the first sub-trace of the first type is connected to the second connecting line; At least a portion of the second type of first sub-trace is located between the first sub-display area and the first sub-area, wherein at least one end of the second type of first sub-trace is connected to the first trace, and / or at least one second type of first sub-trace is electrically connected to the first trace or the first type of first sub-trace via a third connecting line, wherein the third connecting line is located in the first metal layer, and the extension direction of the third connecting line intersects the extension direction of the first sub-trace.

9. The display panel according to claim 7, characterized in that, In a direction perpendicular to the plane of the substrate, the projection of the second connecting line is located within the projection of the first cathode portion. The second connecting line extends along the edge of the first cathode portion and has a closed structure. All the second traces are connected to the second connecting line.

10. The display panel according to claim 4, characterized in that, The array layer further includes a circuit layer, the circuit layer including data lines extending along a first direction; The first display area includes a first sub-area and a second sub-area on the opposite side of the first direction, and / or the first display area includes a first sub-area and a second sub-area on the opposite side of the second direction, the second direction intersecting the first direction.

11. The display panel according to claim 1, characterized in that, The light-emitting device layer further includes an anode, a pixel definition layer, a light-emitting layer, and a light-emitting function layer; The first cathode portion is electrically connected to the first connecting line through at least one conductive portion. The conductive portion includes a first conductive portion disposed in the same layer as the anode. The light-emitting device layer includes a first opening that penetrates the pixel definition layer and the light-emitting function layer. The first opening exposes the first conductive portion. The first cathode portion overlaps with the first conductive portion at the first opening.

12. The display panel according to claim 1, characterized in that, The first cathode portion is electrically connected to the first connecting line via at least one conductive portion, the conductive portion including a first conductive portion closest to the first cathode portion, wherein at least two of the first connecting lines are connected to and connected to the same first conductive portion.

13. The display panel according to claim 1, characterized in that, The first cathode portion is electrically connected to the first connecting line via at least one conductive portion, the conductive portion including the first conductive portion closest to the first cathode portion, and a plurality of the first conductive portions are arranged along the edge of the first display area.

14. The display panel according to claim 1, characterized in that, The first cathode portion is electrically connected to the first connecting line through a plurality of stacked conductive parts, and adjacent conductive parts are electrically connected through a first via. Wherein, the two first vias corresponding to three adjacent conductive parts do not overlap in a direction perpendicular to the plane of the substrate, and among the three first vias corresponding to four adjacent conductive parts, two of the first vias overlap in a direction perpendicular to the plane of the substrate.

15. The display panel according to claim 1, characterized in that, The first cathode portion is electrically connected to the first connecting line through at least one conductive portion, the conductive portion including a second conductive portion, and the second conductive portion is electrically connected to the first connecting line through a through second via and a third via; The third via is located on the side of the second via away from the substrate, and the area of ​​the orthogonal projection of the third via on the substrate is larger than the area of ​​the orthogonal projection of the second via on the substrate.

16. The display panel according to claim 1, characterized in that, The display panel also includes a blocking structure located between the first cathode portion and the second cathode portion.

17. The display panel according to claim 1, characterized in that, The first cathode trace surrounds the display area.

18. The display panel according to claim 1, characterized in that, The linewidth of the first cathode trace is greater than or equal to 30 μm and less than or equal to 70 μm.

19. The display panel according to claim 1, characterized in that, The non-display area also includes a second cathode trace, and the second cathode portion is electrically connected to the second cathode trace; In a direction perpendicular to the plane of the substrate, the projection of the first cathode trace is located on the side of the second cathode trace that is away from the display area.

20. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 19.

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