Display device and method for manufacturing display device

Abstract

The display device includes a sub-alignment region including a path region defined by a first adjacent electrode and a second adjacent electrode spaced apart from each other in a first direction. The path region includes a first path region and a second path region spaced apart from each other along a second direction different from the first direction. A first adjacent electrode in the first path region and a first adjacent electrode in the second path region are spaced apart from each other, and an opening region is interposed between the first adjacent electrode in the first path region and the first adjacent electrode in the second path region. The second adjacent electrode in the first path region and the second adjacent electrode in the second path region are spaced apart from each other, and the opening region is interposed between the second adjacent electrode in the first path region and the second adjacent electrode in the second path region.

Description

Technical Field

[0001] The present disclosure relates to a display device and a manufacturing method thereof. Background Art

[0002] Recently, with the increasing interest in information display, research and development of display devices have been continuously carried out.

[0003] It should be understood that this background art section is intended to provide background that is useful in part for understanding the technology. However, this background art section may also include ideas, concepts, or understandings of parts that were not known or understood by those skilled in the relevant art before the effective filing date of the corresponding application for the subject matter disclosed herein. Summary of the Invention

[0004] Technical Problem

[0005] An object of the present disclosure is to provide a display device and a manufacturing method thereof with improved process efficiency.

[0006] The technical objects achieved by the present disclosure are not limited to the technical objects described herein, and those skilled in the art will clearly understand other technical objects not mentioned herein from the description of the present disclosure.

[0007] Technical Solution

[0008] Embodiments of the present disclosure provide a display device, which may include: an electrode disposed on a base layer and including: a main electrode and a branch electrode, wherein the branch electrode is electrically connected to the main electrode, the branch electrode includes adjacent electrodes, and the adjacent electrodes include a first adjacent electrode and a second adjacent electrode; and a light-emitting element disposed in an alignment region including a sub-alignment region on the base layer and between the first adjacent electrode and the second adjacent electrode. Each of the sub-alignment regions may include a path region defined by the first adjacent electrode and the second adjacent electrode spaced apart from each other in a first direction. The path region may include a first path region and a second path region spaced apart from each other in a second direction different from the first direction. The first adjacent electrodes of the first path region and the first adjacent electrodes of the second path region may be spaced apart from each other, and an opening region is between the first adjacent electrodes of the first path region and the first adjacent electrodes of the second path region. The second adjacent electrodes of the first path region and the second adjacent electrodes of the second path region may be spaced apart from each other, and an opening region is between the second adjacent electrodes of the first path region and the second adjacent electrodes of the second path region.

[0009] The alignment region may extend in the first direction. The alignment region may include a first alignment region and a second alignment region adjacent to each other in the second direction.

[0010] The body electrodes in the first alignment region and the body electrodes in the second alignment region can be separated from each other.

[0011] The sub-alignment region may include a first sub-alignment region and a second sub-alignment region. The branch electrode may further include a connection branch electrode that electrically connects adjacent electrodes in the first sub-alignment region and adjacent electrodes in the second sub-alignment region. The connection branch electrode may include a first connection branch electrode and a second connection branch electrode. The body electrode may include a first body electrode and a second body electrode.

[0012] The first body electrode, the first adjacent electrode, and the first connection branch electrode may be integral with each other.

[0013] The second body electrode, the second adjacent electrode, and the second connection branch electrode may be integral with each other.

[0014] The first connection branch electrode may electrically connect the first adjacent electrode in the first path region provided in the second sub-alignment region and the first body electrode. The second connection branch electrode may electrically connect the second adjacent electrode in the second path region provided in the first sub-alignment region and the second body electrode.

[0015] The display device may further include a bank that surrounds at least a part of the path region and overlaps with the connection branch electrode in a plan view. The opening region may not overlap with the bank in a plan view.

[0016] The sub-alignment region may include a first sub-alignment region and a second sub-alignment region adjacent to each other in a first direction. The light-emitting element may include a first light-emitting element provided in the first path region to form a first light-emitting portion and a second light-emitting element provided in the second path region to form a second light-emitting portion. The light-emitting elements in the first sub-alignment region and the light-emitting elements in the second sub-alignment region may form a sub-pixel. The display device may further include an anode connection electrode, a first intermediate connection electrode, a second intermediate connection electrode, a third intermediate connection electrode, and a cathode connection electrode. The anode connection electrode, the first light-emitting portion in the first sub-alignment region, the first intermediate connection electrode, the second light-emitting portion in the first sub-alignment region, the second intermediate connection electrode, the second light-emitting portion in the second sub-alignment region, the third intermediate connection electrode, the first light-emitting portion in the second sub-alignment region, and the cathode connection electrode may be electrically connected in sequence.

[0017] The first intermediate connection electrode may overlap with the opening region in the first sub-alignment region in a plan view, and the third intermediate connection electrode may overlap with the opening region in the second sub-alignment region in a plan view.

[0018] The opening region may not overlap with the light-emitting element in a plan view.

[0019] The display device may further include sub-pixels each including a light-emitting element. The sub-alignment regions may include a first sub-alignment region and a second sub-alignment region adjacent to each other in a first direction. The first sub-alignment region and the second sub-alignment region may correspond to one of the sub-pixels.

[0020] The display device may further include a first sub-pixel and a second sub-pixel, where the first sub-pixel emits light of a first color, the second sub-pixel emits light of a second color, and each of the first sub-pixel and the second sub-pixel includes a light-emitting element. The sub-alignment regions may include a first sub-alignment region and a second sub-alignment region adjacent to each other in a first direction. The first sub-alignment region may correspond to the first sub-pixel. The second sub-alignment region may correspond to the second sub-pixel.

[0021] The main electrode may extend from a first end portion of the light-emitting element toward a second end portion of the light-emitting element in a first direction. The adjacent electrode may extend in a second direction.

[0022] Embodiments of the present disclosure provide a display device, which may include: an alignment region including a first alignment region and a second alignment region extending along a first direction and spaced apart from each other along a second direction different from the first direction; electrodes, at least some of the electrodes being disposed in the alignment region, the electrodes including a main electrode and a branch electrode, at least a part of the electrodes being disposed in the alignment region electrically connected to the main electrode; and a light-emitting element disposed in the alignment region. The main electrode may extend in the first direction. The main electrode in the first alignment region and the main electrode in the second alignment region may be separated from each other. The branch electrode may include a connection branch electrode extending in the second direction.

[0023] Embodiments of the present disclosure provide a method of manufacturing a display device, which may include: patterning an electrode disposed on a base layer, the electrode including a main electrode and a branch electrode; and disposing a light-emitting element on adjacent electrodes among the branch electrodes in an alignment region. The alignment region may include sub-alignment regions. Each of the sub-alignment regions may include a first path region and a second path region. The adjacent electrodes may include a first adjacent electrode and a second adjacent electrode. The first adjacent electrode of the first path region and the first adjacent electrode of the second path region may be spaced apart from each other, and an opening region is between the first adjacent electrode of the first path region and the first adjacent electrode of the second path region. The second adjacent electrode of the first path region and the second adjacent electrode of the second path region may be spaced apart from each other, and an opening region is between the second adjacent electrode of the first path region and the second adjacent electrode of the second path region.

[0024] The main electrodes may include a first main electrode and a second main electrode. The first main electrode may be electrically connected to a first adjacent electrode. The second main electrode may be electrically connected to a second adjacent electrode. Arranging the light-emitting element may include: applying a first alignment signal to the first adjacent electrode through the first main electrode; and applying a second alignment signal to the second adjacent electrode through the second main electrode.

[0025] The sub-alignment regions may include a first sub-alignment region and a second sub-alignment region adjacent to each other in a first direction. The main electrodes may be arranged to penetrate through the first sub-alignment region and the second sub-alignment region in the first direction.

[0026] The manufacturing method may further include forming a bank protruding in the thickness direction of the base layer on the base layer. The branch electrode may further include a connecting branch electrode, and the connecting branch electrode electrically connects adjacent electrodes in the first sub-alignment region and adjacent electrodes in the second sub-alignment region. The opening region may not overlap with the bank in a plan view. The connecting branch electrode may overlap with the bank in a plan view.

[0027] Arranging the light-emitting element may include: aligning the light-emitting element based on an electric field formed between the first adjacent electrode and the second adjacent electrode. Aligning the light-emitting element may include: aligning the light-emitting element between the first adjacent electrode and the second adjacent electrode without aligning the light-emitting element in the opening region.

[0028] The first adjacent electrode and the second adjacent electrode may be spaced apart from each other along the first direction. The first path region and the second path region may be spaced apart from each other in a second direction different from the first direction. The first alignment signal may be applied to the first adjacent electrodes in the first path region and the first adjacent electrodes in the second path region. The second alignment signal may be applied to the second adjacent electrodes in the first path region and the second adjacent electrodes in the second path region.

[0029] The manufacturing method may further include forming a connecting electrode layer. The connecting electrode layer may include an anode connecting electrode electrically connected to the light-emitting element, an intermediate connecting electrode electrically connected to the light-emitting element and overlapping with the opening region in a plan view, and a cathode connecting electrode electrically connected to the light-emitting element.

[0030] Technical Effects

[0031] According to an embodiment of the present disclosure, a display device having improved process efficiency and a manufacturing method thereof may be provided. Brief Description of the Drawings

[0032] The above and other objects and features of the present disclosure will become apparent by referring to the embodiments of the present disclosure described in detail with reference to the accompanying drawings.

[0033] Figure 1 A schematic perspective view of a light-emitting element according to an embodiment is shown.

[0034] Figure 2 Shows a schematic cross-sectional view of a light-emitting element according to an embodiment.

[0035] Figure 3 Shows a schematic top plan view of a display device according to an embodiment.

[0036] Figure 4 Shows a pixel circuit included in a sub-pixel according to an embodiment.

[0037] Figure 5 Shows a schematic block diagram of a structure for providing an alignment signal according to an embodiment.

[0038] Figure 6 Shows a schematic top plan view of a display device according to an embodiment.

[0039] Figure 7 Shows a schematic top plan view of a display device according to an embodiment.

[0040] Figure 8 Shows a schematic top plan view of a structure including an opening region according to an embodiment.

[0041] Figure 9 Shows along Figure 7 A schematic cross-sectional view taken along line A-A'.

[0042] Figure 10 Shows a schematic top plan view of a display device according to an embodiment.

[0043] Figure 11 Shows a schematic top plan view of a display device according to an embodiment.

[0044] Figure 12 Shows along Figure 11 A schematic cross-sectional view taken along line B-B'.

[0045] Figure 13 Shows a schematic cross-sectional view of a pixel according to an embodiment.

[0046] Figure 14 And Figure 15 Shows a schematic top plan view of process steps of a manufacturing method of a display device according to an embodiment. Detailed Description of the Embodiments

[0047] Since the present disclosure can be modified in various ways and has various forms, embodiments will be described in detail below. However, this is by no means to limit the present disclosure to specific embodiments, and it should be understood to include all changes, equivalents, and their substitutes within the spirit and scope of the present disclosure.

[0048] In the drawings, for ease of description and for clarity, the dimensions, thicknesses, ratios, and sizes of elements may be exaggerated. The same reference numerals always denote the same elements.

[0049] Terms such as first, second, etc. will only be used to describe various component elements and should not be construed as limiting these component elements. These terms are only used to distinguish one component element from other component elements. For example, without departing from the scope of the present disclosure, a first component element may be referred to as a second component element, and similarly, a second component element may be referred to as a first component element.

[0050] Unless the context clearly indicates otherwise, as used herein, the singular forms "a", "an", and "the" are also intended to include the plural forms.

[0051] In the specification and claims, the term "and / or" for purposes of its meaning and interpretation is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean A, B, or A and B. The terms "and" and "or" can be used in a combined or separate sense and can be understood to be equivalent to "and / or".

[0052] In the present disclosure, it should be understood that the terms "comprise", "comprising", "include" and / or "including", "have", "having", "possess" and / or "with" and "configured" and their variants when used in this specification, specify the presence of the recited features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0053] It will be understood that when an element such as a layer, film, region, zone or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. In this specification, when a part of a layer, film, region, zone, plate, etc. is referred to as being formed "on" another part, the direction of formation is not limited to the upward direction but includes the lateral direction or the downward direction. Conversely, when an element of a layer, film, region, zone, plate, etc. is referred to as being "under" another element, it can be directly under the other element or intervening elements may be present.

[0054] In view of the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), as used herein, the term "about" or "approximately" includes the recited value and means within an acceptable deviation range of the particular value determined by a person of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the recited value.

[0055] For the purposes of the present disclosure, the phrase "at least one of A and B" may be construed to mean only A, only B, or any combination of A and B. Additionally, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be construed to mean only X, only Y, only Z, or any combination of two or more of X, Y, and Z. The term "overlap" or "overlap with" means that a first object may be above or below a second object or may be to one side of the second object, and vice versa. Additionally, the term "overlap" may include laminating, stacking, facing or being oriented, extending over, covering or partially covering, or any other suitable term as would be appreciated and understood by one of ordinary skill in the art. The expression "non-overlap" may include meanings such as "spaced apart from", "set beside", or "offset from", as well as any other suitable equivalents as would be appreciated and understood by one of ordinary skill in the art. The terms "face" and "be oriented" may mean that a first object may be directly or indirectly opposite a second object. In the case where a third object is interposed between a first object and a second object, although the first object and the second object still face each other, the first object and the second object may be understood to be indirectly opposite each other.

[0056] Unless otherwise defined or implied herein, all terms used in the specification (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms (such as those defined in a common dictionary) should be construed to have a meaning consistent with the context of the relevant art, and should not be construed in an idealized or overly formal sense unless expressly defined herein.

[0057] The present disclosure relates to a display device and a method of manufacturing the same. Hereinafter, a display device and a method of manufacturing the same according to an embodiment will be described with reference to the accompanying drawings.

[0058] First, reference will be made to Figures 1 to 2 describe a light-emitting element LD according to an embodiment. Figure 1 A schematic perspective view of a light-emitting element according to an embodiment is shown. Figure 2 A schematic cross-sectional view of a light-emitting element according to an embodiment is shown.

[0059] The light-emitting element LD emits light. The light-emitting element LD may include a first semiconductor layer SCL1, a second semiconductor layer SCL2, and an active layer AL disposed between the first semiconductor layer SCL1 and the second semiconductor layer SCL2. According to an embodiment, the first semiconductor layer SCL1, the active layer AL, and the second semiconductor layer SCL2 may be sequentially stacked on top of each other in the direction of the length L of the light-emitting element LD. According to an embodiment, the light-emitting element LD may further include an electrode layer ELL and an insulating film INF.

[0060] The light-emitting element LD can have various shapes. For example, the light-emitting element LD can have a cylindrical shape extending in one direction or a direction. The "cylindrical shape" can include a rod-like shape or a bar-like shape such as a cylinder or a polygonal cylinder that is long in the length L direction (e.g., having an aspect ratio greater than 1), but the shape of the cross-section of the light-emitting element LD is not particularly limited.

[0061] The light-emitting element LD can have a first end portion EP1 and a second end portion EP2. According to an embodiment, the first semiconductor layer SCL1 can be adjacent to the first end portion EP1 of the light-emitting element LD, and the second semiconductor layer SCL2 can be adjacent to the second end portion EP2 of the light-emitting element LD. According to an embodiment, the electrode layer ELL can be adjacent to the first end portion EP1.

[0062] The light-emitting element LD can be manufactured by sequentially etching stacked semiconductor layers. The light-emitting element LD can have dimensions in the nanometer to micrometer range. For example, the diameter D (or width) of the light-emitting element LD and the length L of the light-emitting element LD can each have a nanometer or micrometer scale. However, the present disclosure is not necessarily limited thereto.

[0063] The first semiconductor layer SCL1 can include a first-conductive semiconductor. The first semiconductor layer SCL1 is disposed on the active layer AL and can include a semiconductor layer of a type different from that of the second semiconductor layer SCL2. For example, the first semiconductor layer SCL1 can include a P-type semiconductor layer. For example, the first semiconductor layer SCL1 can include at least one semiconductor material among InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and can include a P-type semiconductor layer doped with a first-conductive dopant such as Ga, B, and Mg. However, the present disclosure is not limited to the embodiments described above. The first semiconductor layer SCL1 can include various materials.

[0064] The active layer AL can be disposed between the first semiconductor layer SCL1 and the second semiconductor layer SCL2. The active layer AL can include a single quantum well structure or a multi-quantum well structure. The position of the active layer AL is not limited to a specific example and can be variously changed according to the type of the light-emitting element LD.

[0065] A cladding layer doped with a conductive dopant can be formed at one side or one side and / or the other side or the other side of the active layer AL. For example, the cladding layer can include one or more of AlGaN and InAlGaN. However, the present disclosure is not necessarily limited to the examples described above.

[0066] The second semiconductor layer SCL2 may include a second conductive semiconductor. The second semiconductor layer SCL2 is disposed on the active layer AL and may include a semiconductor layer of a type different from that of the first semiconductor layer SCL1. For example, the second semiconductor layer SCL2 may include an N-type semiconductor layer. For example, the second semiconductor layer SCL2 may include one or more of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include an N-type semiconductor layer doped with a second conductive dopant such as Si, Ge, and Sn. However, the present disclosure is not limited to the examples described above. The second semiconductor layer SCL2 may include various materials.

[0067] When a voltage equal to or higher than a threshold voltage is applied to the first end portion EP1 and the second end portion EP2 of the light-emitting element LD, electron-hole pairs in the active layer AL may recombine with each other, and the light-emitting element LD may emit light. By controlling the light emission of the light-emitting element LD using this principle, the light-emitting element LD can be used as a light source in various devices.

[0068] The insulating film INF may be disposed on one surface or a surface of the light-emitting element LD. The insulating film INF may surround the outer surface of the active layer AL and may also surround a part of each of the first semiconductor layer SCL1 and the second semiconductor layer SCL2. The insulating film INF may have a single-layer structure or a multi-layer structure.

[0069] The insulating film INF may expose the first end portion EP1 and the second end portion EP2 of the light-emitting element LD having different polarities. For example, the insulating film INF may expose one end portion or an end portion of each of the electrode layer ELL and the second semiconductor layer SCL2 adjacent to the first end portion EP1 and the second end portion EP2 of the light-emitting element LD, respectively. The insulating film INF may ensure the electrical stability of the light-emitting element LD. The insulating film INF may improve the lifetime and efficiency by minimizing surface defects of the light-emitting element LD. When the light-emitting elements LD are disposed close to each other, the insulating film INF may prevent short-circuit defects between the light-emitting elements LD.

[0070] According to an embodiment, the insulating film INF may include one or more of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x ), and titanium oxide (TiO x ). However, the present disclosure is not necessarily limited to the examples described above.

[0071] The electrode layer ELL may be disposed on the first semiconductor layer SCL1. The electrode layer ELL may be adjacent to the first end portion EP1. The electrode layer ELL may be electrically connected to the first semiconductor layer SCL1. A portion of the electrode layer ELL may be exposed. For example, the insulating film INF may expose one surface or a surface of the electrode layer ELL. The electrode layer ELL may be exposed in a region corresponding to the first end portion EP1. According to an embodiment, a side surface of the electrode layer ELL may be exposed. For example, the insulating film INF may cover side surfaces of each of the first semiconductor layer SCL1, the active layer AL, and the second semiconductor layer SCL2, while not covering at least a portion of the side surface of the electrode layer ELL. Electrical connection of the electrode layer ELL to another component adjacent to the first end portion EP1 may be easily achieved. According to an embodiment, the insulating film INF may expose a portion of the side surface of the first semiconductor layer SCL1 and / or the second semiconductor layer SCL2 and the side surface of the electrode layer ELL.

[0072] According to an embodiment, the electrode layer ELL may be an ohmic contact electrode. However, the present disclosure is not necessarily limited to the examples described above. For example, the electrode layer ELL may be a Schottky contact electrode.

[0073] According to an embodiment, the electrode layer ELL may include one or more of chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), and their oxides and their alloys. However, the present disclosure is not necessarily limited to the examples described above. According to an embodiment, the electrode layer ELL may be substantially transparent. For example, the electrode layer ELL may include indium tin oxide (ITO). Thus, the electrode layer ELL may transmit the emitted light.

[0074] According to an embodiment, the structure and shape of the light-emitting element LD are not limited to the examples described above, and the light-emitting element LD may have various structures and shapes. For example, the light-emitting element LD may further include an additional electrode layer disposed on one surface or a surface of the second semiconductor layer SCL2 and adjacent to the second end portion EP2.

[0075] Figure 3 A schematic top plan view of a display device according to an embodiment is shown.

[0076] Reference Figure 3 , the display device DD may include a base layer BSL and pixels PXL disposed on the base layer BSL. Although not shown in the drawings, the display device DD may further include a driving circuit portion (e.g., a scan driver and a data driver), wirings, and pads for driving the pixels PXL.

[0077] The display device DD (or the base layer BSL) may include a display area DA and a non-display area NDA. The non-display area NDA may refer to an area outside the display area DA. The non-display area NDA may surround at least a part of the display area DA.

[0078] The base layer BSL may form the base surface of the display device DD. The base layer BSL may be a rigid or flexible substrate or film. For example, the base layer BSL may be a hard substrate made of glass or tempered glass, a flexible substrate (or film) made of plastic or metal material, or an insulating layer of at least one layer. The material and / or physical properties of the base layer BSL are not particularly limited. In an embodiment, the base layer BSL may be substantially transparent. Here, "substantially transparent" may mean that light can be transmitted at a transmittance or greater. In an embodiment, the base layer BSL may be translucent or opaque. The base layer BSL may include a reflective material according to an embodiment.

[0079] The display area DA may refer to an area where pixels PXL are provided. The non-display area NDA may refer to an area where pixels PXL are not provided. In the non-display area NDA, a driving circuit portion, wirings, and pads connected to the pixels PXL in the display area DA may be provided.

[0080] According to an embodiment, the pixels PXL (or sub-pixels SPX) may be arranged or provided according to a stripe or pentile (PENTILE TM ) arrangement structure, but the present disclosure is not limited thereto, and various examples may be applied to the present disclosure.

[0081] According to an embodiment, the pixels PXL (or sub-pixels SPX) may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may be a sub-pixel. At least one of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may form one pixel unit capable of emitting light of various colors.

[0082] For example, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may emit light of one color. For example, the first sub-pixel SPX1 may be a red pixel that emits red (e.g., the first color) light, and the second sub-pixel SPX2 may be a green pixel that emits green (e.g., the second color) light, and the third sub-pixel SPX3 may be a blue pixel that emits blue (e.g., the third color) light. According to an embodiment, the number of the second sub-pixels SPX2 may be greater than the number of the first sub-pixels SPX1 and the number of the third sub-pixels SPX3. However, the color, type, and / or number of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 forming each pixel unit described above are not limited to the specific examples.

[0083] Figure 4 A pixel circuit included in a sub-pixel according to an embodiment is shown. Refer to Figure 4 , the sub-pixel SPX may include a pixel circuit PXC. The pixel circuit PXC may drive a light-emitting unit EMU (or a light-emitting element LD). Each of the sub-pixels SPX forming one pixel unit may include a pixel circuit PXC.

[0084] The pixel circuit PXC may be electrically connected to a scan line SL, a data line DL, a first power line PL1, and a second power line PL2. The pixel circuit PXC may also be electrically connected to a scan control line SSL and a sense line SENL.

[0085] The sub-pixel SPX may include a light-emitting unit EMU (or a light-emitting element LD) that emits light corresponding to a data signal provided from the data line DL.

[0086] The pixel circuit PXC may be disposed between the first power line PL1 and the light-emitting unit EMU. The pixel circuit PXC may be electrically connected to the scan line SL to which a first scan signal is provided and the data line DL to which a data signal is provided. The pixel circuit PXC may be electrically connected to the scan control line SSL to which a second scan signal is provided, and may be electrically connected to the sense line SENL connected to a reference power (or an initialization power) or a sense circuit. According to an embodiment, the second scan signal may be the same as or different from the first scan signal. In the case where the second scan signal is the same as the first scan signal, the scan control line SSL may be integrated with the scan line SL.

[0087] The pixel circuit PXC may include one or more circuit elements. For example, the pixel circuit PXC may include a first transistor M1, a second transistor M2, a third transistor M3, and a storage capacitor CST.

[0088] The first transistor M1 can be electrically connected between a first power line PL1 and a second node N2. The second node N2 can be the node to which the pixel circuit PXC and the light-emitting unit EMU are connected. For example, the second node N2 can be the first transistor electrode TE1 of the first transistor M1 (see Figure 8 ), and the node to which the anode connection electrode AE of the light-emitting unit EMU is connected. The gate electrode GE of the first transistor M1 (see Figure 8 ) can be electrically connected to the first node N1. The first transistor M1 can control the drive current supplied to the light-emitting unit EMU in response to the voltage of the first node N1. The first transistor M1 can be a drive transistor.

[0089] According to an embodiment, a sinking conductive layer SYNC can be provided under or below the first transistor M1. In the case of driving a sub-pixel SPX, a reverse bias technique (or synchronization technique) can be applied, in which a reverse bias voltage is applied to the sinking conductive layer SYNC to shift the threshold voltage of the first transistor M1 in the negative or positive direction.

[0090] The second transistor M2 can be electrically connected between the data line DL and the first node N1. The gate electrode of the second transistor M2 can be electrically connected to the scan line SL. In the case of a first scan signal that provides a gate-on voltage (e.g., a high-level voltage) from the scan line SL, the second transistor M2 can be turned on to electrically connect the data line DL and the first node N1.

[0091] For each frame period, a data signal corresponding to the frame is provided to the data line DL, and during the period of the first scan signal that provides the gate-on voltage, the data signal is transmitted to the first node N1 through the second transistor M2. The second transistor M2 can be a switching transistor for transmitting each data signal to the inside of the sub-pixel SPX.

[0092] One electrode (e.g., the upper electrode UE (see Figure 8 )) of the storage capacitor CST is electrically connected to the first node N1, and its other electrode (e.g., the lower electrode LE (see Figure 8 )) can be electrically connected to the second node N2. The storage capacitor CST is charged with a voltage corresponding to the data signal provided to the first node N1 during each frame period.

[0093] The third transistor M3 may be electrically connected between the second node N2 and the sense line SENL. The gate electrode of the third transistor M3 may be connected to the scan control line SSL (or the scan line SL). The third transistor M3 may be turned on in the case of a second scan signal (or a first scan signal) that provides a gate-on voltage (e.g., a high-level voltage) from the scan control line SSL, so as to transfer a reference voltage (or an initialization voltage) provided to the sense line SENL to the second node N2 or transfer the voltage of the second node N2 to the sense line SENL. The voltage of the second node N2 transferred to the sense circuit through the sense line SENL may be provided to an external circuit for compensating for characteristic deviations of the sub-pixel SPX.

[0094] In Figure 4 , all the transistors included in the pixel circuit PXC are shown as N-type transistors, but the present disclosure is not limited thereto. For example, at least one of the first transistor M1, the second transistor M2, and the third transistor M3 may be changed to a P-type transistor. The structure and driving method of the sub-pixel SPX may be variously changed according to embodiments.

[0095] The light-emitting unit EMU may include an anode connection electrode AE, a cathode connection electrode CE, and at least one light-emitting element LD electrically connected between a first power line PL1 and a second power line PL2. The light-emitting unit EMU may be formed of one or more light-emitting elements LD. According to an embodiment, the light-emitting unit EMU may include light-emitting elements LD connected in parallel between the anode connection electrode AE and the cathode connection electrode CE.

[0096] The power of the first power line PL1 and the power of the second power line PL2 may have different potentials. For example, the first power line PL1 may be electrically connected to a high-potential pixel power VDD to receive high-potential power, and the second power line PL2 may be electrically connected to a low-potential pixel power VSS to receive low-potential power. The potential difference between the power of the first power line PL1 and the power of the second power line PL2 (e.g., the potential difference between the high-potential power VDD and the low-potential power VSS) may be set to be equal to or greater than the threshold voltage of the light-emitting element LD.

[0097] The first power line PL1 may be electrically connected to the first transistor M1 and the anode connection electrode AE. The second power line PL2 may be electrically connected to the cathode connection electrode CE.

[0098] Each light-emitting element LD may be connected between the first power line PL1 and the second power line PL2 in the forward direction to form each effective light source. These effective light sources may be collected to form the light-emitting unit EMU of the sub-pixel SPX.

[0099] The light-emitting element LD can emit light having a luminance corresponding to a driving current provided through the pixel circuit PXC. During each frame period, the pixel circuit PXC can provide a driving current corresponding to a data signal to the light-emitting unit EMU. The driving current provided to the light-emitting unit EMU can be distributed to flow in the light-emitting element LD. Accordingly, while each light-emitting element LD emits light having a luminance corresponding to the current flowing in the light-emitting element LD, the light-emitting unit EMU can emit light having a luminance corresponding to the driving current.

[0100] In Figure 4 it has been disclosed that an embodiment in which the sub-pixel SPX may include a light-emitting unit EMU having a parallel structure, and the present disclosure is not limited thereto. For example, the sub-pixel SPX may include a light-emitting unit EMU having a serial structure or a serial / parallel structure. The pixel circuit PXC for the sub-pixel SPX according to an embodiment is not limited to the above-described example. According to an embodiment, the pixel circuit PXC may further include seven transistors and one storage capacitor.

[0101] Hereinafter, with reference to Figures 5 to 13 the structure of the display device according to an embodiment will be described. Descriptions that may be redundant for the above description are simplified or not repeated.

[0102] First, with reference to Figure 5 and Figure 6 the structure for providing the alignment signal AS according to an embodiment will be described. Figure 5 FIG. shows a schematic block diagram of the structure for providing the alignment signal according to an embodiment. Figure 6 FIG. shows a schematic top plan view of the display device according to an embodiment. Figure 5 and Figure 6 FIG. shows an embodiment in which the alignment signal AS is provided to the electrode 100 in a case where a process of aligning the light-emitting element LD is performed.

[0103] Referring to Figure 5 and Figure 6 where an alignment region PA in which the light-emitting element LD is provided may be formed in the display region DA. The alignment region PA is defined as a region in which the light-emitting element LD is provided (or aligned). According to an embodiment, the alignment region PA may include a first alignment region PA1 provided in the first row, a second alignment region PA2 provided in the second row, and a third alignment region PA3 provided in the third row. The number of alignment regions PA is not particularly limited.

[0104] The shape of the alignment region PA is not particularly limited, and may substantially have a shape extending in one direction or a direction. The alignment region PA may include a region surrounded by a first bank BNK1.

[0105] The alignment region PA may extend in a first direction DR1 within the display region DA. For example, the first alignment region PA1, the second alignment region PA2, and the third alignment region PA3 may extend in the first direction DR1. That the alignment region PA extends in the first direction DR1 may mean that the length of each alignment region PA along the first direction DR1 is greater than the length of each alignment region PA along the second direction DR2.

[0106] The alignment regions PA may be sequentially arranged within the display region DA along a second direction DR2. The first alignment region PA1, the second alignment region PA2, and the third alignment region PA3 may be sequentially arranged along the second direction DR2.

[0107] The alignment device 10 may output an alignment signal AS and may be electrically connected to components within the alignment region PA. The alignment region PA may be such that the alignment signal AS is provided from a separate wiring.

[0108] For example, the alignment device 10 may supply the alignment signal AS to the electrode 100 in the first alignment region PA1 through the first wiring R1. The alignment device 10 may supply the alignment signal AS to the electrode 100 in the second alignment region PA2 through the second wiring R2. The alignment device 10 may supply the alignment signal AS to the electrode 100 in the third alignment region PA3 through the third wiring R3. According to an embodiment, the alignment device 10 may include a probe module capable of supplying an electrical signal to wirings (e.g., the first wiring R1, the second wiring R2, and the third wiring R3). However, the present disclosure is not limited thereto.

[0109] The alignment signal AS may be an electrical signal for aligning the light-emitting element LD. The alignment signal AS may include a first alignment signal AS1 and a second alignment signal AS2. The first alignment signal AS1 and the second alignment signal AS2 may have different waveforms, potentials, and / or phases. For example, the first alignment signal AS1 may be an AC signal, and the second alignment signal AS2 may be a ground signal. However, the present disclosure is not limited to the examples described above.

[0110] According to an embodiment, the first wiring R1, the second wiring R2, and the third wiring R3 may form separate circuit paths. According to an embodiment, the first wiring R1, the second wiring R2, and the third wiring R3 may be electrically separated from each other in a region outside the alignment device 10.

[0111] The electrode 100 may be arranged in the display region DA to form a structure for aligning the light-emitting element LD. The electrode 100 may include a main electrode 120 and a branch electrode 140.

[0112] The electrode 100 may receive an alignment signal AS. For example, the main electrode 120 may be electrically connected to wirings (e.g., a first wiring R1, a second wiring R2, and a third wiring R3) that provide the alignment signal AS.

[0113] The main electrode 120 may extend in a first direction DR1 within the display area DA. For example, the main electrode 120 may extend in the same direction as the direction in which the alignment area PA extends. The main electrode 120 may extend in a direction different from the direction in which the alignment areas PA are spaced apart from each other. The main electrode 120 may extend in the direction in which the light-emitting element LD extends. For example, the main electrode 120 may extend in a direction from a first end portion EP1 of the light-emitting element LD toward a second end portion EP2.

[0114] The main electrodes 120 may be adjacent to each other in a second direction DR2, but may be electrically separated from each other. Each of the main electrodes 120 may extend in the first direction DR1, and thus, the provided alignment signal AS may be provided to the inside of the alignment area PA.

[0115] The adjacent electrode 142 and the branch electrode 140 of the main electrode 120 may extend in different directions. For example, the adjacent electrode 142 may extend in the second direction DR2, and as described above, the main electrode 120 may extend in the first direction DR1.

[0116] The main electrodes 120 provided in different alignment areas PA may be separated from each other. For example, the main electrode 120 in the first alignment area PA1 and the main electrode 120 in the second alignment area PA2 may be electrically separated from each other within the display area DA.

[0117] The main electrode 120 may include a main electrode structure that receives different electrical signals. For example, the main electrode 120 may include a first main electrode 122 and a second main electrode 124.

[0118] The first main electrode 122 may be electrically connected to the alignment device 10 and may receive a first alignment signal AS1. The second main electrode 124 may be electrically connected to the alignment device 10 and may receive a second alignment signal AS2.

[0119] Each of the first main electrode 122 and the second main electrode 124 may form one or more pairs.

[0120] For example, one or more pairs of the first main electrode 122 and the second main electrode 124 may correspond to the first alignment area PA1. For example, the first main electrode 122 may be disposed on one side or at one side of the first alignment area PA1, and the second main electrode 124 may be disposed on the other side of the first alignment area PA1.

[0121] For example, one or more pairs of first main electrodes 122 and second main electrodes 124 may correspond to the second alignment region PA2. For example, the first main electrode 122 may be disposed on one side or at one side of the second alignment region PA2, and the second main electrode 124 may be disposed on the other side of the second alignment region PA2.

[0122] The branch electrode 140 may be disposed between the main electrodes 120. For example, the branch electrode 140 may be disposed between the corresponding first main electrode 122 and the corresponding second main electrode 124. For example, the adjacent electrodes 142 of the branch electrode 140 may be disposed between the corresponding first main electrode 122 and the corresponding second main electrode 124.

[0123] The branch electrode 140 may include adjacent electrodes 142 adjacent to the light-emitting element LD, and may include connection branch electrodes 144 that can electrically connect the adjacent electrodes 142 and the main electrodes 120. This will be described in detail later.

[0124] The light-emitting element LD may be disposed between the corresponding first main electrode 122 and the corresponding second main electrode 124. The light-emitting element LD may be disposed between the adjacent electrodes 142 in the alignment region PA. For example, the light-emitting element LD may be disposed on a pair of adjacent electrodes 142 extending in the second direction DR2.

[0125] Hereinafter, reference will be made to Figures 7 to 9 the planar structure and the cross-sectional structure of the display device according to the embodiment. Descriptions that may be redundant for the above description are simplified or not repeated.

[0126] Figure 7 A schematic top plan view of a display device according to an embodiment is shown. Figure 8 A schematic top plan view of a structure including an opening region according to an embodiment is shown. Figure 9 A schematic cross-sectional view taken along line A-A' of Figure 7 is shown.

[0127] Reference Figure 7 and Figure 8 , the alignment region PA may be formed in the display region DA. The display region DA may include the alignment region PA. According to an embodiment, the alignment region PA may include sub-alignment regions SPA, and in the embodiment, a structure in which two or more sub-alignment regions SPA form one sub-pixel SPX is shown.

[0128] For example, in an embodiment, the first sub-alignment region SPA1 and the second sub-alignment region SPA2 may correspond to the same one sub-pixel SPX. For example, the first sub-alignment region SPA1 and the second sub-alignment region SPA2 may overlap with the sub-pixel region SPXA of one sub-pixel SPX.

[0129] The sub-pixel SPX may include two or more sub-alignment regions SPA. The sub-alignment region SPA may include the first sub-alignment region SPA1 and the second sub-alignment region SPA2. Figure 7 An embodiment in which two sub-alignment regions SPA form a sub-pixel SPX is shown, but the present disclosure is not limited thereto, and the number of sub-alignment regions SPA may be variously changed.

[0130] The light-emitting element LD may be disposed in each of the sub-alignment regions SPA, and a light-emitting region may be formed in each of the sub-alignment regions SPA. The sub-alignment region SPA may overlap with the opening OPN defined by the first bank BNK1.

[0131] According to an embodiment, the first bank BNK1 may be disposed in the periphery of the sub-alignment region SPA. The first bank BNK1 may surround at least a part of the sub-alignment region SPA. The first bank BNK1 may surround at least a part of the path region AA.

[0132] According to an embodiment, the first bank BNK1 may protrude in the thickness direction (e.g., the third direction DR3) of the base layer BSL (see Figure 9 ), and may surround the light-emitting region in which the light-emitting element LD is disposed. According to an embodiment, the ink including the light-emitting element LD is provided to the opening OPN defined by the first bank BNK1 such that the light-emitting element LD may be disposed in the opening OPN.

[0133] According to an embodiment, the first bank BNK1 may include an organic material such as an acrylate resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or a benzocyclobutene (BCB). However, the present disclosure is not limited to the examples described above.

[0134] At least some of the electrodes 100 may extend in the first direction DR1, and at least some others of the electrodes 100 may extend in the second direction DR2, and thus, the electrodes 100 may form a mesh structure. For example, referring to Figure 5 and Figure 6 , the main body electrodes 120 may each extend in the first direction DR1, and thus the electrodes 100 may substantially extend in the first direction DR1, and two or more mesh structures spaced apart from each other in the second direction DR2 may be formed.

[0135] The first main electrode 122 may be disposed at one side (e.g., the lower part) of the sub-alignment region SPA. The first main electrode 122 may be entirely disposed within the sub-alignment region SPA. For example, the first main electrode 122 may overlap with the first sub-alignment region SPA1 along the second direction DR2 and may also overlap with the second sub-alignment region SPA2.

[0136] The second main electrode 124 may be disposed at the other side (e.g., the upper part) of the sub-alignment region SPA. The second main electrode 124 may be entirely disposed within the sub-alignment region SPA. For example, the second main electrode 124 may overlap with the first sub-alignment region SPA1 along the second direction DR2 and may also overlap with the second sub-alignment region SPA2.

[0137] The branch electrode 140 may be electrically connected to the main electrode 120. The branch electrode 140 may include adjacent electrodes 142 and a connecting branch electrode 144. The connecting branch electrode 144 may include a first connecting branch electrode 144a and a second connecting branch electrode 144b.

[0138] The adjacent electrodes 142 may be disposed in each of the sub-alignment regions SPA. The adjacent electrodes 142 may be electrically connected to the main electrode 120. For example, some of the adjacent electrodes 142 may be directly electrically connected to the main electrode 120. Some of the adjacent electrodes 142 may be electrically connected to the main electrode 120 through the connecting branch electrode 144.

[0139] According to an embodiment, a first adjacent electrode 142a on one side (e.g., the lower side, the second path region AA2) of the alignment region PA may be electrically connected to the first main electrode 122. For example, a first adjacent electrode 142a on one side of the second sub-alignment region SPA2 may be connected to the first main electrode 122. A first adjacent electrode 142a on one side of the first sub-alignment region SPA1 may be electrically connected to the first main electrode 122.

[0140] According to an embodiment, a first adjacent electrode 142a on the other side (e.g., the upper side, the first path region AA1) of the alignment region PA may be electrically connected to the first main electrode 122 through the first connecting branch electrode 144a. For example, at least a part of the first adjacent electrode 142a on the other side of the second sub-alignment region SPA2 may be electrically connected to the first main electrode 122 through the first connecting branch electrode 144a extending in the second direction DR2. A first adjacent electrode 142a on the other side of the first sub-alignment region SPA1 may be electrically connected to the first main electrode 122 through the first connecting branch electrode 144a.

[0141] According to an embodiment, a second adjacent electrode 142b on one side (e.g., the lower side, the second path region AA2) of the alignment region PA can be electrically connected to the second body electrode 124 through the second connection branch electrode 144b. For example, at least a part of the second adjacent electrode 142b on one side of the second sub-alignment region SPA2 can be electrically connected to the second body electrode 124 through the second connection branch electrode 144b extending in the second direction DR2. The second adjacent electrode 142b on one side of the first sub-alignment region SPA1 can be electrically connected to the second body electrode 124 through the second connection branch electrode 144b.

[0142] According to an embodiment, the second adjacent electrode 142b on the other side (e.g., the upper side, the first path region AA1) of the alignment region PA can be electrically connected to the second body electrode 124. For example, the second adjacent electrode 142b on the other side of the second sub-alignment region SPA2 can be connected to the second body electrode 124. The second adjacent electrode 142b on the other side of the first sub-alignment region SPA1 can be electrically connected to the second body electrode 124.

[0143] The adjacent electrodes 142 can form an electric field for aligning the light-emitting element LD. The adjacent electrodes 142 can form pairs, and the formed pairs can be spaced apart in the first direction DR1. The adjacent electrodes 142 can extend in the second direction DR2.

[0144] For example, the adjacent electrodes 142 can include a first adjacent electrode 142a and a second adjacent electrode 142b. The first adjacent electrode 142a can be an alignment electrode to which the first alignment signal AS1 can be provided. The second adjacent electrode 142b can be an alignment electrode to which the second alignment signal AS2 can be provided. The first adjacent electrode 142a and the second adjacent electrode 142b can form a pair, and the light-emitting element LD can be aligned between the first adjacent electrode 142a and the second adjacent electrode 142b.

[0145] According to an embodiment, ink including the light-emitting element LD can be provided (or disposed) into the opening OPN, the first alignment signal AS1 can be provided to the first adjacent electrode 142a, and the second alignment signal AS2 can be provided to the second adjacent electrode 142b. An electric field is formed between the first adjacent electrode 142a and the second adjacent electrode 142b (or on the first adjacent electrode 142a and the second adjacent electrode 142b), so that the light-emitting element LD can be aligned between the first adjacent electrode 142a and the second adjacent electrode 142b based on the electric field. For example, the light-emitting element LD can move (or rotate) according to the force of the electric field (e.g., dielectrophoresis (DEP) force) to be aligned (or disposed) on the first adjacent electrode 142a and the second adjacent electrode 142b.

[0146] The connecting branch electrode 144 may be disposed between adjacent sub-alignment regions SPA in a first direction DR1. The connecting branch electrode 144 may be disposed between the first main electrode 122 and the second main electrode 124. The connecting branch electrode 144 may overlap with the first bank BNK1 in a plan view.

[0147] The connecting branch electrode 144 may electrically connect adjacent electrodes 142 adjacent to each other in the first direction DR1. Accordingly, two or more path regions AA in which the light-emitting element LD can be aligned may be formed in each of the sub-alignment regions SPA.

[0148] The path region AA may be a region in which adjacent electrodes 142 may be spaced apart from each other such that the light-emitting element LD can be aligned based on an electric field. The path region AA may be defined by a number corresponding to the number of pairs of adjacent electrodes 142 spaced apart from each other.

[0149] The path region AA may be disposed within the alignment region PA. The path region AA may be defined in each of the sub-alignment regions PA. The path region AA may be defined at various positions within the alignment region PA.

[0150] The path region AA may include a first path region AA1 and a second path region AA2. The first path region AA1 and the second path region AA2 may be spaced apart from each other along a second direction DR2. For example, the first path region AA1 and the second path region AA2 may be spaced apart from each other in a direction different from the direction in which the main electrode 120 extends.

[0151] According to an embodiment, the adjacent electrodes 142 of the first path region AA1 and the adjacent electrodes 142 of the second path region AA2 may be spaced apart from each other, and the opening region 1 may be interposed between the adjacent electrodes 142 of the first path region AA1 and the adjacent electrodes 142 of the second path region AA2. The opening region 1 may not overlap with the first bank BNK1 in a plan view.

[0152] For example, the first adjacent electrode 142a of the first path region AA1 and the first adjacent electrode 142a of the second path region AA2 may be physically spaced apart from each other. The second adjacent electrode 142b of the first path region AA1 and the second adjacent electrode 142b of the second path region AA2 may be physically spaced apart from each other.

[0153] According to an embodiment, in a state where the opening region 1 is formed, the light-emitting element LD may be included in the ink to be provided to the opening OPN. Since a structure in which adjacent electrodes 142 are not formed in pairs in the opening region 1, the risk of disposing the light-emitting element LD in the opening region 1 can be reduced.

[0154] According to an embodiment, the opening region 1 may overlap with the intermediate electrode ME (e.g., the bridging electrode BE) in a plan view.

[0155] According to an embodiment, in the sub-alignment region SPA, two or more path regions AA may be formed, and two or more light-emitting units EMU may be electrically connected in series. For example, the light-emitting element LD in the first path region AA1 may form the first light-emitting unit EMU1, the light-emitting element LD in the second path region AA2 may form the second light-emitting unit EMU2, and the first light-emitting unit EMU1 and the second light-emitting unit EMU2 may be electrically connected to each other.

[0156] The light-emitting element LD provided in the first path region AA1 to form the first light-emitting unit EMU1 may be referred to as the first light-emitting element. The light-emitting element LD provided in the second path region AA2 to form the second light-emitting unit EMU2 may be referred to as the second light-emitting element.

[0157] According to an embodiment, the light-emitting units EMU of two or more adjacent sub-alignment regions SPA may be electrically connected to each other. For example, the light-emitting units EMU of each sub-alignment region SPA may be electrically connected by a connection electrode CNE including an intermediate connection electrode ME, an anode connection electrode AE, and a cathode connection electrode CE.

[0158] Between the anode connection electrode AE and the cathode connection electrode CE, the light-emitting unit EMU may be electrically connected by the intermediate connection electrode ME serving as the bridging electrode BE.

[0159] For example, the anode connection electrode AE, the first light-emitting unit EMU1 of the first sub-alignment region SPA1, the first intermediate connection electrode ME1, the second light-emitting unit EMU2 of the first sub-alignment region SPA1, the second intermediate connection electrode ME2, the first light-emitting unit EMU1 of the second sub-alignment region SPA2, the third intermediate connection electrode ME3, and the second light-emitting unit EMU2 of the second sub-alignment region SPA2 and the cathode connection electrode CE may be sequentially electrically connected.

[0160] According to an embodiment, the first intermediate connection electrode ME1 may overlap with the opening region 1 in the first sub-alignment region SPA1 in a plan view. The third intermediate connection electrode ME3 may overlap with the opening region 1 in the second sub-alignment region SPA2 in a plan view. At least a part of the second intermediate connection electrode ME2 may be bent, a part of the second intermediate connection electrode ME2 may be provided in the first sub-alignment region SPA1, and another part of the second intermediate connection electrode ME2 may be provided in the second sub-alignment region SPA2.

[0161] According to an embodiment, the anode connection electrode AE and the cathode connection electrode CE may be electrically connected through wirings of the pixel circuit layer PCL and contact portions CNT1 and CNT2 without passing through the electrode 100. For example, the anode connection electrode AE may be electrically connected to a driving transistor (e.g., the first transistor M1) formed in the pixel circuit layer PCL through the first contact portion CNT1. The anode connection electrode AE may be electrically connected to a first power line PL1 formed in the pixel circuit layer PCL. The cathode connection electrode CE may be electrically connected to a second power line PL2 formed in the pixel circuit layer PCL through the second contact portion CNT2.

[0162] According to an embodiment, a structure in which light-emitting units EMU are electrically connected in series with each other may be provided, and in the light-emitting units EMU, light-emitting elements LD are formed in a parallel structure. According to the structure of the embodiment, the light-emitting structure may be precisely controlled, and even when one of the light-emitting elements LD is abnormally arranged or provided, light emission may be normally performed.

[0163] As described above, the provision of the light-emitting element LD in the opening region 1 corresponding to the bridging electrode BE may be minimized. For example, the opening region 1 may not overlap with the light-emitting element LD in a plan view. Since it may be difficult for the light-emitting element LD provided in the opening region 1 to emit light normally, it is necessary to minimize the number of light-emitting elements LD provided in the opening region 1.

[0164] According to an embodiment, the opening region 1 may be defined to minimize the light-emitting element LD provided in an unnecessary partial region, and the light-emitting element LD may be selectively aligned in a necessary partial region. Therefore, the process cost may be significantly reduced and the process efficiency may be improved.

[0165] Reference will be made to Figure 8 describe the cross-sectional structure of the display device DD according to an embodiment.

[0166] Reference Figure 8 , the display device DD may include a pixel circuit layer PCL and a light-emitting element layer EML.

[0167] The pixel circuit layer PCL may include a base layer BSL. As described above, the base layer BSL may form a substrate of the display device DD.

[0168] The pixel circuit layer PCL may include wirings and insulating layers forming the pixel circuit PXC. For example, the pixel circuit layer PCL may include a lower auxiliary electrode layer BML, a buffer layer BFL, an active layer ACT, a gate insulating layer GI, a first interlayer conductive layer ICL1, a first interlayer insulating layer ILD1, a second interlayer conductive layer ICL2, a second interlayer insulating layer ILD2, and a passivation layer PSV.

[0169] The lower auxiliary electrode layer BML may include a sunken conductive layer SYNC and a first conductive layer 2200.

[0170] The sunken conductive layer SYNC may overlap with the active layer ACT and the gate electrode GE in a plan view. The sunken conductive layer SYNC may be electrically connected to the first transistor electrode TE1. For example, the source signal of the first transistor M1 may be applied to the sunken conductive layer SYNC.

[0171] The first conductive layer 2200 may form part of the second power line PL2. The first conductive layer 2200 may be electrically connected to the third conductive layer 2600 through a contact member.

[0172] The lower auxiliary electrode layer BML may include one or more of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). However, the present disclosure is not necessarily limited to the examples described above.

[0173] The buffer layer BFL may be disposed on the lower auxiliary electrode layer BML and the base layer BSL. The buffer layer BFL may cover the lower auxiliary electrode layer BML.

[0174] The buffer layer BFL may prevent impurity diffusion or moisture penetration into the active layer ACT. According to an embodiment, the buffer layer BFL may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and aluminum oxide (AlO x ) or one or more of them. However, the present disclosure is not necessarily limited to the examples described above.

[0175] The active layer ACT may be disposed on the buffer layer BFL. The active layer ACT may form part of the active portion of the first transistor M1. The active layer ACT may include a semiconductor. For example, the active layer ACT may include one or more of polysilicon, low-temperature polysilicon (LTPS), amorphous silicon, and oxide semiconductor. The active layer ACT may form the channel of the first transistor M1. At least a part of the active layer ACT may be doped with impurities.

[0176] The gate insulating layer GI may be disposed on the buffer layer BFL and the active layer ACT. The gate insulating layer GI may be disposed between the gate electrode GE of the first transistor M1 and the active layer ACT.

[0177] The gate insulating layer GI may include silicon nitride (SiN x ), silicon oxide (SiO x) One or more of silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ). However, the present disclosure is not limited thereto.

[0178] The first interlayer conductive layer ICL1 can be disposed on the gate insulating layer GI or the buffer layer BFL. The first interlayer conductive layer ICL1 can form the gate electrode GE of the first transistor M1, the lower electrode LE of the storage capacitor CST, and the second conductive layer 2400.

[0179] The first interlayer conductive layer ICL1 can include one or more of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). However, the present disclosure is not necessarily limited to the examples described above.

[0180] The gate electrode GE can be disposed corresponding to the position of the channel region of the active layer ACT of the first transistor M1.

[0181] The lower electrode LE of the storage capacitor CST can be disposed to face the upper electrode UE of the storage capacitor CST.

[0182] The second conductive layer 2400 can form a part of the second power line PL2. The second conductive layer 2400 can be electrically connected to the third conductive layer 2600 through a contact member.

[0183] The first interlayer insulating layer ILD1 can be disposed on the first interlayer conductive layer ICL1. The first interlayer insulating layer ILD1 can cover the first interlayer conductive layer ICL1.

[0184] The first interlayer insulating layer ILD1 can include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ). However, the present disclosure is not limited thereto.

[0185] The second interlayer conductive layer ICL2 can be disposed on the second interlayer insulating layer ILD1. The second interlayer conductive layer ICL2 can form the first transistor electrode TE1 and the second transistor electrode TE2 of the first transistor M1, the upper electrode UE of the storage capacitor CST, and the third conductive layer 2600.

[0186] The second interlayer conductive layer ICL2 may include one or more of gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and platinum (Pt). However, the present disclosure is not necessarily limited to the examples described above.

[0187] The first transistor electrode TE1 and the second transistor electrode TE2 may form a source electrode or a drain electrode of the first transistor M1. For example, the first transistor electrode TE1 as a source electrode may be electrically connected to the sinking conductive layer SYNC, and may be electrically connected to the anode connection electrode AE through the first contact portion CNT1, and the second transistor electrode TE2 may be a drain electrode.

[0188] The upper electrode UE may form one electrode of the storage capacitor CST to form a surface opposite to the lower electrode LE.

[0189] The third conductive layer 2600 may form a part of the second power line PL2. The third conductive layer 2600 may be electrically connected to the cathode connection electrode CE through the second contact portion CNT2.

[0190] The second interlayer insulating layer ILD2 may be disposed on the second interlayer conductive layer ICL2. The second interlayer insulating layer ILD2 may cover the second interlayer conductive layer ICL2.

[0191] The second interlayer insulating layer ILD2 may include one or more of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and aluminum oxide (AlO x ). However, the present disclosure is not limited thereto.

[0192] The passivation layer PSV may be disposed on the second interlayer insulating layer ILD2. According to an embodiment, the passivation layer PSV may be a via layer. The passivation layer PSV may include an organic material. For example, the organic material may include one or more of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, polyester resin, polyphenylene sulfide resin, and benzocyclobutene (BCB). However, the present disclosure is not necessarily limited to the examples described above.

[0193] The light-emitting element layer EML may be disposed on the pixel circuit layer PCL. The light-emitting element layer EML may include an insulating pattern INP, an adjacent electrode 142, a connection branch electrode 144, a first insulating layer INS1, a first bank BNK1, a light-emitting element LD, a second insulating layer INS2, and a connection electrode CNE.

[0194] The insulating pattern INP may form a step such that the light-emitting element LD can be easily aligned in the path region AA. According to an embodiment, the insulating pattern INP may be a partition wall. According to an embodiment, the insulating pattern INP may include at least one organic material and / or inorganic material. However, the present disclosure is not necessarily limited to specific examples.

[0195] The adjacent electrodes 142 may form the path region AA. According to an embodiment, some of the adjacent electrodes 142 may be disposed on the insulating pattern INP to form a reflective wall.

[0196] The connection branch electrode 144 may be disposed on the passivation layer PSV to be covered by the first insulating layer INS1. The connection branch electrode 144 may be disposed adjacent to the region between the first sub-alignment region SPA1 and the second sub-alignment region SPA2.

[0197] According to an embodiment, the opening region 1 may be formed in at least a partial region, and the light-emitting element LD may not be disposed at a position corresponding to the opening region 1.

[0198] The first insulating layer INS1 may be disposed on the adjacent electrodes 142 and the connection branch electrode 144. The first insulating layer INS1 may include an inorganic material, but is not particularly limited thereto.

[0199] The first bank BNK1 may be disposed on the first insulating layer INS1. As described above, the first bank BNK1 may form a space in which ink including the light-emitting element LD can be accommodated.

[0200] The light-emitting element LD may be disposed on the first insulating layer INS1 in the region surrounded by the first bank BNK1. According to an embodiment, the light-emitting element LD may emit light based on electrical signals (e.g., an anode signal and a cathode signal) provided from the anode connection electrode AE and the cathode connection electrode CE.

[0201] The second insulating layer INS2 may be disposed on the light-emitting element LD. The second insulating layer INS2 may cover the active layer AL of the light-emitting element LD. The second insulating layer INS2 may expose at least a part of the light-emitting element LD. For example, the second insulating layer INS2 may not cover the first end portion EP1 and the second end portion EP2 of the light-emitting element LD, and thus, the first end portion EP1 and the second end portion EP2 of the light-emitting element LD may be exposed and may be electrically connected to some of the connection electrodes CNE, respectively. According to an embodiment, another part of the second insulating layer INS2 may be disposed on the first bank BNK1 and the first insulating layer INS1.

[0202] In the case where the second insulating layer INS2 is formed on the light-emitting element LD after the alignment of the light-emitting element LD is completed, the light-emitting element LD can be prevented from deviating from the alignment position.

[0203] The second insulating layer INS2 may have a single-layer structure or a multi-layer structure. The second insulating layer INS2 may include an inorganic material, but is not particularly limited thereto.

[0204] The connection electrodes CNE (e.g., the anode connection electrode AE, the cathode connection electrode CE, and the intermediate connection electrode ME) may be disposed on the first insulating layer INS1 and the second insulating layer INS2. Some of the connection electrodes CNE may be electrically connected to the first end portion EP1 of the light-emitting element LD. Some of the connection electrodes CNE may be electrically connected to the second end portion EP2 of the light-emitting element LD.

[0205] The anode connection electrode AE may be electrically connected to the first transistor M1 through a first contact portion CNT1 that passes through the first insulating layer INS1, the passivation layer PSV, and the second interlayer insulating layer ILD2.

[0206] The cathode connection electrode CE may be electrically connected to the second power line PL2 through a second contact portion CNT2 that passes through the first insulating layer INS1, the passivation layer PSV, and the second interlayer insulating layer ILD2.

[0207] According to an embodiment, the connection electrodes CNE may be patterned at the same time point in the same process. However, the present disclosure is not necessarily limited to the examples described above. After patterning one of the connection electrodes CNE, the other connection electrodes CNE may be patterned.

[0208] Hereinafter, reference will be made to Figure 10 describe the structure of a display device according to an embodiment. Figure 10 A schematic top plan view of a display device according to an embodiment is shown. Descriptions that may be redundant for the above description are simplified or not repeated.

[0209] Figure 10 The embodiment shown in Figures 7 to 9 The described embodiment is different in that each of the sub-alignment regions SPA forms a sub-pixel SPX.

[0210] For example, the light-emitting element LD (or the light-emitting unit EMU) of the first sub-alignment region SPA1 may correspond to the first sub-pixel SPX1 and form the first sub-pixel SPX1, and the light-emitting element LD (or the light-emitting unit EMU) of the second sub-alignment region SPA2 may correspond to the second sub-pixel SPX2 and form the second sub-pixel SPX1. For example, the first sub-alignment region SPA1 may overlap with the first sub-pixel region SPXA1 of the first sub-pixel SPX1. The second sub-alignment region SPA2 may overlap with the second sub-pixel region SPXA2 of the second sub-pixel SPX2.

[0211] The anode connection electrode AE and the cathode connection electrode CE can be formed corresponding to each in the sub-alignment region SPA. According to an embodiment, sub-pixels SPX of a finer scale can be defined.

[0212] In an embodiment, an opening region 1 is also defined, so that the alignment efficiency of the light-emitting element LD can be improved, and unnecessary process costs can be reduced.

[0213] Hereinafter, reference will be made to Figure 11 and Figure 12 to describe the structure of a display device according to an embodiment. Figure 11 A schematic top plan view of a display device according to an embodiment is shown. Figure 12 A schematic cross-sectional view taken along line B-B' of Figure 11 is shown. Descriptions that may be redundant for the above description are simplified or not repeated.

[0214] Figure 11 and Figure 12 The embodiment shown in Figures 7 to 9 differs from the embodiment described above with reference to

[0215] in that the anode connection electrode AE and the cathode connection electrode CE are electrically connected to the wirings of the pixel circuit layer PCL through the electrode 100.

[0216] For example, the anode connection electrode AE can be electrically connected to the first main electrode 122. The cathode connection electrode CE can be electrically connected to the second main electrode 124. The first bank BNK1 may not be provided in the region where the anode connection electrode AE and the first main electrode 122 are electrically connected to each other. The first bank BNK1 may not be provided in the region where the cathode connection electrode CE and the second main electrode 124 are electrically connected to each other.

[0217] Therefore, the anode connection electrode AE can be electrically connected to the first transistor M1 through the first main electrode 122. The anode connection electrode AE can receive the high-potential pixel power VDD through the first main electrode 122. The cathode connection electrode CE can be electrically connected to the second power line PL2 through the second main electrode 124 to receive the low-potential pixel power VSS.

[0218] In an embodiment, an opening region 1 is also defined, so that the alignment efficiency of the light-emitting element LD can be improved, and unnecessary process costs can be reduced.

[0219] Hereinafter, reference will be made to Figure 13Describe a cross-sectional structure of a pixel PXL according to an embodiment. Figure 13 A schematic cross-sectional view of a pixel according to an embodiment is shown.

[0220] Figure 13 A cross-sectional structure of a sub-pixel SPX is schematically shown focusing on a component disposed on a light-emitting element layer EML.

[0221] Reference Figure 13 , sub-pixel regions SPXA respectively corresponding to the sub-pixels SPX may be formed in a display area DA. The sub-pixel regions SPXA may include a first sub-pixel region SPXA1 corresponding to the first sub-pixel SPX1, a second sub-pixel region SPXA2 corresponding to the second sub-pixel SPX2, and a third sub-pixel region SPXA3 corresponding to the third sub-pixel SPX3. The first sub-pixel region SPXA1, the second sub-pixel region SPXA2, and the third sub-pixel region SPXA3 may be arranged or disposed along a first direction DR1.

[0222] A second bank BNK2 is disposed between the first sub-pixel region SPXA1, the second sub-pixel region SPXA2, and the third sub-pixel region SPXA3, or at a boundary between the first sub-pixel region SPXA1, the second sub-pixel region SPXA2, and the third sub-pixel region SPXA3, and may define a space (or region) overlapping with the first sub-pixel region SPXA1, the second sub-pixel region SPXA2, and the third sub-pixel region SPXA3, respectively. The space defined by the second bank BNK2 may be a region where a color conversion layer CCL may be provided.

[0223] The second bank BNK2 may be disposed to surround a region or an area in the light-emitting element layer EML. The second bank BNK2 may protrude in a thickness direction (e.g., a third direction DR3) of a base layer BSL to define a region or an area, and a space where the color conversion layer CCL is disposed may be formed in an opening OPN.

[0224] The second bank BNK2 may include an organic material such as an acrylate resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or a benzocyclobutene. However, the present disclosure is not limited thereto.

[0225] The color conversion layer CCL may be disposed on a light-emitting element LD in a space surrounded by the second bank BNK2. The color conversion layer CCL may include a first color conversion layer CCL1 disposed on the first sub-pixel SPX1, a second color conversion layer CCL2 disposed on the second sub-pixel SPX2, and a scattering layer LSL disposed on the third sub-pixel SPX3.

[0226] The color conversion layer CCL can be disposed on the light-emitting element LD. The color conversion layer CCL can change the wavelength of light. According to an embodiment, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can include light-emitting elements LD that emit light of the same color. For example, the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can include light-emitting elements LD that emit light of a third color (or blue). The color conversion layer CCL including color conversion particles is respectively disposed on the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3, thereby displaying a full-color image.

[0227] The first color conversion layer CCL1 can include first color conversion particles that convert the light of the third color emitted from the light-emitting element LD into light of the first color. For example, the first color conversion layer CCL1 can include first quantum dots QD1 dispersed in a matrix material such as a base resin.

[0228] According to an embodiment, when the light-emitting element LD is a blue light-emitting element that emits blue light and the first sub-pixel SPX1 is a red pixel, the first color conversion layer CCL1 can include first quantum dots QD1 that convert the blue light emitted from the blue light-emitting element into red light. The first quantum dots QD1 can absorb blue light to transform the wavelength according to energy conversion, thereby emitting red light. When the first sub-pixel SPX1 is a pixel of a different color, the first color conversion layer CCL1 can include first quantum dots QD1 corresponding to the color of the first sub-pixel SPX1.

[0229] The second color conversion layer CCL2 can include second color conversion particles that convert the light of the third color emitted from the light-emitting element LD into light of the second color. For example, the second color conversion layer CCL2 can include second quantum dots QD2 dispersed in a matrix material such as a base resin.

[0230] According to an embodiment, when the light-emitting element LD is a blue light-emitting element that emits blue light and the second sub-pixel SPX2 is a green pixel, the second color conversion layer CCL2 can include second quantum dots QD2 that convert the blue light emitted from the blue light-emitting element into green light. The second quantum dots QD2 can absorb blue light to transform the wavelength according to energy conversion, thereby emitting green light. When the second sub-pixel SPX2 is a pixel of a different color, the second color conversion layer CCL2 can include second quantum dots QD2 corresponding to the color of the second sub-pixel SPX2.

[0231] According to an embodiment, blue light having a relatively short wavelength in the visible light band is incident on the first quantum dot QD1 and the second quantum dot QD2, respectively, thereby increasing the absorption coefficients of the first quantum dot QD1 and the second quantum dot QD2. Therefore, the efficiency of light emitted from the first sub-pixel SPX1 and the second sub-pixel SPX2 can be ultimately improved, and excellent color reproducibility can be ensured at the same time. The light-emitting unit EMU of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can use the light-emitting element LD of the same color (e.g., a blue light-emitting element), thereby improving the manufacturing efficiency of the display device DD.

[0232] A scattering layer LSL may be provided to effectively use the third color (or blue) light emitted from the light emitting element LD. For example, in the case where the light emitting element LD is a blue light emitting element that emits blue light and the third sub-pixel SPX3 is a blue pixel, the scattering layer LSL may include at least one type of scatterer SCT to effectively use the light emitted from the light emitting element LD. For example, the scatterer SCT of the scattering layer LSL may include one or more of barium sulfate (BaSO4), calcium carbonate (CaCO3), titanium oxide (TiO2), silicon oxide (SiO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and zinc oxide (ZnO). The scatterer SCT is not only provided in the third sub-pixel SPX3, but may be selectively included in the first color conversion layer CCL1 or the second color conversion layer CCL2. According to an embodiment, the scatterer SCT may be omitted, and a scattering layer LSL including a transparent polymer may be provided.

[0233] The first capping layer CPL1 may be disposed on the color conversion layer CCL. The first capping layer CPL1 may be completely disposed in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. The first capping layer CPL1 may cover the color conversion layer CCL. The first capping layer CPL1 may prevent impurities such as moisture or air from penetrating from the outside to damage or contaminate the color conversion layer CCL.

[0234] The first capping layer CPL1 as an inorganic layer may include silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon carbide oxide (SiO x C y ) and silicon oxynitride (SiO x N y )

[0235] The optical layer OPL can be disposed on the first capping layer CPL1. The optical layer OPL can be used to improve the light extraction efficiency by recycling the light provided from the color conversion layer CCL through total internal reflection. To this end, the optical layer OPL can have a relatively low refractive index compared to the color conversion layer CCL. For example, the refractive index of the color conversion layer CCL can be about 1.6 to 2.0, and the refractive index of the optical layer OPL can be about 1.1 to 1.3.

[0236] The second capping layer CPL2 can be disposed on the optical layer OPL. The second capping layer CPL2 can be entirely disposed in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. The second capping layer CPL2 can cover the optical layer OPL. The second capping layer CPL2 can prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the optical layer OPL.

[0237] The second capping layer CPL2 as an inorganic layer can include silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon carbon oxide (SiO x C y ), and silicon oxynitride (SiO x N y ) or one or more of them.

[0238] The planarization layer PLL can be disposed on the second capping layer CPL2. The planarization layer PLL can be entirely disposed in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3.

[0239] The planarization layer PLL can include an organic material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, polyester resin, polyphenylene sulfide resin, or benzocyclobutene. However, it is not necessarily limited thereto, and the planarization layer PLL can include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ) and various types of inorganic materials.

[0240] The color filter layer CFL may be disposed on the planarization layer PLL. The color filter layer CFL may include color filters CF1, CF2, and CF3 that match the colors of each pixel PXL. A full-color image may be displayed by setting color filters CF1, CF2, and CF3 that match the respective colors of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3.

[0241] The color filter layer CFL may include a first color filter CF1 disposed in the first sub-pixel SPX1 to selectively transmit light emitted by the first sub-pixel SPX1, a second color filter CF2 disposed in the second sub-pixel SPX2 to selectively transmit light emitted by the second sub-pixel SPX2, and a third color filter CF3 disposed in the third sub-pixel SPX3 to selectively transmit light emitted by the third sub-pixel SPX3.

[0242] According to an embodiment, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be a red color filter, a green color filter, and a blue color filter, respectively, but the present disclosure is not necessarily limited thereto. Hereinafter, when referring to one of the first color filter CF1, the second color filter CF2, and the third color filter CF3, or when collectively referring to two or more of the first color filter CF1, the second color filter CF2, and the third color filter CF3, it will be referred to as "color filter CF" or "plural color filters CF".

[0243] The first color filter CF1 may overlap with the first color conversion layer CCL1 in the thickness direction of the base layer BSL (e.g., the third direction DR3). The first color filter CF1 may include a filter material that selectively transmits light of the first color (or red). For example, when the first sub-pixel SPX1 is a red pixel, the first color filter CF1 may include a red filter material.

[0244] The second color filter CF2 may overlap with the second color conversion layer CCL2 in the thickness direction of the base layer BSL (e.g., the third direction DR3). The second color filter CF2 may include a filter material that selectively transmits light of the second color (or green). For example, when the second sub-pixel SPX2 is a green pixel, the second color filter CF2 may include a green filter material.

[0245] The third color filter CF3 may overlap with the scattering layer LSL in the thickness direction of the base layer BSL (e.g., the third direction DR3). The third color filter CF3 may include a filter material that selectively transmits light of the third color (or blue). For example, when the third sub-pixel SPX3 is a blue pixel, the third color filter CF3 may include a blue filter material.

[0246] According to an embodiment, the light-blocking layer BM may also be disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3, and in the case where the light-blocking layer BM is formed between the first color filter CF1, the second color filter CF2, and the third color filter CF3, color mixing defects observed from the front or side of the display device DD can be prevented. The material of the light-blocking layer BM is not particularly limited and may be made of various light-blocking materials. For example, the light-blocking layer BM may include a black matrix, or may be implemented by stacking the first color filter CF1, the second color filter CF2, and the third color filter CF3 on one another.

[0247] The outer coating OC may be disposed on the color filter layer CFL. The outer coating OC may be entirely disposed in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. The outer coating OC may cover the color filter layer CFL and its underlying components. The outer coating OC may prevent moisture or air from penetrating into the above-mentioned underlying components disposed therebelow. The outer coating OC may protect the above-mentioned underlying components from foreign substances such as dust.

[0248] The outer coating OC may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or a benzocyclobutene. However, it is not necessarily limited thereto, and the outer coating OC may include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ) and various types of inorganic materials.

[0249] The outer film layer OFL may be disposed on the outer coating OC. The outer film layer OFL may be disposed on the outer side of the display device DD to reduce external influence. The outer film layer OFL may be entirely disposed in the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. According to an embodiment, the outer film layer OFL may include one of a polyethylene terephthalate (PET) film, a low-reflection film, a polarizing film, and a transmittance controllable film, but is not necessarily limited thereto. According to an embodiment, the pixel PXL may include an upper substrate without including the outer film layer OFL.

[0250] Hereinafter, reference will be made to Figure 14 and Figure 15Describe a method of manufacturing a display device DD according to an embodiment. Descriptions that may be redundant for the above description are simplified or not repeated.

[0251] Figure 14 and Figure 15 FIG. shows a schematic top plan view of the process steps of a method of manufacturing a display device according to an embodiment. Figure 14 and Figure 15 The process of forming the pixel circuit layer PCL and the light-emitting element layer EML may be shown. Figure 14 and Figure 15 FIG. shows the embodiment described above with reference to Figures 7 to 9 description.

[0252] Referring to Figure 14 , an electrode 100 and a first bank BNK1 may be formed (or disposed) on a pixel circuit layer PCL including a base layer BSL.

[0253] According to an embodiment, an electrode (or wiring) and an insulating film provided on the base layer BSL may be formed by patterning a conductive layer (or metal layer), an inorganic material, or an organic material by performing a process using a mask.

[0254] In this step, the electrode 100 may be patterned in one area or a region. After depositing the electrode 100 on the base layer BSL (or pixel circuit layer PCL) by various methods such as sputtering, the electrode 100 may be patterned by using a mask.

[0255] For example, the first main electrode 122 and the second main electrode 124 may be patterned to extend along a first direction DR1 across a sub-alignment region SPA (e.g., a first sub-alignment region SPA1 and a second sub-alignment region SPA2). The branch electrode 140 may be disposed between the first main electrode 122 and the second main electrode 124, and at least some of the adjacent electrodes 142 may be patterned in an opening OPN surrounded by the first bank BNK1. The connecting branch electrode 144 may electrically connect the adjacent electrodes 142 of adjacent sub-alignment regions SPA to each other.

[0256] In this step, the first main electrode 122, the first adjacent electrode 142a, and the first connecting branch electrode 144a may be integrally patterned with each other to be electrically connected to each other. The second main electrode 124, the second adjacent electrode 142b, and the second connecting branch electrode 144b may be integrally patterned with each other to be electrically connected to each other.

[0257] In this step, the first connection branch electrode 144a can be patterned to electrically connect the first adjacent electrodes 142a each of which is in a sub-alignment region SPA adjacent to each other. The second connection branch electrode 144b can be patterned to electrically connect the second adjacent electrodes 142b each of which is in a sub-alignment region SPA adjacent to each other.

[0258] In this step, the adjacent electrodes 142 are spaced apart from each other along the first direction DR1 in each sub-alignment region SPA, so that two or more path regions AA can be defined.

[0259] In this step, an opening region 1 can be provided between the adjacent electrodes 142 adjacent to each other along the first direction DR1. For example, the adjacent electrodes 142 formed substantially on the upper side can be spaced apart from the adjacent electrodes 142 formed substantially on the lower side, and the opening region 1 is interposed between the adjacent electrodes 142.

[0260] According to an embodiment, the first adjacent electrode 142a, the first connection branch electrode 144a, and the first main electrode 122 can be integrated. The second adjacent electrode 142b, the second connection branch electrode 144b, and the second main electrode 124 can be integrated.

[0261] Reference Figure 15 , the light-emitting elements LD can be aligned in the path regions AA in each sub-alignment region SPA. The light-emitting elements LD can be provided on some of the electrodes 100 (for example, the adjacent electrodes 142).

[0262] The ink including the light-emitting elements LD can be provided into the opening OPN defined by the first bank BNK1 in which a fluid can be accommodated. For example, the ink including the light-emitting elements LD and a solvent can be provided onto the base layer BSL through a printing device that jets a fluid. According to an embodiment, the solvent can include an organic solvent. For example, the solvent can be one of propylene glycol monomethyl ether acetate (PGMEA), dipropylene glycol n-propyl ether (DGPE), and triethylene glycol n-butyl ether (TGBE). However, the present disclosure is not limited to the examples described above.

[0263] In this step, the ink can be accommodated in the space defined by the first bank BNK1, an alignment signal can be provided to the electrodes 100, and the light-emitting elements LD can be aligned based on the electric field according to the alignment signal. A first alignment signal AS1 is provided to the first adjacent electrode 142a, the first connection branch electrode 144a, and the first main electrode 122, and a second alignment signal AS2 is provided to the second adjacent electrode 142b, the second connection branch electrode 144b, and the second main electrode 124, so that the light-emitting elements LD can be aligned between the first adjacent electrode 142a and the second adjacent electrode 142b. The solvent can be removed.

[0264] According to an embodiment, the same alignment signal can be applied to adjacent electrodes 142 that are adjacent along the second direction DR2 with the opening region 1 interposed therebetween. Thus, the light-emitting element LD may not be further aligned in the opening region 1. For example, a first alignment signal can be applied to the first adjacent electrodes 142a that are adjacent to each other along the second direction DR2, and a second alignment signal can be applied to the second adjacent electrodes 142b that are adjacent to each other along the second direction DR2.

[0265] In this step, the light-emitting element LD may not be substantially provided (or aligned) in the opening region 1, and thus the risk of possibly setting the light-emitting element LD in a region where light cannot be emitted can be prevented, and the process cost can be significantly reduced.

[0266] Thereafter, although no separate drawing is shown, the connection electrode CNE can be patterned, and the light-emitting element LD can receive an electrical signal for emitting light. Thereafter, the color conversion layer CCL and the color filter layer CFL can be formed.

[0267] Although the present disclosure has been shown and described with reference to embodiments of the present disclosure, those skilled in the art will understand that various changes in form and detail can be made in the present disclosure without departing from the spirit and scope of the present disclosure as defined by the appended claims and their equivalents.

[0268] Therefore, the technical scope of the present disclosure can be determined by the scope of the appended claims.

Claims

1. Display equipment, including: An electrode is disposed on the base layer and comprises: a main body electrode and a branch electrode, wherein the branch electrode is electrically connected to the main body electrode, the branch electrode comprises adjacent electrodes, and the adjacent electrodes comprise a first adjacent electrode and a second adjacent electrode; and A light emitting element is disposed in an alignment region including a sub-alignment region on the base layer and between the first adjacent electrode and the second adjacent electrode, wherein: Each of the sub-alignment areas includes a path area defined by the first adjacent electrodes and the second adjacent electrodes spaced apart from each other in a first direction, The path region includes a first path region and a second path region spaced apart from each other in a second direction different from the first direction, The first adjacent electrode of the first path region and the first adjacent electrode of the second path region are spaced apart from each other, and an opening region is between the first adjacent electrode of the first path region and the first adjacent electrode of the second path region, and The second adjacent electrode of the first path region and the second adjacent electrode of the second path region are spaced apart from each other, and the opening region is between the second adjacent electrode of the first path region and the second adjacent electrode of the second path region.

2. The display device according to claim 1, wherein: The alignment region extends in the first direction, and The alignment region includes a first alignment region and a second alignment region adjacent to each other in the second direction.

3. The display device according to claim 2, wherein: The body electrode in the first alignment region and the body electrode in the second alignment region are separated from each other.

4. The display device according to claim 2, wherein: The sub-alignment areas include a first sub-alignment area and a second sub-alignment area, The branch electrodes include connection branch electrodes that electrically connect the adjacent electrodes in the first sub-alignment area and the adjacent electrodes in the second sub-alignment area, The connection branch electrodes include a first connection branch electrode and a second connection branch electrode, The main body electrode includes a first main body electrode and a second main body electrode, The first main electrode, the first adjacent electrode and the first connecting branch electrode are integral with each other, and The second main body electrode, the second adjacent electrode and the second connection branch electrode are integral with each other.

5. The display device according to claim 4, wherein: The first connection branch electrode electrically connects the first adjacent electrode and the first main body electrode disposed in the first path region in the second sub-alignment region, and The second connection branch electrode electrically connects the second adjacent electrode and the second body electrode disposed in the second path region in the first sub-alignment region.

6. The display device according to claim 4, further comprising: a bank surrounding at least a portion of the path region and overlapping the connection branch electrode in a plan view, The opening area does not overlap with the bank in a plan view.

7. The display device according to claim 1, wherein: The sub-alignment regions include a first sub-alignment region and a second sub-alignment region adjacent to each other in the first direction; The light emitting element includes a first light emitting element disposed in the first path region to form a first light emitting portion and a second light emitting element disposed in the second path region to form a second light emitting portion; The light emitting elements in the first sub-alignment area and the light emitting elements in the second sub-alignment area form a sub-pixel; The display device further comprises an anode connecting electrode, a first intermediate connecting electrode, a second intermediate connecting electrode, a third intermediate connecting electrode and a cathode connecting electrode; as well as The anode connecting electrode, the first light-emitting portion in the first sub-alignment area, the first intermediate connecting electrode, the second light-emitting portion in the first sub-alignment area, the second intermediate connecting electrode, the second light-emitting portion in the second sub-alignment area, the third intermediate connecting electrode, the first light-emitting portion in the second sub-alignment area and the cathode connecting electrode are electrically connected in sequence.

8. The display device according to claim 7, wherein: The first intermediate connecting electrode overlaps the opening area in the first sub-alignment area in a plan view, and The third intermediate connecting electrode overlaps the opening region in the second sub-alignment region in a plan view.

9. The display device according to claim 1, wherein: The opening region does not overlap with the light emitting element in a plan view.

10. The display device according to claim 1, further comprising: sub-pixels, each of which includes the light-emitting element, wherein The sub-alignment regions include a first sub-alignment region and a second sub-alignment region adjacent to each other in the first direction, and The first sub-alignment area and the second sub-alignment area correspond to one of the sub-pixels.

11. The display device according to claim 1, further comprising: a first sub-pixel and a second sub-pixel, wherein the first sub-pixel emits light of a first color and the second sub-pixel emits light of a second color, each of the first sub-pixel and the second sub-pixel comprises the light-emitting element, wherein The sub-alignment areas include a first sub-alignment area and a second sub-alignment area adjacent to each other in the first direction, The first sub-alignment area corresponds to the first sub-pixel, and The second sub-alignment area corresponds to the second sub-pixel.

12. The display device according to claim 1, wherein: The main electrode extends from a first end of the light emitting element toward a second end of the light emitting element in the first direction, and The adjacent electrodes extend in the second direction.

13. Display equipment, including: alignment regions including a first alignment region and a second alignment region extending in a first direction and spaced apart from each other in a second direction different from the first direction; an electrode, comprising a main electrode and a branch electrode, wherein the branch electrode is electrically connected to the main electrode, and at least a portion of the electrode is disposed within the alignment region; and A light emitting element is disposed in the alignment region, wherein The main electrode extends in the first direction, The body electrode in the first alignment region and the body electrode in the second alignment region are separated from each other, and The branch electrodes include connecting branch electrodes extending in the second direction.

14. A method for manufacturing a display device, comprising: The electrodes are patterned on the base layer, wherein the electrodes include a main electrode and branch electrodes; as well as In the alignment region, light emitting elements are arranged on adjacent electrodes among the branch electrodes, wherein: The alignment area includes sub-alignment areas; Each of the sub-alignment regions includes a first path region and a second path region; The adjacent electrodes include a first adjacent electrode and a second adjacent electrode; The first adjacent electrode of the first path region and the first adjacent electrode of the second path region are spaced apart from each other, and an opening region is between the first adjacent electrode of the first path region and the first adjacent electrode of the second path region; and The second adjacent electrode of the first path region and the second adjacent electrode of the second path region are spaced apart from each other, and the opening region is between the second adjacent electrode of the first path region and the second adjacent electrode of the second path region.

15. The method for manufacturing a display device according to claim 14, wherein: The main body electrode includes a first main body electrode and a second main body electrode, The first main electrode is electrically connected to the first adjacent electrode, The second main electrode is electrically connected to the second adjacent electrode, and Setting the light emitting element comprises: applying a first alignment signal to the first adjacent electrode through the first main electrode; and A second alignment signal is applied to the second adjacent electrode through the second body electrode.

16. The manufacturing method of a display device according to claim 15, wherein, The sub-alignment regions include a first sub-alignment region and a second sub-alignment region adjacent in a first direction, and The main electrode is disposed through the first sub-alignment area and the second sub-alignment area in the first direction.

17. The manufacturing method of a display device according to claim 16, further comprising: A bank protruding in a thickness direction of the base layer is formed on the base layer, wherein: The branch electrodes further include a connecting branch electrode, the connecting branch electrode electrically connecting the adjacent electrodes in the first sub-alignment area and the adjacent electrodes in the second sub-alignment area, The opening area does not overlap with the bank in plan view, and The connection branch electrode overlaps the bank in a plan view.

18. The manufacturing method of a display device according to claim 14, wherein, Providing the light emitting element includes: aligning the light emitting element based on an electric field between the first adjacent electrode and the second adjacent electrode, and Aligning the light emitting element includes aligning the light emitting element between the first adjacent electrode and the second adjacent electrode without aligning the light emitting element in the opening region.

19. The manufacturing method of a display device according to claim 18, wherein, The first adjacent electrodes and the second adjacent electrodes are spaced apart from each other in a first direction, The first path region and the second path region are spaced apart from each other in a second direction different from the first direction, applying a first alignment signal to the first adjacent electrode of the first path region and the first adjacent electrode of the second path region, and A second alignment signal is applied to the second adjacent electrode of the first path region and the second adjacent electrode of the second path region.

20. The manufacturing method of a display device according to claim 14, further comprising: forming a connection electrode layer, Wherein, the connecting electrode layer comprises: an anode connection electrode, electrically connected to the light emitting element; an intermediate connection electrode electrically connected to the light emitting element and overlapping the opening region in a plan view; and The cathode connection electrode is electrically connected to the light emitting element.

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