Control method of solid-state drive, related device and medium

Abstract

The invention provides a control method of a solid-state drive, a related device and a medium. The control method comprises the steps that a Trim command is stored in a data buffer area, the Trim command comprises a plurality of address ranges, each address range comprises an initial logic block address and a logic block address length of data to be deleted, and the address ranges with the continuous and adjacent logic block addresses contained in the address ranges are combined into a plurality of sets of buffer items, the method comprises the steps of storing multiple groups of buffer items in a data buffer area to form a first buffer list, executing Trim processing on the multiple groups of buffer items one by one, deleting the buffer items in the first buffer list after the buffer items are processed, and deleting the buffer items in the first buffer list in the process of executing the Trim processing on the multiple groups of buffer items one by one according to a preset command priority. If the first command with the priority higher than that of the Trim command is received, the processing of the buffer item is terminated, the first buffer list is stored in the flash memory, and the Trim processing is continuously executed after the first command is processed, so that the reaction delay of executing the first command by the solid-state drive is reduced.

Description

Technical Field

[0001] The present disclosure belongs to the field of computer technologies, and particularly relates to a control method, related device, and medium for a solid state drive. Background Art

[0002] With the continuous development of computer technologies, solid state drives (SSDs) are increasingly widely used. To reduce the write amplification of solid state drives, the TRIM command has been proposed. Specifically, when a host needs to delete a file, the host generates a corresponding TRIM command, and the TRIM command can indicate the deletion of the file in the solid state drive. The TRIM command includes multiple Ranges (which can be referred to as address ranges). When the solid state drive executes the TRIM command, the controller of the solid state drive parses each Range in the TRIM command one by one and processes each Range until each Range in the TRIM command is processed. During the execution of the TRIM command by the solid state drive, other commands (including read / write commands) sent by the host to the solid state drive cannot interrupt the execution of the TRIM command, and other commands need to wait until the TRIM command is executed before being processed, resulting in a high reaction delay for the solid state drive to execute other commands (including read / write commands). Summary of the Invention

[0003] In view of the above problems, the present disclosure provides a control method, related device, and medium for a solid state drive, aiming to control the solid state drive to interrupt the TRIM command according to a preset command priority during the execution of the TRIM command and preferentially execute other commands (including read / write commands), so as to reduce the reaction delay of the solid state drive to execute other commands (including read / write commands).

[0004] According to a first aspect of the present disclosure, there is provided a control method for a solid state drive, where the solid state drive includes a controller and a flash memory, and the controller includes a data buffer. The control method includes:

[0005] Storing the Trim command in the data buffer, where the Trim command includes multiple address ranges, and the address range includes the starting logical block address and the logical block address length of the data to be deleted;

[0006] Merging the address ranges with consecutive and adjacent logical block addresses therein into multiple buffer items, and storing the multiple buffer items in the data buffer to form a first buffer list;

[0007] Performing Trim processing on the multiple buffer items one by one, and deleting the buffer item in the first buffer list after the buffer item is processed;

[0008] Among them, according to the preset command priority, during the process of trimming each of the multiple groups of buffer entries one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer entry is terminated, the first buffer list is stored in the flash memory, and after the first command is processed, the trimming process is continued for each of the multiple groups of buffer entries one by one.

[0009] Optionally, during the process of trimming each of the multiple groups of buffer entries one by one, the control method further includes:

[0010] In the case of exceeding the preset execution time, a command indicating that the Trim command processing is completed is fed back to the host of the solid-state drive, and the unprocessed part of the Trim command is continuously processed in the background until all parts of the Trim command are actually processed.

[0011] Optionally, trimming each of the multiple groups of buffer entries one by one includes:

[0012] Dividing the non-4K-aligned address range included in the buffer entry into a 4K-aligned address range part and a non-4K-aligned address range part;

[0013] Deleting the non-4K-aligned address range part from the buffer entry;

[0014] Filling '0' in the physical block address corresponding to the logical block address in the non-4K-aligned address range part in the flash memory;

[0015] Performing a first process on each 4K-aligned address range in the buffer entry one by one, where the first process includes clearing the physical block address corresponding to the logical block address in the 4K-aligned address range in the L2P mapping table, clearing the corresponding bit on the valid bitmap, and correspondingly updating the number of valid segments.

[0016] Optionally, the first command includes a read command, and the control method further includes:

[0017] If the logical block address of the data to be read by the read command is included in the first buffer list, 'null' is replied to the host of the solid-state drive.

[0018] Optionally, the first command includes a write command, and the control method further includes:

[0019] If the first logical block address where the write command will write data is included in the first buffer list, the first logical block address is deleted from the first buffer list.

[0020] Optionally, before trimming each of the multiple groups of buffer entries one by one, the control method further includes:

[0021] Store the first buffer list into the flash memory;

[0022] During the process of performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes:

[0023] In the case of normal power-off, update the first buffer list to the flash memory;

[0024] In the case of abnormal power-off and when the latest version of the first buffer list stored in the flash memory is not 'null', if the latest version of the first buffer list includes the second logical block address of the data written to the flash memory after the latest version of the first buffer list, then delete the second logical block address in the latest version of the first buffer list, and update the latest version of the first buffer list after deleting the second logical block address to the data buffer.

[0025] Optionally, during the process of performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes:

[0026] In the case of performing garbage collection, obtain the third logical block address corresponding to the selected physical block address;

[0027] If the third logical block address is included in the first buffer list, determine that the data in the selected physical block address is garbage data and clear the garbage data;

[0028] If the third logical block address is not included in the first buffer list, determine that the data in the selected physical block address is valid data and move the valid data.

[0029] According to a second aspect of the present disclosure, there is provided a control device for a solid-state drive, the solid-state drive includes a controller and a flash memory, the controller includes a data buffer, and the control device includes:

[0030] A storage unit for storing a Trim command in the data buffer, the Trim command includes multiple address ranges, and the address range includes the starting logical block address and the logical block address length of the data to be deleted;

[0031] An address range merging unit for merging the address ranges in which the included logical block addresses are continuous and adjacent into multiple groups of buffer entries, and storing the multiple groups of buffer entries in the data buffer to form a first buffer list;

[0032] A Trim processing unit is configured to perform Trim processing on each of the multiple groups of buffer entries one by one. After processing the buffer entries, the buffer entries are deleted from the first buffer list. Among them, according to a preset command priority, during the process of performing Trim processing on the multiple groups of buffer entries one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer entries is terminated, the first buffer list is stored in the flash memory, and after processing the first command, the Trim processing on the multiple groups of buffer entries is continued one by one.

[0033] According to a third aspect of the present disclosure, there is provided a solid-state drive, including:

[0034] A flash memory;

[0035] A controller, the controller includes a data buffer, and the controller is configured to execute the above method. According to a preset command priority, during the process of performing Trim processing on multiple groups of buffer entries in a first buffer list storing Trim commands one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer entries is terminated, the first buffer list is stored in the flash memory, and after processing the first command, the Trim processing on the multiple groups of buffer entries is continued one by one.

[0036] According to a fourth aspect of the present disclosure, there is provided an electronic device, including: a processor, a memory, and a program stored on the memory and executable on the processor. When the program is executed by the processor, the steps of the above method are implemented.

[0037] According to a fifth aspect of the present disclosure, there is provided a storage medium, on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the steps of the above method are implemented.

[0038] The present disclosure brings the following beneficial effects:

[0039] The control method of the solid-state drive provided by the present disclosure stores the Trim command in the data buffer. The Trim command includes multiple address ranges, and each address range includes the starting logical block address of the data to be deleted and the logical block address length. Then, the address ranges with consecutive and adjacent logical block addresses are merged into multiple buffer entries, and the multiple buffer entries are stored in the data buffer to form the first buffer list. The Trim process is performed on each of the multiple buffer entries one by one. After processing one buffer entry, the buffer entry is deleted from the first buffer list. Among them, according to the preset command priority, during the process of performing the Trim process on each of the multiple buffer entries one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer entry is terminated, and the first buffer list is stored in the flash memory. After processing the first command, the Trim process on each of the multiple buffer entries is continued. In this way, it is controlled that the solid-state drive interrupts the TRIM command according to the preset command priority during the execution of the TRIM command and preferentially executes other commands (including read / write commands), reducing the response delay of the solid-state drive when executing other commands (including read / write commands).

[0040] Other features and advantages of the present disclosure will be described in the following specification, and, in part, will be obvious from the specification, or will be understood by implementing the present disclosure. The objectives and other advantages of the present disclosure are achieved and obtained by the structures specifically pointed out in the specification and the drawings.

[0041] To make the above objectives, features, and advantages of the present disclosure more obvious and understandable, the following specific preferred embodiments are given, and in conjunction with the accompanying drawings, the detailed description is as follows. Brief Description of the Drawings

[0042] Through the following description of the embodiments of the present disclosure with reference to the drawings, the above and other objectives, features, and advantages of the present disclosure will become clearer. In the drawings:

[0043] Figure 1 It is a schematic diagram of the operation of the solid-state drive when the host deletes a file in the related art;

[0044] Figure 2 It is a schematic diagram of the structure of a computer system provided according to an embodiment of the present disclosure;

[0045] Figure 3 It shows a schematic diagram of the structure of a solid-state drive provided according to an embodiment of the present disclosure.

[0046] Figure 4 It is a schematic flowchart of the control method of the solid-state drive provided according to an embodiment of the present disclosure;

[0047] Figure 5A It shows a schematic diagram of the address information included in the Trim command;

[0048] Figure 5B A schematic diagram showing the L2P mapping table, valid bitmap, and number of valid segments before executing the Trim command;

[0049] Figure 5C A schematic diagram showing the L2P mapping table, valid bitmap, and number of valid segments after executing the Trim command;

[0050] Figure 6 A schematic diagram showing a control device of a solid state drive according to an embodiment of the present disclosure;

[0051] Figure 7 A schematic structural diagram of an electronic device provided according to an embodiment of the present disclosure. Detailed implementation manners

[0052] Various embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. In each of the drawings, the same or similar reference numerals are used for the same elements. For clarity, the various parts in the drawings are not drawn to scale.

[0053] The following terms are used herein:

[0054] A solid state drive (SSD) is a storage device composed of a controller and flash memory (e.g., NAND). The controller is responsible for managing and controlling the operations of the flash memory, including data reading, writing, and erasing. The write unit of an SSD is a page, and the erase unit is a block. This means that even if only the data of one page needs to be modified, the SSD needs to erase the entire block and rewrite it, which leads to the problem of write amplification.

[0055] The TRIM command indicates that a certain logical block address space in the solid state drive has been deleted by the host. After receiving the TRIM command, the solid state drive will perform corresponding operations, making the data in this logical block address space become garbage data. Whether the physical block corresponding to this logical block address space can be released does not consider the data in this logical block address space, which improves the turnover rate of the physical block. When executing the garbage collection command, there is no need to move the data in this logical block address space, which improves the garbage collection efficiency and reduces the waiting time.

[0056] Figure 1 A schematic diagram showing the operations of a solid state drive when a host deletes a file in the related art. As Figure 1As shown in the figure, the data in the solid-state drive is managed by the host (e.g., the file system). In the host, there are pointers (Fileindex) for each file that point to the LBA (Logical Block Address) space where the actual stored data (Filedata) is located, and they correspond one by one (File 1index points to data File 1data, and File 2index points to data File2data). When a file is deleted on the host, the pointer is deleted. The data corresponding to the pointer is considered abandoned, and the abandoned file space can be occupied by other files (if the File 1index pointer is deleted, then the space where data File 1data is located can be occupied by other data, such as data File 3data, and File 3index pointer points to data File 3data). However, in the solid-state drive, when the user deletes a file on the host, the host does not actually delete the data of this file from the flash memory. It only cuts off the association between the file and the host. The solid-state drive still retains the mapping between the logical block address and the physical block address of the file, and the data in the flash memory is also considered valid by the solid-state drive. During subsequent garbage collection (abbreviated as GC), this data will still be moved, resulting in write waste. Only when the LBA of data File 1data is overwritten by data File 3data, the overwritten part of the LBA will be regarded as real garbage data.

[0057] To solve this problem, the TRIM (Data Set Management Command) command came into being. However, currently, when the host needs to delete a file, the host generates a corresponding TRIM command, and the TRIM command can instruct to delete the file in the solid-state drive. When the solid-state drive executes the TRIM command, the controller of the solid-state drive parses each Range one by one according to the TRIM command and processes each Range until all Ranges in the TRIM command are processed. During the process of the solid-state drive 120 executing the TRIM command, other commands (including read / write commands) sent by the host to the solid-state drive need to wait until the TRIM command is executed before processing other commands, which increases the reaction delay of the solid-state drive when executing other commands (including read / write commands). Based on this, the embodiments of the present disclosure provide a control method, related device, and medium for a solid-state drive, aiming to control the solid-state drive to interrupt the TRIM command according to a preset command priority and preferentially execute other commands (including read / write commands) during the execution of the TRIM command, so as to reduce the reaction delay of the solid-state drive when executing other commands (including read / write commands).

[0058] Figure 2A schematic structural diagram of a computer system provided according to an embodiment of the present disclosure is shown. As Figure 2 shown, the computer system 100 provided by the embodiment of the present disclosure includes: a computer device 110 and a solid-state drive 120. Among them, the solid-state drive 120 can be understood as an external storage device of the computer device 110. The solid-state drive 120 may include a controller 121 and a flash memory (Flash) 122. The controller 121 includes a data buffer 123 and firmware (FirmWare, abbreviated as FW) 124. The computer device 110 includes a host 111.

[0059] In some embodiments, an operating system may run on the computer device 110, and the operating system can be understood as the host 111 of the solid-state drive 120. The host 111 may send instructions (including read / write commands, Trim commands, and commands for FW-related tasks) to the firmware 124. When the host 111 sends a write command to the firmware 124, the firmware 124 may write data into the flash memory 122 according to the write command. When the host 111 sends a read command to the firmware 124, the firmware 124 may read data from the flash memory 122 according to the read command and return the read data to the host 111. It should be noted that for the sake of convenience of description, Figure 1 taking the components of the computer device 110 not including the solid-state drive 120 as an example, alternatively, the solid-state drive 120 may also be taken as a part of the computer device 110.

[0060] In some embodiments, a first buffer list for storing Trim commands may be stored in the data buffer 123 and the flash memory 122. In some embodiments, when the firmware 124 is performing Trim processing on multiple groups of buffer items in the first buffer list storing Trim commands one by one according to a preset command priority, if a first command with a higher priority than the Trim command is received, the processing of the buffer item is terminated, the first buffer list is stored in the flash memory 122, and after the first command is processed, the Trim processing on the multiple groups of buffer items is continued one by one.

[0061] Since the process of controlling the solid-state drive to execute the Trim command using the control method of the solid-state drive in the embodiment of the present disclosure will be described in detail below, it will not be elaborated here.

[0062] Figure 3A structural schematic diagram of a solid-state drive provided according to an embodiment of the present disclosure is shown. The solid-state drive 120 includes a controller 121 and a flash memory 122. The controller 121 includes a data buffer 123, a first execution unit (also known as the TIRM main process unit) 201, a second execution unit (also known as the Partial TIRM process unit) 202, a third execution unit (also known as the Cache TIRM process unit) 203, a fourth execution unit (also known as the garbage collection process unit) 204, and a fifth execution unit (also known as the power-on process unit) 205.

[0063] In some embodiments, the first execution unit 201 performs the following steps: 1.1 Receive a TRIM command from the host 111 and store the Trim command in the data buffer 123. Merge the consecutive and adjacent address ranges of the logical block addresses contained therein into multiple groups of buffer entries, and store the multiple groups of buffer entries in the data buffer 123 to form a first buffer list. When performing Trim processing on a group of buffer entries in the first buffer list stored in the data buffer 123, determine whether the buffer entry contains a non-4K aligned address range. If the buffer entry includes a non-4K aligned address range, divide the non-4K aligned address range into a 4K aligned address range part and a non-4K aligned address range part, and delete the non-4K aligned address range part from the buffer entry. 1.2 After deleting the non-4K aligned address range part from the buffer entry, update the multiple groups of buffer entries in the first buffer list stored in the data buffer 123 to include only 4K aligned address ranges. 1.3 Provide the non-4K aligned address range part to the second execution unit 202. Then, the second execution unit 202 performs the steps: 2.1 Fill '0' in the physical block address corresponding to the logical block address in the non-4K aligned address range part in the flash memory 122.

[0064] In some embodiments, the third execution unit 203 performs the following steps: 3.1 Perform a first process on the 4K-aligned address ranges in the buffer entries one by one. This first process includes clearing the physical block addresses corresponding to the logical block addresses in the 4K-aligned address ranges in the L2P mapping table (Logical To Physical Table) and correspondingly updating the valid fragment count (VFC for short). The L2P mapping table and the valid fragment count can be stored in the data buffer 123. In some embodiments, the controller 121 of the solid-state drive 120 further includes a DRAM (not shown in the figure), and the valid bit map (VBM for short) is usually stored in the DRAM. This first process also includes clearing the corresponding bits on the valid bit map (VBM for short). 3.2 After processing each buffer entry, update the first buffer list stored in the data buffer 123, that is, delete the buffer entry from the first buffer list.

[0065] In some embodiments, the first execution unit 201 further performs the following steps: 1.4 When executing the TRIM command, the first buffer list stored in the data buffer 123 can be updated to the flash memory 122 according to a predetermined condition. It is easy to understand that the predetermined condition can be set according to the amount of data to be written to the flash memory 122 when refreshing the first buffer list stored in the data buffer 123 to the flash memory 122 and the amount of data that needs to be restored to the first buffer list stored in the data buffer 123 in the case of abnormal power-off, so that the two are relatively balanced. 1.5 When the execution of the TRIM command is completed, feedback an instruction indicating the completion of the execution of the TRIM command to the host 111.

[0066] In some embodiments, the fourth execution unit 204 performs the following steps: 5.1 During the process of performing the Trim process on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, the host 111 of the solid-state drive 120 may issue a garbage collection command. In the case of executing the garbage collection command, obtain the logical block address corresponding to the physical block address selected for garbage collection. 5.2 If the logical block address is included in the first buffer list stored in the data buffer 123, determine that the data in the selected physical block address is invalid data and there is no need to read the invalid data corresponding to the logical block address from the flash memory 122. 5.3 If the logical block address is not included in the first buffer list stored in the data buffer 123, determine that the data in the selected physical block address is valid data and move the valid data.

[0067] In some embodiments, the fifth execution unit 205 performs the following steps: 6.1 During the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, there may also be a situation where the solid-state drive 120 experiences abnormal power-off. In the case where the solid-state drive 120 experiences abnormal power-off and the latest version of the first buffer list stored in the flash memory 122 is not 'null', determine whether the logical block address of the data written to the flash memory 122 after the latest version of the first buffer list is included in the latest version of the first buffer list stored in the flash memory 122 according to the SN. 6.2 If the latest version of the first buffer list includes the logical block address of the data written to the flash memory 122 after the latest version of the first buffer list, delete the logical block address from the latest version of the first buffer list, and update the latest version of the first buffer list with the deleted logical block address to the data buffer 123, so as to restore the state of the solid-state drive 120 executing the TRIM command before abnormal power-off and ensure that the TRIM command is not lost.

[0068] In some embodiments, the first execution unit 201 also performs the following steps: 4.1 During the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, when the solid-state drive 120 receives a write command, if the first buffer list stored in the data buffer 123 includes the first logical block address where the write command will write data, delete the first logical block address from the first buffer list stored in the data buffer 123, and save the updated first buffer list to the flash memory 123 according to a predetermined condition. If the first buffer list does not include the first logical block address, perform the write operation normally. 4.2 During the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, when the solid-state drive 120 receives a read command, if the first buffer list stored in the data buffer 123 includes the logical block address of the data to be read by the read command, directly reply 'null' to the host of the solid-state drive 120. If the first buffer list stored in the data buffer 123 does not include the logical block address of the data to be read by the read command, perform the read operation normally.

[0069] Since the process of controlling the solid-state drive to execute the Trim command using the control method of the solid-state drive in the embodiments of the present disclosure will be described in detail below, it will not be elaborated here.

[0070] Figure 4 It is a flowchart of the control method of the solid-state drive provided according to an embodiment of the present disclosure. The control method of the solid-state drive in the embodiments of the present disclosure can be performed by Figure 2 the processor of the computer device 110 in Figure 2 and Figure 3It is executed by the controller 121 of the solid state drive 120. As Figure 4 shown, the control method of the solid state drive according to the embodiments of the present disclosure may include:

[0071] In step S410, store the Trim command in the data buffer, where the Trim command includes multiple address ranges, and the address range includes the starting logical block address and the logical block address length of the data to be deleted.

[0072] In some embodiments, when the host 111 needs to delete a file, the host 111 generates a corresponding TRIM command and sends the TRIM command indicating the deletion of the file to the solid state drive 120. The Trim command includes multiple Ranges (also referred to as address ranges). Each Range includes the starting logical block address (Staring LBA) and the logical block address length (Length in logical blocks) of the data to be deleted. Figure 5A The schematic diagram showing the address information included in the Trim command is as follows. As Figure 5A shown, according to the definition of Dataset Manager in the NVMe Spec protocol, a Trim command consists of at most 256 Ranges (Range 0 - Range 255), and each Range records the bytes, starting logical block address, and logical block address length of the data to be deleted. When the solid state drive 120 processes the Trim command, the controller 121 needs to parse the information of each Range and process it. Only when the information of all Ranges is processed can this Trim command be considered truly completed.

[0073] In some embodiments, the controller 121 obtains the Trim command sent by the host and stores the Trim command in the data buffer (also referred to as Trim Buffer) 123 according to the command format. In some embodiments, the size of the data buffer 123 is 4KB and is used to store 1 - 256 Ranges of a Trim command. The Trim command is stored in the data buffer 123 Range by Range.

[0074] In step S420, merge the address ranges whose included logical block addresses are consecutive and adjacent into multiple buffer items, and store the multiple buffer items in the data buffer to form a first buffer list.

[0075] In some embodiments, adjacent Ranges in the data buffer 123 with consecutive LBAs in the Range are merged. The merging operation means: traversing multiple Ranges in the Trim command, if the LBAs corresponding to adjacent Ranges are consecutive or overlapping, then these two Ranges are merged. And according to the starting logical block address and the logical block address length in the merged Range, a continuity judgment is made between the merged Range and the next Range. If the LBA is still consecutive, then these two Ranges are merged until a non - consecutive Range or the last Range is encountered. For example, if Range A and Range B are adjacent and consecutive Ranges, then the starting logical block addresses and the logical block address length information of Range A and Range B are merged, and the merged data is stored in Range B, and the data in Range A is cleared (set its logical block address length to 0). Through the merging operation, two or more Ranges can be merged into one Range. In this way, the Ranges with consecutive and adjacent logical block addresses are merged into multiple groups of buffer entries (also called Entries). Each group of buffer entries is a Range formed by merging two or more Ranges, which includes the bytes of the data to be deleted, the starting logical block address, and the logical block address length in the synthesized Range. The multiple groups of buffer entries are stored in the data buffer 123 in ascending order of the logical block address length, forming a first buffer list (also called Cache Trim List). In some embodiments, before performing Trim processing on each group of buffer entries one by one, the first buffer list is stored in the flash memory 122.

[0076] In step S430, perform Trim processing on each of the multiple groups of buffer entries one by one. After processing the buffer entry, delete the buffer entry from the first buffer list.

[0077] In some embodiments, perform Trim processing on each of the multiple groups of buffer entries in the first buffer list stored in the data buffer 123 in ascending order of the logical block address length. After processing each buffer entry, delete the buffer entry from the first buffer list stored in the data buffer 123.

[0078] In some embodiments, each LBA corresponds to a corresponding mapped address in the flash memory 122. The data corresponding to the LBA is stored in the physical pages of the flash memory 122. Each physical page contains multiple 4KB units. When one Sector is 512Byte, the length of the mapped address corresponding to one logical block of the LBA is 512Byte. Therefore, the minimum amount of data that can be deleted in an address range (Range) is 512Byte. The lengths of the mapped addresses of the LBAs included in each Range in the flash memory 122 are different. Some Ranges include LBAs whose mapped addresses in the flash memory 122 have a length less than one 4KB unit of the physical page. Such an address range that does not meet the 4KB size is called a Partial Trim, that is, an address range that is not 4K-aligned. And some Ranges include LBAs whose mapped addresses in the flash memory 122 are exactly equal to one or more 4KB units of the physical page. Such an address range that exactly meets the 4KB size and its multiples is called a 4K-aligned address range. A Trim command may simultaneously have 4K-aligned address ranges and address ranges that do not meet the 4KB size, and a Range may also simultaneously include 4K-aligned parts and non-4K-aligned parts. Therefore, a Range may only include 4K-aligned address ranges or only non-4K-aligned address ranges, or may simultaneously include 4K-aligned address ranges and non-4K-aligned address ranges.

[0079] In some embodiments, when performing Trim processing on a set of buffer items in the first buffer list stored in the data buffer 123, it is determined whether the buffer item includes a non-4K-aligned address range. If the buffer item includes a non-4K-aligned address range, the non-4K-aligned address range is split into a 4K-aligned address range part and a non-4K-aligned address range part. The non-4K-aligned address range part is deleted from the buffer item, and '0' is filled in the physical block address corresponding to the logical block address in the non-4K-aligned address range part in the flash memory 122.

[0080] It is easy to understand that after deleting the non-4K-aligned address range part from the buffer item, multiple sets of buffer items in the first buffer list stored in the data buffer 123 only include 4K-aligned address ranges.

[0081] In some embodiments, the first processing can be performed on the 4K-aligned address ranges in the buffer entries one by one. The first processing includes clearing the physical block addresses corresponding to the logical block addresses in the 4K-aligned address range in the L2P mapping table (Logical To Physical Table), clearing the corresponding bits on the valid bit map (VBM), and correspondingly updating the valid frag count (VFC). In some embodiments, the minimum mapping unit of the L2P mapping table is 4KB, that is, each logical allocation address (LAA) in the L2P mapping table corresponds to a 4KB-sized physical allocation address (PAA) in the flash memory 122. The valid bit map (VBM) can record which LAAs on each block have valid data. In the valid bit map (VBM), '0' and '1' are bit values. When the bit value is '0', it can indicate that there is no valid data in the corresponding LAA. When the bit value is '1', it can indicate that there is valid data in the corresponding LAA. The valid frag count (VFC) can record the number of valid LAAs on each block. It is easy to understand that the data corresponding to a certain logical block address in the solid-state drive 120 processed by the TRIM command becomes a fixed value of '0' or '0XFF' from the perspective of the host 111. For the data corresponding to the logical block addresses in the 4K-aligned address range, after performing the first processing on the 4K-aligned address ranges in the buffer entries, when looking up the L2P mapping table, the valid bit map, and the valid frag count, the tables are empty, just as if nothing has been written. When the host 111 reads, empty data is returned. For the data corresponding to the logical block addresses in the non-4K-aligned address range, since the data corresponding to the partial logical block addresses in the non-4K-aligned address range that have not undergone the first processing is still valid data and the tables cannot be empty when looking them up, the physical block addresses corresponding to the partial logical block addresses in the non-4K-aligned address range that have undergone the first processing can be filled with '0'. In this way, when the host 111 reads the data corresponding to these partial logical block addresses in the non-4K-aligned address range that have undergone the first processing, '0' is also returned. From the perspective of the host 111, this part of the data has been processed by the TRIM command.

[0082] In some embodiments, during the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, the host of the solid-state drive 120 may issue a garbage collection command. In some embodiments, in the case of executing a garbage collection command, the logical block address corresponding to the physical block address selected for garbage collection can be obtained. If the logical block address is included in the first buffer list stored in the data buffer 123, it is determined that the data in the selected physical block address is invalid data, and there is no need to read the invalid data corresponding to the logical block address from the flash memory anymore; if the logical block address is not included in the first buffer list stored in the data buffer 123, it is determined that the data in the selected physical block address is valid data, and the valid data is moved.

[0083] Figure 5B The figure shows a schematic diagram of the L2P mapping table, valid bitmap, and number of valid segments before executing the Trim command. As Figure 5B shown, before executing the Trim command, LAA0 to LAA7 in the L2P mapping table can represent 8 different logical allocation unit addresses, and PAAa to PAAh can represent the physical allocation unit addresses corresponding to each LAA. There are 4 VFCs of valid data in block n, and 12 VFCs of valid data in block n+m. Figure 5C The figure shows a schematic diagram of the L2P mapping table, valid bitmap, and number of valid segments after executing the Trim command. As Figure 5C shown, after executing the Trim command, the physical block addresses corresponding to LAA0 to LAA7 in the L2P mapping table are cleared. There is no valid data in block n, and there are 8 VFCs of valid data in block n+m. Referring to Figure 5B and Figure 5C , after executing the Trim command, there is no valid data in block n, and the space can be directly released without garbage collection. There are 8 LAAs with valid data in block n+m. Compared with before executing the Trim command, by executing the Trim command, the amount of data moved when executing the garbage collection command can be reduced.

[0084] In some embodiments, during the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, a situation where the solid-state drive 120 powers off normally may occur. In the case where the solid-state drive 120 powers off normally, the first buffer list stored in the data buffer 123 will be updated to the flash memory 122 before the normal power-off.

[0085] In some embodiments, during the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, a situation where the solid-state drive 120 experiences abnormal power-off may still occur. In some embodiments, when the solid-state drive 120 experiences abnormal power-off and the latest version of the first buffer list stored in the flash memory 122 is 'null', there is no need to restore the state of the solid-state drive 120 executing the TRIM command before the abnormal power-off.

[0086] In some embodiments, when the solid-state drive 120 experiences abnormal power-off and the latest version of the first buffer list stored in the flash memory 122 is not 'null', it is possible to determine, based on the SN, whether the latest version of the first buffer list stored in the flash memory 122 includes the logical block addresses of the data written to the flash memory 122 after this latest version of the first buffer list. It should be noted that the SN is the serial number of the data written to the flash memory 122, which is an 8-byte data, and the SN increases each time data is written to the flash memory 122. When the solid-state drive 120 is powered on again after abnormal power-off, the controller 121 can know the write order of the data in the flash memory 122 based on the SN. In some embodiments, if the latest version of the first buffer list includes the logical block addresses of the data written to the flash memory 122 after this latest version of the first buffer list, then the logical block addresses are deleted from the latest version of the first buffer list, and the updated latest version of the first buffer list after deleting the logical block addresses is updated to the data buffer 123, thereby restoring the state of the solid-state drive 120 executing the TRIM command before the abnormal power-off and ensuring that the TRIM command is not lost.

[0087] In some embodiments, when executing the TRIM command, the first buffer list stored in the data buffer 123 can be updated to the flash memory 122 according to a predetermined condition. It is easy to understand that the predetermined condition can be set based on the amount of data to be written to the flash memory 122 when refreshing the first buffer list stored in the data buffer 123 and the amount of data that needs to be restored to the first buffer list stored in the data buffer 123 in the case of abnormal power-off, so that the two are relatively balanced. For example, if the amount of data to be written to the flash memory 122 for refreshing the first buffer list once is 16KB, then it is more appropriate to refresh the first buffer list once every time Trim processing is performed on 16MB of data. When the amount of data processed by a single TRIM command exceeds 16MB, it is more appropriate to refresh the first buffer list every time a TRIM command is executed.

[0088] In step S440, according to the preset command priority, in the process of performing Trim processing on the multiple groups of buffer items one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer items is terminated, the first buffer list is stored in the flash memory, and after the first command is processed, the Trim processing continues to be performed on the multiple groups of buffer items one by one.

[0089] In some embodiments, during the process of performing Trim processing on multiple groups of buffer items in the first buffer list stored in the data buffer 123 one by one, the host of the solid-state drive 120 may send a first command (including a read / write command, a Trim command, and a command of a FW-related task) to the solid-state drive 120. According to the preset command priority, if a first command with a higher priority than the Trim command is received, the processing of the buffer items in the first buffer list stored in the data buffer 123 is terminated (i.e., the execution of the Trim command is terminated), and the first buffer list is stored in the flash memory 122 to record the relevant information of the current execution of the Trim command. After the first command is processed, the Trim processing continues to be performed on multiple groups of buffer items in the first buffer list stored in the data buffer 123 one by one. Thereby, the Trim command is processed in time according to the command priority, and the controllable optimization of the command response time is ensured.

[0090] In some embodiments, in the process of performing Trim processing on the multiple groups of buffer items one by one, if the preset execution time is exceeded, the controller 121 feeds back the instruction of the completion of the Trim command processing to the host 111 of the solid-state drive 120, and continues to process the unprocessed part of the Trim command in the background until all parts of the Trim command are actually processed. It is easy to understand that for the same Trim command execution method, the larger the capacity of the solid-state drive 120, the longer it will take for the solid-state drive 120 to actually execute the Trim command. However, since the feedback of the instruction of the completion of the Trim command processing to the host of the solid-state drive 120 is controllable by the controller 121 of the solid-state drive 120, as long as the time taken to reply to the host of the TRIM command processing is consistent, the host will not perceive the actual completion time taken by the solid-state drive 120 to execute the TRIM command. Therefore, when the preset execution time is exceeded, an instruction indicating that the Trim command processing is completed is fed back to the host of the solid-state drive 120. Although the solid-state drive 120 tells the host in advance that the TRIM command is completed, the solid-state drive 120 only needs to process the read / write commands within the LBA range of the TRIM command that the host may send, thereby ensuring that the time consumption for the solid-state drive 120 to execute the Trim command is controllable. The completion time of the Trim command executed by a large-capacity solid-state drive 120 and a small-capacity solid-state drive 120 can be made not much different.

[0091] In some embodiments, the termination condition can be set according to the preset command priority and the preset execution time. If a first command with a higher priority than the Trim command is received and the preset execution time of the Trim command is reached, the processing of the buffer items in the first buffer list stored in the data buffer 123 is terminated (i.e., the execution of the Trim command is terminated). After the first command is processed, the Trim processing is continued one by one for the multiple groups of buffer items in the first buffer list stored in the data buffer 123. For example, if a read command occurs or an abnormal event occurs during the execution of the TRIM command, the execution of the TRIM command is immediately stopped to execute the read command or abnormal event. For example, if a write command occurs during the execution of the TRIM command, the execution of the TRIM command is stopped after the execution time of the TRIM command reaches 100 milliseconds to execute the write command. For example, if a FW-related task needs to be performed during the execution of the TRIM command, a preset execution time of 100 milliseconds to 500 milliseconds can be set according to different task categories, and the execution of the TRIM command is stopped to perform the FW-related task after the preset execution time of the Trim command is reached.

[0092] In some embodiments, when the LBAs of the read / write command and the TRIM command overlap, when the controller 121 receives the TRIM command first sent by the host 111 and then receives the read / write command sent by the host 111, the controller 121 exits the execution of the TRIM command according to the command priority and processes the read / write command, so that the Trim command can be processed in time-sharing, reducing the response delay of other commands. If the write command is processed, the overlapping LBAs in the TRIM command will be removed, and there is no need to spend time to execute the TRIM of the overlapping LBAs; if the read command is processed, the host 111 will be replied with empty data for the overlapping LBAs, and there is no need to read the TRIMed data in the flash memory 122, thereby reducing unnecessary operations on the overlapping LBAs and reducing the execution time of the overall process to a certain extent. Optionally, the priority of the read command is higher than the priority of the write command. In some embodiments, during the execution of the Trim command, when a read command is received, the execution of the Trim command is immediately exited, and when a write command is received, the execution of the Trim command is exited after the TRIM command is executed for a period of time (e.g., 100 milliseconds) and the write command is processed.

[0093] In some embodiments, during the process of performing Trim processing on multiple groups of buffer items in the first buffer list stored in the data buffer 123 one by one, the solid-state drive 120 receives a read command, and if the first buffer list stored in the data buffer 123 includes the logical block address of the data to be read by the read command, a 'null' is directly replied to the host of the solid-state drive 120. If the first buffer list stored in the data buffer 123 does not include the logical block address of the data to be read by the read command, the read operation is performed normally.

[0094] In some embodiments, during the process of performing Trim processing on multiple groups of buffer entries in the first buffer list stored in the data buffer 123 one by one, when the solid-state drive 120 receives a write command, if the first buffer list stored in the data buffer 123 includes the first logical block address where the write command will write data, the first logical block address is deleted from the first buffer list stored in the data buffer 123, and the updated first buffer list is saved to the flash memory 122 according to a predetermined condition. As described above, the predetermined condition can be determined according to the amount of data to be written to the flash memory 122 and the amount of data for abnormal power-off recovery of the first buffer list. If the first logical block address is not included in the first buffer list, the write operation is normally performed.

[0095] In this way, when controlling the solid-state drive 120 to interrupt the TRIM command according to a preset command priority during the execution of the TRIM command and give priority to executing other commands (including read / write commands), the reaction delay of the solid-state drive 120 for executing other commands (including read / write commands) is reduced.

[0096] Figure 6 The figure shows a schematic diagram of a control device for a solid-state drive provided according to an embodiment of the present disclosure. The solid-state drive includes a controller and a flash memory, and the controller includes a data buffer. As Figure 6 shown, the control device includes a storage unit 610, an address range merging unit 620, and a Trim processing unit 630.

[0097] The storage unit 610 is configured to store a Trim command in the data buffer. The Trim command includes multiple address ranges, and each address range includes a starting logical block address and a logical block address length of the data to be deleted.

[0098] The address range merging unit 620 is configured to merge the address ranges in which the logical block addresses are consecutive and adjacent into multiple groups of buffer entries, and store the multiple groups of buffer entries in the data buffer to form a first buffer list.

[0099] The Trim processing unit 630 is configured to perform Trim processing on the multiple groups of buffer entries one by one. After processing the buffer entries, the buffer entries are deleted from the first buffer list. Among them, according to a preset command priority, during the process of performing Trim processing on the multiple groups of buffer entries one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer entries is terminated, the first buffer list is stored in the flash memory, and after the first command is processed, the Trim processing on the multiple groups of buffer entries is continued one by one.

[0100] Since the process of controlling the solid-state drive to execute the Trim command using the control method of the solid-state drive in the embodiments of the present disclosure has been described in detail in the method embodiments above, it will not be repeated here.

[0101] Embodiments of the present disclosure also provide an electronic device, such as Figure 7 shown, including a memory 720, a processor 710, and a program stored on the memory 720 and executable on the processor 710. When the program is executed by the processor 710, it can implement each process of the above-mentioned control method of the solid-state drive, and can achieve the same technical effects. To avoid repetition, it will not be repeated here.

[0102] Those of ordinary skill in the art can understand that all or part of the steps in the above-mentioned various methods can be completed by instructions, or by controlling related hardware through instructions. The instructions can be stored in a computer-readable storage medium and loaded and executed by a processor. For this reason, embodiments of the present disclosure also provide a storage medium, on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, it can implement each process of the above-mentioned control method of the solid-state drive.

[0103] Since the instructions stored in the storage medium can execute the steps in the control method of the solid-state drive provided by the embodiments of the present disclosure, the beneficial effects that can be achieved by the control method of the solid-state drive provided by the embodiments of the present disclosure can be realized. See the previous embodiments for details and will not be repeated here. The specific implementation of each of the above operations can be seen in the previous embodiments and will not be repeated here.

[0104] In summary, for the control method of the solid-state drive provided by the present disclosure, the Trim command is stored in the data buffer. The Trim command includes multiple address ranges, and the address range includes the starting logical block address and the logical block address length of the data to be deleted. Then, the address ranges with consecutive and adjacent logical block addresses are merged into multiple buffer items, and the multiple buffer items are stored in the data buffer to form a first buffer list. Trim processing is performed on the multiple buffer items one by one. After processing a buffer item, the buffer item is deleted from the first buffer list. Among them, according to the preset command priority, during the process of performing Trim processing on the multiple buffer items one by one, if a first command with a higher priority than the Trim command is received, the processing of the buffer item is terminated, and the first buffer list is stored in the flash memory. After processing the first command, continue to perform Trim processing on the multiple buffer items one by one. In this way, it is controlled that the solid-state drive interrupts the TRIM command and preferentially executes other commands (including read / write commands) according to the preset command priority during the execution of the TRIM command, reducing the response delay of the solid-state drive in executing other commands (including read / write commands).

[0105] Finally, it should be noted that: Obviously, the above embodiments are merely examples for clearly illustrating the present disclosure, rather than limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation manners here. And the obvious changes or modifications derived therefrom are still within the protection scope of the present disclosure.

Claims

1. A control method for a solid-state drive, the solid-state drive including a controller and a flash memory, the controller including a data buffer, the control method comprising: Store the Trim command in the data buffer, where the Trim command includes multiple address ranges, and each address range includes the starting logical block address and the logical block address length of the data to be deleted; Merge the address ranges with consecutive and adjacent logical block addresses therein into multiple groups of buffer entries, and store the multiple groups of buffer entries in the data buffer to form a first buffer list; Perform Trim processing on the multiple groups of buffer entries one by one. After processing a buffer entry, delete the buffer entry from the first buffer list; Wherein, according to a preset command priority, during the process of performing Trim processing on the multiple groups of buffer entries one by one, if a first command with a higher priority than the Trim command is received, terminate the processing of the buffer entry, store the first buffer list in the flash memory, and continue to perform Trim processing on the multiple groups of buffer entries one by one after processing the first command.

2. The control method according to claim 1, wherein, During the process of performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes: In the case of exceeding a preset execution time, feedback an instruction indicating that the Trim command processing is completed to the host of the solid-state drive, and continue to process the unprocessed part of the Trim command in the background until all parts of the Trim command are actually processed.

3. The control method according to claim 1, wherein, Performing Trim processing on the multiple groups of buffer entries one by one includes: Split the address ranges that are not 4K-aligned included in the buffer entry into a 4K-aligned address range part and a non-4K-aligned address range part; Delete the non-4K-aligned address range part from the buffer entry; Fill '0' in the physical block address corresponding to the logical block address in the non-4K-aligned address range part in the flash memory; Perform a first process on the 4K-aligned address ranges in the buffer entry one by one, where the first process includes clearing the physical block address corresponding to the logical block address in the 4K-aligned address range in the L2P mapping table, clearing the corresponding bit on the valid bitmap, and correspondingly updating the number of valid segments.

4. The control method according to claim 1, wherein, The first command includes a read command, and the control method further includes: If the first buffer list includes the logical block address of the data to be read by the read command, reply 'null' to the host of the solid-state drive.

5. The control method according to claim 1, wherein, The first command includes a write command, and the control method further includes: If the first buffer list includes the first logical block address where the write command will write data, delete the first logical block address from the first buffer list.

6. The control method according to claim 1, wherein, Before performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes: Store the first buffer list in the flash memory; During the process of performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes: In the case of normal power-off, update the first buffer list to the flash memory; In the case of abnormal power-off and the latest version of the first buffer list stored in the flash memory not being 'null', if the latest version of the first buffer list includes the second logical block address of the data written to the flash memory after the latest version of the first buffer list, then delete the second logical block address in the latest version of the first buffer list, and update the latest version of the first buffer list after deleting the second logical block address to the data buffer.

7. The control method according to claim 1, wherein, During the process of performing Trim processing on the multiple groups of buffer entries one by one, the control method further includes: In the case of performing garbage collection, obtain the third logical block address corresponding to the selected physical block address; If the third logical block address is included in the first buffer list, determine that the data in the selected physical block address is invalid data, and clear the invalid data; If the third logical block address is not included in the first buffer list, determine that the data in the selected physical block address is valid data, and move the valid data.

8. A control device for a solid-state drive, the solid-state drive including a controller and a flash memory, the controller including a data buffer, the control device comprising: A storage unit for storing a Trim command in the data buffer, the Trim command including multiple address ranges, and the address range including the starting logical block address and the logical block address length of the data to be deleted; An address range merging unit for merging the address ranges in which the included logical block addresses are consecutive and adjacent into multiple groups of buffer entries, and storing the multiple groups of buffer entries in the data buffer to form a first buffer list; A Trim processing unit for performing Trim processing on the multiple groups of buffer entries one by one. After processing the buffer entries, delete the buffer entries in the first buffer list. Among them, according to the preset command priority, during the process of performing Trim processing on the multiple groups of buffer entries one by one, if a first command with a higher priority than the Trim command is received, then terminate the processing of the buffer entries, store the first buffer list in the flash memory, and continue to perform Trim processing on the multiple groups of buffer entries one by one after processing the first command.

9. A solid-state drive, comprising: Flash memory; A controller, the controller includes a data buffer, and the controller is used to execute the method according to any one of claims 1 to 7. According to the preset command priority, during the process of performing Trim processing on multiple groups of buffer entries in the first buffer list storing the Trim command one by one, if a first command with a higher priority than the Trim command is received, then terminate the processing of the buffer entries, store the first buffer list in the flash memory, and continue to perform Trim processing on the multiple groups of buffer entries one by one after processing the first command.

10. An electronic device, comprising: A processor, a memory, and a program stored on the memory and executable on the processor. When the program is executed by the processor, it implements the steps of the method according to any one of claims 1 to 7.

11. A storage medium, on which a computer program or instruction is stored, and when the computer program or instruction is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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