Program flow tracing method and system for processor prototype verification

Abstract

The present invention provides a program flow tracing method and system for processor prototype verification, belonging to the field of computer technology. The method includes: determining whether the current program counter and the previous program counter are continuous based on an up-beat program counter, an up-beat instruction type signal value, a current program counter, and a counter obtained from a processor core to be tested; the counter is used to record the instruction length of the continuous instruction stream; when continuous, the counter is accumulated with different values based on the up-beat instruction type signal value; when discontinuous, a tuple data item is generated based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and the counter is updated to restart counting; the tuple data is used to restore the program instruction stream. The present invention can complete program flow tracing and identify abnormal discontinuous instruction streams by simply analyzing the program counter value.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular relates to a program flow tracing method and system for processor prototype verification. Background Art

[0002] Processor verification is a crucial step in processor R&D. Thorough testing and verification of processor designs before silicon tape-out ensures design correctness and performance as expected. Prototype-based verification uses programmable logic devices such as FPGAs (Field Programmable Gate Arrays) to simulate chip behavior. By enabling early hardware and software co-development and performance verification, it helps reduce costs, shorten chip time to market, and identify and fix design errors before tape-out, thereby improving chip design accuracy and reliability. However, the limited internal resources of FPGAs, such as logic, memory, and I / O pins, restrict the number and depth of signals that can be observed simultaneously during debugging. For example, a 10MHz verification platform generates 80MB of data per second just by observing a 64-bit program counter (PC), posing a significant challenge to the prototype verification platform's debug output ports.

[0003] Program flow tracing can help developers understand program behavior and identify potential problems and performance bottlenecks by recording key information during program execution, such as function calls and instruction execution. Program flow tracing is typically accomplished by recording changes in the program counter. To reduce the burden and hardware overhead of the recording process, existing tracing tools typically monitor branch instructions, record whether they jump, and then infer the instruction flow based on the program information running on the system under test. While this method can reduce the data generated during program flow tracing to a certain extent, it is typically used for debugging software development. During processor design, potential errors may cause instruction flow errors, such as incorrect instructions being retrieved, incorrect data being read, unreasonable exception triggering, or even errors in the program counter calculation logic design. These situations will result in abnormal and discontinuous program flow in the absence of branch instructions, and these errors are often not detected by the aforementioned tracing methods. Summary of the Invention

[0004] In view of this, the present invention aims at the debugging requirements of the processor prototype verification process and proposes a program flow tracing method and system for processor prototype verification. The method solves the technical problem that existing tracing methods cannot monitor instruction flow errors caused by processor design, such as incorrect instructions obtained, incorrect data read, unreasonable exception triggering, and program counter calculation logic design errors. The present invention can complete program flow tracking and identification of abnormal non-continuous instruction flow only by analyzing the program counter value.

[0005] In a first aspect, the present invention provides a program flow tracing method for processor prototype verification, the method comprising:

[0006] determining whether the current program counter and the previous program counter are continuous based on the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction stream;

[0007] When continuous, the counter accumulates different values according to different values of the upbeat instruction type signal;

[0008] When discontinuous, a tuple data is generated based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and the counter is updated to restart counting; the tuple data is used to restore the program instruction stream.

[0009] Furthermore, in the above-mentioned program flow tracing method for processor prototype verification, the method of restoring the program instruction flow according to the tuple data includes:

[0010] Read the tuple type field of this tuple to determine whether this tuple is an offset tuple or an original tuple;

[0011] If it is an original tuple, the program data field of the tuple read is the program counter of the tuple;

[0012] If it is an offset tuple, the program data field of the current tuple read is the offset data of the current tuple, and the program counter data obtained or calculated in the previous tuple is added to the offset data of the current tuple to obtain the program counter of the current tuple.

[0013] Furthermore, in the above-mentioned program flow tracing method for processor prototype verification, the method of restoring the program instruction flow according to the tuple data further includes:

[0014] Calculate the starting address and ending address of each continuous program stream according to the data of the program counter of the tuple and the instruction continuous length field of the tuple;

[0015] Combined with the disassembly file of the running program, all program addresses between the start address and the end address of the continuous program flow are intercepted and spliced in tuple order to determine the complete program flow.

[0016] In a second aspect, the present invention further provides a program flow tracing system for processor prototype verification, wherein the system is a prototype verification platform chip system including a processor core to be tested, and a program flow tracing module including a counter, a continuity judgment module, and a tuple generation module is connected to the prototype verification platform chip system;

[0017] The continuity determination module determines whether the current program counter and the previous program counter are continuous based on the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction stream;

[0018] When it is continuous, the continuous determination module causes the counter to accumulate different values according to different values of the up-beat instruction type signal;

[0019] When discontinuous, the tuple generation module generates a tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and updates the counter to restart counting; the tuple data is used to restore the program instruction stream.

[0020] Furthermore, in the program flow tracing system for processor prototype verification, when the current program counter is continuous with the previous program counter, the continuity determination module keeps the program counter value of the current continuous instruction stream unchanged;

[0021] When the current program counter is discontinuous with the previous program counter, the continuity determination module assigns the current program counter to the program counter of the current continuous instruction stream.

[0022] Furthermore, in the program flow tracing system for processor prototype verification, the continuity determination module determines whether the current program counter is continuous with the previous program counter based on the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test, including:

[0023] When the value of the counter reaches the maximum count value of the counter, determining that the current program counter is discontinuous with the previous program counter;

[0024] When the value of the counter does not reach the maximum count value of the counter, it is determined whether the current program counter and the up-beat program counter are continuous based on whether the instruction represented by the up-beat instruction type signal value is a compressed instruction and the difference between the current program counter and the up-beat program counter.

[0025] Furthermore, in the program flow tracing system for processor prototype verification, the tuple generation module generates a tuple data item based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, including:

[0026] Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream;

[0027] An offset tuple or an original tuple is generated based on the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple; the program data field stored in the original tuple is the program counter value of the current continuous instruction stream, and the program data field stored in the offset tuple is the absolute value of the difference; the instruction continuous length fields of the original tuple and the offset tuple are both the values of the counter sent to the tuple generation module; the original tuple and the offset tuple both include a tuple type field.

[0028] Furthermore, in the program flow tracing system for processor prototype verification, generating an offset tuple or generating an original tuple according to a relationship between the absolute value of the difference and the bit width of the offset field in the offset tuple includes:

[0029] If the absolute value of the difference is less than half the capacity of the offset field in the offset tuple, an offset tuple is generated;

[0030] If the absolute value of the difference is greater than or equal to half the capacity of the offset field in the offset tuple, the original tuple is generated.

[0031] Furthermore, in the above-mentioned program flow tracing system for processor prototype verification, the program flow tracing module further includes:

[0032] A first-in-first-out queue, used to cache the tuple data generated by the tuple generation module;

[0033] The compression module is used to encode and compress the tuple data cached in the first-in-first-out queue and then output it.

[0034] Furthermore, in the above-mentioned program flow tracing system for processor prototype verification, the system further includes a communication control module for controlling the program flow generated by the program flow tracing module to be output from the communication interface.

[0035] The program flow tracing method and system for processor prototype verification provided by the present invention can track program flow and identify abnormal, discontinuous instruction flows simply by analyzing the program counter value. No additional information, such as instruction type or jump target, is required; the entire program flow change process can be monitored solely through the program counter value. Furthermore, the program flow record encoding format provided by the embodiments of the present invention replaces the instruction address sequence with an encoded format, significantly reducing the amount of data that needs to be stored and output, effectively alleviating the pressure of input and output operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The drawings described herein are used to provide a further understanding of the embodiments of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0037] Figure 1 A flowchart of a program flow tracing method for processor prototype verification provided by an embodiment of the present invention;

[0038] Figure 2 A method according to an embodiment of the present invention Figure 1 A flow chart of a method for generating a tuple data restoration program instruction stream;

[0039] Figure 3 A schematic diagram of a tuple format provided by an embodiment of the present invention;

[0040] Figure 4 A schematic diagram of a program flow tracing system for processor prototype verification provided by an embodiment of the present invention;

[0041] Figure 5 for Figure 4 Schematic diagram of the program flow tracking module. DETAILED DESCRIPTION

[0042] The technical solution provided by the present invention is further described below with reference to the accompanying drawings and examples. It should be understood that the system structure and business scenarios provided in the embodiments of the present invention are mainly for illustrating possible implementation methods of the technical solution of the present invention and should not be interpreted as the sole limitation of the technical solution of the present invention. It is known to those skilled in the art that with the evolution of the system structure and the emergence of new business scenarios, the technical solution provided by the present invention is also applicable to similar technical problems.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present invention pertains. In the event of any inconsistency, the meanings herein described or derived from the contents described herein shall prevail. In addition, the terms used herein are for the purpose of describing the embodiments of the present invention only and are not intended to limit the present invention.

[0044] Figure 1 A flowchart of a program flow tracing method for processor prototype verification provided by an embodiment of the present invention. Figure 1 The method shown is used for a prototype verification platform system on chip (SoC) including a processor core to be tested.

[0045] To achieve the objectives of the present invention, a prototype verification platform system-on-chip (SoC) including a processor core under test maintains the following registers: a last program counter (Last PC), a current program counter (Current PC), a program trace pointer (Ptr), a last program trace pointer (LastPtr), a counter, a current instruction type signal value (Current Compress), and a last instruction type signal value (LastCompress). The last program counter is used to store the valid program counter inputted in the previous cycle; the current program counter is used to store the current program counter; the program trace pointer is used to store the program counter value of a continuous instruction stream, and this register takes the current program counter as input; the last program trace pointer is used to store the program counter value of the previous continuous instruction stream, and this register takes the program trace pointer as input; the counter is used to record the instruction length of the continuous instruction stream; the last instruction type signal value is used to store the valid instruction type signal value inputted in the previous cycle, and the current instruction type signal value is used to store the instruction type signal value of the current cycle. The length of instructions varies for different instruction set architectures (ISAs). For example, in the RISC-V architecture, instructions are divided into compressed instructions and non-compressed instructions. The length of compressed instructions is 2 bytes, and the length of non-compressed instructions is 4 bytes. Therefore, a signal needs to be added to distinguish whether it is a compressed instruction.

[0046] Optionally, embodiments of the present invention also maintain a trigger program counter (Trigger PC) for controlling the start of the program flow tracking module. This can be set by software or a debugger. When the current program counter matches the trigger program counter, the program flow tracking module starts and begins tracking the program flow. After the trigger program counter is set by software or a debugger, the program flow tracking module starts and begins monitoring changes in the trigger program counter. Program flow tracking is initiated when the program counter valid signal (PC Valid) is valid and the current program counter matches the trigger program counter.

[0047] like Figure 1 As shown, the program flow tracing method for processor prototype verification provided by an embodiment of the present invention includes:

[0048] Step 100: Determine whether the current program counter and the up-beat program counter are continuous based on the up-beat program counter, the up-beat instruction type signal value, the current program counter, and the counter obtained from the processor core to be tested.

[0049] When starting to monitor and track the program flow, the following registers need to be initialized: assign the current program counter to the upper program counter, assign the current instruction type signal value to the upper instruction type signal value, assign the current program counter to the program tracking pointer, initialize the upper program tracking pointer to 0, and initialize the counter to 0.

[0050] The program counter of the processor core is monitored during execution. When the program counter valid signal is valid, indicating that the current program counter input is valid, the upstream program counter, the upstream instruction type signal value, and the current program counter are read from the processor core. The continuity determination module combines the upstream program counter, the upstream instruction type signal value, the current program counter, and the counter to determine whether the current program counter is continuous with the upstream program counter, that is, whether the current program flow is continuous.

[0051] The continuity determination module may determine whether the current program counter is continuous with the previous program counter by, when the value of the counter reaches a maximum count value of the counter, determining that the current program counter is discontinuous with the previous program counter. If the value of the counter does not reach the maximum count value of the counter, determining whether the current program counter is continuous with the previous program counter based on whether the instruction indicated by the value of the previous instruction type signal is a compressed instruction and a difference between the current program counter and the previous program counter.

[0052] Step 101: When continuous, the counter accumulates different values according to the different values of the upbeat instruction type signal.

[0053] Specifically, the counter changes according to the value of the upper instruction type signal. If the upper instruction type signal value is 1, that is, the upper instruction is a compressed instruction, the counter increments by 1; if the upper instruction type signal value is 0, that is, the upper instruction is a non-compressed instruction, the counter increments by 2. The program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream remain unchanged. The current program counter is assigned to the upper program counter, and the current instruction type signal value is assigned to the upper instruction type signal value.

[0054] Step 102: When discontinuous, generate a tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and update the counter to restart counting; the tuple data is used to restore the program instruction stream.

[0055] Specifically, the continuity judgment module feeds the values of the program tracking pointer, the upper program tracking pointer, and the counter into the tuple generation module to generate tuple data. Simultaneously, the program tracking pointer is assigned to the upper program tracking pointer, the current program counter is assigned to the program tracking pointer, the counter is reset, the current program counter is assigned to the upper program counter, and the current instruction type signal value is assigned to the upper instruction type signal value.

[0056] Furthermore, the tuple generation module generates a tuple data including:

[0057] Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream;

[0058] Generate an offset tuple or the original tuple based on the absolute value of the difference and the capacity of the offset field in the offset tuple. If the absolute value of the difference is less than half the capacity of the offset field in the offset tuple, an offset tuple is generated; if the absolute value of the difference is greater than or equal to half the capacity of the offset field in the offset tuple, the original tuple is generated.

[0059] The program data field stored in the original tuple is the program counter value of the current continuous instruction stream, the program data field stored in the offset tuple is the absolute value of the program counter difference, and the instruction continuous length fields of the original tuple and the offset tuple are the values of the counter sent to the tuple generation module; the original tuple and the offset tuple both include a tuple type field. Figure 3 The tuple format generated by the tuple generation module shown is divided into two categories, namely offset tuples and original tuples.

[0060] The program flow tracing method for processor prototype verification provided by an embodiment of the present invention determines whether the current program counter is continuous with the previous program counter, and uses the judgment result to control the update of the program tracking pointer and the counter. In the case of discontinuity, the values of the program tracking pointer and the counter are used, combined with the value of the previous program tracking pointer, to generate tuple data in the corresponding tuple format. The method provided by an embodiment of the present invention completes the tracking of the program flow and the identification of abnormal non-continuous instruction flow by analyzing the program counter value. No additional information, such as instruction type, jump target, etc. is required. The change process of the entire program flow can be monitored only through the program counter value.

[0061] like Figure 2 As shown, according to Figure 1 The method for generating the tuple data restoration program instruction stream includes:

[0062] Step 200: Read the tuple type field of the current tuple to determine whether the current tuple is an offset tuple or an original tuple.

[0063] Step 201: If it is an original tuple, the program data field of the tuple read is the program counter of the tuple.

[0064] Step 202: If it is an offset tuple, the program data field of the current tuple read is the offset data of the current tuple, and the program counter data obtained or calculated in the previous tuple is added to the offset data of the current tuple to obtain the program counter of the current tuple.

[0065] For example, if Figure 3 As shown, the first byte of the tuple is read. The first bit of the first byte determines whether it is an original tuple or an offset tuple. If it is an original tuple, the following 8 bytes are read as the program counter data for the tuple. If it is an offset tuple, the following 2 bytes are read as the offset data for the tuple. The program counter data obtained or calculated from the previous tuple is added to the offset to obtain the program counter data for the current tuple.

[0066] Step 203: Calculate the start address and end address of each continuous program stream based on the program counter of the current tuple and the data of the instruction continuous length field of the current tuple.

[0067] Step 204: Combine the disassembly file of the running program, intercept all program addresses between the start address and the end address of the continuous program flow, and splice them in tuple order to obtain the complete program flow.

[0068] The program stream recording encoding format provided by the embodiment of the present invention can effectively reduce the amount of data that needs to be saved and output, and reduce the pressure of input and output operations.

[0069] like Figure 4 and Figure 5 As shown, an embodiment of the present invention provides a program flow tracing system for processor prototype verification, which is a prototype verification platform system-on-chip (SoC) that includes a processor core to be tested. The prototype verification platform SoC is connected to a program flow tracing module that includes a counter, a continuity determination module, and a tuple generation module. The program flow tracing module monitors the program counter (PC) from the processor core and generates program flow information. The program counter indicates the address corresponding to the instruction.

[0070] To achieve the objectives of the present invention, the program flow tracking module internally maintains the following registers: the last program counter (Last PC), the current program counter (Current PC), the program trace pointer (Ptr), the last program trace pointer (Last Ptr), a counter, the current instruction type signal value (Current Compress), and the last instruction type signal value (Last Compress). The last program counter is used to store the valid program counter inputted in the previous cycle; the current program counter is used to store the current program counter; the program trace pointer is used to store the starting program counter value of the continuous instruction stream, and this register uses the current program counter as input; the last program trace pointer is used to store the starting program counter value of the previous continuous instruction stream, and this register uses the program trace pointer as input; the counter is used to record the instruction length of the continuous instruction stream; the last instruction type signal value is used to store the valid instruction type signal value inputted in the previous cycle, and the current instruction type signal value is used to store the instruction type signal value of the current cycle. The length of instructions varies for different instruction set architectures (ISAs). For example, in the RISC-V architecture, instructions are divided into compressed instructions and non-compressed instructions. The length of compressed instructions is 2 bytes, and the length of non-compressed instructions is 4 bytes. Therefore, a signal needs to be added to distinguish whether it is a compressed instruction.

[0071] Optionally, the program flow tracking module also maintains a trigger program counter (Trigger Program Counter, Trigger PC) to control the program flow tracking module's operation. This can be set by software or a debugger. When the current program counter matches the trigger program counter, the program flow tracking module starts and begins tracking the program flow. After the trigger program counter is set by software or a debugger, the program flow tracking module starts and begins monitoring changes in the program counter. Program flow tracking begins when the program counter valid signal (PC Valid) is valid and the current program counter matches the trigger program counter.

[0072] When starting to monitor and track the program flow, the following registers need to be initialized: assign the current program counter to the upper program counter, assign the current instruction type signal value to the upper instruction type signal value, assign the current program counter to the program tracking pointer, initialize the upper program tracking pointer to 0, and initialize the counter to 0.

[0073] The program counter of the processor core is monitored during execution. When the program counter valid signal is valid, indicating that the current program counter input is valid, the continuity determination module reads the previous program counter, the previous instruction type signal value, and the current program counter from the processor core. The continuity determination module combines the previous program counter, the previous instruction type signal value, the current program counter, and the counter to determine whether the current program counter is continuous with the previous program counter, that is, whether the current program flow is continuous.

[0074] When it is determined that the current program counter is continuous with the previous program counter, the continuity judgment module causes the counter to accumulate different values according to the different values of the previous instruction type signal. Specifically, the counter changes according to the value of the previous instruction type signal. If the value of the previous instruction type signal is 1, that is, the previous instruction is a compressed instruction, the counter increments by 1; if the value of the previous instruction type signal is 0, that is, the previous instruction is a non-compressed instruction, the counter increments by 2. The program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream remain unchanged, that is, the program tracking pointer and the previous program tracking pointer remain unchanged, the current program counter is assigned to the previous program counter, and the current instruction type signal value is assigned to the previous instruction type signal value.

[0075] When the current program counter is determined to be discontinuous with the previous program counter, the tuple generation module generates a tuple based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the counter value, and simultaneously updates the counter to restart counting. The program flow tracing module outputs several tuples to generate a trace file, which can be used to restore the program instruction flow. By analyzing the tuples in the trace file, the entire program flow can be restored.

[0076] Specifically, the continuity judgment module feeds the values of the program tracking pointer, the upper program tracking pointer, and the counter into the tuple generation module to generate tuple data. Simultaneously, the program tracking pointer is assigned to the upper program tracking pointer, the current program counter is assigned to the program tracking pointer, the counter is reset, the current program counter is assigned to the upper program counter, and the current instruction type signal value is assigned to the upper instruction type signal value.

[0077] Alternatively, as Figure 5As shown, the tuple generation module pushes the generated tuple data into a first-in-first-out queue (FIFO) for temporary storage. To further compress the data and reduce the amount of output data, the present invention can use a compression module to further compress the data in the FIFO queue. The compression module can select and implement a specific compression algorithm as needed.

[0078] Alternatively, as Figure 4 As shown, the program flow tracing system for processor prototype verification, i.e., a prototype verification platform system-on-chip including a processor core to be tested, further includes a communication control module for controlling the output of the program flow generated by the program flow tracing module through a communication interface. The communication interface can be a medium- to low-speed communication interface.

[0079] The program flow tracing system for processor prototype verification provided by an embodiment of the present invention includes a continuity judgment module and a tuple generation module. The continuity judgment module is used to judge whether the current program counter value is continuous with the previous program counter value, and the judgment result is used to control the update of the program tracking pointer and the counter. The tuple generation module is used to use the values of the program tracking pointer and the counter, combined with the value of the previous program tracking pointer, to generate tuple data in the corresponding tuple format when it is judged to be discontinuous. The system can complete the tracking of program flow and the identification of abnormal non-continuous instruction flow only by analyzing the program counter value, without the need for additional information such as instruction type, jump target, etc., and can identify abnormal non-continuous instruction flow. For example, in the case of no branch instruction, the program counter value changes discontinuously, and the change process of the entire program flow can be monitored only by the program counter value.

[0080] Furthermore, the specific determination method of the continuity determination module for determining whether the current program counter value is continuous with the previous program counter value includes:

[0081] When the value of the counter reaches the maximum count value of the counter, it is determined that the current program counter value is discontinuous with the previous program counter value. Specifically, when the number of bits of the continuous length field in the tuple is N, the continuous length field can represent a maximum of 2 N When the counter size is greater than or equal to 2 N -2, it may not be possible to record a larger continuous length, so it is considered discontinuous in the present invention. For example, the continuous length field in the tuple is 7 bits, and the maximum continuous length field can represent 128, so when the counter size is greater than or equal to 126 (i.e. 2 7 -2) When a larger continuous length cannot be recorded, it is judged as discontinuous.

[0082] When the value of the counter has not reached the maximum count value of the counter, it is determined whether the current program counter value and the up-beat program counter value are continuous based on whether the instruction represented by the up-beat instruction type signal value is a compressed instruction and the difference between the current program counter and the up-beat program counter.

[0083] Specifically, when the counter size is less than 2 N -2, further judgment is made based on the value of the upper program counter type signal. When the upper program counter type signal value is 1, that is, the instruction corresponding to the upper program counter is a compressed instruction, if the current program counter is equal to the upper program counter plus 2, then the current program counter value is judged to be continuous with the upper program counter value; otherwise, it is discontinuous. When the upper program counter type signal value is 0, that is, the instruction corresponding to the upper program counter is not a compressed instruction, if the current program counter is equal to the upper program counter plus 4, then the current program counter value is judged to be continuous with the upper program counter value; otherwise, it is discontinuous.

[0084] Furthermore, the tuple generation module generates a tuple data including:

[0085] Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream;

[0086] Generate an offset tuple or the original tuple based on the absolute value of the difference and the capacity of the offset field in the offset tuple. If the absolute value of the difference is less than half the capacity of the offset field in the offset tuple, an offset tuple is generated; if the absolute value of the difference is greater than or equal to half the capacity of the offset field in the offset tuple, the original tuple is generated.

[0087] The offset field in the offset tuple has a width of N bits, so the capacity of the offset field is 2. N . Use the value of the program tracking pointer and the value of the previous program tracking pointer to subtract and get the program counter difference. If the absolute value of the difference is less than half of the capacity of the offset field in the offset tuple, that is, 2 N-1 , then an offset tuple is generated. For example, if the offset field in the offset tuple has a width of 16 bits, then the capacity of the offset field is 2 16 , if the absolute value of the difference is less than 2 15 That is, 32768, then an offset tuple is generated. Figure 3 As shown, when generating the offset tuple, the continuous length field in the offset tuple uses the value of the counter sent to the tuple generation module. The continuous length field in the offset tuple is represented by a 7-bit unsigned number, and the offset field uses the program counter difference, which is represented by a 16-bit signed number, that is: 2 N To indicate positive and negative, for example, 2 16is 65536, and 16 bits represent -32768~32767. Here, the maximum absolute value is 32767, which is less than 32768 (i.e. 2 15 ).

[0088] If the absolute value of the difference is greater than or equal to half the capacity of the offset field in the offset tuple, that is, 2 N-1 , then the original tuple is generated. Figure 3 As shown, when the original tuple is generated, the continuous length field in the original tuple uses the value of the counter sent to the tuple generation module, which is represented by a 7-bit unsigned number, and the program counter field uses the value of the program tracking pointer sent to the tuple generation module, which is represented by 64 bits.

[0089] The program data field stored in the original tuple is the program counter value of the current continuous instruction stream, the program data field stored in the offset tuple is the absolute value of the program counter difference, and the instruction continuous length fields of the original tuple and the offset tuple are the values of the counter sent to the tuple generation module; the original tuple and the offset tuple both include a tuple type field. Figure 3 As shown in the figure, the tuple formats generated by the tuple generation module are divided into two categories: offset tuples and raw tuples. Offset tuples require calculation to obtain the program counter value and are 24 bits (3 bytes). Raw tuples directly store the program counter value in the tuple, without requiring calculation. They are 72 bits (9 bytes). The first bit of the first byte of the tuple indicates the tuple type. A "1" indicates that the tuple is an offset tuple, and the following 23 bits belong to the tuple. The first 7 bits of these 23 bits are the run length, and the last 16 bits are the offset. A "0" indicates that the tuple is a raw tuple, and the next 71 bits belong to the tuple. The first 7 bits of these 71 bits are the run length, and the last 64 bits are the program counter. The run length indicates that several two-byte instructions are continuous. Assuming the run length is length, the program flow is continuous from the recorded or calculated program address addr1 to the program address addr1 + 2 × length.

[0090] After program flow tracing is complete, all program flow information is available, typically as a trace file consisting of several tuples. If a compression module is used in the program flow tracing module, the trace file must first be decompressed using the corresponding decompression algorithm. By analyzing the tuples in the trace file, the entire program flow can be restored.

[0091] It should be noted that the embodiments described in the present invention are only some of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention generally described and shown in the accompanying drawings can be arranged and designed in various different configurations. Therefore, the above detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of the present invention.

[0092] The words "first, second, third, etc." or module A, module B, module C and the like in the specification and claims are used only to distinguish similar objects and do not represent a specific ordering of the objects. It is understood that the specific order or sequence can be interchanged where permitted so that the embodiments of the invention described herein can be implemented in an order other than that illustrated or described herein.

[0093] In the above description, the numbers representing the steps involved do not necessarily mean that the steps must be executed. Intermediate steps may also be included or replaced by other steps. If permitted, the order of the previous and next steps may be interchanged or executed simultaneously.

[0094] The term "comprising" as used in the specification and claims should not be construed as limiting to what is listed thereafter; it does not exclude other elements or steps. Thus, it should be interpreted as specifying the presence of the features, integers, steps, or components mentioned, but not excluding the presence or addition of one or more other features, integers, steps, or components, or groups thereof. Thus, the expression "a device comprising means A and B" should not be limited to a device consisting solely of components A and B.

[0095] The reference to "one embodiment" or "an embodiment" in this specification means that the specific features, structures, or characteristics described in conjunction with the embodiment are included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing throughout this specification do not necessarily refer to the same embodiment, but may refer to the same embodiment. In addition, in the various embodiments of the present invention, unless otherwise specified or there is a logical conflict, the terms and / or descriptions of different embodiments are consistent and can be referenced to each other. The technical features of different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0096] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, all of which fall within the scope of protection of the present invention.

Claims

1. A program flow tracing method for processor prototype verification, characterized in that: The method comprises: determining whether the current program counter and the previous program counter are continuous based on the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction stream; When continuous, the counter accumulates different values according to different values of the upbeat instruction type signal; When discontinuous, a tuple data is generated based on the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and the counter is updated to restart counting; the tuple data is used to restore the program instruction stream.

2. The program flow tracing method for processor prototype verification according to claim 1, characterized in that: The method for restoring a program instruction stream according to the tuple data includes: Read the tuple type field of this tuple to determine whether this tuple is an offset tuple or an original tuple; If it is an original tuple, the program data field of the tuple read is the program counter of the tuple; If it is an offset tuple, the program data field of the current tuple read is the offset data of the current tuple, and the program counter data obtained or calculated in the previous tuple is added to the offset data of the current tuple to obtain the program counter of the current tuple.

3. The program flow tracing method for processor prototype verification according to claim 2, characterized in that: The method for restoring a program instruction stream according to the tuple data further includes: Calculate the starting address and ending address of each continuous program stream according to the data of the program counter of the tuple and the instruction continuous length field of the tuple; Combined with the disassembly file of the running program, all program addresses between the start address and the end address of the continuous program flow are intercepted and spliced in tuple order to determine the complete program flow.

4. A program flow tracing system for processor prototype verification, characterized in that: The system is a prototype verification platform chip system including a processor core to be tested, wherein a program flow tracking module including a counter, a continuity judgment module and a tuple generation module is connected to the prototype verification platform chip system; The continuity determination module determines whether the current program counter and the previous program counter are continuous based on the previous program counter, the previous instruction type signal value, the current program counter, and the counter obtained from the processor core under test; the counter is used to record the instruction length of the continuous instruction stream; When it is continuous, the continuous determination module causes the counter to accumulate different values according to different values of the up-beat instruction type signal; When discontinuous, the tuple generation module generates a tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, and updates the counter to restart counting; the tuple data is used to restore the program instruction stream.

5. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: When the current program counter is continuous with the previous program counter, the continuity determination module keeps the program counter value of the current continuous instruction stream unchanged; When the current program counter is discontinuous with the previous program counter, the continuity determination module assigns the current program counter to the program counter of the current continuous instruction stream.

6. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: The continuity determination module determines whether the current program counter and the up-beat program counter are continuous based on the up-beat program counter, the up-beat instruction type signal value, the current program counter, and the counter obtained from the processor core to be tested, including: When the value of the counter reaches the maximum count value of the counter, determining that the current program counter is discontinuous with the previous program counter; When the value of the counter does not reach the maximum count value of the counter, it is determined whether the current program counter and the up-beat program counter are continuous based on whether the instruction represented by the up-beat instruction type signal value is a compressed instruction and the difference between the current program counter and the up-beat program counter.

7. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: The tuple generation module generates a tuple data according to the program counter value of the current continuous instruction stream, the program counter value of the previous continuous instruction stream, and the value of the counter, including: Determine the absolute value of the difference between the program counter value of the current continuous instruction stream and the program counter value of the previous continuous instruction stream; An offset tuple or an original tuple is generated based on the relationship between the absolute value of the difference and the capacity of the offset field in the offset tuple; the program data field stored in the original tuple is the program counter value of the current continuous instruction stream, and the program data field stored in the offset tuple is the absolute value of the difference; the instruction continuous length fields of the original tuple and the offset tuple are both the values of the counter sent to the tuple generation module; the original tuple and the offset tuple both include a tuple type field.

8. The program flow tracing system for processor prototype verification according to claim 7, characterized in that: Generating an offset tuple or generating an original tuple according to a relationship between the absolute value of the difference and the bit width of the offset field in the offset tuple includes: If the absolute value of the difference is less than half the capacity of the offset field in the offset tuple, an offset tuple is generated; If the absolute value of the difference is greater than or equal to half the capacity of the offset field in the offset tuple, the original tuple is generated.

9. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: The program flow tracking module also includes: A first-in-first-out queue, used to cache the tuple data generated by the tuple generation module; The compression module is used to encode and compress the tuple data cached in the first-in-first-out queue and then output it.

10. The program flow tracing system for processor prototype verification according to claim 4, characterized in that: The system further includes a communication control module for controlling the program flow generated by the program flow tracking module to be output from the communication interface.

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