Method for monitoring speed drop bandwidth of PCIe equipment by BMC (Baseboard Management Controller)
Through BIOS, real-time monitoring of PCIe devices and sending status information to BMC, the problem that BMC cannot directly monitor PCIe device speed and bandwidth is solved, and timely monitoring and recording of PCIe device speed reduction and bandwidth reduction events is realized, and the management capabilities of the server system are improved.
Patent Information
- Application Number
- CN202311749490.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-19
- Publication Date
- 2025-06-20
AI Technical Summary
BMC cannot directly monitor the speed and bandwidth of PCIe devices, resulting in the inability to detect and deal with the speed reduction and bandwidth reduction problems of PCIe devices in a timely manner.
Each PCIe device is monitored in real time through BIOS, detects abnormal situations and sends current status information to BMC. The BMC analyzes this information to determine whether a speed-down or bandwidth reduction event occurs, and modify the corresponding status sensor data to device downgrade and save it to the log.
Improves BMC's remote monitoring and management capabilities of server systems, and can quickly identify and record slowdown and bandwidth reduction events of PCIe devices, thereby helping maintenance personnel quickly locate problems and solve them.
Smart Images

Figure CN120179488A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of PCIe devices, and particularly to a method for a BMC to monitor the speed reduction and bandwidth reduction of PCIe devices. Background Art
[0002] If the PCIe (Peripheral Component Interconnect Express) device connected to the host does not match the slot version; or there are multiple PCIe devices on the host sharing the bandwidth simultaneously and the data transmission volume of other devices is large; or an incorrect driver or firmware version, it may all lead to a performance degradation of the PCIe device, thereby resulting in speed reduction and bandwidth reduction of the PCIe device.
[0003] The speed reduction and bandwidth reduction of PCIe devices will bring some hazards and problems to the system: the reduced speed and bandwidth will cause a performance degradation of the PCIe device, and the device may not be able to transmit data at its designed maximum speed, affecting the overall performance and response speed of the system. It may also lead to an increase in data transmission latency, restricting the scalability of the system. The speed reduction and bandwidth reduction of PCIe devices may also cause data transmission errors or losses, further affecting the stability of the system, resulting in serious problems such as application crashes, data loss, or system freezes.
[0004] BMC (Board Manager Controller) is the baseboard management system on the server, and its main function is to remotely monitor and manage the server. An important function of the BMC is hardware monitoring and log collection. The BMC sensor can monitor various parameters of the server hardware. When a hardware failure occurs, the BMC can report an alarm through the sensor and analyze the hardware failure through log collection.
[0005] However, the BMC cannot directly monitor the speed and bandwidth of PCIe devices because the speed and bandwidth of PCIe devices are usually controlled and managed by the operating system and related drivers. Summary of the Invention
[0006] The present invention provides a method for a BMC to monitor the speed reduction and bandwidth reduction of PCIe devices, so as to solve the technical problem that the BMC side cannot directly monitor the speed and bandwidth of PCIe devices.
[0007] An embodiment of the present invention provides a method for a BMC to monitor the speed reduction and bandwidth reduction of PCIe devices, including:
[0008] BIOS (Basic Input / Output System) monitors each PCIe device in real time. When an abnormality is detected in a certain PCIe device, the current status information of the abnormal PCIe device is sent to the BMC;
[0009] The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event or a bandwidth reduction event has occurred in the PCIe device;
[0010] If the BMC determines that a PCIe device speed reduction event has occurred in the PCIe device, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation and PCIe device speed reduction information of the status sensor of the PCIe device to the log;
[0011] If the BMC determines that a PCIe device bandwidth reduction event has occurred in the PCIe device, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation and PCIe device bandwidth reduction information of the status sensor of the PCIe device to the log;
[0012] Among them, the BMC refers to the Baseboard Management Controller; the PCIe refers to the Peripheral Component Interconnect Express bus; the BIOS refers to the Basic Input / Output System.
[0013] Preferably, the BIOS monitors each PCIe device in real time. When an abnormality is detected in a certain PCIe device, sending the current status information of the abnormal PCIe device to the BMC includes:
[0014] The BIOS monitors each PCIe device in real time. When an abnormality is detected in a certain PCIe device, it determines whether the abnormal PCIe device is a speed reduction and / or bandwidth reduction fault;
[0015] When it is determined that the abnormal PCIe device is a speed reduction and / or bandwidth reduction fault, the current status information of the PCIe device is obtained, and the current status information is sent to the BMC through an Intelligent Platform Management Interface (IPMI) command.
[0016] Preferably, the current status information includes an index for identifying the PCIe device, a virtual sensor number for distinguishing whether the PCIe device is speed reduced or bandwidth reduced, the maximum speed and maximum bandwidth, and the current speed and current bandwidth.
[0017] Preferably, the BMC determines whether a PCIe device has a speed reduction event or a bandwidth reduction event by analyzing the current status information of the PCIe device sent by the BIOS, including:
[0018] The BMC obtains the virtual sensor number by analyzing the current status information of the PCIe device sent by the BIOS;
[0019] If the virtual sensor number is the speed reduction number, the BMC determines that the PCIe device has a speed reduction event;
[0020] If the virtual sensor number is the bandwidth reduction number, the BMC determines that the PCIe device has a bandwidth reduction event;
[0021] If the virtual sensor number is the speed reduction number and the bandwidth reduction number, the BMC determines that the PCIe device has both a speed reduction event and a bandwidth reduction event.
[0022] Preferably, the BMC determines whether a PCIe device has a speed reduction event or a bandwidth reduction event by analyzing the current status information of the PCIe device sent by the BIOS, further including:
[0023] The BMC obtains the maximum speed, the maximum bandwidth, the current speed, and the current bandwidth by analyzing the current status information of the PCIe device sent by the BIOS;
[0024] If the difference between the maximum speed and the current speed is greater than the preset speed threshold and the difference between the maximum bandwidth and the current bandwidth is not greater than the preset bandwidth threshold, the BMC determines that the PCIe device has a speed reduction event;
[0025] If the difference between the maximum bandwidth and the current bandwidth is greater than the preset bandwidth threshold and the difference between the maximum speed and the current speed is not greater than the preset speed threshold, the BMC determines that the PCIe device has a bandwidth reduction event;
[0026] If the difference between the maximum speed and the current speed is greater than the preset speed threshold and the difference between the maximum bandwidth and the current bandwidth is greater than the preset bandwidth threshold, the BMC determines that the PCIe device has both a speed reduction event and a bandwidth reduction event.
[0027] Preferably, if the BMC determines that the PCIe device has a PCIe device speed reduction event, modifying the status sensor data of the PCIe device to device degradation and saving the device degradation and PCIe device speed reduction information of the status sensor of the PCIe device to the log includes:
[0028] If the BMC determines that a PCIe device has a PCIe device downspeed event, it modifies the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifies the sensor-specific offset to bus degradation, so that the flag bit of the status sensor of the PCIe device is set;
[0029] The BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum rate, and current rate in the current status information to the system event log SEL log, so that users can view the downspeed alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode.
[0030] Preferably, the value for modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and at the same time the value for modifying the sensor-specific offset to bus degradation is 0x0b.
[0031] Preferably, if the BMC determines that a PCIe device has a PCIe device downbandwidth event, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the PCIe device downbandwidth information to the log, including:
[0032] If the BMC determines that a PCIe device has a PCIe device downbandwidth event, it modifies the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifies the sensor-specific offset to bus degradation, so that the flag bit of the status sensor of the PCIe device is set;
[0033] The BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum bandwidth, and current bandwidth in the current status information to the system event log SEL log, so that users can view the downbandwidth alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode.
[0034] Preferably, the value for modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and at the same time the value for modifying the sensor-specific offset to bus degradation is 0x0b.
[0035] Preferably, it further includes:
[0036] The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether the PCIe device has both a downspeed event and a downbandwidth event at the same time;
[0037] If the BMC determines that both a PCIe device downspeed event and a bandwidth reduction event occur simultaneously for a PCIe device, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the current status information to the System Event Log (SEL) log, so that the user can view the downspeed and bandwidth reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode;
[0038] Among them, modifying the status sensor data of the PCIe device to device degradation includes modifying the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifying the sensor-specific offset to bus degradation.
[0039] The beneficial effect of the present invention is that it improves the remote monitoring and management capabilities of the BMC for the server system. Especially when the server host crashes due to the downspeed and bandwidth reduction of the PCIe device, the maintenance personnel only need to log in to the BMC to view the reported alarms, and they can analyze the cause of the host crash, so as to quickly locate the problem and solve the fault. Description of the Drawings
[0040] Figure 1 is a flowchart of a method for a BMC to monitor the downspeed and bandwidth reduction of a PCIe device provided by the present invention;
[0041] Figure 2 is a flowchart of a BIOS to monitor the downspeed and bandwidth reduction of a PCIe device provided by the present invention;
[0042] Figure 3 is a flowchart of a BMC to monitor the downspeed and bandwidth reduction of a PCIe device provided by the present invention;
[0043] Figure 4 is a schematic diagram of the Add SEL Entry command format provided by the present invention;
[0044] Figure 5 is a schematic diagram of the SEL Event Records format provided by the present invention;
[0045] Figure 6 is a description schematic diagram of the Sensor Type Codes provided by the present invention;
[0046] Figure 7 is a flowchart of a method for a BMC to monitor the downspeed and bandwidth reduction of a PCIe device provided by the present invention. Detailed Embodiments
[0047] It should be understood that the specific embodiments described herein are merely used to explain the present invention and are not intended to limit the present invention. In the following description, suffixes such as "module", "component" or "unit" used to represent elements are only for the convenience of describing the present invention and have no specific meaning in themselves. Therefore, "module", "component" or "unit" can be used interchangeably.
[0048] The technical solution adopted by the present invention is as follows: First, the BMC adds a new PCIe status sensor to monitor the status of PCIe devices. When the host is powered on and the PCIe device is in place, if the BIOS monitors that the PCIe device has a speed reduction and bandwidth reduction, the BIOS will send a standard IPMI command to the BMC. After receiving the IPMI command reported by the BIOS and analyzing which specific PCIe device has a speed reduction and bandwidth reduction fault, the BMC changes the Sensor Type (sensor type) of the corresponding PCIe status sensor to Critical Interrupt (critical interrupt), and the corresponding Sensor Specific Offset (sensor specific offset) to Bus Degraded (bus degradation), and then records it in the SEL (System Event Log). In this way, when the PCIe device has a speed reduction and / or bandwidth reduction, the user can log in to the BMC web interface or use the ipmitool tool to view the alarm information generated by the corresponding PCIe device's speed reduction and bandwidth reduction in the SEL log list.
[0049] Figure 7 It is a flowchart of the method for the BMC to monitor the speed reduction and bandwidth reduction of PCIe devices provided by the present invention, as Figure 7 shown, including:
[0050] Step S201: The BIOS monitors each PCIe device in real time. When it finds that a certain PCIe device has an abnormality, it sends the current status information of the abnormal PCIe device to the BMC;
[0051] Step S202: The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event or a bandwidth reduction event of the PCIe device occurs;
[0052] Step S203: If the BMC determines that a PCIe device has a PCIe device speed reduction event, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation and PCIe device speed reduction information of the status sensor of the PCIe device to the log;
[0053] Step S204: If the BMC determines that a PCIe device has a PCIe device bandwidth reduction event, modify the status sensor data of the PCIe device to device degradation, and save the device degradation and PCIe device bandwidth reduction information of the status sensor of the PCIe device to the log.
[0054] Further, the BIOS monitors each PCIe device in real time. When it is found that a certain PCIe device has an abnormality, the current status information of the abnormal PCIe device is sent to the BMC, including: The BIOS monitors each PCIe device in real time. When it is found that a certain PCIe device has an abnormality, it is determined whether the abnormal PCIe device has a speed reduction and / or bandwidth reduction fault; when it is determined that the abnormal PCIe device has a speed reduction and / or bandwidth reduction fault, the current status information of the PCIe device is obtained, and the current status information is sent to the BMC through an Intelligent Platform Management Interface (IPMI) command. Among them, the current status information includes an index for identifying the PCIe device, a virtual sensor number for distinguishing whether the PCIe device has a speed reduction or a bandwidth reduction, a maximum speed and a maximum bandwidth, and a current speed and a current bandwidth.
[0055] Specifically, the BMC determines whether the PCIe device has a speed reduction event or a bandwidth reduction event by analyzing the current status information of the PCIe device sent by the BIOS, including: The BMC analyzes the current status information of the PCIe device sent by the BIOS to obtain the virtual sensor number; if the virtual sensor number is the speed reduction number, the BMC determines that the PCIe device has a speed reduction event; if the virtual sensor number is the bandwidth reduction number, the BMC determines that the PCIe device has a bandwidth reduction event; if the virtual sensor number is both the speed reduction number and the bandwidth reduction number, the BMC determines that the PCIe device has both a speed reduction event and a bandwidth reduction event.
[0056] Specifically, the BMC determines whether a PCIe device has a speed reduction event or a bandwidth reduction event by analyzing the current status information of the PCIe device sent by the BIOS, which further includes: the BMC obtains the maximum speed, maximum bandwidth, current speed, and current bandwidth by analyzing the current status information of the PCIe device sent by the BIOS; if the difference between the maximum speed and the current speed is greater than a preset speed threshold and the difference between the maximum bandwidth and the current bandwidth is not greater than a preset bandwidth threshold, the BMC determines that the PCIe device has a speed reduction event; if the difference between the maximum bandwidth and the current bandwidth is greater than a preset bandwidth threshold and the difference between the maximum speed and the current speed is not greater than a preset speed threshold, the BMC determines that the PCIe device has a bandwidth reduction event; if the difference between the maximum speed and the current speed is greater than a preset speed threshold and the difference between the maximum bandwidth and the current bandwidth is greater than a preset bandwidth threshold, the BMC determines that the PCIe device has both a speed reduction event and a bandwidth reduction event.
[0057] Further, if the BMC determines that the PCIe device has a PCIe device speed reduction event, modifying the status sensor data of the PCIe device to device degradation and saving the device degradation and PCIe device speed reduction information of the status sensor of the PCIe device to the log includes: if the BMC determines that the PCIe device has a PCIe device speed reduction event, modifying the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifying the sensor-specific offset to bus degradation to set the flag bit of the status sensor of the PCIe device; the BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum speed, and current speed in the current status information to the system event log SEL log so that the user can view the speed reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode. Among them, the value of modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and the value of modifying the sensor-specific offset to bus degradation is 0x0b.
[0058] Further, if the BMC determines that a PCIe device has a PCIe device bandwidth reduction event, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the PCIe device bandwidth reduction information to the log, including: if the BMC determines that a PCIe device has a PCIe device bandwidth reduction event, it modifies the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifies the sensor-specific offset to bus degradation, so that the flag of the status sensor of the PCIe device is set; the BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum bandwidth, and current bandwidth in the current status information to the system event log SEL log, so that the user can view the bandwidth reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode. Among them, the value of modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and the value of modifying the sensor-specific offset to bus degradation is 0x0b.
[0059] The embodiment of the present invention further includes: the BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether the PCIe device has a speed reduction event and a bandwidth reduction event at the same time; if the BMC determines that the PCIe device has a PCIe device speed reduction event and a bandwidth reduction event at the same time, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the current status information to the system event log SEL log, so that the user can view the speed reduction and bandwidth reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode; among them, modifying the status sensor data of the PCIe device to device degradation includes modifying the sensor type of the status sensor of the PCIe device to a critical interrupt, and at the same time modifying the sensor-specific offset to bus degradation.
[0060] In the present invention, when the host is powered on and the PCIe device is in place, if the BIOS monitors that the PCIe device has a speed reduction and bandwidth reduction, it will send a standard IPMI command to the BMC to report the fault. After the BMC receives the fault information reported by the BIOS and processes it, it records this fault information in the SEL log to implement the BMC monitoring of the PCIe device speed reduction and bandwidth reduction.
[0061] Figure 1 is a flowchart of a method for a BMC to monitor the speed reduction and bandwidth reduction of a PCIe device provided by the present invention, as Figure 1 shown, including:
[0062] Step S101: The BIOS monitors the situation of each PCIe device in real time in the powered-on state;
[0063] Step S102: The BIOS detects that a certain PCIe device has its speed or bandwidth reduced.
[0064] Step S103: The BIOS sends the current status information of this PCIe device to the BMC.
[0065] Step S104: The BMC analyzes the current status of the PCIe device sent by the BIOS.
[0066] Step S105: The BMC determines that a speed or bandwidth reduction event has occurred for this PCIe device.
[0067] Step S106: The BMC modifies the sensor status of this PCIe device to device degradation.
[0068] Step S107: The BMC saves the speed or bandwidth reduction event of this PCIe device to the system log.
[0069] Embodiment 1
[0070] As shown in the Figure 2 attachment, when the host is powered on and the PCIe device is in place, if the PCIe device experiences a speed or bandwidth reduction, the BIOS reports this fault information to the BMC via IPMI commands. The reporting method is that the BIOS calls the standard IPMI command Add SELEntry (Add System Log Entry) and sends the fault information to the BMC via the command.
[0071] As shown in the Figure 4 attachment, the formats of the request data and response data of the Add SEL Entry command in the ipmi spec. The data format of the Request Data is as shown in the Figure 5 attachment.
[0072] The BIOS follows the format as shown in the Figure 5The format of the 16 - byte Request Data part is used to send IPMI commands to the BMC. In it, the 11th byte, Sensor Type, is set to Critical Interrupt, and the 12th byte, Sensor#, is set to the virtual Sensor Number (sensor number) of the current PCIe device reported by the BIOS, which is used to distinguish between speed reduction and bandwidth reduction. For example, the speed reduction is set to 0xa0, and the bandwidth reduction is set to 0xa1. For different projects, the speed reduction number and the bandwidth reduction number are different, that is, the speed reduction number and the bandwidth reduction number should be determined according to the specific project. The 14th byte, Event Data1 (event data 1), is set to the Index of the PCIe device (i.e., which PCIe device it is currently), the 15th byte, Event Data2 (event data 1), is set to the maximum speed and / or bandwidth of the current PCIe device, and the 16th byte, Event Data3 (event data 3), is set to the current speed and / or bandwidth of the current PCIe device. If the Completion Code in the Response Data part does not return 80h or 81h, it means the transmission is successful.
[0073] Example: ipmitool raw 0x0a 0x44 0x00 0x00 0x02 0x00 0x00 0x00 0x00 0x20 0x00 0x04 0x13 0x53 0x6f 0x01 0x10 0x08
[0074] Embodiment 2
[0075] As Figure 3 As shown, first, the BMC adds a PCIe status sensor, with the type being a discrete sensor. Then, configure the sensor driver, compile and install it. Next, add this sensor in the BMC according to the discussed Sensor Number, Sensor Type, Sensor Name, etc.
[0076] When the BMC receives the IPMI command for PCIe device speed reduction and bandwidth reduction sent by the BIOS, it further confirms whether PCIe device speed reduction and / or PCIe device bandwidth reduction has occurred according to the IPMI command for PCIe device speed reduction and bandwidth reduction sent by the BIOS. If the current command is for PCIe device speed reduction and / or bandwidth reduction, the BMC changes the Sensor Type of this PCIe status sensor to Critical Interrupt (value 0x13) and the Sensor Specific Offset to Bus Degraded (value 0x0b) (the PCIe status sensor only alarms that device degradation has occurred, but whether it is speed reduction or bandwidth reduction specifically is confirmed by the fault information recorded in the SEL log). Then when the PCIe device experiences speed reduction or bandwidth reduction and reports it through the BIOS, the BMC will record an SEL log similar to "Critical Interrupt|PCIex_Status|Bus Degraded|Asserted". The reason for the modification is that the Sensor Type of the status type sensor is usually set to Entity Presence (entity presence), but there is no Bus Degraded (device degradation) in the event description corresponding to this type of Offset. Descriptions of the two Sensor Types are as Figure 6 shown.
[0077] After the modification, when the BMC receives the information about PCIe device speed reduction and / or bandwidth reduction sent by the BIOS, the BMC can first record this status in the corresponding PCIe device sensor, set the flag of the PCIe device sensor, and then record this fault information (only the bandwidth reduction fault information and / or speed reduction fault information) in the SEL log.
[0078] In summary, the BMC adds a PCIe status sensor for monitoring the status of PCIe devices. After the BMC receives the IPMI command reported by the BIOS, it changes the Sensor Type of the corresponding PCIe status sensor to Critical Interrupt and the corresponding Sensor Specific Offset to Bus Degraded (bus degradation); after the PCIe device reduces speed and bandwidth, the sensor type and description of the PCIe status sensor recorded in the SEL log.
[0079] The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, and thus do not limit the scope of the rights of the present invention. Any modifications, equivalent replacements, and improvements made by those skilled in the art without departing from the scope and essence of the present invention shall fall within the scope of the rights of the present invention.
Claims
1. A method for BMC to monitor the speed and bandwidth reduction of PCIe devices, characterized in that, The method includes: The BIOS monitors each PCIe device in real time. When it is found that a certain PCIe device has a speed reduction or bandwidth reduction, the current status information of the PCIe device with the speed reduction or bandwidth reduction is sent to the BMC. The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event or a bandwidth reduction event has occurred for the PCIe device. If the BMC determines that a PCIe device has a PCIe device speed reduction event, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the PCIe device speed reduction information to the log. If the BMC determines that a PCIe device has a PCIe device bandwidth reduction event, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the PCIe device bandwidth reduction information to the log. Wherein, the BMC refers to the Baseboard Management Controller; the PCIe refers to the Peripheral Component Interconnect Express bus; the BIOS refers to the Basic Input / Output System.
2. The method according to claim 1, characterized in that, The BIOS monitors each PCIe device in real time. When it is found that a certain PCIe device has an abnormality, sending the current status information of the abnormal PCIe device to the BMC includes: The BIOS monitors each PCIe device in real time. When it is found that a certain PCIe device has an abnormality, it determines whether the abnormal PCIe device has a speed reduction and / or bandwidth reduction fault. When it is determined that the abnormal PCIe device has a speed reduction and / or bandwidth reduction fault, the current status information of the PCIe device is obtained, and the current status information is sent to the BMC through an Intelligent Platform Management Interface (IPMI) command.
3. The method according to claim 1 or 2, characterized in that, The current status information includes an index for identifying the PCIe device, a virtual sensor number for distinguishing whether the PCIe device has a speed reduction or a bandwidth reduction, the maximum speed and maximum bandwidth, and the current speed and current bandwidth.
4. The method according to claim 3, characterized in that, The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event or a bandwidth reduction event has occurred for the PCIe device, including: The BMC analyzes the current status information of the PCIe device sent by the BIOS to obtain the virtual sensor number. If the virtual sensor number is the speed reduction number, the BMC determines that the PCIe device has a speed reduction event. If the virtual sensor number is the bandwidth reduction number, the BMC determines that the PCIe device has a bandwidth reduction event. If the virtual sensor number is the speed reduction number and the bandwidth reduction number, the BMC determines that the PCIe device has both a speed reduction event and a bandwidth reduction event.
5. The method according to claim 3, characterized in that, The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event or a bandwidth reduction event has occurred for the PCIe device, and further includes: The BMC analyzes the current status information of the PCIe device sent by the BIOS to obtain the maximum speed and maximum bandwidth, and the current speed and current bandwidth. If the difference between the maximum rate and the current rate is greater than a preset rate threshold and the difference between the maximum bandwidth and the current bandwidth is not greater than a preset bandwidth threshold, the BMC determines that a PCIe device deceleration event has occurred; If the difference between the maximum bandwidth and the current bandwidth is greater than a preset bandwidth threshold and the difference between the maximum rate and the current rate is not greater than a preset rate threshold, the BMC determines that a PCIe device bandwidth reduction event has occurred; If the difference between the maximum rate and the current rate is greater than a preset rate threshold and the difference between the maximum bandwidth and the current bandwidth is greater than a preset bandwidth threshold, the BMC determines that a PCIe device deceleration event and a bandwidth reduction event have occurred simultaneously.
6. The method according to claim 4 or 5, characterized in that, If the BMC determines that a PCIe device deceleration event has occurred for the PCIe device, the status sensor data of the PCIe device is modified to device degradation, and the device degradation of the status sensor of the PCIe device and the PCIe device deceleration information are saved to the log, including: If the BMC determines that a PCIe device deceleration event has occurred for the PCIe device, the sensor type of the status sensor of the PCIe device is modified to a critical interrupt, and at the same time, the sensor-specific offset is modified to bus degradation, causing the flag of the status sensor of the PCIe device to be set; The BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum rate, and current rate in the current status information to the system event log SEL log, so that the user can view the deceleration alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode.
7. The method according to claim 6, characterized in that, The value for modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and at the same time, the value for modifying the sensor-specific offset to bus degradation is 0x0b.
8. The method according to claim 4 or 5, characterized in that, If the BMC determines that a PCIe device bandwidth reduction event has occurred for the PCIe device, the status sensor data of the PCIe device is modified to device degradation, and the device degradation of the status sensor of the PCIe device and the PCIe device bandwidth reduction information are saved to the log, including: If the BMC determines that a PCIe device bandwidth reduction event has occurred for the PCIe device, the sensor type of the status sensor of the PCIe device is modified to a critical interrupt, and at the same time, the sensor-specific offset is modified to bus degradation, causing the flag of the status sensor of the PCIe device to be set; The BMC saves the device degradation of the status sensor of the PCIe device and the index, virtual sensor number, maximum bandwidth, and current bandwidth in the current status information to the system event log SEL log, so that the user can view the bandwidth reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode.
9. The method according to claim 8, characterized in that, The value for modifying the sensor type of the status sensor of the PCIe device to a critical interrupt is 0x13, and at the same time, the value for modifying the sensor-specific offset to bus degradation is 0x0b.
10. The method according to claim 1, characterized in that, It also includes: The BMC analyzes the current status information of the PCIe device sent by the BIOS to determine whether a speed reduction event and a bandwidth reduction event occur simultaneously for the PCIe device; If the BMC determines that a speed reduction event and a bandwidth reduction event occur simultaneously for the PCIe device, it modifies the status sensor data of the PCIe device to device degradation, and saves the device degradation of the status sensor of the PCIe device and the current status information to the system event log SEL log, so that the user can view the speed reduction and bandwidth reduction alarm information of the PCIe device in the status sensor monitoring mode or the SEL log mode; Among them, modifying the status sensor data of the PCIe device to device degradation includes modifying the sensor type of the status sensor of the PCIe device to a critical interrupt, and simultaneously modifying the sensor-specific offset to bus degradation.
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