PCB Circuit Board Defect Detection Method and System Based on Image Recognition

Abstract

The present application proposes a method and system for detecting defects in PCB circuit boards based on image recognition. Among them, the method includes: comparing the preset production parameters of the PCB circuit board with the monitored production parameters to obtain deviation attribute time series information; retrieving the design model based on the PCB circuit board model and performing grid segmentation; traversing the grid area and determining the area where the defect trigger frequency is higher than the threshold as the risk area; constructing an image acquisition conical area and a circuit board activity area; configuring multiple pose sets to achieve full coverage of the PCB circuit board; through the analysis of the minimum intersection-over-union ratio of the risk areas, obtaining the target pose set to guide the pose adjustment mechanism to collect multi-angle images for defect detection. Through intelligent pose planning with deviation analysis and risk area priority, redundant image acquisition is reduced, the consumption of computing resources is lowered, and the efficiency of defect detection of PCB circuit boards is improved.

Description

Technical Field

[0001] The present application relates to the field of image processing, and in particular to a method and system for detecting PCB circuit board defects based on image recognition. Background Art

[0002] Currently, for the detection of PCB circuit board defects, the attitude of the PCB circuit board is mainly adjusted through a mechanical structure or the position of the camera is moved to collect images of the PCB circuit board from multiple angles. Then, an image recognition model is used to analyze and process the collected images to identify various defects on the PCB circuit board, such as open circuits, short circuits, missing soldering, false soldering, and missing components.

[0003] However, when performing multi-angle image acquisition for the existing PCB circuit board defect detection, fixed and preset shooting angle combinations are often used, resulting in the frequent shooting of a large number of redundant images. This not only prolongs the detection time but also makes the image recognition model need to process a large amount of unnecessary data, consuming excessive computing resources, causing obvious waste of resources, and reducing production efficiency. Summary of the Invention

[0004] In view of the technical problem in the prior art that redundant images are easily captured during multi-angle rotation in the process of PCB circuit board defect detection, resulting in excessive consumption of computing power by the model and waste of resources, the present application provides a method and system for detecting PCB circuit board defects based on image recognition to solve this problem.

[0005] The technical solutions of the present application for solving the above technical problems are as follows:

[0006] In a first aspect, the present application provides a method for detecting PCB circuit board defects based on image recognition, including: comparing the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute timing information; based on the PCB circuit board model, retrieving the PCB circuit board design model and performing grid segmentation based on a preset side length to obtain a number of PCB circuit board grid regions; traversing the number of PCB circuit board grid regions to retrieve a number of defect trigger frequencies that meet the deviation attribute timing information, and adding the grid regions with defect trigger frequencies greater than or equal to the defect trigger frequency threshold to the risk region; based on the image acquisition parameters of the image acquisition device, constructing an image acquisition conical region, and based on the attitude adjustment mechanism, constructing a circuit board activity region; combining the image acquisition conical region and the circuit board activity region to configure a number of PCB circuit board attitude sets that cover the entire PCB circuit board; performing the minimum intersection-over-union analysis of the risk region on the number of PCB circuit board attitude sets to obtain the target PCB circuit board attitude set, and initializing the attitude adjustment mechanism to collect multi-angle images of the PCB circuit board to perform defect detection.

[0007] In a second aspect, the present application provides a PCB circuit board defect detection system based on image recognition, including: a parameter deviation analysis module for comparing the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute timing information; a grid area division module for retrieving the PCB circuit board design model based on the PCB circuit board model and performing grid segmentation based on a preset side length to obtain a number of PCB circuit board grid areas; a risk area identification module for traversing the number of PCB circuit board grid areas, retrieving a number of defect trigger frequencies that meet the deviation attribute timing information, and adding the grid areas with a defect trigger frequency greater than or equal to the defect trigger frequency threshold to the risk area; an area construction module for constructing an image acquisition conical area based on the image acquisition parameters of the image acquisition device and constructing a circuit board activity area based on the attitude adjustment mechanism; an attitude set configuration module for configuring a plurality of PCB circuit board attitude sets that cover the entire PCB circuit board in combination with the image acquisition conical area and the circuit board activity area; and an optimal attitude selection module for performing the minimum intersection-over-union analysis of the risk area on the plurality of PCB circuit board attitude sets to obtain a target PCB circuit board attitude set, and initializing the attitude adjustment mechanism to collect multi-angle images of the PCB circuit board to perform defect detection.

[0008] The beneficial effects of the present application are:

[0009] By comparing the preset production parameters of the PCB circuit board in the design stage with the monitored production parameters of the PCB circuit board during the actual production process, the attributes of the parameter deviation and its time variation law are analyzed, the timing information of the deviation attributes is obtained, and basic data is provided for subsequent determination of high-risk defect areas. Based on the PCB circuit board model, the PCB circuit board design model is retrieved, and grid segmentation is performed based on the preset side length to obtain several PCB circuit board grid areas. The design model is obtained according to the specific model of the PCB circuit board, and the entire circuit board is divided into multiple grid areas according to the preset side length size, which is convenient for subsequent refined management and analysis of different areas of the circuit board. Traverse several PCB circuit board grid areas, retrieve several defect trigger frequencies that meet the timing information of the deviation attributes, and add the grid areas where the defect trigger frequency is greater than or equal to the defect trigger frequency threshold to the risk areas. Analyze each divided grid area, calculate the defect trigger frequency of each area according to the obtained timing information of the deviation attributes, and mark the areas higher than the preset threshold as risk areas, realizing the intelligent identification of risk areas. Based on the image acquisition parameters of the image acquisition device, an image acquisition conical area is constructed, and based on the attitude adjustment mechanism, a circuit board activity area is constructed. According to the parameters of the image acquisition device (such as focal length, field of view angle, etc.), the spatial coverage range of image acquisition is constructed, and at the same time, according to the activity limitations of the attitude adjustment mechanism, the adjustable activity range of the circuit board is constructed, providing spatial constraint conditions for subsequent determination of the optimal attitude set. Combining the image acquisition conical area and the circuit board activity area, multiple PCB circuit board attitude sets that cover the entire PCB circuit board are configured. Under the constraints of the constructed image acquisition conical area and the circuit board activity area, multiple attitude combination schemes that can completely cover the entire PCB circuit board are calculated to ensure the comprehensiveness of defect detection. Perform the minimum intersection-over-union analysis of the risk areas for multiple PCB circuit board attitude sets to obtain the target PCB circuit board attitude set. Initialize the attitude adjustment mechanism to collect multi-angle images of the PCB circuit board for defect detection. By analyzing the coverage efficiency of each attitude set for the identified risk areas, select the attitude set with the minimum intersection-over-union of the risk areas as the final detection attitude combination, reduce the redundancy of image acquisition, and guide the attitude adjustment mechanism to collect multi-angle images for defect detection according to this optimal attitude set, improving the detection efficiency.

[0010] Through the above technical solutions, intelligent attitude planning based on the analysis of PCB circuit board production parameter deviations and risk area prioritization is realized, significantly reducing the acquisition of redundant images, reducing the consumption of computing resources, and improving the efficiency of PCB circuit board defect detection. Description of the Drawings

[0011] Figure 1 It is a schematic flowchart of the method for detecting PCB circuit board defects based on image recognition provided by this application;

[0012] Figure 2 Schematic structural diagram of the PCB circuit board defect detection system provided by the present application based on image recognition.

[0013] In the accompanying drawings, the components represented by each reference numeral are as follows:

[0014] Parameter deviation analysis module 11, grid area division module 12, risk area identification module 13, area construction module 14, pose set configuration module 15, optimal pose selection module 16. Specific implementation manners

[0015] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present application.

[0016] In the description of the present application, the terms "first" and "second" are only used for descriptive purposes, and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality of" means two or more, unless otherwise specifically defined.

[0017] In the description of the present application, the term "for example" is used to mean "used as an example, illustration, or explanation". Any embodiment described as "for example" in the present application is not necessarily construed as being more preferred or more advantageous than other embodiments. In order to enable any person skilled in the art to implement and use the present application, the following description is given. In the following description, details are set forth for the purpose of explanation. It should be understood that those skilled in the art can recognize that the present application can be implemented without using these specific details. In other instances, well-known structures and processes will not be described in detail to avoid unnecessary details from obscuring the description of the present application. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the broadest scope that conforms to the principles and features disclosed in the present application.

[0018] Embodiment 1, as Figure 1 shown, the embodiment of the present application provides a method for detecting defects in a PCB circuit board based on image recognition, which is applied to a PCB circuit board defect detection system, and the system is communicatively connected to a pose adjustment mechanism and an image acquisition device.

[0019] Specifically, the PCB circuit board defect detection method based on image recognition provided by the embodiments of the present application is applied to a PCB circuit board defect detection system. The PCB circuit board defect detection system is communicatively connected to a posture adjustment mechanism and an image acquisition device.

[0020] The PCB circuit board defect detection system, as the core processing unit, is responsible for executing the PCB circuit board defect detection method. The posture adjustment mechanism is used to control the spatial position and angle of the PCB circuit board, enabling it to rotate and move flexibly in three-dimensional space, thereby achieving multi-angle and all-round detection of the PCB circuit board; the posture adjustment mechanism includes, but is not limited to, a multi-degree-of-freedom robotic arm, a rotating platform, a multi-axis linkage mechanism, etc., which can accurately adjust the position and angle of the PCB circuit board to ensure the accuracy of the image acquisition process. The image acquisition device is responsible for obtaining high-definition image data of the PCB circuit board, and may include a high-resolution industrial camera, a microscope system, a light source device, etc.; the image acquisition device can capture the surface details of the PCB circuit board under different lighting conditions and at different angles, providing raw data for subsequent image recognition and defect detection. The PCB circuit board defect detection system establishes a stable data transmission channel with the posture adjustment mechanism and the image acquisition device through a communication interface to achieve instruction issuance and data upload. This communication connection can adopt wired connections (such as industrial Ethernet, RS485, USB, etc.) or wireless connections (such as Wi-Fi, Bluetooth, etc.) to ensure the collaborative work and information sharing among the components.

[0021] Through this architecture design, the present application can achieve precise positioning of the PCB circuit board, high-quality image acquisition, and efficient defect recognition, providing technical support for improving the manufacturing quality of the PCB circuit board.

[0022] The PCB circuit board defect detection method includes:

[0023] S1. Compare the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute time series information.

[0024] Specifically, the preset production parameters of the PCB circuit board are ideal parameter values formulated according to design specifications and quality standards, including but not limited to key production indicators such as line width, line spacing, pad size, hole diameter, etc. For example, the preset line width of a certain type of PCB circuit board is 0.1 mm, the pad diameter is 0.5 mm, the through-hole diameter is 0.3 mm, etc. At the same time, during the actual production process, the monitored production parameters of the PCB circuit board are obtained in real time through devices such as a laser measurement system and an optical scanner, reflecting the parameter status during the actual manufacturing process of the PCB circuit board. The monitored production parameters of the PCB circuit board may deviate from the preset parameters due to reasons such as equipment accuracy, material characteristics, and environmental factors.

[0025] Subsequently, compare the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board, and systematically analyze the differences between the two. Such differences not only include static numerical deviations, but more importantly, correlate and analyze these deviations according to the time series to form deviation attribute time series information. For example, if at time t1, the line width deviation is +0.01 mm and the line pitch deviation is -0.02 mm; at time t2, the line width deviation is +0.015 mm and the line pitch deviation is -0.025 mm, then record the trend of these deviations changing over time to form complete deviation attribute time series information.

[0026] This deviation attribute time series information reflects the deviation characteristics of each parameter of the PCB circuit board changing over time during the production process, providing a data basis for the precise positioning of subsequent defect areas. Through this comparison mechanism, abnormal change trends during the production process can be effectively captured, and these trends are often the precursors or direct causes of PCB circuit board defects.

[0027] S2. Based on the PCB circuit board model, retrieve the PCB circuit board design model, and perform grid segmentation based on the preset side length to obtain several PCB circuit board grid regions.

[0028] First, according to the specific model information of the PCB circuit board to be detected, that is, the PCB circuit board model, retrieve the corresponding PCB circuit board design model from the database or storage system. The PCB circuit board design model is usually stored in the form of Gerber files, ODB++ formats or other electronic design automation files, and contains detailed structural information of the circuit board, such as design data such as circuit traces, component layouts, and pad positions. For example, for a PCB circuit board with the model ABC-123, the corresponding design file ABC-123.gbr or ABC-123.odb++ etc. will be automatically retrieved and loaded.

[0029] After retrieving the PCB circuit board design model, perform grid segmentation operations based on the preset side length. The preset side length refers to the side length dimension of each grid unit when dividing the PCB circuit board into regular grids, and this parameter can be flexibly set according to the complexity of the PCB circuit board, the component density, and the detection accuracy requirements. For example, for high-density interconnect boards, a smaller preset side length value such as 5 mm × 5 mm can be set; for simple single-layer boards, a larger preset side length such as 20 mm × 20 mm can be used.

[0030] Through grid segmentation processing, the entire PCB circuit board is divided into several PCB circuit board grid areas. Each PCB circuit board grid area has a unique spatial coordinate identifier, which is convenient for subsequent precise positioning and analysis. These PCB circuit board grid areas can be represented as R(i, j), where i and j represent the index values of the grid in the horizontal and vertical directions respectively. Among them, the implementation of grid segmentation can adopt image segmentation algorithms in computer graphics, such as region-based segmentation methods, edge-based segmentation methods, etc. In actual operation, the two-dimensional plane coordinates of the PCB circuit board are mapped into a grid structure set according to the preset side length, ensuring that each PCB circuit board grid area can accurately correspond to the actual physical area on the PCB circuit board.

[0031] Through this grid processing, not only the standardized description of the detection space of the PCB circuit board is realized, but also a spatial reference basis for subsequent risk area identification and optimized image acquisition is provided, effectively improving the accuracy and efficiency of defect detection.

[0032] S3. Traverse the several PCB circuit board grid areas, retrieve several defect trigger frequencies that meet the deviation attribute timing information, and add the grid areas with defect trigger frequencies greater than or equal to the defect trigger frequency threshold to the risk area.

[0033] Specifically, first, traverse the obtained several PCB circuit board grid areas. The traversal process adopts a one-by-one inspection method to ensure that each PCB circuit board grid area is fully analyzed without missing any possible defect risk points. During the traversal process, for each PCB circuit board grid area, retrieve the defect trigger frequency associated with the obtained deviation attribute timing information. The defect trigger frequency refers to the historical frequency statistical value of defects occurring in this PCB circuit board grid area under specific deviation attribute timing information. For example, when a certain PCB circuit board grid area has a line width deviation of +0.015mm and a line pitch deviation of -0.025mm in the deviation attribute timing information, and 100 PCB circuit boards of the same type have been detected historically, and 10 defects have been detected in this area, then the defect trigger frequency of this area corresponding to this deviation attribute timing information is 10%. During the process of retrieving several defect trigger frequencies, use the defect records in the historical quality inspection database for statistical analysis. For each PCB circuit board grid area, calculate the defect trigger frequency under the current deviation attribute timing information respectively. These defect trigger frequencies form several defect trigger frequencies that correspond one-to-one with the PCB circuit board grid areas, reflecting the defect risk levels of each area of the PCB circuit board.

[0034] Subsequently, the defect trigger frequencies of each PCB circuit board grid area are compared with a preset defect trigger frequency threshold. The defect trigger frequency threshold is a critical value determined by an expert group based on statistical principles and actual production experience, and is used to determine whether a PCB circuit board grid area has a high defect risk. For example, if the defect trigger frequency threshold is set to 5%, it means that when the defect trigger frequency of a certain PCB circuit board grid area is greater than or equal to 5%, that area is considered to have a high defect risk. After that, the PCB circuit board grid areas with defect trigger frequencies greater than or equal to the defect trigger frequency threshold are marked and added to the risk area, providing a decision basis for subsequent optimization of the image acquisition strategy.

[0035] Through this risk area identification method, it is possible to specifically determine the areas on the PCB circuit board where defects are most likely to occur, laying a foundation for subsequent precise detection and improving the efficiency and accuracy of defect detection.

[0036] S4. Based on the image acquisition parameters of the image acquisition device, construct an image acquisition conical area, and based on the attitude adjustment mechanism, construct a circuit board activity area.

[0037] Specifically, constructing the image acquisition conical area and the circuit board activity area provides spatial constraint conditions for subsequent optimization of the detection attitude of the PCB circuit board.

[0038] First, construct an image acquisition conical area based on the image acquisition parameters of the image acquisition device. The image acquisition parameters include, but are not limited to, technical parameters such as focal length, field of view angle, depth of field, resolution, etc. These parameters jointly determine the spatial acquisition ability and range of the image acquisition device. For example, when the focal length of the image acquisition device is 50 mm and the field of view angle is 60°, its effective acquisition range presents a three-dimensional conical space that expands outward with the optical center of the image acquisition device as the vertex. The mathematical expression of the image acquisition conical area can be described using a three-dimensional coordinate system, where the cone vertex is located at the optical center position of the image acquisition device ( , , ), the opening angle of the cone is determined by the field of view angle , and the height range of the cone is determined by the depth of field parameter. For example, if the depth of field range of the image acquisition device is from 10 mm to 500 mm, the effective range of the image acquisition conical area in the z-axis direction is , . The image acquisition conical area can be expressed as a set of spatial points {( , , )| }.

[0039] Meanwhile, an active area of the circuit board is constructed based on the posture adjustment mechanism. The active area of the circuit board refers to the set of all possible positions that the PCB circuit board can reach under the control of the posture adjustment mechanism, that is, the motion space range of the PCB circuit board. The posture adjustment mechanism usually has multiple degrees of freedom, such as translation, rotation, etc. The combination of these degrees of freedom determines the possible active range of the PCB circuit board. When constructing the active area of the circuit board, the mechanical structure limitations of the posture adjustment mechanism need to be considered, such as the length of the robotic arm, the range of rotation angle, the load capacity, etc. For example, if the posture adjustment mechanism has , , and Z-axis translations and six degrees of freedom of rotation around , , and Z axes, then the active area of the circuit board can be represented as a subset in a six-dimensional space, that is, {( , , , , , ) | , , ,

[0040] , , }}, where T represents the translation parameter and R represents the rotation parameter.

[0041] The construction of the image acquisition conical area and the active area of the circuit board provides spatial constraint conditions for subsequently determining the optimal PCB circuit board detection posture. By analyzing the spatial relationship between these two areas, it can be determined which parts of the PCB circuit board can be effectively captured by the image acquisition device in a specific posture, thereby providing a theoretical basis for posture optimization. This method based on spatial analysis enables defect detection to accurately control the position and posture of the PCB circuit board in three-dimensional space, ensuring that key areas, especially risk areas, can be collected with high quality, thereby improving the accuracy and efficiency of defect detection.

[0042] S5. Combine the image acquisition conical area and the active area of the circuit board to configure multiple PCB circuit board posture sets that cover the entire PCB circuit board.

[0043] Specifically, first, based on the constructed image acquisition conical area and the active area of the circuit board, perform spatial geometric analysis and interactive calculations. The image acquisition conical area defines the effective acquisition range of the image acquisition device at each spatial position, while the active area of the circuit board specifies all the spatial positions that the PCB circuit board can reach. By analyzing the spatial relationship between these two areas, it can be determined which parts of the PCB circuit board can be effectively captured in which PCB circuit board postures.

[0044] Full coverage of the PCB circuit board means ensuring that every surface point of the PCB circuit board is effectively captured by the image acquisition device in at least one posture through the combination of multiple PCB circuit board postures. Specifically, the PCB circuit board surface is first discretized into a point set { , ,…, }, then for each discrete point , calculate the discrete point under which PCB circuit board postures When configuring multiple PCB board posture sets, first, generate an initial PCB board posture set A containing a large number of candidate postures = { , ,…, }, each posture It is defined by position and angle parameters, such as =( , , , , , ). Then, for each posture , calculate the PCB circuit board surface point set that can be effectively collected under this posture Then, according to the principle of full coverage of PCB circuit boards, posture subsets are selected from the initial PCB circuit board posture set A to form multiple different PCB circuit board posture sets { , ,…, For each PCB board posture set Contains multiple specific postures { , ,…, }, the surface point sets corresponding to these postures are , ,…, The union of the postures can cover the entire PCB surface, that is, ,in Indicated in posture The point set that can be effectively collected.

[0045] Through the multi-posture set configuration method based on the full coverage principle, it is ensured that every area on the PCB circuit board surface can be effectively inspected, avoiding the generation of detection blind spots, providing candidate solutions for subsequent optimized posture selection, and providing support for achieving efficient defect detection.

[0046] S6. Analyze the minimum intersection-over-union value of the risk regions for the multiple PCB circuit board pose sets to obtain the target PCB circuit board pose set, and initialize the pose adjustment mechanism to collect multi-angle images of the PCB circuit board for defect detection.

[0047] Specifically, first, analyze the minimum intersection-over-union value of the risk regions for the configured multiple PCB circuit board pose sets. Specifically, for each PCB circuit board pose set, calculate the coverage effect of all pose combinations in this PCB circuit board pose set on the risk region, that is, for each pose in each PCB circuit board pose set calculate the ratio of the intersection to the union of the risk regions that can be covered by the specific poses included therein, which reflects the coverage efficiency of this PCB circuit board pose set for the risk region. Through the minimum intersection-over-union value analysis, find the PCB circuit board pose set with the highest coverage efficiency for the risk region. The smaller the intersection-over-union value, the less the overlapping coverage area between different poses and the less redundant acquisition under the premise of ensuring full coverage of all risk regions.

[0048] By calculating the intersection-over-union of the risk region coverage for each PCB circuit board pose set, sort and compare all PCB circuit board pose sets. Select the PCB circuit board pose set with the minimum intersection-over-union value as the target PCB circuit board pose set. For example, if the intersection-over-union value of pose set is 0.3, the intersection-over-union value of pose set is 0.5, and the intersection-over-union value of pose set is 0.2, then select as the target PCB circuit board pose set. After obtaining the target PCB circuit board pose set, initialize the pose adjustment mechanism and sequentially adjust the spatial position and angle of the PCB circuit board according to each pose defined in the target PCB circuit board pose set. At each pose, trigger the image acquisition device to obtain the PCB circuit board image at the corresponding angle. These multi-angle images efficiently cover the comprehensive information on the surface of the PCB circuit board, especially the accurate capture of the risk region. Then, perform defect detection on the collected multi-angle images to identify various possible defects on the surface of the PCB circuit board.

[0049] Through the method based on the minimum intersection-over-union value analysis, the pose set with the highest coverage efficiency can be selected, which can minimize redundant image acquisition while ensuring full coverage of the surface of the PCB circuit board, optimize the use of computing resources, and improve the efficiency and accuracy of PCB circuit board defect detection.

[0050] Furthermore, compare the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain the deviation attribute time series information, including:

[0051] S11. Perform multi - valued processing on the preset production parameters of the PCB circuit board to obtain the multi - valued timing information of the preset production parameters;

[0052] S12. Perform multi - valued processing on the monitored production parameters of the PCB circuit board to obtain the multi - valued timing information of the monitored production parameters;

[0053] S13. Extract the non - consistent attributes at the same time of the multi - valued timing information of the preset production parameters and the multi - valued timing information of the monitored production parameters to obtain the deviation attribute timing information.

[0054] Specifically, first, obtain the preset production parameters of the PCB circuit board. These parameters are determined by design specifications and quality standards and are the standard parameter values in the ideal state. Subsequently, perform multi - valued processing on the preset production parameters of the PCB circuit board. Multi - valued processing is a method of expanding a single parameter value into an ordered parameter interval, aiming to enhance the expression ability and fault tolerance of the parameters. The core of multi - valued processing lies in converting discrete parameter values into continuous parameter intervals and establishing a reasonable tolerance range for each parameter. For example, for the line width parameter, if the preset value is 0.1 mm, the tolerance interval obtained after multi - valued processing may be [0.095 mm, 0.105 mm]; for the pad diameter, if the preset value is 0.5 mm, the tolerance interval obtained after multi - valued processing may be [0.485 mm, 0.515 mm]. These tolerance intervals can be dynamically adjusted based on production experience, equipment accuracy, and quality requirements. Multi - valued processing not only considers the static value of the parameter but also its time - dimension characteristics, forming the multi - valued timing information of the preset production parameters, which includes the change of the tolerance intervals of each parameter at different times and can more comprehensively describe the parameter characteristics in the production process of the PCB circuit board.

[0055] Similar to S11, perform multi - valued processing on the monitored production parameters of the PCB circuit board collected during the actual production process. The monitored production parameters are the actual parameter values obtained in real - time through various sensors and measurement devices and reflect the actual state in the manufacturing process of the PCB circuit board. The multi - valued processing of the monitored production parameters of the PCB circuit board needs to consider measurement errors and data fluctuations and convert the discrete monitored data into parameter intervals with statistical significance. For example, if the monitored value of the line width at a certain moment is 0.103 mm and considering the measurement error of ±0.002 mm, the parameter interval [0.101 mm, 0.105 mm] can be obtained after multi - valued processing. By performing multi - valued processing on the monitored production parameters of the PCB circuit board at multiple time points, the multi - valued timing information of the monitored production parameters is formed, which reflects the time - varying characteristics of each parameter in the actual manufacturing process of the PCB circuit board.

[0056] Subsequently, by comparing the multi-valued timing information of the preset production parameters and the multi-valued timing information of the monitored production parameters, the non-consistent attributes at the same moment of the two are extracted, so as to obtain the deviation attribute timing information. The non-consistent attribute refers to the parameter attribute where there is no intersection or a small intersection between the multi-valued interval of the preset parameter and the multi-valued interval of the monitored parameter. For each moment t, analyze the relationship between the multi-valued interval P(t) of the preset parameter and the multi-valued interval M(t) of the monitored parameter. When P(t) ∩ M(t) = or |P(t) ∩ M(t)| / |P(t) ∪ M(t)| is less than the predefined threshold, it is considered that the parameter at this moment has a non-consistent attribute. For example, at the moment t1, if the multi-valued interval of the preset parameter of the line width is [0.095mm, 0.105mm], and the multi-valued interval of the monitored parameter is [0.107mm, 0.112mm], since there is no intersection between the two intervals, the line width parameter has a non-consistent attribute at the moment t1; while at the moment t2, if the multi-valued interval of the preset parameter of the line pitch is [0.15mm, 0.17mm], and the multi-valued interval of the monitored parameter is [0.16mm, 0.18mm], since there is an intersection [0.16mm, 0.17mm] between the two intervals, and the intersection-union ratio is 0.33. If the threshold is set to 0.3, it is not considered that the line pitch parameter at the moment t2 has a non-consistent attribute. By extracting and integrating the non-consistent attributes of all moments and all parameters, a complete deviation attribute timing information is formed, which reflects which parameters deviate from the preset values at which moments during the production process of the PCB circuit board, providing accurate data support for subsequent defect area positioning and defect detection.

[0057] Through the comparison method based on multi-valued processing and non-consistent attribute extraction, compared with the traditional simple threshold comparison, it can capture parameter deviation information more comprehensively and accurately, improving the accuracy and sensitivity of defect detection.

[0058] Furthermore, perform multi-valued processing on the preset production parameters of the PCB circuit board to obtain the multi-valued timing information of the preset production parameters, including:

[0059] S111. Obtain the first production control attribute of the preset production parameters of the PCB circuit board;

[0060] S112. Configure the initial deviation threshold of the first production control attribute through the user terminal;

[0061] S113. Configure a zero-tolerance constraint for the preset production parameters other than the first production control attribute, configure a first tolerance constraint for the preset production parameters of the first production control attribute based on the initial deviation threshold, and collect several PCB circuit board quality identification information, where the PCB circuit board quality identification information includes a qualified identification and an abnormal identification;

[0062] S114. Based on the qualified mark and the abnormal mark, count the qualified probability of the PCB circuit boards for the quality mark information of the several PCB circuit boards;

[0063] S115. Based on the qualified probability of the circuit boards, determine whether the loop stop condition is satisfied. If it is satisfied, set the initial deviation threshold as the interval division deviation threshold;

[0064] S116. Based on the interval division deviation threshold, with the first production control attribute setting value as the 0 point, construct a multi-valued function in the positive and negative directions of the 0 point;

[0065] S117. Perform multi-valued processing on the preset production parameters of the first production control attribute according to the multi-valued function to obtain the multi-valued time series information of the first production control attribute, and add it to the multi-valued time series information of the preset production parameters.

[0066] In a preferred implementation, first, identify and obtain the first production control attribute from the preset production parameters of the PCB circuit boards. The first production control attribute refers to any one of the production control attributes in the preset production parameters of the PCB circuit boards, such as line width, line pitch, pad diameter, copper thickness, etc. After obtaining the first production control attribute, configure the initial deviation threshold of this attribute through the user terminal. The user terminal is the operation interface of the production management system, allowing engineers or managers to set the initial deviation threshold according to experience and product requirements. The initial deviation threshold defines the initial range within which the first production control attribute is allowed to deviate from the preset value. For example, if the first production control attribute is line width and its preset value is 0.1 mm, the initial deviation threshold may be set to ±0.01 mm, indicating that the deviation of the line width within the range of [0.09 mm, 0.11 mm] may be accepted. Among them, the setting of the initial deviation threshold needs to consider factors such as manufacturing process capabilities, product performance requirements, and historical production data.

[0067] Then, implement two different fault tolerance constraint configurations: configure zero fault tolerance constraint for the preset production parameters of non-first production control attributes, and configure the first fault tolerance constraint for the preset production parameters of the first production control attribute based on the initial deviation threshold. Zero fault tolerance constraint means that the parameters of non-first production control attributes are not allowed to have any deviation and must strictly follow the preset values. The first fault tolerance constraint, however, allows the first production control attribute to fluctuate within the range defined by the initial deviation threshold. After configuring the fault tolerance constraint, collect the quality identification information of several PCB circuit boards. The quality identification information includes qualified identification and abnormal identification, which reflects the quality status of the PCB circuit board under the current fault tolerance constraint. Qualified identification indicates that the PCB circuit board passes the quality inspection, while abnormal identification indicates that there are quality problems. The number of collected PCB circuit boards should be representative enough, usually between 50 and 100 samples. Subsequently, based on the collected quality identification information of the PCB circuit board, calculate the qualified probability of the PCB circuit board. The calculation formula for the qualified probability of the PCB circuit board is: the number of qualified identifications divided by the total number of samples. For example, if among 100 PCB circuit board samples, 85 are marked as qualified and 15 are marked as abnormal, then the qualified probability of the PCB circuit board is 85%.

[0068] After that, by comparing the qualified probability of the PCB circuit board with the preset qualified probability threshold, determine whether the loop stop condition is met. If the qualified probability of the PCB circuit board is equal to the qualified probability threshold (or within a very small error range of the qualified probability threshold), it is considered that the current initial deviation threshold has reached the optimum and the loop stop condition is met. If the loop stop condition is not met, then according to the comparison result between the qualified probability of the PCB circuit board and the qualified probability threshold, adjust the initial deviation threshold and conduct a new round of loop analysis. When the loop stop condition is met, set the current initial deviation threshold as the interval division deviation threshold, which serves as the basis for constructing the subsequent multi-valued function.

[0069] Subsequently, use the determined interval division deviation threshold to construct a multi-valued function. Specifically, take the set value of the first production control attribute as the coordinate origin (point 0), and divide the parameter space based on the interval division deviation threshold in the positive and negative directions to form a multi-valued function. The multi-valued function can be a piecewise function, a probability density function, or other mathematical functions suitable for describing the parameter distribution characteristics. For example, if the set value of the line width is 0.1 mm and the interval division deviation threshold is ±0.008 mm, the following multi-valued function can be constructed:

[0070] When |x - 0.1| ≤ 0.004 mm, f(x) = 1.0 (completely acceptable);

[0071] When 0.004 mm < |x - 0.1| ≤ 0.008 mm, f(x) = 0.5 (partially acceptable);

[0072] When |x - 0.1| > 0.008 mm, f(x) = 0.0 (unacceptable).

[0073] Where x represents the actual line width value and f(x) represents the acceptance of this value. Such a multi-valued function not only reflects the allowable range of parameters but also can differentiate different degrees of deviation.

[0074] After that, using the constructed multi-valued function, multi-valued processing is performed on the preset production parameters of the first production control attribute. The multi-valued processing converts a single preset parameter value into a parameter interval with rich semantic information, forming the multi-valued timing information of the first production control attribute. For example, for the preset line width values at different times, after applying the multi-valued function, it is no longer just simple point values (such as 0.1 mm at time t1, 0.1 mm at time t2, etc.), but interval values with acceptance (such as [0.092 mm - 0.108 mm] at time t1, [0.092 mm - 0.108 mm] at time t2, etc.). The obtained multi-valued timing information of the first production control attribute is added to the multi-valued timing information of the preset production parameters to enrich the expression of the preset production parameters and provide more refined data support for subsequent parameter comparison and defect detection. By performing the above processing on each production control attribute in the preset production parameters of the PCB circuit board, the complete multi-valued timing information of the preset production parameters is obtained.

[0075] Through the above steps, the intelligent multi-valued processing of the preset production parameters of the PCB circuit board is realized, improving the accuracy and adaptability of parameter expression and laying a foundation for high-quality defect detection of the PCB circuit board.

[0076] Further, based on the qualified probability of the circuit board, it is judged whether the loop stop condition is satisfied. If so, the initial deviation threshold is set as the interval division deviation threshold, including:[[]]

[0077] S1151. When the qualified probability of the PCB circuit board is not equal to the qualified probability threshold, it is regarded as not satisfying the loop stop condition:

[0078] S1152. When the qualified probability of the PCB circuit board is greater than the qualified probability threshold, the first fault tolerance constraint is updated based on 2 * the initial deviation threshold and then loop analyzed;

[0079] S1153. When the qualified probability of the PCB circuit board is less than the qualified probability threshold, the first fault tolerance constraint is updated based on 0.5 * the initial deviation threshold and then loop analyzed;

[0080] S1154. When the qualified probability of the PCB circuit board is equal to the qualified probability threshold, it is regarded as satisfying the loop stop condition.

[0081] In a preferred embodiment, by comparing the qualified probability of the PCB circuit board with a pre-set qualified probability threshold, it is determined whether the current deviation threshold setting has reached the optimal state. The qualified probability threshold is the expected qualified rate pre-configured by the expert group, which is comprehensively determined according to factors such as product quality requirements, production efficiency, and cost, and is usually between 95% and 98%. When the qualified probability of the PCB circuit board is not equal to the qualified probability threshold, it indicates that the current initial deviation threshold setting has not reached the optimal state and needs to be adjusted. At this time, the loop stop condition is not satisfied, and the subsequent deviation threshold adjustment will continue to be executed.

[0082] When it is detected that the qualified probability of the PCB circuit board is greater than the qualified probability threshold, it means that the current initial deviation threshold is too strict, resulting in many actually acceptable products being wrongly marked as abnormal. To reduce the misjudgment rate, the deviation threshold needs to be relaxed. At this time, the doubling strategy is adopted to double the initial deviation threshold, and then the first fault tolerance constraint of the first production control attribute is updated based on the new deviation threshold. For example, if the initial deviation threshold of the current line width is ±0.005mm, the updated deviation threshold will become ±0.01mm. After updating the fault tolerance constraint, the loop from S113 to S115 will be executed again to collect new PCB circuit board quality identification information, calculate the new qualified probability of the PCB circuit board, and evaluate the loop stop condition again. This adjustment strategy of relaxing the fault tolerance constraint enables the system to quickly approach the optimal deviation threshold.

[0083] When the qualified probability of the PCB circuit board is less than the qualified probability threshold, it means that the current initial deviation threshold is too loose, resulting in many products with potential problems being wrongly marked as qualified. To improve the quality assurance level, the deviation threshold needs to be tightened. At this time, the halving strategy is adopted to reduce the initial deviation threshold to 0.5 times the original, and then the first fault tolerance constraint is updated based on the new deviation threshold. For example, if the initial deviation threshold of the current line width is ±0.008mm, the updated deviation threshold will become ±0.004mm. After updating the fault tolerance constraint, the loop analysis process from S113 to S115 will also be executed again until a suitable deviation threshold is found. This adjustment strategy of tightening the fault tolerance constraint ensures that the product quality will not be affected by overly loose standards.

[0084] When the qualified probability of the PCB circuit board is exactly equal to the qualified probability threshold, it indicates that the current initial deviation threshold setting has reached the optimal state and can achieve an ideal balance between ensuring product quality and production efficiency. In practical applications, considering statistical fluctuations, a very small error range is usually set , when |qualified probability of PCB circuit board - qualified probability threshold| < ε, it is also regarded as meeting the loop stop condition.

[0085] After the loop stop condition is satisfied, the current initial deviation threshold will be determined as the interval division deviation threshold for constructing the subsequent multi-valued function. This interval division deviation threshold represents the optimal deviation range allowed by the first production control attribute on the premise of ensuring the expected qualified rate.

[0086] Through the above adaptive deviation threshold optimization, the optimal deviation threshold setting can be automatically searched and determined, which not only ensures the quality requirements of the PCB circuit board, but also avoids resource waste caused by overly strict standards, provides a reasonable parameter benchmark for PCB circuit board defect detection, and thus improves the accuracy and efficiency of PCB circuit board defect detection.

[0087] Furthermore, traverse the several PCB circuit board grid regions to retrieve several defect trigger frequencies that meet the timing information of the deviation attribute, including:

[0088] S31. Extract the first PCB circuit board grid region from the several PCB circuit board grid regions;

[0089] S32. Collect the first historical quality inspection sample that meets the PCB circuit board model and the preset production parameters of the PCB circuit board. Among them, the first historical quality inspection sample includes the recorded values of PCB circuit board production parameters and the recorded positions of defect detections;

[0090] S33. Compare the preset production parameters of the PCB circuit board with the recorded values of the PCB circuit board production parameters to obtain the timing information of the sample deviation attribute;

[0091] S34. When the timing information of the sample deviation attribute is consistent with the timing information of the deviation attribute, and the recorded position of the defect detection includes the first PCB circuit board grid region, the defect trigger frequency of the first region is incremented by one, and the initial value of the defect trigger frequency of the first region is equal to 0;

[0092] S35. When the timing information of the sample deviation attribute is consistent with the timing information of the deviation attribute, and the recorded position of the defect detection does not include the first PCB circuit board grid region, the defect trigger frequency of the first region remains unchanged;

[0093] S36. When the timing information of the sample deviation attribute is inconsistent with the timing information of the deviation attribute, delete the first historical quality inspection sample, increment the iteration count by one, update the historical quality inspection sample and continue the iterative analysis, and the initial value of the iteration count is equal to 1;

[0094] S37. When the preset iteration count is satisfied, add the defect trigger frequency of the first region to the several defect trigger frequencies.

[0095] In a feasible implementation, first, individual PCB circuit board grid regions are sequentially extracted from the obtained set of PCB circuit board grid regions for analysis, which is called the first PCB circuit board grid region. This first PCB circuit board grid region is the basic unit for defect trigger frequency calculation and has a unique spatial position identifier. The extraction operation is carried out in a predetermined order to ensure that all grid regions can be traversed and analyzed without missing any potential risk areas. Then, before analyzing the defect trigger characteristics of the first PCB circuit board grid region, relevant historical quality inspection data is first obtained as the analysis basis. Specifically, all multiple historical quality inspection samples that meet the current PCB circuit board model and the preset production parameters of the PCB circuit board are collected from the quality inspection database, which is called the first historical quality inspection sample. Each sample in the first historical quality inspection sample contains two types of key information: the recorded values of PCB circuit board production parameters and the recorded positions of defect detections. The recorded values of PCB circuit board production parameters record the actual values of various parameters during the production of historical quality inspection samples, such as the measured data of line width, line pitch, pad diameter, etc.; the recorded positions of defect detections record the specific spatial position information of defects found in historical quality inspection samples. These historical data come from the enterprise's manufacturing execution system or a dedicated quality management system.

[0096] Subsequently, the recorded values of PCB circuit board production parameters of each sample in the first historical quality inspection sample are compared and analyzed with the preset production parameters of the current PCB circuit board to obtain the time-series information of sample deviation attributes. The time-series information of sample deviation attributes has the same data structure as the obtained deviation attribute time-series information, both representing the change characteristics of parameter deviation over time. The comparison process uses a method similar to S1 to analyze the deviation conditions of historical quality inspection samples at each moment and for each parameter. For example, if the line width deviation of the current PCB circuit board at time t1 is +0.01 mm, then it is necessary to check whether there is a similar line width deviation in the historical quality inspection samples at time t1. Through this time-series comparison, historical quality inspection samples with a similar deviation pattern to the current PCB circuit board can be identified.

[0097] When the time-series information of sample deviation attributes is consistent with the current deviation attribute time-series information, and the defect of the historical quality inspection sample is located in the currently analyzed first PCB circuit board grid region, it indicates that under similar parameter deviation conditions, defects have occurred in this grid region, and it has a relatively high defect risk. When the above conditions are met, the defect trigger frequency of the first region is incremented by one. Among them, the first region refers to any risk area, and the initial value of the defect trigger frequency of the first region is set to 0 and increases as the number of historical quality inspection samples that meet the conditions increases. The defect trigger frequency is essentially an estimate of the probability of defects occurring in this region under specific deviation conditions and is a key indicator for judging the risk level of the region.

[0098] When the timing information of the sample deviation attribute is consistent with the current deviation attribute timing information, but the defect location of the historical quality inspection sample is not in the first PCB circuit board grid area under current analysis, it indicates that although the parameter deviation conditions are similar, no defect has occurred in this grid area, and the risk is relatively low. When the above conditions are met, the defect trigger frequency in the first area remains unchanged. This processing method ensures that the defect trigger frequency can accurately reflect the defect risk of a specific grid area under specific deviation conditions and will not be wrongly increased due to the defect conditions in other areas.

[0099] When the timing information of the sample deviation attribute is inconsistent with the current deviation attribute timing information, it means that the parameter deviation pattern of the historical quality inspection sample is different from that of the current PCB circuit board and is not suitable as a reference for the current risk analysis. When inconsistency is detected, the current historical quality inspection sample is deleted from the analysis queue, the iteration count is incremented by one, and a new historical quality inspection sample is obtained and updated for continued analysis. The initial value of the iteration count is set to 1 and increases as the analysis process progresses. This iterative update mechanism ensures that the samples in the first historical quality inspection sample can be analyzed sequentially, improving the reliability of the statistical results.

[0100] When the number of iterative analyses reaches the preset number of iterations, it is considered that the analysis of the current grid area is sufficient, and the calculated defect trigger frequency in the first area is added to a set of several defect trigger frequencies. The preset number of iterations is a parameter determined based on the historical data volume and statistical analysis requirements, and is usually set to a sufficiently large value to ensure the stability of the statistical results, such as 100, 200 or more. A larger number of iterations helps to reduce the influence of random factors and improve the accuracy of the analysis results.

[0101] By repeatedly executing the above steps S31 to S37, the defect trigger frequency of each grid area on the PCB circuit board under the current deviation attribute timing information can be analyzed one by one, and a complete defect risk distribution map can be constructed. This risk analysis method based on historical data associates parameter deviations with defect locations, establishing a mapping relationship from the parameter domain to the spatial domain, providing a basis for subsequent risk area identification and optimization of detection strategies.

[0102] Furthermore, when the timing information of the sample deviation attribute is consistent with the deviation attribute timing information, it includes:

[0103] S381. Statistically analyze the intersection-union ratio of the first moment attribute of the timing information of the sample deviation attribute and the deviation attribute timing information until the intersection-union ratio of the Qth moment attribute;

[0104] S382. Calculate the mean value of the intersection-union ratio from the first moment attribute to the Qth moment attribute, and set it as the consistency coefficient;

[0105] S383. When the consistency coefficient meets the consistency coefficient threshold, it is regarded that the timing information of the sample deviation attribute is consistent with the timing information of the deviation attribute;

[0106] S384. Otherwise, it is regarded that the timing information of the sample deviation attribute is inconsistent with the timing information of the deviation attribute.

[0107] In a preferred embodiment, a determination method for judging the consistency between the timing information of the sample deviation attribute and the timing information of the deviation attribute is provided.

[0108] First, a quantitative evaluation is made on the similarity of the timing information of the sample deviation attribute and the timing information of the current PCB board deviation attribute at each moment. In specific implementation, the attribute intersection-over-union ratios of the two pieces of deviation attribute timing information at each time point from the first moment to the Qth moment are calculated respectively. The moment attribute intersection-over-union ratio refers to the ratio of the intersection to the union of the deviation attribute sets of two pieces of timing information at a specific moment. Let the deviation attribute set of the current PCB board at moment t be A(t), and the deviation attribute set of the historical sample at moment t be B(t), then the calculation formula for the attribute intersection-over-union ratio IoU(t) at moment t is: IoU(t) = |A(t) ∩ B(t)| / |A(t) ∪ B(t)|. For example, if the deviation attribute set of the current PCB board at t1 moment is {line width +0.01mm, line pitch -0.02mm, pad diameter +0.015mm}, and the deviation attribute set of the historical sample at t1 moment is {line width +0.01mm, line pitch -0.015mm, copper thickness -0.005mm}, then the attribute intersection-over-union ratio at t1 moment is 2 / 4 = 0.5, because the intersection of the two sets contains 2 deviation attributes, namely line width and line pitch; the union contains 4 deviation attributes, namely line width, line pitch, pad diameter and copper thickness. By calculating the attribute intersection-over-union ratios at each moment from the first moment to the Qth moment, the similarity degree of the two pieces of timing information in the entire time period can be comprehensively evaluated. The number of moments Q is determined according to the complexity of the PCB board production process and the detection accuracy requirements, and is usually 10 - 50 critical time points.

[0109] After obtaining the attribute intersection-over-union ratios at each moment, calculate the arithmetic mean of these intersection-over-union ratios as a quantitative index of the overall similarity, which is called the consistency coefficient. The calculation formula for the consistency coefficient is: C = (IoU(1) + IoU(2) +... + IoU(Q)) / Q, where IoU(t) represents the attribute intersection-over-union ratio at moment t, and Q represents the total number of moments. The value range of the consistency coefficient is [0, 1]. The closer the value is to 1, the more similar the two pieces of deviation attribute timing information are; the closer the value is to 0, the greater the difference is. The consistency coefficient comprehensively considers the similarity situations at all moment points and can more comprehensively reflect the overall consistency of the two pieces of timing information. In actual calculation, weight coefficients can also be set according to the importance of different moments to achieve weighted average and highlight the influence of critical moments.

[0110] Subsequently, according to the calculated consistency coefficient, it is determined whether the timing information of the sample deviation attributes is consistent with the timing information of the current PCB board deviation attributes. The judgment criterion is whether the consistency coefficient is greater than or equal to a preset consistency coefficient threshold. The consistency coefficient threshold is a pre-configured parameter, set based on historical data analysis and actual production experience, and the typical value is between 0.7 and 0.9. When the consistency coefficient is greater than or equal to the consistency coefficient threshold, it is considered that the timing information of the sample deviation attributes is consistent with the timing information of the current PCB board deviation attributes, and this historical sample can be used for subsequent defect trigger frequency analysis. For example, if the consistency coefficient threshold is set to 0.8 and the calculated consistency coefficient is 0.85, it is determined to be consistent. When the consistency coefficient is less than the consistency coefficient threshold, it is considered that the timing information of the sample deviation attributes is inconsistent with the timing information of the current PCB board deviation attributes, and this historical sample is not suitable for the current defect trigger frequency analysis. The inconsistent judgment results in this historical sample being excluded from the analysis scope, and according to the processing flow of step S36, this sample will be deleted and a new historical quality inspection sample will be obtained and updated for continued analysis. This screening mechanism ensures that only historical samples with sufficiently similar deviation characteristics will be used for risk analysis, improving the pertinence and accuracy of the analysis results.

[0111] Through the above steps, the accurate determination of the consistency of the timing information of the deviation attributes is realized, overcoming the limitations of the traditional single-point comparison method, and being able to comprehensively evaluate the comprehensive deviation situation of multiple parameters at different times. This determination method based on the intersection-over-union and the consistency coefficient provides a reliable guarantee for the accurate identification of the defect risk area of the PCB board.

[0112] Further, performing the minimum intersection-over-union analysis of the risk area on the multiple PCB board attitude sets to obtain the target PCB board attitude set further includes:

[0113] S61. Based on the image acquisition conical region, traverse the multiple PCB board attitude sets and extract multiple projection cross-section coordinate array sets;

[0114] S62. Traverse the multiple projection cross-section coordinate array sets, analyze the ratio of the intersection area to the union area of the risk area, and obtain multiple PCB board attitude fitnesses;

[0115] S63. Perform a minimum value analysis based on the multiple PCB board attitude fitnesses, and extract the first PCB board attitude set from the multiple PCB board attitude sets;

[0116] S64. Perform a maximum value analysis based on the multiple PCB board attitude fitnesses, and extract the second PCB board attitude set from the multiple PCB board attitude sets;

[0117] S65. Delete the intersection postures between the first set of PCB board postures and the second set of PCB board postures to obtain the first non - intersection postures;

[0118] S66. Delete the intersection postures between the second set of PCB board postures and the first set of PCB board postures to obtain the second non - intersection postures;

[0119] S67. Perform an adjustment to increase the posture similarity between the second non - intersection postures and the first non - intersection postures to obtain an updated set of PCB board postures. After replacing the second set of PCB board postures with the updated set in the multiple sets of PCB board postures and performing iterative analysis, when the iteration count threshold is met, output the set of target PCB board postures with the minimum global intersection - over - union ratio.

[0120] In a preferred embodiment, first, utilize the spatial characteristics of the image - acquisition conical region to perform a traversal analysis on multiple sets of PCB board postures, and extract the projection cross - section coordinates of the risk regions of the PCB boards in the image plane under each posture in each set of PCB board postures. Specifically, for each posture in the set , calculate the spatial position of the risk region of the PCB board in this posture relative to the image - acquisition device, and then project the risk region in three - dimensional space onto the two - dimensional imaging plane of the image - acquisition device to obtain multiple arrays of projection cross - section coordinates, forming a set of projection cross - section coordinate arrays. The set of projection cross - section coordinate arrays records the two - dimensional projection information of the risk regions under different postures in the set , providing basic data for subsequent coverage - efficiency analysis. For example, for a set A of postures containing 5 postures, 5 arrays of projection cross - section coordinates will be generated, and each array contains the set of projection contour coordinate points of the risk region in the corresponding posture. Perform the above - mentioned processing on multiple sets of PCB board postures respectively to obtain multiple sets of projection cross - section coordinate arrays.

[0121] Then, perform a traversal analysis on the obtained set of projection cross - section coordinate arrays, and calculate the coverage overlap degree of the risk regions within each set of PCB board postures, that is, the intersection - over - union ratio, as the fitness evaluation index of this set of PCB board postures. For a set of PCB board postures , calculate the ratio of the intersection area to the union area of the projections of the risk regions of each posture on the image plane. Let the projection region of the risk region in posture be , then the formula for calculating the intersection - over - union ratio of the set of postures is:

[0122] . The smaller the intersection-over-union ratio, the lower the overlap degree between different postures and the stronger the complementarity of the collected information; the larger the value, the higher the overlap degree and the more redundant acquisitions. The calculated intersection-over-union ratio is used as the PCB board posture fitness. Thus, the smaller the PCB board posture fitness, the higher the coverage efficiency of the posture set. By traversing all PCB board posture sets, calculating the fitness of each posture set, multiple PCB board posture fitnesses are obtained, providing an important basis for subsequent optimization selection.

[0123] Then, select the posture set with the lowest PCB board posture fitness (i.e., the smallest intersection-over-union ratio) from multiple PCB board posture sets as the template for subsequent optimization. The lowest posture fitness means that the coverage efficiency of the risk area of this posture set is the best, the overlap degree between internal postures is the lowest, and the complementarity is the strongest. The specific operation is to compare the obtained multiple PCB board posture fitnesses and find the posture set corresponding to the minimum value. For example, if the fitness of posture set is 0.75, the fitness of posture set is 0.65, and the fitness of posture set is 0.82, then select the posture set with a fitness of 0.65 as the first PCB board posture set. At the same time, select the posture set with the highest PCB board posture fitness (i.e., the largest intersection-over-union ratio) as the object to be optimized. The highest fitness means that the coverage efficiency of the risk area of this posture set is the worst, the overlap degree between internal postures is the highest, and there are obvious redundant acquisition problems. By comparing multiple posture fitness values, find the posture set corresponding to the maximum value. For example, based on the previous fitness values, the second PCB board posture set will be the posture set with a fitness of 0.82 . Selecting the posture set with the highest fitness as the optimization object aims to improve the least ideal solution and enhance the quality of the overall solution.

[0124] Subsequently, the attitude set of the first PCB circuit board is screened, and the attitudes that are repeated with the attitude set of the second PCB circuit board are deleted, and the unique attitudes are retained, which are called the first non-intersecting attitudes. Specifically, if attitude a exists in both the attitude set of the first PCB circuit board and the attitude set of the second PCB circuit board, then attitude a is deleted therefrom. The deletion operation is based on the exact matching of attitude parameters to determine whether two attitudes are the same. The first non-intersecting attitudes represent the unique part of the attitude set with the lowest fitness (optimal attitude set). These attitudes have excellent characteristics and are the key factors for achieving efficient coverage of the risk area, and will be used as a reference template for optimization. At the same time, the attitude set of the second PCB circuit board is screened, and the attitudes that are repeated with the attitude set of the first PCB circuit board are deleted, and the unique attitudes are retained, which are called the second non-intersecting attitudes. The second non-intersecting attitudes represent the unique part of the attitude set with the highest fitness (worst attitude set). These attitudes may have unreasonable designs and are the main reasons for the low overall coverage efficiency and need to be optimized specifically.

[0125] After that, for the second non-intersecting attitudes (unique attitudes from the worst attitude set), the attitude similarity with the first non-intersecting attitudes (unique attitudes from the optimal attitude set) is increased and adjusted to obtain a new set of PCB circuit board attitudes, so that the inferior attitudes approach the superior attitudes and the optimization adjustment of attitude parameters is realized. Specifically, for each attitude in the second non-intersecting attitudes, an attitude in the first non-intersecting attitudes is selected as a reference and adjusted by methods such as parameter interpolation or feature mixing. For example, the linear weighted mixing method can be used, that is, the attitude to be optimized and the reference attitude are combined according to a certain weight to form new attitude parameters. The value range of the adjustment weight coefficient is between 0 and 1. When the weight is closer to 0, the new attitude is closer to the original attitude to be optimized; when the weight is closer to 1, the new attitude is closer to the superior reference attitude. By adjusting all the second non-intersecting attitudes, a new set of attitudes is obtained, which is called the new set of PCB circuit board attitudes. Among multiple sets of PCB circuit board attitudes, the original second PCB circuit board attitude set (worst attitude set) is replaced with the new attitude set to form a new round of multiple sets of PCB circuit board attitudes, and then the optimization process is repeated from S61. Through this iterative optimization process, the quality of the attitude set is continuously improved, and a new attitude combination is generated in each round of iteration. At the same time, an iteration count threshold is set as the termination condition, such as set to 50 - 100 times, or the iteration can also be stopped when the fitness change of the attitude set is less than a certain convergence threshold. After the iteration ends, from the attitude sets that appear in all the iteration processes, the attitude set with the smallest global intersection-over-union ratio (highest coverage efficiency) is selected as the final target PCB circuit board attitude set.

[0126] By repeatedly executing the above steps, the risk area coverage efficiency of the PCB circuit board attitude set can be continuously optimized, redundant image acquisition can be reduced, and the accuracy and efficiency of defect detection can be improved.

[0127] Embodiment 2, as Figure 2 shown, based on the same application concept as the PCB circuit board defect detection method based on image recognition provided in Embodiment 1, the embodiment of the present application further provides a PCB circuit board defect detection system based on image recognition, including:

[0128] A parameter deviation analysis module 11, configured to compare the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute time series information;

[0129] A grid area division module 12, configured to retrieve the PCB circuit board design model based on the PCB circuit board model, and perform grid segmentation based on a preset side length to obtain a number of PCB circuit board grid areas;

[0130] A risk area identification module 13, configured to traverse the number of PCB circuit board grid areas, retrieve a number of defect trigger frequencies that meet the deviation attribute time series information, and add the grid areas where the defect trigger frequency is greater than or equal to the defect trigger frequency threshold to the risk area;

[0131] An area construction module 14, configured to construct an image acquisition conical area based on the image acquisition parameters of the image acquisition device, and construct a circuit board activity area based on the posture adjustment mechanism;

[0132] A posture set configuration module 15, configured to configure a plurality of PCB circuit board posture sets that cover the entire PCB circuit board in combination with the image acquisition conical area and the circuit board activity area;

[0133] An optimal posture selection module 16, configured to perform the minimum intersection-over-union analysis of the risk areas on the plurality of PCB circuit board posture sets to obtain a target PCB circuit board posture set, and initialize the posture adjustment mechanism to collect multi-angle images of the PCB circuit board for defect detection.

[0134] Furthermore, the parameter deviation analysis module 11 includes the following execution steps:

[0135] Perform multi-valued processing on the preset production parameters of the PCB circuit board to obtain preset production parameter multi-valued time series information;

[0136] Perform multi-valued processing on the monitored production parameters of the PCB circuit board to obtain monitored production parameter multi-valued time series information;

[0137] Extract the non-consistent attributes at the same time of the preset production parameter multi-valued time series information and the monitored production parameter multi-valued time series information to obtain the deviation attribute time series information.

[0138] Furthermore, the parameter deviation analysis module 11 further includes the following execution steps:

[0139] Obtain the first production control attribute of the preset production parameters of the PCB circuit board;

[0140] Configure the initial deviation threshold of the first production control attribute through the user terminal;

[0141] Configure a zero fault tolerance constraint for the preset production parameters of non-first production control attributes, configure a first fault tolerance constraint for the preset production parameters of the first production control attribute based on the initial deviation threshold, and collect the quality identification information of several PCB circuit boards. Among them, the quality identification information of the PCB circuit board includes a qualified identification and an abnormal identification;

[0142] Based on the qualified identification and the abnormal identification, count the qualified probability of the PCB circuit board of the quality identification information of several PCB circuit boards;

[0143] Based on the qualified probability of the circuit board, determine whether the loop stop condition is satisfied. If it is satisfied, set the initial deviation threshold as the interval division deviation threshold;

[0144] Based on the interval division deviation threshold, with the set value of the first production control attribute as the 0 point, construct a multi-valued function in the positive and negative directions of the 0 point;

[0145] Perform multi-valued processing on the preset production parameters of the first production control attribute according to the multi-valued function, obtain the multi-valued time series information of the first production control attribute, and add it to the multi-valued time series information of the preset production parameters.

[0146] Further, the parameter deviation analysis module 11 further includes the following execution steps:

[0147] When the qualified probability of the PCB circuit board is not equal to the qualified probability threshold, it is regarded as not satisfying the loop stop condition:

[0148] When the qualified probability of the PCB circuit board is greater than the qualified probability threshold, update the first fault tolerance constraint based on 2 * the initial deviation threshold and perform loop analysis;

[0149] When the qualified probability of the PCB circuit board is less than the qualified probability threshold, update the first fault tolerance constraint based on 0.5 * the initial deviation threshold and perform loop analysis;

[0150] When the qualified probability of the PCB circuit board is equal to the qualified probability threshold, it is regarded as satisfying the loop stop condition.

[0151] Further, the risk area identification module 13 includes the following execution steps:

[0152] Extract the first PCB circuit board grid area from the grid areas of several PCB circuit boards;

[0153] Collect the first historical quality inspection sample that meets the PCB circuit board model and the preset production parameters of the PCB circuit board. Among them, the first historical quality inspection sample includes the recorded values of the PCB circuit board production parameters and the defect detection record positions.

[0154] Compare the preset production parameters of the PCB circuit board with the recorded values of the PCB circuit board production parameters to obtain the timing information of the sample deviation attribute.

[0155] When the timing information of the sample deviation attribute is consistent with the deviation attribute timing information, and the defect detection record position includes the first PCB circuit board grid area, the first area defect trigger frequency is incremented by one, and the initial value of the first area defect trigger frequency is equal to 0.

[0156] When the timing information of the sample deviation attribute is consistent with the deviation attribute timing information, and the defect detection record position does not include the first PCB circuit board grid area, the first area defect trigger frequency remains unchanged.

[0157] When the timing information of the sample deviation attribute is inconsistent with the deviation attribute timing information, delete the first historical quality inspection sample, increment the iteration count by one, update the historical quality inspection sample and continue the iterative analysis. The initial value of the iteration count is equal to 1.

[0158] When the preset iteration count is satisfied, add the first area defect trigger frequency to the several defect trigger frequencies.

[0159] Further, the risk area identification module 13 includes the following execution steps:

[0160] Statistically calculate the intersection and union ratio of the first moment attributes of the timing information of the sample deviation attribute and the deviation attribute timing information until the intersection and union ratio of the Qth moment attributes.

[0161] Statistically calculate the mean value of the intersection and union ratio of the first moment attributes until the intersection and union ratio of the Qth moment attributes, and set it as the consistency coefficient.

[0162] When the consistency coefficient meets the consistency coefficient threshold, it is regarded that the timing information of the sample deviation attribute is consistent with the deviation attribute timing information.

[0163] Otherwise, it is regarded that the timing information of the sample deviation attribute is inconsistent with the deviation attribute timing information.

[0164] Further, the optimal pose selection module 16 includes the following execution steps:

[0165] Based on the image acquisition conical area, traverse the multiple PCB circuit board pose sets and extract multiple projection section coordinate array sets.

[0166] Traverse the set of multiple arrays of projection section coordinates, analyze the ratio of the intersection area to the union area of the risk regions, and obtain the attitude fitness of multiple PCB circuit boards;

[0167] Based on the attitude fitness of multiple PCB circuit boards, perform a minimum value analysis, and extract the first set of PCB circuit board attitudes from the set of multiple PCB circuit board attitudes;

[0168] Based on the attitude fitness of multiple PCB circuit boards, perform a maximum value analysis, and extract the second set of PCB circuit board attitudes from the set of multiple PCB circuit board attitudes;

[0169] Delete the intersection attitudes of the first set of PCB circuit board attitudes and the second set of PCB circuit board attitudes to obtain the first non-intersection attitudes;

[0170] Delete the intersection attitudes of the second set of PCB circuit board attitudes and the first set of PCB circuit board attitudes to obtain the second non-intersection attitudes;

[0171] For the second non-intersection attitudes, perform an adjustment to increase the attitude similarity with the first non-intersection attitudes to obtain a new set of PCB circuit board attitudes. After replacing the second set of PCB circuit board attitudes in the set of multiple PCB circuit board attitudes, perform iterative analysis. When the iteration count threshold is met, output the target set of PCB circuit board attitudes with the minimum global intersection-over-union ratio.

[0172] It should be noted that in the above embodiments, the descriptions of each embodiment have their own emphases. For parts not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0173] Those skilled in the art should understand that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0174] This application is described with reference to the flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, special-purpose computer, embedded computer, or other programmable data processing device to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing device produce means for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0175] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a particular manner, such that the instructions stored in the computer-readable memory produce a manufacture including instruction means for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0176] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operational steps are performed on the computer or other programmable device to generate a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more of the flows Figure 1 one or more of the flows and / or blocks Figure 1 or means for implementing the functions specified in one or more of the blocks.

[0177] Although the preferred embodiments of the present application have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic inventive concept.

[0178] Obviously, those skilled in the art can make various changes and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the present application and its equivalent technologies, the present application is also intended to include these changes and variations.

Claims

1. A PCB circuit board defect detection method based on image recognition, characterized in that, Applied to a PCB circuit board defect detection system, the system is communicatively connected to an attitude adjustment mechanism and an image acquisition device, and includes: Compare the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute timing information; Based on the PCB circuit board model, retrieve the PCB circuit board design model, and perform grid segmentation based on the preset side length to obtain several PCB circuit board grid regions; Traverse the several PCB circuit board grid regions, retrieve several defect trigger frequencies that meet the deviation attribute timing information, and add the grid regions with defect trigger frequencies greater than or equal to the defect trigger frequency threshold to the risk regions; Based on the image acquisition parameters of the image acquisition device, construct an image acquisition conical region, and based on the attitude adjustment mechanism, construct a circuit board activity region; Combine the image acquisition conical region and the circuit board activity region to configure multiple PCB circuit board attitude sets that cover the entire PCB circuit board; Perform the minimum intersection over union analysis of the risk regions on the multiple PCB circuit board attitude sets to obtain the target PCB circuit board attitude set, and initialize the attitude adjustment mechanism to collect multi-angle images of the PCB circuit board to perform defect detection; Among them, comparing the preset production parameters of the PCB circuit board with the monitored production parameters of the PCB circuit board to obtain deviation attribute timing information includes: Perform multi-valued processing on the preset production parameters of the PCB circuit board to obtain multi-valued timing information of the preset production parameters; Perform multi-valued processing on the monitored production parameters of the PCB circuit board to obtain multi-valued timing information of the monitored production parameters; Extract the non-consistent attributes at the same moment of the multi-valued timing information of the preset production parameters and the multi-valued timing information of the monitored production parameters to obtain the deviation attribute timing information; Among them, performing multi-valued processing on the preset production parameters of the PCB circuit board to obtain multi-valued timing information of the preset production parameters includes: Obtain the first production control attribute of the preset production parameters of the PCB circuit board; Configure the initial deviation threshold of the first production control attribute through the user terminal; Configure a zero fault tolerance constraint for the preset production parameters of non-first production control attributes, configure a first fault tolerance constraint for the preset production parameters of the first production control attribute based on the initial deviation threshold, and collect several PCB circuit board quality identification information, where the PCB circuit board quality identification information includes a qualified identification and an abnormal identification; Based on the qualified identification and the abnormal identification, count the qualified probability of the PCB circuit board of the several PCB circuit board quality identification information; Based on the qualified probability of the circuit board, determine whether the loop stop condition is met. If it is met, set the initial deviation threshold as the interval division deviation threshold; Based on the interval division deviation threshold, with the set value of the first production control attribute as the 0 point, construct a multi-valued function in the positive and negative directions of the 0 point; Perform multi-valued processing on the preset production parameters of the first production control attribute according to the multi-valued function to obtain multi-valued timing information of the first production control attribute, and add it to the multi-valued timing information of the preset production parameters.

2. The method according to claim 1, wherein Based on the qualified probability of the circuit board, determine whether the loop stop condition is satisfied. If it is satisfied, set the initial deviation threshold as the interval division deviation threshold, including: When the qualified probability of the PCB circuit board is not equal to the qualified probability threshold, it is regarded as not satisfying the loop stop condition: When the qualified probability of the PCB circuit board is greater than the qualified probability threshold, perform loop analysis after updating the first fault tolerance constraint based on 2 * the initial deviation threshold; When the qualified probability of the PCB circuit board is less than the qualified probability threshold, perform loop analysis after updating the first fault tolerance constraint based on 0.5 * the initial deviation threshold; When the qualified probability of the PCB circuit board is equal to the qualified probability threshold, it is regarded as satisfying the loop stop condition.

3. The method according to claim 1, wherein Traverse the several PCB circuit board grid regions and retrieve several defect trigger frequencies that meet the timing information of the deviation attribute, including: Extract the first PCB circuit board grid region from the several PCB circuit board grid regions; Collect the first historical quality inspection sample that meets the PCB circuit board model and the preset production parameters of the PCB circuit board. Among them, the first historical quality inspection sample includes the recorded values of the PCB circuit board production parameters and the recorded positions of defect detections; Compare the preset production parameters of the PCB circuit board with the recorded values of the PCB circuit board production parameters to obtain the sample deviation attribute timing information; When the sample deviation attribute timing information is consistent with the deviation attribute timing information, and the recorded position of defect detection includes the first PCB circuit board grid region, the defect trigger frequency of the first region is incremented by one. The initial value of the defect trigger frequency of the first region is equal to 0; When the sample deviation attribute timing information is consistent with the deviation attribute timing information, and the recorded position of defect detection does not include the first PCB circuit board grid region, the defect trigger frequency of the first region remains unchanged; When the sample deviation attribute timing information is inconsistent with the deviation attribute timing information, delete the first historical quality inspection sample, increment the iteration count by one, update the historical quality inspection sample and continue the iterative analysis. The initial value of the iteration count is equal to 1; When the preset iteration count is satisfied, add the defect trigger frequency of the first region to the several defect trigger frequencies.

4. The method according to claim 3, wherein When the sample deviation attribute timing information is consistent with the deviation attribute timing information, it includes: Statistical the intersection - union ratio of the first - moment attribute of the sample deviation attribute timing information and the deviation attribute timing information until the Q - moment attribute intersection - union ratio; Statistical the mean value of the intersection - union ratio from the first - moment to the Q - moment attribute intersection - union ratio, and set it as the consistency coefficient; When the consistency coefficient meets the consistency coefficient threshold, it is regarded as the sample deviation attribute timing information being consistent with the deviation attribute timing information; Otherwise, it is regarded as the sample deviation attribute timing information being inconsistent with the deviation attribute timing information.

5. The method according to claim 1, wherein Perform the minimum intersection - union ratio analysis of the risk regions for the multiple PCB circuit board attitude sets to obtain the target PCB circuit board attitude set, and also include: Based on the image - acquisition conical region, traverse the multiple PCB circuit board attitude sets and extract multiple sets of projection cross - section coordinate arrays; Traverse the set of multiple arrays of projection section coordinates, analyze the ratio of the intersection area to the union area of the risk regions, and obtain multiple PCB board pose fitness values; Based on the analysis of the minimum value of the multiple PCB board pose fitness values, extract the first set of PCB board poses from the multiple sets of PCB board poses; Based on the analysis of the maximum value of the multiple PCB board pose fitness values, extract the second set of PCB board poses from the multiple sets of PCB board poses; Delete the poses in the intersection of the first set of PCB board poses and the second set of PCB board poses to obtain the first non-intersection poses; Delete the poses in the intersection of the second set of PCB board poses and the first set of PCB board poses to obtain the second non-intersection poses; Perform an adjustment to increase the pose similarity between the second non-intersection poses and the first non-intersection poses to obtain a new set of PCB board poses. After replacing the second set of PCB board poses in the multiple sets of PCB board poses, perform iterative analysis. When the iteration count threshold is met, output the set of target PCB board poses with the minimum global intersection-over-union ratio.

6. A PCB circuit board defect detection system based on image recognition, characterized in that, For implementing the method according to any one of claims 1 to 5, the system is communicatively connected to a pose adjustment mechanism and an image acquisition device, and includes: A parameter deviation analysis module for comparing the preset production parameters of the PCB board with the monitored production parameters of the PCB board to obtain deviation attribute time series information; A grid area division module for retrieving the PCB board design model based on the PCB board model and performing grid segmentation based on a preset side length to obtain a number of PCB board grid areas; A risk area identification module for traversing the number of PCB board grid areas, retrieving a number of defect trigger frequencies that meet the deviation attribute time series information, and adding the grid areas with a defect trigger frequency greater than or equal to the defect trigger frequency threshold to the risk areas; A region construction module for constructing an image acquisition conical region based on the image acquisition parameters of the image acquisition device and constructing a circuit board activity region based on the pose adjustment mechanism; A pose set configuration module for configuring a number of sets of PCB board poses that fully cover the PCB board in combination with the image acquisition conical region and the circuit board activity region; An optimal pose selection module for performing an analysis of the minimum intersection-over-union ratio of the risk regions on the number of sets of PCB board poses to obtain a set of target PCB board poses, and initializing the pose adjustment mechanism to acquire multi-angle images of the PCB board for defect detection.

Images