Power input multiplexer

Abstract

Systems and devices for power multiplexing are described. An apparatus may include a first power input circuit including a first power driver having a first gate configured to receive power from a first power input channel and output power to a power output channel. The apparatus includes a second power input circuit including a second power driver having a second gate configured to receive power from a second power input channel and output power to a power output channel. The apparatus includes a charge pump connected to the power output channel, the charge pump generating an output having a voltage greater than a voltage on the power output channel. The apparatus includes a switching circuit connected to an output of the charge pump, the switching circuit configured to selectively control the first power input circuit and the second power input circuit to output power to the power output channel.

Description

Technical Field

[0001] The present disclosure generally relates to apparatus and methods for power input multiplexing. Background Art

[0002] Power supply systems typically have dedicated power input channels that are powered from external components (e.g., wall power outlets) for use by integrated circuit devices within the power supply system. As power supply systems become increasingly complex, many system solutions have expanded to multiple power input channels that draw power from a variety of different sources. A power multiplexer (MUX) is used to switch between power input channels, e.g., based on the availability of each power source, the reliability of each power source, the capacity of each power source, or any other reason. Such power multiplexers typically include charge pumps and level shifters in the high voltage domain for each power input channel, each of which can occupy a significant amount of board real estate. Summary of the Invention

[0003] In one embodiment, a power multiplexer device is disclosed. The power multiplexer device includes a first power input circuit. The first power input circuit includes a first power driver that includes a first gate. The first power input circuit is configured to receive power from a first power input channel and output power to a power output channel via the first power driver. The power multiplexer device further includes a second power input circuit. The second power input circuit includes a second power driver that includes a second gate. The second power input circuit is configured to receive power from a second power input channel and output power to the power output channel via the second power driver. The power multiplexer device further includes a charge pump connected to the power output channel. The charge pump is configured to generate an output having a voltage greater than the voltage on the power output channel. The power multiplexer device further includes a switch circuit connected to the output of the charge pump. The switch circuit is configured to selectively control the first gate and the second gate to drive the first power input circuit and the second power input circuit to output power to the power output channel.

[0004] In one embodiment, a semiconductor device is disclosed. The semiconductor device includes a first power input circuit. The first power input circuit includes a first power driver that includes a first gate. The first power input circuit is configured to receive power from a first power input channel and output the power to a power output channel via the first power driver. The semiconductor device further includes a second power input circuit. The second power input circuit includes a second power driver that includes a second gate. The second power input circuit is configured to receive power from a second power input channel and output the power to the power output channel via the second power driver. The semiconductor device further includes a switching circuit that includes a current generator, a first transistor switch corresponding to the first power input circuit, and a second transistor switch corresponding to the second power input circuit. Each of the first transistor switch and the second transistor switch is configured as a current mirror driven by a reference current output of the current generator. The switching circuit is configured to selectively provide a first current output of the first transistor switch to the first gate of the first power driver to selectively control the first gate, and selectively provide a second current output of the second transistor switch to the second gate of the second power driver to selectively control the second gate.

[0005] In one embodiment, a semiconductor device is disclosed. The semiconductor device includes a wireless power transfer circuit and a power multiplexer circuit configured to output a first power input channel. The power multiplexing circuit includes a first power input circuit. The first power input circuit includes a first power driver that includes a first gate. The first power input circuit is configured to receive power from the first power input channel and output the power to the power output channel via the first power driver. The power multiplexing circuit further includes a second power input circuit. The second power input circuit includes a second power driver that includes a second gate. The second power input circuit is configured to receive power from the second power input channel and output the power to the power output channel via the second power driver. The power multiplexing circuit further includes a charge pump connected to the power output channel. The charge pump is configured to generate an output having a voltage greater than the voltage on the power output channel. The power multiplexing circuit further includes a switching circuit connected to the output of the charge pump. The switching circuit is configured to selectively control the first gate and the second gate to drive the first power input circuit and the second power input circuit to output power to the power output channel. The semiconductor device further includes a battery charger circuit configured to receive the power output channel. The battery charger circuit is configured to charge a battery based on the power output channel.

[0006] The foregoing Summary of the Invention is merely illustrative and is not intended to be limiting in any way. In addition to the above - described illustrative aspects, embodiments, and features, additional aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. In the drawings, like reference numerals indicate identical or functionally similar elements. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a block diagram of an example system for power multiplexing according to one embodiment.

[0008] Figure 2 is a circuit diagram of an example semiconductor device for power multiplexing according to one embodiment.

[0009] Figure 3 is according to one embodiment Figure 1 a circuit diagram of an input circuit of a single - path device of a semiconductor device.

[0010] Figure 4 is according to one embodiment Figure 1 a circuit diagram of an input circuit of back - to - back connected path devices of a semiconductor device, where each path device is controlled by a separate signal.

[0011] Figure 5 is according to one embodiment Figure 1 a circuit diagram of an input circuit of back - to - back connected path devices of a semiconductor device, where two path devices are controlled by the same signal.

[0012] Figure 6 is according to one embodiment Figure 1 a circuit diagram of a switch circuit of a semiconductor device. DETAILED DESCRIPTION

[0013] In the following description, numerous specific details are set forth, such as specific structures, components, materials, dimensions, processing steps, and techniques, in order to provide an understanding of the various embodiments of the present application. However, one of ordinary skill in the art will recognize that the various embodiments of the present application may be practiced without these specific details. In other instances, well - known structures or processing steps have not been described in detail to avoid obscuring the present application.

[0014] As power technologies improve, many systems include the option of using multiple power input channels to charge a battery or power the system. As an example, a particular system may be able to operate or charge its battery when powered from a wireless power source, from a standard wall socket adapter and plug, from a USB connection (e.g., power from a computer, car, etc.), or from other power input technologies. A power multiplexer (MUX) is used to select one of the power input channels and route its output to other ICs in such a system, such as a battery charger circuitry or any other circuitry. The power MUX can be a component of a stand-alone integrated circuit (IC), or in some embodiments, can be integrated with other circuitry of the system, including, for example, wireless power transfer circuitry, battery charging circuitry, or any other circuitry. For example, in the case where wireless power transfer circuitry is integrated with battery charging circuitry, the power MUX circuitry can also be integrated on the same integrated circuit (IC) as an intermediary to select the power input channel, e.g., in the case where other power input channels from other power sources (e.g., standard wall socket adapter and plug and USB) can also be used to power the system ICs.

[0015] Power MUX circuitry typically includes power drivers for each power input channel. Such power MUX circuitry may also need to power, for example, the gates of its power drivers from the power input channels. For example, the power MUX circuitry can utilize a separate charge pump for each power input channel to create an additional rail for powering, for example, the gates of the corresponding power drivers via an operational amplifier. The power MUX can then use one or more control signals to turn on or off each power driver, e.g., by activating the operational amplifier to power the gate of the corresponding power driver from the additional rail. Additionally, since the power drivers are in a high voltage domain, they may also need additional level shifters to reduce the voltage of any control signals to the gate control circuitry of the operational amplifier to a low voltage domain. The charge pumps, operational amplifiers, and level shifters for each power input channel can require a significant amount of the IC's area. In the case of utilizing multiple power input channels, the cumulative area cost can be substantial, where each additional power input channel requires a significant additional area of the IC's physical area to accommodate the additional power drivers, charge pumps, operational amplifiers, and level shifters.

[0016] Reference Figure 1, an example system 100 including a power MUX 110 according to one embodiment will be described. In an example embodiment, the power MUX 110 can be under the control of the controller 102 and can act as an intermediary between a power input channel and other circuitry of the system 100. As an example, in one embodiment, the power MUX 110 can be disposed between various power input channels and the battery charging circuitry 106. An example power input channel can include a wireless power transfer circuitry 104. In some embodiments, one or more of these components can be integrated into a single integrated circuit (IC).

[0017] The power MUX 110 can be configured to receive power from one or more power input channels, including, for example, VIN, VIN1, VIN2a, VIN2b, VIN3, … VIN from the wireless power transfer circuitry 104. N , where the power MUX 110 can be configured for any number of power input channels. Although VIN1, VIN2a, VIN2b, and VIN3 are shown as receiving power from an external source into the system 100, any one of VIN1, VIN2a, VIN2b, and VIN3 can also or alternatively receive power from the wireless power transfer circuitry 104 (e.g., replacing VIN) or from other circuitry of the system 100. Example power input circuits 120, 140, and 160 of the power MUX 110 for handling the power input channels VIN1, VIN2a, VIN2b, and VIN3 are described in more detail below but can be readily applied to any other power input channel, including VIN, VIN N or any other power input channel.

[0018] The controller 102 is configured to control and operate the power MUX 110 and, in some embodiments, can control and operate other components of the system 100. The controller 102 includes, for example, a processor, a central processing unit (CPU), a field programmable gate array (FPGA), or any other circuitry configured to control and operate the power MUX 110. Although described as a CPU in the illustrative embodiments, the controller 102 is not limited to a CPU in these embodiments and can include any other circuitry configured to control and operate the power MUX 110. In an example embodiment, the controller 102 is configured to control the power MUX 110 to switch between power input channels using one or more signals. In one example, the controller 102 can provide signals VIN1 ON, VIN2a ON, VIN2b ON, VIN3 ON … VIN to the power MUX 110. NON. The controller 102 can be configured as a component separate from the power MUX 110, or can be included as a part of the power MUX 110. In some embodiments, the controller 102 and the power MUX 110 can be integrated into the same IC.

[0019] Reference Figures 2-6 , the power MUX 110 can be implemented by one or more semiconductor devices. The power MUX 110 can include a power input circuit 120, a power input circuit 140, a power input circuit 160, a switching circuit 180, and a charge pump 112. The power input circuit 120 can receive power from the power input channel VIN1, the power input circuit 140 receives power from the power input channel VIN2, and the power input circuit 160 receives power from the power input channel VIN3. Each of the power input circuits 120, 140, and 160 outputs power to VOUT. Although the power MUX 110 can have more power input channels, for example, as Figure 1 shown, for clarity and conciseness, the functions of the power MUX 110 will be described below with reference to the power input channels VIN1, VIN2, and VIN3. Any of the functionality described below for the power input circuits 120, 140, and 160 and the power input channels VIN1, VIN2, and VIN3 can be applied to any other power input channels of the power MUX 110.

[0020] The charge pump 112 can receive VOUT as an input and generate a charge pump voltage Vcp as an output. Vcp is set on top of VOUT and includes VOUT + PVDDS. PVDDS can be a reference voltage, such as 5V or another voltage, such that Vcp is always at least PVDDS (when VOUT is 0) or PVDDS + VOUT (when VOUT is another value). As an example, if VOUT is 10V and PVDDS is 5V, then Vcp outputs at 15V. Similarly, if VOUT is 0V and PVDDS is 5V, then Vcp outputs at 5V. Alternatively, other voltage values of PVDDS and VOUT can be utilized. Note that as the power driver from one of the power input circuits 120, 140, and 160 ramps up its output to VOUT, the value of Vcp will increase accordingly.

[0021] Reference Figures 2-5, each of the power input circuits 120, 140, and 160 can be connected to a different power input channel, including, for example, a wall power outlet, a battery, a wireless charging circuit device, a USB connector, or any other power input source, and provides different types of control over the input signal. The power input circuit 120 includes a single-path device, and each of the power input circuits 140 and 160 includes a different type of back-to-back path device. Although three types of power input circuits are illustrated in Figures 2-5 , any other type or configuration of power input circuit can also be or alternatively used. In other embodiments, the power MUX 110 can include any other number or type of power input circuits. In some embodiments, copies of the power input circuits 120, 140, or 160 can also be or alternatively used for different or additional power input channels.

[0022] Referring to Figure 3 , the power input circuit 120 includes a power driver 122, diodes 124, 126, a resistor 128, and a switch 130. The power input circuit 120 takes VIN1 and the charge pump current Icp1 as the input and output to VOUT. The charge pump current Icp1 can be received from the switch circuit 180 and corresponds to Vcp modified by the current mirror circuit device of the switch circuit 180. The diode 124 bypasses the power driver 122 and provides power from VIN1 to VOUT even when the power driver 122 is turned off. In some embodiments, the diode 124 can be configured to provide a reduced or limited amount of power from VIN1 to VOUT. As an example, if VIN1 is 10V, the diode 124 can have a diode voltage drop of 1V, leaving 9V to be transferred to VOUT.

[0023] The diode 126, resistor 128, and switch 130 are arranged in parallel between VIN1 and Icp1. The diode 126 and resistor 128 are passive devices configured to maintain control of the gate. For example, the diode 126 may include a passive protection device, such as a Zener diode, configured to pull down the gate of the power driver 122 to VIN1 in the case of a high current above a predetermined threshold at the gate as a protection mechanism. In the case where Icp1 is turned off, the resistor 128 can be used to slowly pull down the gate of the power driver 122 to VIN1. The switch 130 can be an active device or element that can be closed to act as a pull-down for quickly turning off the power driver 122 and equalizing the gate of the power driver 122 to VIN1. In some embodiments, the pull-down from the diode 126, resistor 128, or switch 130 can be relatively weak towards ground to eliminate or reduce the need to use a level shifter. The switch 130 can be controlled by a control signal VIN1 ON received, for example, from the controller 102 of the system 100. As an example, in some embodiments, a first value of the control signal VIN1, such as low or 0, can close the switch 130, while a second value of the control signal VIN1, such as high or 1, can open the switch 130. In some embodiments, the control signal VIN1 ON can also control a corresponding switch 184 in the switch circuit device 180 via the current generator 182. For example, a second value of the control signal VIN1, such as high or 1, can cause the current generator 182 to open the switch 184 to output Icp1 to the power input circuit 120, while a first value of the control signal VIN1, such as low or 0, can cause the current generator 182 to close the switch 184 and turn off the output of Icp1 to the power input circuit 120. Other values of VIN1 ON can alternatively be used to control the switch 130 and the switch 184. In other embodiments, the switch 130 and the switch 184 can be controlled by separate control signals.

[0024] Reference Figure 4, the power input circuit 140 includes power drivers 142a, 142b, diodes 144a, 144b, diodes 146a, 146b, resistors 148a, 148b, switches 150a and 150b. The power input circuit 140 takes VIN2, charge pump currents Icp2a and Icp2b as inputs and outputs of VOUT. The charge pump currents Icp2a and Icp2b can be received from the switch circuit 180 and correspond to Vcp modified by the current mirror circuit device of the switch circuit 180. The power drivers 142a and 142b are arranged in a back-to-back configuration, and when the power drivers 142a and 142b are turned off, the diodes 144a and 144b inhibit the flow of power from VIN2 to VOUT. In another exemplary embodiment, the power drivers 142a and 142b can be separately driven by different gate drive controls. By way of example, in the low power mode, the power driver 142a can remain turned off, and the power driver 142b can be the only driver that is controlled and kept on, so that power can be transmitted by the diode 144a. In another embodiment, the power driver 142a can remain turned on, and the power driver 142b can be controlled to allow any jump on VOUT to be transmitted to VIN2. In another embodiment, the power driver 142b can remain turned on, and the power driver 142a can be controlled such that the power input circuit 140 can function similarly to Figure 3 the power input circuit 120. The independent control of the power drivers 142a, 142b can provide the flexibility of faster response in the protection mode, such as allowing all switches to be turned off to immediately block the current and resume after a short interruption.

[0025] The diode 146a, resistor 128a, and switch 150a are arranged in parallel between VIN2 and Icp2a. The diode 146b, resistor 128b, and switch 150b are arranged in parallel between VIN2 and Icp2b. The diodes 146a and 146b and the resistors 148a and 148b are passive devices configured to maintain control over the gates of the power drivers 142a and 142b. For example, the diodes 146a and 146b can include passive protection devices such as Zener diodes configured to pull down the gates of the power drivers 142a and 142b to VIN2 in the presence of a high current above a predetermined threshold at the corresponding gates as a protection mechanism. In the case where Icp2a or Icp2b is turned off, the resistors 148a and 148b can be used to slowly pull down the gates of the power drivers 142a and 142b to VIN2, respectively. The switches 150a and 150b can be active devices or active elements that can be closed to act as pull-downs for quickly turning off the power drivers 142a and 142b, respectively, and equalizing the corresponding gates to VIN2. In some embodiments, the pull-downs from the diodes 146a and 146b, resistors 148a and 148b, or switches 150a and 150b can be relatively weak towards ground to eliminate or reduce the need to use a level shifter.

[0026] The switches 150a and 150b can be controlled by corresponding control signals VIN2a ON and VIN2b ON, for example, received from the controller 102 of the system 100. As an example, in some embodiments, a first value of the control signal VIN2a, such as low or 0, can close the switch 150a, while a second value of the control signal VIN2a, such as high or 1, can open the switch 150a. Similarly, in some embodiments, a first value of the control signal VIN2b, such as low or 0, can close the switch 150b, while a second value of the control signal VIN2b, such as high or 1, can open the switch 150b.

[0027] In some embodiments, the control signals VIN2a ON and VIN2b ON can also control the corresponding switches 186 and 188 in the switch circuit device 180 via the current generator 182 (see Figure 6)。For example, a second value of control signals VIN2a ON and VIN2b ON, such as high or 1, can cause current generator 182 to turn on corresponding switches 186 and 188 to output Icp2a and Icp2b to power input circuit 140, while a first value of control signals VIN2a ON and VIN2b ON, such as low or 0, can cause current generator 182 to close corresponding switches 186 and 188 and turn off the output of Icp2a and Icp2b to power input circuit 140. Other values of VIN2a ON and VIN2b ON can alternatively be used to control switches 150a and 15b and switches 186 and 188. In other embodiments, switches 150a and 150b and switches 186 and 188 can be controlled by separate control signals.

[0028] Reference Figure 5 , power input circuit 160 includes power drivers 162 and 164, diodes 166 and 168, diode 170, resistor 172, and switch 174. Power input circuit 160 takes VIN3 and charge pump current Icp3 as inputs and outputs of VOUT. Icp3 is received from switch circuit 180, and ICP 3 corresponds to Vcp modified by the current mirror circuit device of switch circuit 180. Power drivers 162 and 164 are arranged in a back-to-back configuration, and when power drivers 162 and 164 are turned off, diodes 166 and 168 suppress the flow of power from VIN3 to VOUT.

[0029] Diode 170, resistor 172, and switch 174 are arranged in parallel between VIN3 and Icp3. Diode 170 and resistor 172 are passive devices configured to maintain control of the gates. For example, diode 170 can include a passive protection device, such as a Zener diode, configured to pull down the gates of power drivers 162 and 764 to VIN3 in the case of a high current above a predetermined threshold at either gate as a protection mechanism. In the case where Icp3 is turned off, resistor 172 can be used to slowly pull down the gates of power drivers 162 and 164 to VIN3. Switch 174 can be an active device or active element that can be closed to act as a pull-down for quickly turning off power drivers 162 and 164 and equalizing the gates of power drivers 162 and 164 to VIN3. In some embodiments, the pull-down from diode 170, resistor 172, or switch 174 can be relatively weak towards ground to eliminate or reduce the need to use a level shifter.

[0030] Switch 174 can be controlled by a control signal VIN3 received, for example, from the controller 102 of the system 100. For example, in some embodiments, a first value of the control signal VIN3, such as low or 0, can close switch 174, while a second value of the control signal VIN3, such as high or 1, can open switch 174. In some embodiments, the control signal VIN3 ON can also control the corresponding switch 190 in the switch circuit arrangement 180 via the current generator 182. For example, a second value of the control signal VIN1, such as high or 1, can cause the current generator 182 to open switch 190 to output Icp3 to the power input circuit 160, while a first value of the control signal VIN3, such as low or 0, can cause the current generator 182 to close switch 190 and turn off the output of Icp3 to the power input circuit 160. Other values of VIN3 ON can alternatively be used to control switch 174 and switch 190. In other embodiments, switch 174 and switch 190 can be controlled by separate control signals.

[0031] Reference Figure 6 , the switch circuit 180 includes a current generator 182 and current mirror switches 184, 186, 188, 190, and 192. The current generator 182 is configured to maintain a current on the gates of switches 184, 186, 188, 190, and 192 at a reference current I REF , which reference current is then mirrored to the outputs Icp1, Icp2a, Icp2b, and Icp3. Switches 184, 186, 188, 190, and 192 can include transistors, such as field effect transistors (FETs), metal oxide semiconductor field effect transistors (MOSFETs), bipolar junction transistors (BJTs), or any other transistor, switch, or current mirror technology.

[0032] Switches 184, 186, 188, 190, and 192 each receive Vcp as their source. Under the current control of the current generator 182, the drain of switch 184 outputs Icp1, the drain of switch 186 outputs Icp2a, the drain of switch 188 outputs Icp2b, the drain of switch 190 outputs Icp3, and the drain of switch 192 outputs to the gates of switches 184, 186, 188, 190, and 192.

[0033] Vcp is used to provide a high voltage current mirror for the switch circuit 180. For example, Vcp provides a voltage input to the switch circuit 180, which outputs corresponding Icp1, Icp2a, Icp2b, and Icp3 to each of the power input circuits 120, 140, and 160, and the power input circuits 120, 140, and 160 have a corresponding current I mirrored to that maintained by the current generator 182 REFIn some embodiments, the currents of outputs Icp1, Icp2a, Icp2b, and Icp3 may be equivalent to I REF In other embodiments, for example, based on the relationship between the width (W) and length (L) of each switch 184, 186, 188, and 190 and the W and L of the reference switch 192, the current for one or more of Icp1, Icp2a, Icp2a, and Icp3 may alternatively be I REF fraction or multiple of .

[0034] The configuration of the switch circuit 180 facilitates the use of switches 184, 186, 188, 190 and 192 to switch the current I output by the current generator 182 to REF Mirrored to Icp1, Icp2a, Icp2b, and Icp3. Then, Icp1, Icp2a, Icp2b, and Icp3 are used as current sources to drive the power drivers 122, 142a, 142b, 162, and 164 of the corresponding power input circuits 120, 140, and 160. Based on the control signals VIN1 ON, VIN2a ON, VIN2b ON, and VIN3 ON received from the controller 102, the corresponding current sources Icp1, Icp2a, Icp2b, and Icp3 are enabled by activating the corresponding switches 184, 186, 188, and 190. The gates of the power drivers 122, 142a, 142b, 162, and 164 are charged by the current sources. In some embodiments, the current generator 182 can be configured to adjust I REF , to increase or decrease the current output of switches 184 , 186 , 188 , 190 , and 192 , so that the corresponding current sources Icp1 , Icp2a , Icp2b , and Icp3 adjust the swing strength of the gates of power drivers 122 , 142a , 142b , 162 , and 164 .

[0035] In one embodiment, the enabling of current sources Icp1, Icp2a, Icp2b, and Icp3 can be performed by the switch circuit 180 in the low voltage domain without using a level shifter. REF Currents in the milliamp range can be generated, and switches 184, 186, 188, and 190 can have a much smaller area on the IC than power drivers 122, 142a, 142b, 162, and 164. For example, in some embodiments, the area used for each switch 184, 186, 188, and 190 can be 10 times smaller than the area used by the corresponding power driver 122, 142a, 142b, 162, and 164.

[0036] By using a charge pump on VOUT instead of individual charge pumps for VIN on each power input channel, the switching of power drivers on any number of power input channels can be controlled using a single charge pump with minimal additional circuitry. This provides a significant area advantage on the IC compared to a configuration using separate charge pumps for each VIN. Additionally, the switching circuitry for controlling the power drivers of each power input channel is configured and controlled in a low voltage domain, thus controlling the switching of the power drivers of each power input channel without the need for a low-to-high voltage level shifter. The low voltage domain switching of the switching circuitry also has a much smaller footprint compared to operational amplifiers and other switching circuitry that would otherwise be used at each power input channel in the high voltage domain. The same switching circuitry is configured to control multiple types of power drivers for different power input channels, including single-path devices, back-to-back connected path devices controlled by a single control signal, and back-to-back connected path devices where each power driver is controlled by a separate control signal.

[0037] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the invention. Unless the context clearly dictates otherwise, the singular forms "a", "an", and "the" as used herein are intended to include the plural forms as well. It should also be understood that the terms "comprises" and / or "comprising", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or combinations thereof.

[0038] The corresponding structures, materials, acts, and equivalents of all apparatus or step plus function elements (if any) in the following claims are intended to include any structure, material, or act for performing the function in combination with other claimed elements as specifically claimed. For purposes of illustration and description, the disclosed embodiments of the invention have been presented, but these embodiments are not intended to be exhaustive or to limit the invention to the disclosed forms. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.

Claims

1. A power multiplexer device comprising: a first power input circuit, the first power input circuit comprising a first power driver, the first power driver comprising a first gate, the first power input circuit being configured to receive power from a first power input channel and output power to a power output channel via the first power driver; a second power input circuit, the second power input circuit comprising a second power driver, the second power driver comprising a second gate, the second power input circuit being configured to receive power from a second power input channel and output power to the power output channel via the second power driver; a charge pump connected to the power output channel, the charge pump configured to generate an output having a voltage greater than a voltage on the power output channel; as well as A switch circuit is connected to the output of the charge pump, and is configured to selectively control the first gate and the second gate to drive the first power input circuit and the second power input circuit to output power to the power output channel.

2. The power multiplexer device of claim 1, wherein: The switch circuit includes a current generator, a first transistor switch corresponding to the first power input circuit, and a second transistor switch corresponding to the second power input circuit; each of the first transistor switch and the second transistor switch being configured as a current mirror driven by a reference current output of the current generator; and The switch circuit is configured as follows: selectively providing a first current output of the first transistor switch to the first gate of the first power driver to selectively control the first gate; and A second current output of the second transistor switch is selectively provided to the second gate of the second power driver to selectively control the second gate.

3. The power multiplexer device of claim 2, wherein the switch circuit is configured to selectively provide the first current output and the second current output of the first transistor switch and the second transistor switch to the first gate and the second gate based on at least one control signal received from a controller. 4 . The power multiplexer device of claim 3 , wherein the first power input circuit and the second power input circuit are in a high voltage domain, and the at least one control signal controls the switch circuit in a low voltage domain.

5. The power multiplexer device of claim 2, wherein: The current generator includes an adjustable current generator configured to adjust the reference current output; The first current output of the first transistor switch is configured to change based on a change in the reference current output, and the change in the first current output is configured to drive a change in the swing strength of the first gate; and The second current output of the second transistor switch is configured to change based on a change in the reference current output, and the change in the second current output is configured to drive a change in the swing strength of the second gate. 6 . The power multiplexer device of claim 1 , wherein the first power input circuit comprises a passive protection device configured to pull down the first gate to the power input channel. 7 . The power multiplexer of claim 6 , wherein the passive protection device comprises a resistor configured to slowly pull the first gate down to the power input channel when the first gate is not powered by the switching circuit. 8 . The power multiplexer of claim 6 , wherein the passive protection device comprises a Zener diode configured to pull the first gate down to the power input channel when a current of the first gate is higher than a predetermined threshold. 9 . The power multiplexer of claim 6 , wherein the first power input circuit comprises an active device configured to quickly pull down the first gate to the power input channel based on a signal received from a controller.

10. The power multiplexer of claim 1, wherein: The second power input circuit further includes a third power driver, the third power driver including a third gate; The second power input circuit is configured to receive power from the second power input channel and output power to the power output channel via the second power driver and the third power driver; and The switch circuit is configured to selectively provide a current output of a transistor switch to both the second gate of the second power driver and the third gate of the third power driver to selectively control the second gate and the third gate.

11. The power multiplexer of claim 1 , wherein: The second power input circuit further includes a third power driver, the third power driver including a third gate; The second power input circuit is configured to receive power from the second power input channel and output power to the power output channel via the second power driver and the third power driver; The switch circuit includes a transistor switch corresponding to the second power input circuit; The transistor switch is configured as a current mirror driven by a reference current output of a current generator in the switch circuit; and The switching circuit is configured to selectively provide a current output of the transistor switch to the third gate of the third power driver to selectively control the third gate separately from the second gate.

12. A semiconductor device comprising: a first power input circuit, the first power input circuit comprising a first power driver, the first power driver comprising a first gate, the first power input circuit being configured to receive power from a first power input channel and output power to a power output channel via the first power driver; a second power input circuit, the second power input circuit comprising a second power driver, the second power driver comprising a second gate, the second power input circuit being configured to receive power from a second power input channel and output power to the power output channel via the second power driver; as well as A switch circuit, comprising a current generator, a first transistor switch corresponding to the first power input circuit, and a second transistor switch corresponding to the second power input circuit, each of the first transistor switch and the second transistor switch being configured as a current mirror driven by a reference current output of the current generator, the switch circuit being configured as: selectively providing a first current output of the first transistor switch to the first gate of the first power driver to selectively control the first gate; and A second current output of the second transistor switch is selectively provided to the second gate of the second power driver to selectively control the second gate.

13. The semiconductor device of claim 12, wherein the switch circuit is configured to selectively provide the first current output and the second current output of the first transistor switch and the second transistor switch to the first gate and the second gate based on at least one control signal received from a controller. 14 . The semiconductor device according to claim 13 , wherein the first power input circuit and the second power input circuit are in a high voltage domain, and the at least one control signal controls the switch circuit in a low voltage domain.

15. The semiconductor device according to claim 12, wherein: The current generator includes an adjustable current generator configured to adjust the reference current output; The first current output of the first transistor switch is configured to change based on a change in the reference current output, and the change in the first current output is configured to drive a change in the swing strength of the first gate; and The second current output of the second transistor switch is configured to change based on a change in the reference current output, and the change in the second current output is configured to drive a change in the swing strength of the second gate. 16 . The semiconductor device of claim 12 , wherein the first power input circuit comprises a passive protection device configured to pull down the first gate to the power input channel, the passive protection device comprising at least one of a resistor and a Zener diode.

17. The semiconductor device of claim 12, wherein the semiconductor device further comprises a charge pump connected to the power output channel, the charge pump being configured to generate an output having a voltage greater than a voltage on the power output channel, the switch circuit being connected to the output of the charge pump.

18. A semiconductor device comprising: A wireless power transmission circuit configured to output a first power input channel; A power multiplexer circuit comprising: a first power input circuit, the first power input circuit comprising a first power driver, the first power driver comprising a first gate, the first power input circuit being configured to receive power from the first power input channel and output power to a power output channel via the first power driver; a second power input circuit, the second power input circuit comprising a second power driver, the second power driver comprising a second gate, the second power input circuit being configured to receive power from a second power input channel and output power to the power output channel via the second power driver; a charge pump connected to the power output channel, the charge pump configured to generate an output having a voltage greater than a voltage on the power output channel; and a switch circuit connected to the output of the charge pump, the switch circuit being configured to selectively control the first gate and the second gate to drive the first power input circuit and the second power input circuit to output power to the power output channel; and The battery charger circuit is configured to receive the power output channel, and the battery charger circuit is configured to charge a battery based on the power output channel.

19. The semiconductor device according to claim 18, wherein: The switch circuit includes a current generator, a first transistor switch corresponding to the first power input circuit, and a second transistor switch corresponding to the second power input circuit; each of the first transistor switch and the second transistor switch being configured as a current mirror driven by a reference current output of the current generator; as well as The switch circuit is configured as follows: selectively providing a first current output of the first transistor switch to the first gate of the first power driver to selectively control the first gate; and A second current output of the second transistor switch is selectively provided to the second gate of the second power driver to selectively control the second gate.

20. The semiconductor device according to claim 19, wherein: The switch circuit is configured to selectively provide the first current output and the second current output of the first transistor switch and the second transistor switch to the first gate and the second gate based on at least one control signal received from a controller; The first power input circuit and the second power input circuit are in a high voltage domain; and The at least one control signal controls the switch circuit in a low voltage domain.

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