Electric pile arrangement optimization method and system for reducing bypass current loss of flow battery

Abstract

The invention belongs to the technical field of flow battery energy storage station electrical architecture galvanic pile arrangement, and particularly relates to a galvanic pile arrangement optimization method and system for reducing flow battery bypass current loss. The method comprises the following steps: determining a bypass current calculation function; the bypass current calculation function comprises an incidence relation among the internal resistance of the electric pile, the bypass resistance and the bypass current; and obtaining a bypass resistance value and a plurality of electric pile internal resistance values, and determining a target electric pile arrangement strategy for electric pile arrangement optimization from the plurality of electric pile internal resistance values by taking the purpose of minimizing the bypass current. According to the method, the generation positions of bypass resistors of an electrolyte inlet pipe, an electrolyte outlet pipe and the like are calculated to establish a system equivalent circuit model, the Kirchhoff law and the Ohm law are applied to obtain the relationship between the arrangement scheme of different galvanic pile characteristics and the bypass current, and a reasonable resistor arrangement scheme is calculated and given through Simulink simulation and a Matlab genetic algorithm. The overall leakage current of the system is minimized by obtaining the overall system efficiency relationship, and the system loss is reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of stack arrangement of the electrical architecture of a flow battery energy storage station, and particularly relates to an optimized method and system for stack arrangement to reduce the bypass current loss of a flow battery. Background Art

[0002] In the modular system built in an iron-chromium flow battery storage tank, the electrical series and process parallel architecture is one of the solutions with low construction cost, high system efficiency, and high construction efficiency in engineering practice. In the iron-chromium flow battery system, multiple stacks of different process systems are usually connected in series by cables to raise the voltage of a single battery cluster and achieve high-power energy storage charging and discharging. In the electrical series and process parallel architecture, the internal resistance and other characteristics of each series-connected stack are different, and there are certain differences in the final charging and discharging characteristics, that is, the voltages presented by the stacks during charging and discharging are different. However, the stacks with electrical series and process parallel use a unified electrolyte inlet pipe, resulting in bypass current in the process pipeline part, thereby reducing the overall system efficiency. Summary of the Invention

[0003] In view of the above problems, the present invention provides an optimized method for stack arrangement to reduce the bypass current loss of a flow battery. The method includes:

[0004] Determine a bypass current calculation function; the bypass current calculation function includes the correlation between the internal resistance of the stack, the bypass resistance, and the bypass current;

[0005] Obtain the bypass resistance value and obtain the internal resistance values of a number of stacks, and determine the target stack arrangement strategy for optimizing the stack arrangement from the internal resistance values of the number of stacks with the goal of minimizing the bypass current.

[0006] Preferably, the internal resistance value of the stack includes diaphragm impedance, solution impedance, electrode impedance, impedance equivalent to reaction kinetics, and bipolar plate impedance.

[0007] Preferably, the obtaining of the bypass resistance value includes:

[0008] Determine the bypass resistance value according to the inner diameter parameter of the electrolyte pipeline, the electrolyte parameter of the iron-chromium flow battery, and the pipeline length.

[0009] Preferably, the determining of the bypass current calculation function includes:

[0010] Based on the rated voltage of the stack product in the hot standby state and the rated current in the charging state, and according to Kirchhoff's law and Ohm's law, determine the bypass current calculation function.

[0011] Preferably, the stack product includes an MW-level iron-chromium flow battery electrical architecture.

[0012] Preferably, aiming at minimizing the bypass current, a target stack arrangement strategy for optimizing stack arrangement is determined from several internal resistances of the stacks, including:

[0013] Substitute the bypass resistance value and then sequentially substitute the internal resistances of the stacks into the bypass current calculation function to determine the minimum bypass current;

[0014] Take the internal resistance value of the stack corresponding to the minimum bypass current as the target stack arrangement strategy for optimizing stack arrangement.

[0015] The present invention also proposes a stack arrangement optimization system for reducing the bypass current loss of a flow battery, and the system includes:

[0016] A first determination module for determining a bypass current calculation function;

[0017] A second determination module for obtaining the bypass resistance value and obtaining several internal resistances of the stacks, and determining a target stack arrangement strategy for optimizing stack arrangement from several internal resistances of the stacks with the aim of minimizing the bypass current.

[0018] Preferably, the bypass current calculation function includes the correlation between the internal resistance of the stack, the bypass resistance and the bypass current.

[0019] Preferably, the second determination module is used to obtain the bypass resistance value, including:

[0020] The second determination module is used to determine the bypass resistance value according to the inner diameter parameter of the electrolyte pipeline, the electrolyte parameter of the iron-chromium flow battery and the pipeline length.

[0021] Preferably, the second determination module is used to determine the bypass current calculation function, including:

[0022] The second determination module determines the bypass current calculation function based on the rated voltage of the stack product and the rated current during the charging state under the hot standby state, and according to Kirchhoff's law and Ohm's law.

[0023] Preferably, the second determination module is used to determine a target stack arrangement strategy for optimizing stack arrangement from several internal resistances of the stacks with the aim of minimizing the bypass current, including:

[0024] The second determination module is used to substitute the bypass resistance value and then sequentially substitute the internal resistances of the stacks into the bypass current calculation function to determine the minimum bypass current;

[0025] Take the internal resistance value of the stack corresponding to the minimum bypass current as the target stack arrangement strategy for optimizing stack arrangement.

[0026] The present invention also proposes a stack arrangement optimization device for reducing the bypass current loss of a flow battery, including:

[0027] A processor and a memory;

[0028] The processor calls a computer program stored in the memory to execute the stack arrangement optimization method for reducing the bypass current loss of the flow battery as described in any one of the above.

[0029] The present invention also provides a computer-readable storage medium,

[0030] wherein a computer program is stored in the computer-readable storage medium. When the computer program is executed by a processor, the processor can execute the stack arrangement optimization method for reducing the bypass current loss of the flow battery as described in any one of the above.

[0031] The present invention has the following beneficial effects:

[0032] Based on the actual design of the iron-chromium flow battery storage tank built-in battery system, the present invention calculates the positions where bypass resistances such as the electrolyte inlet pipe and the outlet pipe are generated, establishes an equivalent circuit model of the system, applies Kirchhoff's and Ohm's laws to obtain the relationship between the arrangement scheme of different stack characteristics and the magnitude of the bypass current, gives a reasonable resistance arrangement scheme through Simulink simulation and Matlab genetic algorithm calculation, and obtains the relationship for the overall system efficiency to minimize the overall leakage current of the system and reduce system losses.

[0033] Other features and advantages of the present invention will be described in the following specification, and part of them will be obvious from the specification or understood by implementing the present invention. The objectives and other advantages of the present invention can be realized and obtained through the structures pointed out in the specification and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0035] Figure 1 A diagram showing the stack arrangement optimization method for reducing the bypass current loss in the embodiments of the present invention;

[0036] Figure 2 A detailed flowchart showing the stack arrangement optimization method for reducing the bypass current loss in the embodiments of the present invention;

[0037] Figure 3 Steps showing the genetic algorithm for optimizing the arrangement scheme in the embodiments of the present invention;

[0038] Figure 4 Show the position where the bypass resistor is generated in the embodiment of the present invention;

[0039] Figure 5 Show the optimized system diagram of the stack arrangement for reducing the bypass current loss in the flow battery in the embodiment of the present invention;

[0040] Figure 6 Show the optimized equipment diagram of the stack arrangement for reducing the bypass current loss in the flow battery in the embodiment of the present invention. Detailed implementation manners

[0041] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be more complete and comprehensive, and will fully convey the concept of the example embodiments to those skilled in the art. The features, structures, or characteristics described may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of the embodiments of the present disclosure. However, those skilled in the art will realize that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. may be used. In other cases, well-known technical solutions are not shown or described in detail to avoid obscuring the various aspects of the present disclosure.

[0042] In addition, the accompanying drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repeated description will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software form, or in one or more hardware units or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0043] The flowcharts shown in the accompanying drawings are only illustrative and do not necessarily include all the steps. For example, some steps can be decomposed, while some steps can be combined or partially combined, so the actual execution order may be changed according to the actual situation.

[0044] The terms "first", "second", etc. in the description and claims of this application and the above accompanying drawings are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances so that the embodiments of the present application described herein can be implemented in an order different from those illustrated or described herein.

[0045] In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or sub-modules need not be limited to those steps or sub-modules clearly listed, but may include other steps or sub-modules not clearly listed or inherent to those processes, methods, products, or devices.

[0046] In a flow battery system, by adding an electrolyte inlet coil after the electrical stacks are connected in series, the bypass resistance can be increased by increasing the length of the electrolyte connection part, thereby reducing the bypass current and the loss of the overall system caused by the bypass current. Through the equivalent simulation of the iron-chromium flow system, it is crucial to find the impact of stack layouts with different electrical characteristics on the overall system.

[0047] By calculating the impact of different single-stack characteristics on the overall system through simulation and changing the series-parallel combination layouts of stacks with different characteristics, the bypass current can be minimized, thereby minimizing the energy consumption loss of the overall energy storage system caused by the bypass current.

[0048] As Figure 1 shown, the present invention proposes an optimized stack arrangement method for reducing the bypass current loss of a flow battery. The method includes the following steps:

[0049] S1 Determine the bypass current calculation function;

[0050] S2 Obtain the bypass resistance value and obtain the internal resistance values of a number of stacks, and determine the target stack arrangement strategy for optimizing the stack arrangement from the internal resistance values of the number of stacks with the goal of minimizing the bypass current.

[0051] Specifically, the bypass current calculation function includes the correlation between the stack internal resistance, the bypass resistance, and the bypass current.

[0052] Specifically, the stack internal resistance values include the diaphragm impedance, the solution impedance, the electrode impedance, the impedance equivalent to the reaction kinetics, and the bipolar plate impedance.

[0053] Specifically, S2 obtaining the bypass resistance value includes:

[0054] Determine the bypass resistance value according to the inner diameter parameter of the electrolyte pipeline, the electrolyte parameter of the iron-chromium flow battery, and the pipeline length.

[0055] Specifically, S2 determining the bypass current calculation function includes:

[0056] Based on the rated voltage of the stack product in the hot standby state and the rated current in the charging state, and according to Kirchhoff's law and Ohm's law, determine the bypass current calculation function.

[0057] Specifically, a stack product includes an MW-level iron-chromium flow battery electrical architecture; MW-level iron-chromium flow battery electrical architecture: optimization of the stack string layout in an iron-chromium flow energy storage power station formed by stacks in a stack cluster that are electrically connected in series in non-identical process liquid circuit loops and stacks in the same process loop.

[0058] Specifically, S2 determines an objective stack arrangement strategy for optimizing stack arrangement from several internal resistances of the stacks with the goal of minimizing the bypass current, including:

[0059] Substitute the bypass resistance value and then sequentially substitute the internal resistance values of the stacks into the bypass current calculation function to determine the minimum bypass current;

[0060] Take the internal resistance value of the stack corresponding to the minimum bypass current as the objective stack arrangement strategy for optimizing stack arrangement.

[0061] To reduce the influence of the bypass current on the iron-chromium flow system and reduce the overall system loss of the iron-chromium flow, the present invention provides a method for reducing the generation of the bypass current, which reduces the overall bypass current by changing the layout arrangement scheme of stacks with different internal resistances. Among them, the stack is equivalent to an ideal voltage source and the internal loss resistance of the battery, including diaphragm impedance, solution impedance, electrode impedance, impedance equivalent to reaction kinetics, and bipolar plate impedance, etc.; the electrolyte inlet pipe is equivalent to a bypass resistance, and the resistance value is obtained according to the inner diameter and length of the pipe in the design drawing.

[0062] The total current of the iron-chromium flow system flows into the positive electrode of the first stack, passes through each series-connected stack in sequence, and flows out from the negative electrode. The positive electrode inlet pipe and the negative electrode inlet pipe are equivalent to the bypass resistance of the electrolyte branch. For the overall model, a series of relationship equations between the bypass current and the stack internal resistance are obtained based on Kirchhoff's law. Based on the genetic algorithm, the situation where the bypass current of the system in a multi-stage series complex system is minimized can be obtained by arranging the stack internal resistances. The specific steps are as follows:

[0063] Step 1, first use an internal resistance meter to measure the internal resistance of each stack in the hot standby state, that is, when the pump frequency and the pressure in front of the stack meet the process requirements. Use the internal resistance meter to obtain the internal resistance of each stack in the system. This internal resistance value includes diaphragm impedance, solution impedance, electrode impedance, impedance equivalent to reaction kinetics, and bipolar plate impedance, etc.

[0064] Step 2. To explore the influence of the stack impedance characteristics on the bypass current, the stack in the hot standby state is approximately equivalent to the form of an ideal voltage source and a resistor; to reduce the generation of bypass current in the process loop, two stacks are connected in parallel in the same process parallel loop, and the same series stack is located in different process loops. Since the characteristics of the stacks connected in parallel in the process are still different, the bypass resistance is calculated to measure its loss, and according to the modular design scheme built into the storage tank, the bypass resistance of each liquid inlet and outlet branch in the system is calculated. Since the bypass current occurs at the parallel connection position of the electrolyte inlet and outlet process pipelines, the bypass resistance is calculated according to the inner diameter parameter and the pipeline length of the electrolyte pipeline:

[0065] Rs = ρL / S;

[0066] In the formula, ρ represents the resistivity, unit: Ω·m; L represents the length, unit: m; S represents the cross-sectional area, unit: m 2 ; Rs represents the resistance, unit: Ω.

[0067] Step 3. Based on the rated voltage of the stack product itself and the constraint conditions of the rated current in the charging state under the hot standby condition, a series of equations related to the stack internal resistance, bypass resistance Rs and bypass current can be listed according to Kirchhoff's and Ohm's laws. For different combinations of stack internal resistances, each internal resistance distribution is traversed in sequence, and analysis and calculation are carried out based on Matlab to obtain the minimum bypass current, that is, the arrangement scheme of the stack internal resistance when the influence of the bypass current is the smallest.

[0068] Step 4. Iterate the bypass current through the genetic algorithm, and finally obtain the stack arrangement scheme with the minimum bypass current for the 2-parallel-6-series architecture.

[0069] As Figure 4 shown, in this embodiment, only the 2-parallel-2-series stack is taken as an example, where R1-R4 are the stack internal resistances, Rs1 and Rs3 are the resistance of the bypass pipeline of path 1; Rs2 is the parallel connection of the resistance of the bypass pipeline of path 2.

[0070] As Figure 2 、 Figure 3 shown, set the constraint conditions for this simulation: I0 is the series constant current of 420 A, V0 is the stable voltage of the stack of 100 V, and I1, I2, I3, I4 are the stack currents.

[0071] Figure 4 In, the positions of the boxes are the positions where the process connections form the bypass current, such as A-D, B-E, C-F, and the current direction is determined by the potential difference of the stacks connected in parallel in the process. Each stack can be equivalent to a voltage source in series with a resistor, R1, R2, R3, R4 are the internal resistances of each stack, and Rs1, Rs2, Rs3 formed by the process liquid paths between the stacks are the bypass resistances.

[0072] According to Kirchhoff's voltage law, the following equations can be obtained:

[0073]

[0074] The relationship between the bypass current (A) and the stack internal resistance (Ω) can be simplified and obtained.

[0075] By solving each stack internal resistance arrangement scheme, the genetic algorithm is applied in Matlab to solve the situation of the resistance arrangement when the bypass current of the overall system is minimized.

[0076] The genetic algorithm is one of the algorithms for solving combinatorial optimization problems, that is, finding the best combination method among a given set of options to meet specific goals or constraints. The genetic algorithm is an optimization algorithm based on the principles of biological evolution, which simulates the genetic and evolutionary processes in nature. By simulating operations such as genetic inheritance, crossover, and mutation of the population, the genetic algorithm can gradually optimize the quality of the solution in the search space and find the optimal or near-optimal solution.

[0077] In combinatorial optimization, the genetic algorithm can solve problems by transforming them into the form of chromosome coding and gene operations. Each chromosome represents a possible solution, and each gene represents an element in the solution. By continuously performing genetic operations such as selection, crossover, and mutation, the genetic algorithm can gradually improve the current solution and approach the optimal solution. The application of the genetic algorithm in combinatorial optimization problems is very extensive. In addition, the genetic algorithm can also be applied to the solution of other complex problems. For example, in function optimization, the genetic algorithm can find the solution that minimizes or maximizes the function value by adjusting the parameters of the function. Such problems usually involve how to select and combine different elements under limited resources and constraints to achieve the optimal result. The genetic algorithm is an effective tool for solving combinatorial optimization problems, with extensive application fields and advantages. By simulating the process of biological evolution, the genetic algorithm can find the optimal or near-optimal solution in a complex search space, providing an effective method for solving practical problems.

[0078] In this case, first, each stack internal resistance arrangement is transformed into a chromosome gene sequence and the total fitness. The chromosome gene sequence is shown as follows:

[0079] xx = [0.02361 0.0445 0.02416 0.02429];

[0080] yy = fitness1(xx)

[0081] [val ind] = sort(R);

[0082] R = xx(ind);

[0084] The calculation formula for the total fitness is shown as follows:

[0085]

[0086] Among them, R n represents the bypass path resistance;

[0087]

[0088] Secondly, determine its population size, crossover probability, mutation probability, number of evolutions, iterate over the overall data, calculate the minimum total fitness, and finally converge.

[0089] As Figure 5 shown, the present invention also proposes a stack layout optimization system for reducing the bypass current loss of a flow battery, characterized in that the system includes:

[0090] The first determination module 10 is used to determine the bypass current calculation function;

[0091] The second determination module 20 is used to obtain the bypass resistance value and obtain the internal resistance values of a number of stacks, and determine the target stack layout strategy for optimizing the stack layout from the internal resistance values of the number of stacks with the goal of minimizing the bypass current.

[0092] As Figure 6 shown, corresponding to the above-provided stack layout optimization method for reducing the bypass current loss of a flow battery, the present invention also provides a stack layout optimization device for reducing the bypass current loss of a flow battery. Since the embodiments of this device are similar to the above method embodiments, the description is relatively simple. For the relevant parts, please refer to the description of the above method embodiments. The device described below is only illustrative. The device may include: a processor 1, a memory 2, a communication bus (i.e., the above device bus), and a search engine. Among them, the processor 1 and the memory 2 complete mutual communication through the communication bus and communicate with the outside through a communication interface. The processor 1 can call the logical instructions in the memory 2 to execute the stack layout optimization method for reducing the bypass current loss of a flow battery.

[0093] In addition, when the logic instructions in the above-mentioned memory 2 can be implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: storage chips, USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs, etc., which can store program codes.

[0094] On the other hand, an embodiment of the present invention further provides a processor-readable storage medium, on which a computer program 3 is stored. When the computer program 3 is executed by the processor 1, it is configured to execute the stack arrangement optimization method for reducing the bypass current loss of the flow battery provided in the above-mentioned various embodiments.

[0095] The processor-readable storage medium may be any available medium or data storage device accessible by the processor 1, including but not limited to magnetic memories (such as floppy disks, hard disks, magnetic tapes, magneto-optical discs (MO), etc.), optical memories (such as CDs, DVDs, BDs, HVDs, etc.), and semiconductor memories (such as ROM, EPROM, EEPROM, non-volatile memories (NANDFLASH), solid-state drives (SSD)).

[0096] Those of ordinary skill in the art should understand that: Although the present invention has been described in detail with reference to the foregoing embodiments, it is still possible to modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. An optimization method for the stack arrangement to reduce the bypass current loss of a flow battery, characterized in that The method includes: Determining a bypass current calculation function; the bypass current calculation function includes the correlation relationship between the stack internal resistance, the bypass resistance, and the bypass current; Obtaining the bypass resistance value and obtaining several stack internal resistance values, and determining the target stack layout strategy for optimizing the stack layout from several stack internal resistance values with the goal of minimizing the bypass current.

2. The method for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 1, wherein The stack internal resistance value includes the diaphragm impedance, the solution impedance, the electrode impedance, the impedance equivalent to the reaction kinetics, and the bipolar plate impedance.

3. The method for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 1, wherein The obtaining of the bypass resistance value includes: Determining the bypass resistance value according to the inner diameter parameter of the electrolyte pipeline, the electrolyte parameter of the iron-chromium flow battery, and the pipeline length.

4. The method for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 1, wherein The determining of the bypass current calculation function includes: Based on the rated voltage of the stack product in the hot standby state and the rated current in the charging state, and according to Kirchhoff's law and Ohm's law, determining the bypass current calculation function.

5. The method for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 4, wherein The stack product includes an MW-level iron-chromium flow battery electrical architecture.

6. The method for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 1, wherein Determining the target stack layout strategy for layout optimization from several stack internal resistance values with the goal of minimizing the bypass current includes: Substituting the bypass resistance value and sequentially substituting the stack internal resistance values into the bypass current calculation function to determine the minimum bypass current; Taking the order of the stack internal resistance values corresponding to the minimum bypass current as the target stack layout strategy for optimizing the stack layout.

7. An optimized system for stack arrangement to reduce the bypass current loss of a flow battery, characterized in that, The system includes: A first determination module for determining a bypass current calculation function; A second determination module for obtaining the bypass resistance value and obtaining several stack internal resistance values, and determining the target stack layout strategy for optimizing the stack layout from several stack internal resistance values with the goal of minimizing the bypass current.

8. The system for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 7, wherein The bypass current calculation function includes the correlation relationship between the stack internal resistance, the bypass resistance, and the bypass current.

9. The system for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 7, wherein The second determination module is used to obtain the bypass resistance value, including: The second determination module is used to determine the bypass resistance value according to the inner diameter parameter of the electrolyte pipeline, the electrolyte parameter of the iron-chromium flow battery, and the pipeline length.

10. The system for optimizing the stack layout to reduce the bypass current loss of a flow battery according to claim 7, wherein The second determination module is used to determine the bypass current calculation function, including: The second determination module determines the bypass current calculation function based on the rated voltage of the stack product in the hot standby state and the rated current in the charging state, and according to Kirchhoff's law and Ohm's law.

11. The stack arrangement optimization system for reducing the bypass current loss of a flow battery according to claim 7, wherein the second determination module is configured to determine an optimal stack arrangement strategy for stack arrangement optimization from several internal resistances of the stacks with the goal of minimizing the bypass current, including: the second determination module is configured to substitute the bypass resistance value and sequentially substitute the internal resistance values of the stacks into the bypass current calculation function to determine the minimum bypass current; The internal resistance value of the stack corresponding to the minimum bypass current is used as the target stack arrangement strategy for stack arrangement optimization.

12. An optimized device for the stack arrangement to reduce the bypass current loss of a flow battery, characterized in that, including: a processor and a memory; The processor calls the computer program stored in the memory to execute the stack arrangement optimization method for reducing the bypass current loss of a flow battery according to any one of claims 1 to 6.

13. A computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the processor is enabled to execute the stack arrangement optimization method for reducing the bypass current loss of a flow battery according to any one of claims 1 to 6.

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