Probabilistic cellular automaton computing system and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, and provides a probabilistic cellular automaton calculation system and a preparation method thereof.The system comprises a control module and at least three calculation modules arranged in an array, determining a calculation module corresponding to the to-be-determined state cell and a calculation module corresponding to a cell adjacent to the to-be-determined state cell, generating a corresponding control signal, and sending the control signal to the corresponding selected calculation module; the calculation module corresponding to the adjacent cell obtains cell state information stored in the calculation module according to the received control signal, and sends the obtained cell state information to the calculation module corresponding to the cell with the state to be determined; and the calculation module corresponding to the state-to-be-determined cell obtains the cell state information stored in the calculation module according to the received control signal, and executes corresponding logical operation in combination with the received cell state information. According to the invention, through the calculation modules arranged in an array, a probability cellular automatic device with high parallelization, high energy efficiency ratio and low hardware cost is constructed.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a probabilistic cellular automata computing system and a preparation method thereof. Background Art

[0002] Cellular Automata (CA) is a completely parallel computing model proposed by John Von Neumann. The CA model includes a discrete cellular space composed of a number of cells. The state of each cell consists of a finite number of information bits. Driven by the same clock, according to the same local evolution rules, the states of each cell are updated synchronously (in parallel). On this basis, researchers further introduced randomness and developed Probabilistic Cellular Automata (PCA) to better simulate the uncertainty and complexity in the real world.

[0003] Probabilistic cellular automata is an important model for simulating complex dynamic systems. However, existing probabilistic cellular automata are generally based on the traditional von Neumann architecture in software and hardware implementation. Since the computing unit is separated from the storage unit in this architecture, challenges such as the "memory wall problem" and the "power consumption wall problem" gradually emerge when processing data-intensive tasks such as neural networks, thus limiting the computing efficiency and energy efficiency ratio of probabilistic cellular automata. Summary of the Invention

[0004] The present invention provides a probabilistic cellular automata computing system and a preparation method thereof, to solve the defects in the prior art such as the emergence of the "memory wall problem" and the "power consumption wall problem" due to the separation of the computing unit and the storage unit, and to construct a computing module arranged in an array to construct a probabilistic cellular automata with high parallelization, high energy efficiency ratio and low hardware cost.

[0005] The present invention provides a probabilistic cellular automaton computing system, which includes a control module and at least three computing modules arranged in an array. The computing modules are used to store the cellular state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other. Among them: The control module determines the computing module corresponding to the cell with the state to be determined and the computing modules corresponding to the adjacent cells of the cell with the state to be determined according to the cell with the state to be determined, and generates corresponding control signals according to each selected computing module and sends them to the corresponding selected computing modules; The computing modules corresponding to the adjacent cells of the cell with the state to be determined obtain the cellular state information stored therein according to the received control signals, and send the obtained cellular state information to the computing module corresponding to the cell with the state to be determined; The computing module corresponding to the cell with the state to be determined obtains the cellular state information stored therein according to the received control signals, and combines the received cellular state information to perform corresponding logical operations to update the cellular state information of the cell with the state to be determined according to the results of the logical operations.

[0006] According to a probabilistic cellular automaton computing system provided by the present invention, the computing module includes a storage unit, an operation unit, a first switch unit and a second switch unit. For any selected computing module, among them: The first switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit belonging to the same computing module and other adjacent selected computing modules; The second switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit belonging to the same computing module and the operation unit; The storage unit obtains the cellular state information stored therein and sends it to the operation unit of other adjacent selected computing modules when the first switch unit is in the open state and the second switch unit is in the off state, or when the first switch unit is in the off state, the second switch unit is in the off state, and the first switch unit of other adjacent selected computing modules is in the open state; Or, when the first switch unit is in the open state and the second switch unit is in the open state, obtain the cellular state information stored therein and send it to the operation unit belonging to the same computing module; The operation unit receives the cellular state information sent by the storage unit belonging to the same computing module and the cellular state information sent by the storage units of other adjacent selected computing modules when the first switch unit and the second switch unit are both in the open state, and performs corresponding logical operations according to the received cellular state information; Or, when the first switch unit is in the open state and the second switch unit is in the off state, it does not perform corresponding logical operations.

[0007] A probability cellular automaton calculation system provided by the present invention. The calculation modules corresponding to the adjacent cells of the cell with the state to be determined include a first calculation module and a second calculation module. The calculation module includes a storage unit, an arithmetic unit, a first switch unit, and a second switch unit, wherein: a control module determines the calculation module corresponding to the cell with the state to be determined, the first calculation module and the second calculation module corresponding to the adjacent cells of the cell with the state to be determined according to the cell with the state to be determined; generates a first control signal according to the storage unit of the calculation module corresponding to the cell with the state to be determined and sends the first control signal to the corresponding storage unit; generates a second control signal according to the first switch unit of the calculation module corresponding to the cell with the state to be determined and sends the second control signal to the corresponding first switch unit; generates a third control signal according to the second switch unit of the calculation module corresponding to the cell with the state to be determined and sends the third control signal to the corresponding second switch unit; generates corresponding fourth control signals according to the storage units corresponding to the first calculation module and the second calculation module and sends the corresponding fourth control signals to the corresponding storage units; generates a fifth control signal according to the first switch unit of the first calculation module and sends the fifth control signal to the corresponding first switch unit; generates corresponding sixth control signals according to the second switch units corresponding to the first calculation module and the second calculation module and sends the corresponding sixth control signals to the corresponding second switch units; and generates a seventh control signal according to the first switch unit corresponding to the second calculation module and sends the seventh control signal to the corresponding first switch unit. The first switch unit of the calculation module corresponding to the cell with the state to be determined controls the corresponding first switch unit to be in an open state according to the received second control signal; the second switch unit of the calculation module corresponding to the cell with the state to be determined controls the corresponding second switch unit to be in an open state according to the received third control signal; the first switch unit of the first calculation module controls the corresponding first switch unit to be in an open state according to the received fifth control signal; the second switch units corresponding to the first calculation module and the second calculation module respectively control the corresponding second switch units to be in a disconnected state according to the corresponding received sixth control signals; the first switch unit corresponding to the second calculation module controls the corresponding first switch unit to be in a disconnected state according to the corresponding received seventh control signal; the storage units corresponding to the first calculation module and the second calculation module respectively obtain the cell state information stored therein according to the received fourth control signals and send it to the arithmetic unit of the calculation module corresponding to the cell with the state to be determined; the storage unit of the calculation module corresponding to the cell with the state to be determined obtains the cell state information stored therein according to the received first control signal and sends it to the arithmetic unit of the calculation module corresponding to the cell with the state to be determined; the arithmetic unit of the calculation module corresponding to the cell with the state to be determined performs corresponding logical operations according to the received cell state information, and the arithmetic units of the first calculation module and the second calculation module do not perform corresponding logical operations.

[0008] A probability cellular automaton calculation system provided by the present invention, the cell state information includes the cell state value of the corresponding cell and the inverse of the cell state value. The operation unit of the calculation module corresponding to the cell with undetermined state uses a memristor with a preset true random probability. The memristor with a preset true random probability is used for: for the calculation module corresponding to the cell with undetermined state and the calculation module corresponding to the adjacent cells of the cell with undetermined state, arranging and combining the corresponding cell state value and the inverse of the cell state value, and for each arrangement and combination, combining the preset true random probability to perform a NAND gate logic operation to obtain the operation result of the corresponding arrangement and combination; according to the operation results of all the arrangement and combinations, selecting the low-level operation result as the logic operation result, and according to the logic operation result, updating the cell state value and the inverse of the cell state value of the cell with undetermined state, and updating the updated cell state value and the inverse of the cell state value to the storage unit of the calculation module corresponding to the cell with undetermined state and updating the state of the storage unit, and updating the state of the memristor.

[0009] A probability cellular automaton calculation system provided by the present invention, the operation unit and / or the storage unit includes: a substrate; a first electrode located on the substrate; an insulating layer located on the first electrode; a second electrode located on the insulating layer and connected to the control module; wherein, the first electrode of the operation unit is connected to the second switching unit belonging to the same calculation module; the first electrode of the storage unit is respectively connected to the first switching unit and the second switching unit belonging to the same calculation module.

[0010] A probability cellular automaton calculation system provided by the present invention, the first switching unit and / or the second switching unit includes: a gate located on the substrate; a gate control layer located on the gate and connected to the control module; a channel material layer located on the gate control layer; a source electrode and a drain electrode located on the gate control layer, and the source electrode and the drain electrode are relatively located on both sides of the channel material layer; wherein, the source electrodes of the first switching unit and the second switching unit are respectively connected to the storage unit belonging to the same calculation module, the drain electrode of the first switching unit is connected to the source electrode of the second switching unit of the adjacent other selected calculation module, and the drain electrode of the second switching unit is connected to the operation unit belonging to the same calculation module.

[0011] A probabilistic cellular automaton computing system provided according to the present invention, the substrate includes a first substrate and a second substrate, the second substrate is located on the first substrate, the material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon and intrinsic silicon, and the material of the second substrate includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; the material of the first electrode includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; the material of the second electrode includes at least one of titanium nitride, silver, copper and aluminum; the material of the insulating layer includes at least one of hafnium oxide, aluminum oxide, silicon oxide and various hybrid laminates, and the hybrid laminate is used to characterize a multi-layer structure with specific properties formed by superimposing materials with different materials, different structures or different functions on the same substrate through a preset process; the material of the gate includes at least one of titanium, palladium, platinum, bismuth, gold and chromium; the material of the gate control layer includes at least one of silicon dioxide, hafnium oxide and aluminum oxide; the material of the channel material layer includes at least one of molybdenum sulfide, tungsten selenide and indium tin; the material of the source and drain includes at least one of titanium, palladium, platinum, bismuth, gold and chromium.

[0012] The present invention also provides a method for manufacturing a probabilistic cellular automaton computing system, which is applied to the probabilistic cellular automaton computing system described in any one of the above, and the method includes: providing a substrate; forming at least three computationally modular arrays arranged in an array on the substrate, the computational module is used to store the cell state information of the cell, and the cells stored in adjacent computational modules are adjacent cells to each other; using a preset interconnection technology, interconnecting at least three computationally modular arrays arranged in an array, and respectively interconnecting at least three computationally modular arrays arranged in an array with a control module.

[0013] A method for preparing a probability cellular automata computing system according to the present invention, the computing module includes a storage unit, an arithmetic unit, a first switching unit, and a second switching unit. At least three computing modules arranged in an array are formed on a substrate, including: etching the substrate using a first preset mask to determine the substrate positions of the corresponding units of each computing module; wherein, the first preset mask is obtained according to the positions and patterns of the corresponding units of each computing module; growing a bottom back gate on the substrate positions corresponding to each first switching unit and each second switching unit to form corresponding gates; based on wet transfer, transferring the channel material layer grown on a preset substrate to the gates to form a gate control layer, and using a second preset mask to pattern each gate control layer to obtain a corresponding patterned structure; wherein, the second preset mask is obtained according to the positions and patterns of the source and drain electrodes; using a third preset mask to perform photolithography on the substrate positions corresponding to each storage unit and arithmetic unit to obtain corresponding photolithography patterns; wherein, the third preset mask is obtained according to the position and pattern of the first electrode; performing metal sputtering on the patterned structure and the photolithography pattern to form a source and a drain corresponding to the patterned structure to obtain corresponding first switching units and second switching units, and forming a first electrode corresponding to the photolithography pattern; forming an insulating layer on the first electrode; forming a second electrode on the insulating layer to obtain corresponding arithmetic units and storage units.

[0014] A preparation method of a probability cellular automaton computing system according to the present invention forms at least three computing modules arranged in an array on a substrate, further comprising: patterning each gate control layer by using a second preset mask to obtain corresponding patterned structures; wherein, the second preset mask is obtained according to the positions and patterns of the source electrode and the drain electrode and the positions and patterns of the first interconnections respectively corresponding to the source electrode and the drain electrode; performing photolithography on the sub-substrates corresponding to each storage unit and arithmetic unit by using a third preset mask to obtain corresponding photolithography patterns; wherein, the third preset mask is obtained according to the position and pattern of the first electrode and the position and pattern of the second interconnection corresponding to the first electrode; performing metal sputtering on the patterned structures and the photolithography patterns to form a source electrode, a drain electrode, a first interconnection corresponding to the source electrode, and a first interconnection corresponding to the drain electrode corresponding to the patterned structures, and forming a first electrode and a second interconnection corresponding to the first electrode corresponding to the photolithography patterns; interconnecting at least three computing modules arranged in an array by using a preset interconnection technique, including: connecting the first interconnection corresponding to the drain electrode of each first switching unit to the first interconnection corresponding to the source electrode of the second switching unit of an adjacent other selected computing module by using the preset interconnection technique, connecting the first interconnection corresponding to the source electrode of each first switching unit to the second interconnection corresponding to the first electrode of the arithmetic unit belonging to the same computing module, connecting the first interconnection corresponding to the drain electrode of each second switching unit to the second interconnection corresponding to the first electrode of the arithmetic unit belonging to the same computing module, and connecting the first interconnection corresponding to the source electrode of each second switching unit to the second interconnection corresponding to the first electrode of the storage unit belonging to the same computing module.

[0015] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the preparation method of any one of the above probability cellular automaton computing systems is implemented.

[0016] The present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the preparation method of any one of the above probability cellular automaton computing systems is implemented.

[0017] The present invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, the preparation method of any one of the above probability cellular automaton computing systems is implemented.

[0018] The probabilistic cellular automaton computing system provided by the present invention and its preparation method are characterized in that the control module is responsible for overall coordination and control. According to the cells with undetermined states, the corresponding computing modules and the computing modules corresponding to their adjacent cells are identified, and control signals are generated and sent, so as to achieve complex computing tasks and dynamic adjustment. The adjacent computing modules store adjacent cells, which facilitates the rapid exchange of cell state information, reduces the time delay of data transmission, and each computing module is only responsible for processing and storing the cell state information of specific cells, avoiding data redundancy and improving data utilization efficiency, thereby constructing a probabilistic cellular automaton with high parallelism, high energy efficiency ratio and low hardware cost. In addition, since the computing modules are arranged in an array and are independent of each other, the states of multiple cells can be calculated and updated simultaneously, greatly saving computing time and computing resources and significantly improving computing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0020] Figure 1 is one of the schematic structural diagrams of the probabilistic cellular automaton computing system provided by the present invention; Figure 2 is another schematic structural diagram of the probabilistic cellular automaton computing system provided by the present invention; Figure 3 is a schematic diagram showing the relationship between pulse width and corresponding true random probability provided by the present invention; Figure 4 is a schematic diagram showing the relationship between pulse amplitude and corresponding true random probability provided by the present invention; Figure 5 is a schematic flow chart of the preparation method of the probabilistic cellular automaton computing system provided by the present invention; Figures 6 - 9 is a sectional view corresponding to different steps of the preparation method of the probabilistic cellular automaton computing system provided by the present invention; Figure 10 is a schematic structural diagram of the electronic device provided by the present invention.

[0021] Reference numerals: 1: control module; 2: computing module: 21: storage unit; 22: operation unit; 23: first switch unit; 24: second switch unit; 25: voltage dividing unit; 31: substrate; 32: gate; 33: gate control layer; 34: channel material layer: 35: source / drain; 36: first electrode; 37: insulating layer; 38: second electrode. Detailed implementation manners

[0022] To make the objectives, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below with reference to the accompanying drawings in the present invention. Apparently, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present invention without making creative efforts shall fall within the protection scope of the present invention.

[0023] Figure 1 is one of the structural schematic diagrams of the probability cellular automata calculation system provided by the present invention, as Figure 1 shown. The system includes a control module and at least three calculation modules arranged in an array. The calculation modules are used to store the cell state information of cells, and the cells stored in adjacent calculation modules are adjacent cells to each other, where: The control module determines the calculation module corresponding to the cell with undetermined state and the calculation modules corresponding to the adjacent cells of the cell with undetermined state according to the cell with undetermined state, and generates corresponding control signals according to each selected calculation module and sends them to the corresponding selected calculation modules; The calculation modules corresponding to the adjacent cells of the cell with undetermined state obtain the cell state information stored therein according to the received control signals, and send the obtained cell state information to the calculation module corresponding to the cell with undetermined state; The calculation module corresponding to the cell with undetermined state obtains the cell state information stored therein according to the received control signals, and performs corresponding logical operations in combination with the received cell state information to update the cell state information of the cell with undetermined state according to the results of the logical operations.

[0024] In this embodiment, with reference to Figure 2, the computing module includes a storage unit 21, an arithmetic unit 22, a first switch unit 23, and a second switch unit 24. For any selected computing module, where: The first switch unit 23 controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit 21 belonging to the same computing module and other adjacent selected computing modules; The second switch unit 24 controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit 21 belonging to the same computing module and the arithmetic unit 22; The storage unit 21, when the first switch unit 23 is in the open state and the second switch unit 24 is in the off state, or when the first switch unit 23 is in the off state, the second switch unit 24 is in the off state, and the first switch unit 23 of other adjacent selected computing modules is in the open state, obtains the cell state information stored therein and sends it to the arithmetic unit 22 of other adjacent selected computing modules; Or, when the first switch unit 23 is in the open state and the second switch unit 24 is in the open state, obtains the cell state information stored therein and sends it to the arithmetic unit 22 belonging to the same computing module; The arithmetic unit 22, when the first switch unit 23 and the second switch unit 24 are both in the open state, receives the cell state information sent by the storage unit 21 belonging to the same computing module and the cell state information sent by the storage unit 21 of other adjacent selected computing modules, and performs corresponding logical operations according to the received cell state information; Or, when the first switch unit is in the open state and the second switch unit is in the off state, does not perform corresponding logical operations.

[0025] Further, the first switch unit is connected to the second switch unit of other adjacent selected computing modules.

[0026] Specifically, in an optional embodiment, the computing modules corresponding to the neighboring cells of the cell to be determined include a first computing module and a second computing module. The computing module includes a storage unit, an arithmetic unit, a first switching unit, and a second switching unit, where: The control module determines the computing module corresponding to the cell to be determined and the first and second computing modules corresponding to the neighboring cells of the cell to be determined according to the cell to be determined; generates a first control signal according to the storage unit of the computing module corresponding to the cell to be determined and sends the first control signal to the corresponding storage unit; generates a second control signal according to the first switching unit of the computing module corresponding to the cell to be determined and sends the second control signal to the corresponding first switching unit; generates a third control signal according to the second switching unit of the computing module corresponding to the cell to be determined and sends the third control signal to the corresponding second switching unit; generates corresponding fourth control signals according to the storage units corresponding to the first and second computing modules and sends the corresponding fourth control signals to the corresponding storage units; generates a fifth control signal according to the first switching unit of the first computing module and sends the fifth control signal to the corresponding first switching unit; generates corresponding sixth control signals according to the second switching units corresponding to the first and second computing modules and sends the sixth control signals to the corresponding second switching units; and generates a seventh control signal according to the first switching unit corresponding to the second computing module and sends the seventh control signal to the corresponding first switching unit; The first switching unit of the computing module corresponding to the cell to be determined controls the corresponding first switching unit to be in an open state according to the received second control signal; the second switching unit of the computing module corresponding to the cell to be determined controls the corresponding second switching unit to be in an open state according to the received third control signal; the first switching unit of the first computing module controls the corresponding first switching unit to be in an open state according to the received fifth control signal; the second switching units corresponding to the first and second computing modules respectively control the corresponding second switching units to be in a disconnected state according to the corresponding received sixth control signals; the first switching unit corresponding to the second computing module controls the corresponding first switching unit to be in a disconnected state according to the corresponding received seventh control signal; the storage units corresponding to the first and second computing modules respectively obtain the cell state information stored therein according to the received fourth control signals and send it to the arithmetic unit of the computing module corresponding to the cell to be determined; the storage unit of the computing module corresponding to the cell to be determined obtains the cell state information stored therein according to the received first control signal and sends it to the arithmetic unit of the computing module corresponding to the cell to be determined; the arithmetic unit of the computing module corresponding to the cell to be determined performs corresponding logical operations according to the received cell state information, and the arithmetic units of the first and second computing modules do not perform corresponding logical operations.

[0027] In an alternative embodiment, the computing module further includes a voltage dividing unit, which is respectively connected to the arithmetic unit and the second switching unit to achieve voltage regulation. It should be added that the voltage dividing unit can select a resistor with a certain resistance value according to the actual design or prior experience, and no further limitation is made here.

[0028] In addition, the cell state information includes the cell state value of the corresponding cell and the inverse of the cell state value. The storage unit includes a first storage subunit and a second storage subunit. The first storage subunit is used to store the cell state value of the corresponding cell, and the second storage subunit is used to store the inverse of the cell state value of the corresponding cell.

[0029] In an alternative embodiment, the arithmetic unit of the computing module corresponding to the cell with undetermined state uses a memristor with a preset true random probability. The memristor with a preset true random probability is used for: for the computing module corresponding to the cell with undetermined state and the computing module corresponding to the adjacent cell of the cell with undetermined state, arranging and combining the corresponding cell state value and the inverse of the cell state value, and for each arrangement and combination, combining the preset true random probability, performing a NAND gate logic operation to obtain the operation result corresponding to the arrangement and combination; according to the operation results of all the arrangement and combinations, selecting the low-level operation result as the logic operation result, and according to the logic operation result, updating the cell state value and the inverse of the cell state value of the cell with undetermined state, and updating the updated cell state value and the inverse of the cell state value to the storage unit corresponding to the computing module of the cell with undetermined state and updating the state of the storage unit, as well as updating the state of the memristor.

[0030] It should be added that after updating the state information of the current cell, the state update of the next cell can be obtained by traversing the cell state information stored in the corresponding storage unit. Specifically, it can refer to the cell state update method of the above-mentioned cell with undetermined state, and no repeated description is made here.

[0031] In addition, the preset true random probability can adjust the corresponding pulse width and pulse amplitude according to the actual design requirements and prior experience. The relationship between the pulse width and the corresponding true random probability can be referred to Figure 3 as shown, and the relationship between the pulse amplitude and the corresponding true random probability can be referred to Figure 4 as shown.

[0032] It should be noted that when the voltage pulse amplitude applied to the memristor is large enough and the width is long enough, its evolution rule loses randomness, and thus all functions of the basic cellular automaton can be realized in the present invention. This invention provides a new idea for breaking the traditional von Neumann architecture and developing a high-performance computing architecture.

[0033] In an alternative embodiment, the storage unit and the arithmetic unit may adopt memristors. Accordingly, the arithmetic unit and / or the storage unit includes: a substrate; a first electrode located on the substrate; an insulating layer located on the first electrode; a second electrode located on the insulating layer and connected to the control module; wherein the first electrode of the arithmetic unit is connected to the second switching unit belonging to the same computing module; the first electrode of the storage unit is respectively connected to the first switching unit and the second switching unit belonging to the same computing module.

[0034] In an alternative embodiment, the substrate includes a first substrate and a second substrate. The second substrate is located on the first substrate. The material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon, and intrinsic silicon. The material of the second substrate includes at least one of silicon dioxide (SiO2), hafnium oxide (HfO2), and aluminum oxide (Al2O3).

[0035] In an alternative embodiment, the material of the first electrode includes at least one of titanium (Ti), palladium (Pd), platinum (Pt), bismuth (Bi), gold (Au), and chromium (Cr).

[0036] In an alternative embodiment, the material of the second electrode includes at least one of titanium nitride (TiN), silver (Ag), copper (Cu), and aluminum (Al).

[0037] In an alternative embodiment, the material of the insulating layer includes at least one of hafnium oxide (HfO2), aluminum oxide (Al2O3), silicon oxide, and various hybrid laminates. The hybrid laminate is used to characterize a multi-layer structure with specific properties formed by stacking materials with different materials, different structures, or different functions on the same substrate through a preset process.

[0038] In an alternative embodiment, the first switching unit and the second switching unit may adopt transistors. Accordingly, the first switching unit and / or the second switching unit includes: a substrate; a gate located on the substrate; a gate control layer located on the gate and connected to the control module; a channel material layer located on the gate control layer; a source electrode and a drain electrode located on the gate control layer, and the source electrode and the drain electrode are relatively located on both sides of the channel material layer; wherein the source electrodes of the first switching unit and the second switching unit are respectively connected to the storage unit belonging to the same computing module, the drain electrode of the first switching unit is connected to the source electrode of the second switching unit of an adjacent other selected computing module, and the drain electrode of the second switching unit is connected to the arithmetic unit belonging to the same computing module.

[0039] It should be added that the source electrodes of the first switching unit and the second switching unit are respectively connected to the first electrode of the storage unit belonging to the same computing module, and the drain electrode of the second switching unit is connected to the first electrode of the arithmetic unit belonging to the same computing module.

[0040] In an alternative embodiment, the material of the gate includes at least one of titanium (Ti), palladium (Pd), platinum (Pt), bismuth (Bi), gold (Au), and chromium (Cr).

[0041] In an alternative embodiment, the material of the gate control layer includes at least one of silicon dioxide (SiO2), hafnium oxide (HfO2), and aluminum oxide (Al2O3).

[0042] In an alternative embodiment, the material of the channel material layer includes at least one of molybdenum disulfide (MoS2), tungsten diselenide (WSe2), and indium tin.

[0043] In an alternative embodiment, the material of the source and drain includes at least one of titanium (Ti), palladium (Pd), platinum (Pt), bismuth (Bi), gold (Au), and chromium (Cr).

[0044] In summary, in the embodiments of the present invention, the control module is responsible for overall coordination and control to identify the corresponding computing module and the computing modules corresponding to its adjacent cells according to the cell to be determined, generate and send control signals, thereby implementing complex computing tasks and dynamic adjustment. The adjacent computing modules store adjacent cells to facilitate the rapid exchange of cell state information, reduce the time delay of data transmission, and each computing module is only responsible for processing and storing the cell state information of specific cells, avoiding data redundancy and improving data utilization efficiency, thereby constructing a probabilistic cellular automaton with high parallelism, high energy efficiency ratio, and low hardware cost. In addition, since the computing modules are arranged in an array and are independent of each other, the states of multiple cells can be calculated and updated simultaneously, greatly saving computing time and computing resources and significantly improving computing efficiency.

[0045] Next, a method for preparing the probabilistic cellular automaton computing system provided by the present invention will be described. The method for preparing the probabilistic cellular automaton computing system described below can be mutually referred to with the probabilistic cellular automaton computing system described above.

[0046] Figure 5 A flowchart showing a method for preparing a probabilistic cellular automaton computing system is shown. This method is applied to the probabilistic cellular automaton computing system described above, and the method includes: S51, providing a substrate; S52, forming at least three computing modules arranged in an array on the substrate. The computing modules are used to store the cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other; S53, interconnecting at least three computing modules arranged in an array using a preset interconnection technology, and respectively interconnecting at least three computing modules arranged in an array with a control module.

[0047] It should be noted that the step numbers "S51 - S52" in this specification do not represent the sequence of the preparation method of the probabilistic cellular automaton computing system. The following specifically combines Figures 6 - 9 to describe the preparation method of the probabilistic cellular automaton computing system of the present invention.

[0048] Step S51, referring to Figure 6 , provide a substrate 31.

[0049] In this embodiment, the substrate includes a first substrate and a second substrate. The second substrate is formed on the first substrate. The specific material selection can be based on what is described above, and no further limitation is made here.

[0050] Preferably, the material of the first substrate is P-type doped silicon, and the material of the second substrate is selected as silicon dioxide. A heterostructure is formed by the combination of P-type doped silicon and silicon dioxide to utilize the advantages of the two materials, achieve more complex device designs and functions, and is conducive to integrating multiple devices, such as transistors, memristors, etc., to realize more complex circuit functions on the same chip. In the actual design process, the thickness of the substrate can be selected according to actual design requirements or prior experience, such as 300 nm, etc., and no further limitation is made here.

[0051] Step S52, form at least three calculation modules arranged in an array on the substrate. The calculation modules are used to store the cell state information of the cells, and the cells stored in adjacent calculation modules are adjacent cells to each other.

[0052] In this embodiment, the calculation module includes a storage unit, an arithmetic unit, a first switch unit, and a second switch unit. The specific structure can refer to the above, and no repeated description is made here.

[0053] Correspondingly, referring to Figures 7 - 9, at least three array - arranged computing modules are formed on a substrate, including: using a first preset mask to perform photolithography and etching on the substrate to determine the substrate positions of the corresponding units of each computing module; wherein, the first preset mask is obtained according to the positions and patterns of the corresponding units of each computing module; growing an underlying back - gate on the substrate positions corresponding to each first switching unit and each second switching unit to form a corresponding gate 32; based on wet transfer, transferring the channel material layer grown on a preset substrate to the gate to form a gate - controlled layer 33, and using a second preset mask to pattern each gate - controlled layer to obtain a corresponding patterned structure; wherein, the second preset mask is obtained according to the positions and patterns of the source and drain; using a third preset mask to perform photolithography on the substrate positions corresponding to each storage unit and each arithmetic unit to obtain a corresponding photolithography pattern; wherein, the third preset mask is obtained according to the position and pattern of the first electrode; performing metal sputtering on the patterned structure and the photolithography pattern to form a source and a drain 35 corresponding to the patterned structure to obtain corresponding first switching units and second switching units, and to form a first electrode 36 corresponding to the photolithography pattern; forming an insulating layer 37 on the first electrode 36; forming a second electrode 38 on the insulating layer 37 to obtain corresponding arithmetic units and storage units.

[0054] It should be added that the formation method of the second electrode can refer to that of the first electrode and will not be further described here. In addition, the preset substrate can be a sapphire substrate, that is, a channel material layer is pre - formed on the sapphire substrate to facilitate subsequent transfer to the corresponding gate - controlled layer by the wet transfer method. In addition, both the formation of the gate - controlled layer and the formation of the insulating layer can adopt a deposition process, and the deposition can use any suitable method well - known to those skilled in the art, such as chemical vapor deposition, physical vapor deposition, or atomic layer deposition, and will not be further limited here.

[0055] Further, using a first preset mask to perform photolithography and etching on the substrate to determine the substrate positions of the corresponding units of each computing module includes: coating a photoresist on the substrate surface to form a photoresist layer; defining the first preset mask according to the required shapes and positions of the corresponding units of each computing module, and performing exposure, development, and etching on it to obtain a substrate corresponding to determining the substrate positions of the corresponding units of each computing module. In addition, It should be added that when using a second preset mask to pattern each gate - controlled layer to obtain a corresponding patterned structure, the specific method can be based on the actual patterning method. When the patterning method adopts a photolithography process, the specific method can refer to the above - mentioned content and will not be repeated here. In addition, using a third preset mask to perform photolithography on the substrate positions corresponding to each storage unit and each arithmetic unit to obtain a corresponding photolithography pattern can also refer to the above - mentioned content and will not be further described here.

[0056] In an alternative embodiment, the computing module further includes a voltage dividing unit. Correspondingly, when forming at least three computing modules arranged in an array on a substrate, it further includes: providing a voltage dividing unit; using a preset interconnection technique to connect the voltage dividing unit to the drains of the corresponding first electrode and the second switching unit.

[0057] In an alternative embodiment, when forming at least three computing modules arranged in an array on a substrate, it further includes: using a second preset mask to pattern each gate control layer to obtain a corresponding patterned structure; wherein the second preset mask is obtained according to the positions and patterns of the source and drain electrodes and the positions and patterns of the first interconnections respectively corresponding to the source and drain electrodes; using a third preset mask to perform photolithography on the sub-substrates corresponding to each memory cell and arithmetic unit to obtain corresponding photolithography patterns; wherein the third preset mask is obtained according to the position and pattern of the first electrode and the position and pattern of the second interconnection corresponding to the first electrode; performing metal sputtering on the patterned structure and the photolithography patterns to form the source electrode, drain electrode, the first interconnection corresponding to the source electrode, the first interconnection corresponding to the drain electrode of the corresponding patterned structure, and the first electrode and the second interconnection corresponding to the first electrode of the corresponding photolithography pattern.

[0058] Step S53: Using a preset interconnection technique to interconnect at least three computing modules arranged in an array and connect at least three computing modules arranged in an array to the control module respectively.

[0059] Correspondingly, using a preset interconnection technique to interconnect at least three computing modules arranged in an array includes: using a preset interconnection technique to connect the first interconnection corresponding to the drain of each first switching unit to the first interconnection corresponding to the source of the second switching unit of an adjacent other selected computing module, connecting the first interconnection corresponding to the source of each first switching unit to the second interconnection corresponding to the first electrode of the arithmetic unit belonging to the same computing module, connecting the first interconnection corresponding to the drain of each second switching unit to the second interconnection corresponding to the first electrode of the arithmetic unit belonging to the same computing module, and connecting the first interconnection corresponding to the source of each second switching unit to the second interconnection corresponding to the first electrode of the memory cell belonging to the same computing module.

[0060] Similarly, when generating the second electrode, a second interconnection corresponding to the second electrode is also formed. The specific formation method can refer to the method of forming the second interconnection corresponding to the first electrode described above and will not be repeated here. Thus, the second interconnection corresponding to the second electrode is connected to the control module.

[0061] In summary, in the embodiments of the present invention, by forming computing modules arranged in an array on a provided substrate, high-density integration of computing modules is achieved, the computing power per unit area is improved, and adjacent computing modules store the cell state information of adjacent cells, which is beneficial to reducing the data transmission distance and improving the data processing speed. Each computing module independently is responsible for a part of the computing task, facilitating modular design and maintenance. Further, by using a preset interconnection technology, at least three computing modules arranged in an array are interconnected, and at least three computing modules arranged in an array are respectively interconnected with a control module to ensure efficient data exchange between the computing modules and between the computing modules and the control module.

[0062] Figure 10 An example of a schematic physical structure diagram of an electronic device is shown as Figure 10 shown. The electronic device may include: a processor 1010, a communication interface 1020, a memory 1030, and a communication bus 1040. Among them, the processor 1010, the communication interface 1020, and the memory 1030 communicate with each other through the communication bus 1040. The processor 1010 can call the logical instructions in the memory 1030 to execute the method for preparing a probabilistic cellular automaton computing system. The method includes: providing a substrate; forming at least three computing modules arranged in an array on the substrate, where the computing modules are used to store the cell state information of cells, and the cells stored in adjacent computing modules are adjacent cells to each other; using a preset interconnection technology to interconnect at least three computing modules arranged in an array and respectively interconnect at least three computing modules arranged in an array with a control module.

[0063] In addition, when the logical instructions in the above-mentioned memory 1030 can be implemented in the form of a software functional unit and sold or used as an independent product, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The foregoing storage medium includes: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disc that can store program codes.

[0064] On the other hand, the present invention also provides a computer program product, which includes a computer program. The computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the preparation method of the probabilistic cellular automaton computing system provided by each of the above methods. The method includes: providing a substrate; forming at least three calculation modules arranged in an array on the substrate, where the calculation modules are used to store the cell state information of cells, and the cells stored in adjacent calculation modules are adjacent cells to each other; using a preset interconnection technology to interconnect at least three calculation modules arranged in an array, and respectively interconnecting at least three calculation modules arranged in an array with a control module.

[0065] In another aspect, the present invention also provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it is implemented to execute the preparation method of the probabilistic cellular automaton computing system provided by each of the above methods. The method includes: providing a substrate; forming at least three calculation modules arranged in an array on the substrate, where the calculation modules are used to store the cell state information of cells, and the cells stored in adjacent calculation modules are adjacent cells to each other; using a preset interconnection technology to interconnect at least three calculation modules arranged in an array, and respectively interconnecting at least three calculation modules arranged in an array with a control module.

[0066] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative labor.

[0067] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence, or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disc, etc., and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A probabilistic cellular automaton computing system, characterized in that, It includes a control module and at least three computationally modules arranged in an array. The computationally modules are used to store the cell state information of cells, and the cells stored in adjacent computationally modules are adjacent cells to each other, where: The control module determines the computationally module corresponding to the cell with undetermined state and the computationally modules corresponding to the adjacent cells of the cell with undetermined state according to the cell with undetermined state, and generates corresponding control signals according to each selected computationally module and sends them to the corresponding selected computationally modules; The computationally modules corresponding to the adjacent cells of the cell with undetermined state obtain the cell state information stored therein according to the received control signals, and send the obtained cell state information to the computationally module corresponding to the cell with undetermined state; The computationally module corresponding to the cell with undetermined state obtains the cell state information stored therein according to the received control signal, and combines the received cell state information to perform corresponding logical operations to update the cell state information of the cell with undetermined state according to the results of the logical operations.

2. The probability cellular automaton calculation system according to claim 1, characterized in that The computationally module includes a storage unit, an arithmetic unit, a first switch unit and a second switch unit. For any selected computationally module, where: The first switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit belonging to the same computationally module and other adjacent selected computationally modules; The second switch unit controls the corresponding switch state according to the control signal corresponding to the control module to control the connection and disconnection between the storage unit belonging to the same computationally module and the arithmetic unit; The storage unit obtains the cell state information stored therein and sends it to the arithmetic unit of other adjacent selected computationally modules when the first switch unit is in the open state and the second switch unit is in the off state, or when the first switch unit is in the off state, the second switch unit is in the off state, and the first switch unit of other adjacent selected computationally modules is in the open state; or, when the first switch unit is in the open state and the second switch unit is in the open state, obtains the cell state information stored therein and sends it to the arithmetic unit belonging to the same computationally module; The arithmetic unit receives the cell state information sent by the storage unit belonging to the same computationally module and the cell state information sent by the storage unit of other adjacent selected computationally modules and performs corresponding logical operations according to the received cell state information when the first switch unit and the second switch unit are both in the open state; or, does not perform corresponding logical operations when the first switch unit is in the open state and the second switch unit is in the off state.

3. The probability cellular automaton calculation system according to claim 1, characterized in that, The computationally modules corresponding to the adjacent cells of the cell with undetermined state include a first computationally module and a second computationally module. The computationally module includes a storage unit, an arithmetic unit, a first switch unit and a second switch unit, where: The control module determines the calculation module corresponding to the cell to be determined, the first calculation module corresponding to the adjacent cells of the cell to be determined, and the second calculation module; generates a first control signal according to the storage unit of the calculation module corresponding to the cell to be determined, and sends the first control signal to the corresponding storage unit; generates a second control signal according to the first switching unit of the calculation module corresponding to the cell to be determined, and sends the second control signal to the corresponding first switching unit; generates a third control signal according to the second switching unit of the calculation module corresponding to the cell to be determined, and sends the third control signal to the corresponding second switching unit; generates corresponding fourth control signals according to the storage units corresponding to the first calculation module and the second calculation module, and sends the corresponding fourth control signals to the corresponding storage units; generates a fifth control signal according to the first switching unit of the first calculation module, and sends the fifth control signal to the corresponding first switching unit; generates corresponding sixth control signals according to the second switching units corresponding to the first calculation module and the second calculation module, and sends the sixth control signals to the corresponding second switching units; and generates a seventh control signal according to the first switching unit corresponding to the second calculation module, and sends the seventh control signal to the corresponding first switching unit. The first switching unit of the calculation module corresponding to the cell to be determined controls the corresponding first switching unit to be in an open state according to the received second control signal. The second switching unit of the calculation module corresponding to the cell to be determined controls the corresponding second switching unit to be in an open state according to the received third control signal. The first switching unit of the first calculation module controls the corresponding first switching unit to be in an open state according to the received fifth control signal. The second switching units corresponding to the first calculation module and the second calculation module respectively control the corresponding second switching units to be in a disconnected state according to the received sixth control signals. The first switching unit corresponding to the second calculation module controls the corresponding first switching unit to be in a disconnected state according to the received seventh control signal. The storage units corresponding to the first calculation module and the second calculation module respectively obtain the cell state information stored therein according to the received fourth control signals, and send it to the arithmetic unit of the calculation module corresponding to the cell to be determined. The storage unit of the calculation module corresponding to the cell to be determined obtains the cell state information stored therein according to the received first control signal, and sends it to the arithmetic unit of the calculation module corresponding to the cell to be determined. The arithmetic unit of the calculation module corresponding to the cell to be determined performs corresponding logical operations according to the received cell state information, and the arithmetic units of the first calculation module and the second calculation module do not perform corresponding logical operations.

4. The probability cellular automaton calculation system according to claim 2 or 3, characterized in that The cell state information includes the cell state value of the corresponding cell and the inverse of the cell state value. The arithmetic unit of the calculation module corresponding to the cell to be determined uses a memristor with a preset true random probability. The memristor with the preset true random probability is used for: For the calculation module corresponding to the cell to be determined and the calculation module corresponding to the adjacent cells of the cell to be determined, perform permutations and combinations on the corresponding cell state values and the inverses of the cell state values, and for each permutation and combination, perform NAND gate logic operations in combination with the preset true random probability to obtain the operation results corresponding to the permutations and combinations; According to the operation results of all permutations and combinations, select the low-level operation result as the logical operation result, and according to the logical operation result, update the cell state value and the inverse of the cell state value of the cell to be determined, and update the updated cell state value and the inverse of the cell state value to the storage unit of the calculation module corresponding to the cell to be determined and update the state of the storage unit, and update the state of the memristor.

5. The probability cellular automaton calculation system according to claim 2 or 3, characterized in that The arithmetic unit and / or the storage unit includes: A substrate; A first electrode located on the substrate; An insulating layer located on the first electrode; A second electrode located on the insulating layer and connected to the control module; Wherein, the first electrode of the arithmetic unit is connected to the second switching unit belonging to the same calculation module; the first electrode of the storage unit is respectively connected to the first switching unit and the second switching unit belonging to the same calculation module.

6. The probability cellular automata calculation system according to claim 5, wherein The first switching unit and / or the second switching unit includes: A gate located on the substrate; A gate control layer located on the gate and connected to the control module; A channel material layer located on the gate control layer; A source electrode and a drain electrode located on the gate control layer, and the source electrode and the drain electrode are relatively located on both sides of the channel material layer; wherein, the source electrodes of the first switching unit and the second switching unit are respectively connected to the storage unit belonging to the same calculation module, the drain electrode of the first switching unit is connected to the source electrode of the second switching unit of the adjacent other selected calculation module, and the drain electrode of the second switching unit is connected to the arithmetic unit belonging to the same calculation module.

7. The probability cellular automaton calculation system according to claim 6, characterized in that, The substrate includes a first substrate and a second substrate. The second substrate is located on the first substrate. The material of the first substrate includes at least one of p-type doped silicon, n-type doped silicon, and intrinsic silicon. The material of the second substrate includes at least one of silicon dioxide, hafnium oxide, and aluminum oxide; The material of the first electrode includes at least one of titanium, palladium, platinum, bismuth, gold, and chromium; The material of the second electrode includes at least one of titanium nitride, silver, copper, and aluminum; The material of the insulating layer includes at least one of hafnium oxide, aluminum oxide, silicon oxide, and various mixed laminates. The mixed laminate is used to characterize a multi-layer structure with specific properties formed by superimposing materials with different materials, different structures, or different functions on the same substrate through a preset process; The material of the gate includes at least one of titanium, palladium, platinum, bismuth, gold, and chromium; The material of the gate control layer includes at least one of silicon dioxide, hafnium oxide, and aluminum oxide; The material of the channel material layer includes at least one of molybdenum sulfide, tungsten selenide, and indium tin; The materials of the source electrode and the drain electrode include at least one of titanium, palladium, platinum, bismuth, gold, and chromium.

8. A preparation method of a probabilistic cellular automaton computing system, applied to the probabilistic cellular automaton computing system according to any one of claims 1-7, characterized in that, Including: Providing a substrate; Forming at least three computationally modular arrays arranged in an array on the substrate, the computational modules being used to store the cell state information of the cells, and the cells stored in adjacent computational modules being adjacent cells to each other; Using a preset interconnection technique, interconnecting the at least three computationally modular arrays arranged in an array, and respectively interconnecting the at least three computationally modular arrays arranged in an array with a control module.

9. The preparation method of the probability cellular automata computing system according to claim 8, characterized in that, The computational module includes a storage unit, an arithmetic unit, a first switching unit, and a second switching unit. Forming at least three computationally modular arrays arranged in an array on the substrate includes: Using a first preset mask to etch the substrate to determine the substrate positions of the corresponding units of each computational module; wherein, the first preset mask is obtained according to the positions and patterns of the corresponding units of each computational module; Growing a bottom back gate on the substrate positions corresponding to each of the first switching units and each of the second switching units to form corresponding gates; Based on wet transfer, transferring the channel material layer grown on a preset substrate onto the gate to form a gate control layer, and using a second preset mask to pattern each of the gate control layers to obtain corresponding patterned structures; wherein, the second preset mask is obtained according to the positions and patterns of the source electrode and the drain electrode; Using a third preset mask to perform photolithography on the substrate positions corresponding to each of the storage units and the arithmetic units to obtain corresponding photolithography patterns; wherein, the third preset mask is obtained according to the position and pattern of the first electrode; Performing metal sputtering on the patterned structure and the photolithography pattern to form source electrodes and drain electrodes corresponding to the patterned structure to obtain corresponding first switching units and second switching units, and to form first electrodes corresponding to the photolithography pattern; Forming an insulating layer on the first electrode; Forming a second electrode on the insulating layer to obtain corresponding arithmetic units and storage units.

10. The preparation method of the probability cellular automaton calculation system according to claim 9, characterized in that, Forming at least three computationally modular arrays arranged in an array on the substrate further includes: Using a second preset mask to pattern each of the gate control layers to obtain corresponding patterned structures; wherein, the second preset mask is obtained according to the positions and patterns of the source electrode and the drain electrode and the positions and patterns of the first interconnections respectively corresponding to the source electrode and the drain electrode; Using a third preset mask to perform photolithography on the sub-substrates corresponding to each of the storage units and the arithmetic units to obtain corresponding photolithography patterns; wherein, the third preset mask is obtained according to the position and pattern of the first electrode and the positions and patterns of the second interconnections corresponding to the first electrode; Performing metal sputtering on the patterned structure and the photolithography pattern to form source electrodes, drain electrodes, first interconnections corresponding to the source electrodes, and first interconnections corresponding to the drain electrodes corresponding to the patterned structure, and to form first electrodes corresponding to the photolithography pattern and second interconnections corresponding to the first electrodes; Using a preset interconnection technique to interconnect the at least three computationally modular arrays arranged in an array, including: Using the preset interconnection technology, connect the first interconnecting lines corresponding to the drains of the first switch units to the first interconnecting lines corresponding to the sources of the second switch units of other adjacent selected computing modules, connect the first interconnecting lines corresponding to the sources of the first switch units to the second interconnecting lines corresponding to the first electrodes of the arithmetic units belonging to the same computing module, connect the first interconnecting lines corresponding to the drains of the second switch units to the second interconnecting lines corresponding to the first electrodes of the arithmetic units belonging to the same computing module, and connect the first interconnecting lines corresponding to the sources of the second switch units to the second interconnecting lines corresponding to the first electrodes of the storage units belonging to the same computing module.

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