Data transmission method and device and coding equipment

Abstract

The invention relates to the technical field of data processing, in particular to a data transmission method and device and encoding equipment. The method comprises the following steps: receiving video source data, and performing data compression on the video source data according to a first code rate and a second code rate to obtain first data corresponding to the first code rate and second data corresponding to the second code rate; wherein the value of the first code rate is smaller than that of the second code rate; and transmitting at least one first data packet in the first data and at least one second data packet in the second data in turn until the first data and the second data are transmitted completely.

Description

Technical Field

[0001] The present disclosure relates to the technical field of data processing, and in particular, to a data transmission method, apparatus, and encoding device. Background Art

[0002] Currently, with the development of scenarios such as conference office work and video surveillance, users have higher requirements for picture quality, latency, and control experience. However, as the picture quality continues to increase, when the encoding end transmits this high-quality picture, it requires a large amount of network resources, resulting in frequent network packet loss at the decoding end, and then the phenomenon of video stuttering occurs.

[0003] Therefore, how to optimize the process of sending data packets at the encoding end to avoid the phenomenon of video stuttering at the decoding end due to network packet loss has become an urgent problem to be solved. Summary of the Invention

[0004] To solve the above technical problems, the present disclosure provides a data transmission method, apparatus, and encoding device.

[0005] In a first aspect, the present disclosure provides a data transmission method, including: receiving video source data, respectively compressing the video source data at a first bit rate and a second bit rate to obtain first data corresponding to the first bit rate and second data corresponding to the second bit rate; wherein, the value of the first bit rate is less than the value of the second bit rate; alternately transmitting at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted.

[0006] In a second aspect, the present disclosure provides a data transmission apparatus, including: a processing module, configured to, when the transceiver module receives video source data, respectively compress the video source data received by the transceiver module at a first bit rate and a second bit rate to obtain first data corresponding to the first bit rate and second data corresponding to the second bit rate; wherein, the value of the first bit rate is less than the value of the second bit rate; the processing module is further configured to alternately transmit at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted.

[0007] In a third aspect, the present invention provides an encoding device, including: a memory and a processor, the memory is used to store a computer program; the processor is configured to, when executing the computer program, enable the encoding device to implement any one of the data processing methods provided in the first aspect.

[0008] In a fourth aspect, the present invention provides a computer-readable storage medium, including: a computer program stored on the computer-readable storage medium, and the computer program is executed by a controller to implement any one of the data processing methods provided in the first aspect.

[0009] Fifth aspect, the present invention provides a computer program product, which, when running on a computer, causes the computer to execute any one of the data processing methods provided in the first aspect.

[0010] It should be noted that the above computer instructions can be stored in whole or in part on a first computer-readable storage medium. Among them, the first computer-readable storage medium can be packaged together with the controller of the data processing device, or can be separately packaged from the controller of the data processing device. The present disclosure does not make any limitation in this regard. The descriptions of the second aspect, the third aspect, the fourth aspect and the fifth aspect in the present disclosure can refer to the detailed description of the first aspect; and, the beneficial effects of the descriptions of the second aspect, the third aspect, the fourth aspect and the fifth aspect can refer to the beneficial effect analysis of the first aspect, which will not be elaborated here.

[0011] In the present disclosure, the names of the above data processing devices do not constitute limitations on the devices or functional modules themselves. In actual implementation, these devices or functional modules may appear under other names. As long as the functions of each device or functional module are similar to those of the present disclosure and fall within the scope of the claims of the present disclosure and their equivalent technologies.

[0012] These aspects or other aspects of the present disclosure will be more clearly understood in the following description.

[0013] The technical solution provided by the present disclosure has the following advantages compared with the prior art:

[0014] For the data processing method provided by the present disclosure, when the encoding device receives the video source data, it compresses the video source data at the first bit rate and the second bit rate respectively to obtain the first data (such as deeply compressed data) corresponding to the first bit rate and the second data (such as lightly compressed data) corresponding to the second bit rate; alternately transmits at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted. For example, after any one first data packet is completely transmitted, switch to transmit the second data packet. Then, after any one second data packet is completely transmitted, switch to transmit the first data packet; and so on until the first data and the second data are completely transmitted, thereby avoiding the situation that when the number of the first data packets or the second data packets is large, due to the lack of restriction on the transmission quantity of different types of data packets, a certain type of data packet (such as the first data packet) is transmitted intensively, resulting in the inability to transmit other types of data packets (such as the second data packet) in time, and then the phenomenon of excessive data packet delay and video stuttering occurs, and solves the problem of how to avoid the phenomenon of video stuttering at the encoding end. Description of the Drawings

[0015] The accompanying drawings here are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present disclosure, and are used together with the specification to explain the principles of the present disclosure.

[0016] To more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the accompanying drawings required for use in the description of the embodiments or the prior art. Obviously, for those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0017] Figure 1 A flowchart of a data processing method provided by an embodiment of the present disclosure;

[0018] Figure 2 A scenario diagram of a data processing method provided by an embodiment of the present disclosure;

[0019] Figure 3 A scenario diagram of another data processing method provided by an embodiment of the present disclosure;

[0020] Figure 4 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0021] Figure 5 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0022] Figure 6 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0023] Figure 7 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0024] Figure 8 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0025] Figure 9 A scenario diagram of another data processing method provided by an embodiment of the present disclosure;

[0026] Figure 10 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0027] Figure 11 A flowchart of another data processing method provided by an embodiment of the present disclosure;

[0028] Figure 12 A scenario diagram of another data processing method provided by an embodiment of the present disclosure;

[0029] Figure 13 Flow schematic diagram of a data processing device provided by an embodiment of the present disclosure;

[0030] Figure 14 Schematic block diagram of an encoding device provided by an embodiment of the present disclosure. Detailed implementation manners

[0031] In order to more clearly understand the above objects, features and advantages of the present disclosure, the solutions of the present disclosure will be further described below. It should be noted that, without conflict, the embodiments of the present disclosure and the features in the embodiments may be combined with each other.

[0032] Many specific details are set forth in the following description in order to fully understand the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only a part of the embodiments of the present disclosure, rather than all of the embodiments.

[0033] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the existence of additional identical elements in the process, method, article or device including the element.

[0034] ARM in the embodiments of the present disclosure refers to Advanced RISC Machines, a reduced instruction set computer processor architecture, and usually also refers to a processor adopting this architecture.

[0035] H.264 in the embodiments of the present disclosure refers to MPEG-4 AVC (Advanced Video Coding), which is a video coding standard jointly developed by the International Telecommunication Union Telecommunication Standardization Sector (ITU-T) and the International Organization for Standardization / International Electrotechnical Commission (ISO / IEC).

[0036] H.265 in the embodiments of the present disclosure refers to High Efficiency Video Coding (HEVC), which is the successor of H.264.

[0037] The keyboard and mouse information in the embodiments of the present disclosure refers to the information related to keyboard and mouse operations during video transmission or storage.

[0038] The bitrate in the embodiments of the present disclosure refers to the compression bitrate (Bitrate), which is used to represent the amount of data transmitted or stored per unit time (such as kbps in a video).

[0039] Embodiment 1

[0040] Figure 1 The flowchart of the data processing method is exemplarily shown. The execution subject of this example can be an electronic device, such as an encoding device, as Figure 1 shown, the method includes:

[0041] S11. When receiving the video source data, compress the video source data at the first bitrate and the second bitrate respectively to obtain the first data corresponding to the first bitrate and the second data corresponding to the second bitrate; wherein, the value of the first bitrate is less than the value of the second bitrate.

[0042] In some examples, the encoding device includes a Field-Programmable Gate Array (FPGA). The FPGA is connected to the video access source. When the FPGA receives the video source data input by the video access source, the FPGA copies the video source data into two paths, namely source video data 1 and source video data 2.

[0043] Among them, for the source video data 1, compress the source video data 1 at the first bitrate (which can also be called the first compression bitrate) to obtain the first data corresponding to the first bitrate; for the source video data 2, compress the source video data 2 at the second bitrate (which can also be called the first compression bitrate) to obtain the second data corresponding to the second bitrate.

[0044] Exemplarily, compressing the source video data 1 at the first bitrate to obtain the first data corresponding to the first bitrate includes:

[0045] For the source video data 1, the ARM encodes the video source data copied by the FPGA according to the first bit rate (e.g., H264 or H265) for data compression (i.e., deep compression) of the video source data, and obtains the first data corresponding to the first bit rate. Among them, the first data includes the video source data compressed according to the first bit rate, the keyboard and mouse information, and network protocol information such as multicast and Precision Time Protocol (PTP). After that, the ARM returns the first data to the FPGA in the form of an ARM data packet; the FPGA caches the received ARM data packet into the memory (including Double Data Rate Synchronous Dynamic Random Access Memory (DDR) and other internal media memories).

[0046] In some examples, the compression depth refers to the strength of the compression algorithm, which is usually divided into: shallow compression (light compression) and deep compression (heavy compression). Among them, shallow compression means retaining more details of the original data, with a low compression ratio and a correspondingly high bit rate value (the file is larger); deep compression means discarding more redundant or secondary information, with a high compression ratio and a correspondingly small bit rate (the file is smaller).

[0047] In some examples, the bitstream formed by the ARM data packet, that is, the first data packet, is collectively referred to as the IP bitstream.

[0048] In some examples, in order to avoid the internal memory space of the FPGA being the on-chip cache, since the on-chip cache capacity is small, it is possible that the ARM data packet transmitted by the ARM cannot be stored, resulting in packet loss. Therefore, for the data processing method provided in the embodiments of the present disclosure, the FPGA can select a suitable memory based on the actual situation, such as DDR and / or other internal media memories, to ensure that there is enough storage space to store the ARM data packet transmitted by the ARM.

[0049] Exemplarily, for the source video data 2, data compression is performed on the source video data 2 according to the second bit rate, and the second data corresponding to the second bit rate is obtained, including:

[0050] For the source video data 2, the FPGA compresses the source video data 2 according to the second bit rate to obtain the second data corresponding to the second bit rate. After that, the FPGA caches the second data into the DDR (the traffic of the second data is very large and is stored in an independent area of the DDR). The bitstream formed by the video source data processed by the FPGA is called the uncompressed bitstream.

[0051] Among them, a part of the second data in the DDR (the size of the data read here is determined by the defined internal memory space of the FPGA, and the internal memory space of the FPGA needs to be cached close to the full-load state) will be read out and packed into Ethernet-standard data packets according to the network parameters issued by the ARM (physical address (Media Access Control Address, MAC), Internet Protocol (IP), etc.), and then stored in the internal memory space of the FPGA waiting to be read away (this is to improve the transmission efficiency and pack the uncompressed bitstream data in advance). When a part of the second data is read from the internal memory space of the FPGA, at the same time, a part of the second data will also be read from the DDR, packed and written into the internal memory space of the FPGA waiting to be read away.

[0052] S12. Alternately transmit at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted.

[0053] In some examples, such as Figure 2 shown, in the prior art, since the first data packet and the second data packet are stored in the DDR in sequence, when the traffic volume (i.e., the number of second data packets) of the second data packet is relatively concentrated within a certain period of time, it will cause the second data packets to be sent out during this period, and there will be a risk of network timeout for the first data packets during this period, bringing bad experiences such as video stuttering and out-of-sync. Or, when the traffic volumes of both the first data packet and the second data packet are relatively concentrated within a certain period of time and the external network bandwidth is tight, network packet loss may occur. For this reason, as Figure 3 shown, the data processing method provided by the embodiments of the present disclosure, when transmitting the first data packet and the second data packet, after any one data packet is completely transmitted, switch to transmitting any other data packet. For example, after the first data packet is completely transmitted, switch to transmitting the second data packet. Then, after any one second data packet is completely transmitted, switch to transmitting the first data packet; and so on, so as to avoid packet delay and / or packet loss, and further avoid the phenomenon of video stuttering occurring at the encoding end.

[0054] In some examples, such as Figure 3 shown, the time interval between two adjacent data packets in the IP bitstream or the uncompressed bitstream is related to the size of the set traffic threshold and the processing rate of the FPGA (the processing rate is related to the chip capabilities).

[0055] Exemplarily, in combination with Figure 2 and Figure 3 shown, taking the first data packet as an example:

[0056] Assume that the FPGA can process 1000M of data within one cycle (such as 1s). If 1s is divided into 1000ms, and the first traffic threshold is set to 300M, then within every 1000ms, there can only be 300ms during which the IP code stream can be transmitted, and the IP code stream is not allowed to be transmitted during the remaining 700ms. The ratio of the effective time (total duration of data transmission within one cycle) to the invalid time (total duration of non - data transmission within one cycle) of the IP code stream is 3:7. If the time for the FPGA to process the first data packet of the IP code stream is 3us (determined by the FPGA processing rate), according to the ratio 3:7 (300:700), it is necessary to wait for 7us (output interval time) before processing the next first data packet.

[0057] The traffic fluctuation of the IP code stream is relatively large (caused by the I - frame and P - frame in the ARM encoding methods H265 / H264). For example, the traffic of the IP code stream is 0.5M at time t0 (1ms) and 0.1M at time t1 (1ms). Since the FPGA can process 1000M of data within 1s, 1ms is 1M. If the time ratio of the IP code stream is set to 3:7, then the maximum traffic set for the IP code stream within 1ms is 0.3M. Based on this set first traffic threshold (which can also be called the output bit rate) (i.e., after bit - rate smoothing), the traffic output at time t0 (1ms) is 0.3M, and the excess traffic (0.2M) is sent out at the next moment, that is, the traffic output at time t1 (1ms) is 0.3M (0.1 + 0.2), where 0.1 is the traffic at time t1 and 0.2 is the excess traffic at time t0 (i.e., the traffic not fully sent at time t0).

[0058] Similarly, assume that the second traffic threshold is set to 600M. Then, within every 1000 ms, non-compressed bitstreams can be transmitted only for 600 ms, and non-compressed bitstream transmissions are not allowed during the remaining 400 ms. The ratio of the effective time to the invalid time of the non-compressed bitstream is 6:4. If the time for the FPGA to process the second data packet of the non-compressed bitstream is 3 us (determined by the FPGA processing rate), according to the ratio of 6:4, it is necessary to wait for 2 us (output interval time) before processing the next second data packet. The traffic fluctuation of the non-compressed bitstream is relatively small (due to the internal algorithm of the FPGA, the bandwidth is relatively stable). For example, the traffic of the non-compressed bitstream is 0.7M at time t0 (1 ms) and 0.5M at time t1 (1 ms). The FPGA can process 1000M of data within 1 s, so 1 ms is 1M. If the time ratio of the non-compressed bitstream is set to 6:4, then the maximum traffic set for the non-compressed bitstream within 1 ms is 0.6M. Based on the set second traffic threshold (which can also be called the output bit rate) (i.e., after bit rate smoothing), the traffic output at time t0 (1 ms) is 0.6M, and the excess traffic (0.1M) is sent out at the next moment, that is, the traffic output at time t1 (1 ms) is 0.6M (0.1 + 0.5). Here, 0.1 is the excess traffic at time t0 (i.e., the traffic not sent out at time t0), and 0.5 is the traffic at time t1.

[0059] Since the traffic output by the IP bitstream within 1 s is 300M and the traffic output by the non-compressed bitstream within 1 s is 600M, the total bandwidth of the FPGA output channel within 1 s is 300M + 600M = 900M.

[0060] In some examples, the FPGA output channel sequentially sends out data in a polling manner according to the IP bitstream (the bitstream composed of the first data packets) and the non-compressed bitstream (the bitstream composed of the second data packets) (one first data packet and one second data packet, without a requirement for the order), which can avoid sending only a certain type of bitstream within a period of time, thereby causing excessive delay in the bitstream of the type that is not sent. In addition, it can also reduce the instantaneous bandwidth of the IP bitstream and the non-compressed bitstream (because there is a bit rate setting, which can limit the time period during which the IP bitstream and the non-compressed bitstream can be read, thereby reducing the instantaneous bandwidth).

[0061] As can be seen from the above, in the data processing method provided by the embodiments of the present disclosure, when the encoding device receives the video source data, it compresses the video source data at the first bit rate and the second bit rate respectively to obtain the first data corresponding to the first bit rate and the second data corresponding to the second bit rate; alternately transmits at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted; for example, after a first data packet is completely transmitted, switch to transmitting the second data packet. Then, after a second data packet is completely transmitted, switch to transmitting the first data packet; and so on until the first data and the second data are completely transmitted, thereby avoiding the situation that the output delay of other types of data is too large and / or packets are lost when the data traffic of a certain type is concentrated, and further avoiding the phenomenon of video freezing at the encoding end.

[0062] In some feasible examples, in combination with Figure 1 , such as Figure 4 shown, the above S12 can be specifically implemented by the following S120 - S123.

[0063] S120. Obtain the packet information of the first data packet in the first data and the data information of the second data packet in the second data. Among them, the packet information includes one or more of the transmission identifier and the packet length, and the data information includes at least the packet length.

[0064] In some examples, the transmission identifier is used to indicate the transmission priority of the data packet.

[0065] S121. Determine the currently transmitted first data packet according to the packet information.

[0066] In some examples, when transmitting the first data packet, the currently transmitted first data packet can be determined based on the packet information of the first data packet. Then, after the currently transmitted first data packet is completely transmitted, switch to transmitting the second data packet. When transmitting the second data packet, determine the currently transmitted second data packet based on the data information of the second data packet. After the currently transmitted second data packet is completely transmitted, return to transmitting the first data packet until the first data and the second data are completely transmitted.

[0067] In some examples, the currently transmitted first data packet is one data packet, and the currently transmitted second data packet is one data packet.

[0068] S122. Determine the currently transmitted second data packet according to the data information.

[0069] S123. Alternately transmit the currently transmitted first data packet and the currently transmitted second data packet until the first data and the second data are completely transmitted.

[0070] In some examples, the current first data packet being transmitted and the current second data packet being transmitted are transmitted alternately until the transmission of the first data and the second data is completed, including: after the transmission of the current first data packet being transmitted is completed, switching to transmitting the current second data packet being output. After the transmission of the current second data packet being transmitted is completed, return to determining the current first data packet according to the data packet information and determining the current second data packet according to the data information until the transmission of the first data and the second data is completed.

[0071] In some examples, the data packet information includes a transmission identifier. At this time, when transmitting the first data packet, the transmission priority of the first data packet can be determined based on the transmission identifier of the first data packet. Among them, the higher the transmission priority, the smaller the corresponding data transmission delay. For example, the transmission identifier includes a first identifier and a second identifier, and the transmission priority corresponding to the first identifier is greater than the transmission priority corresponding to the second identifier. When the transmission identifier is the first identifier, it indicates that the data packet has a high requirement for transmission delay. Therefore, the data packet can be ensured to be transmitted preferentially by setting the transmission identifier. Of course, other methods can also be used to ensure that the data with high requirements for transmission delay is transmitted preferentially, and the present application does not limit this.

[0072] After that, when it is determined that there is a first data packet with a transmission identifier of the first identifier, transmit the first data packet with a transmission identifier of the first identifier. When any first data packet with a transmission identifier of the first identifier is transmitted, switch to transmitting the second data packet included in the second data; or, when it is determined that there is no first data packet with a transmission identifier of the first identifier and there is a second data packet with a transmission identifier of the second identifier, transmit the first data packet with a transmission identifier of the second identifier. When any first data packet with a transmission identifier of the second identifier is transmitted, switch to transmitting the second data packet included in the second data; or, when it is determined that there is no first data packet with a transmission identifier of the first identifier and there is no second data packet with a transmission identifier of the second identifier, switch to transmitting the second data packet included in the second data until the transmission of the first data and the second data is completed.

[0073] In some examples, the data packet information includes the data packet length. At this time, when transmitting the first data packet, the total first data volume is determined based on the sum of the data packet lengths of each first data packet transmitted in the current cycle.

[0074] If the first data volume is greater than or equal to the first traffic threshold, it indicates that the first data packet currently being transmitted has reached or exceeded the specified transmission traffic. Therefore, it is necessary to switch to transmitting the second data packet included in the second data; or, when the first data volume is less than the first traffic threshold and there is a first data packet with a transmission identifier of the first identifier, transmit the first data packet with a transmission identifier of the first identifier. After any first data packet with a transmission identifier of the first identifier is transmitted, switch to transmitting the second data packet included in the second data; or, when the first data volume is less than the first traffic threshold, there is no first data packet with a transmission identifier of the first identifier, and there is a second data packet with a transmission identifier of the second identifier, transmit the first data packet with a transmission identifier of the second identifier. When any first data packet with a transmission identifier of the second identifier is transmitted, switch to transmitting the second data packet included in the second data; or, when the first data volume is less than the first traffic threshold, there is no first data packet with a transmission identifier of the first identifier, and there is no second data packet with a transmission identifier of the second identifier, switch to transmitting the second data packet included in the second data until the first data and the second data are transmitted completely.

[0075] As can be seen from the above, in the data processing method provided by the embodiments of the present disclosure, when the encoding device receives the video source data, it compresses the video source data at the first coding rate and the second coding rate respectively to obtain the first data corresponding to the first coding rate and the second data corresponding to the second coding rate; obtains the data packet information of the first data packet in the first data and the data information of the second data packet in the second data; determines the currently transmitted first data packet according to the data packet information; determines the currently transmitted second data packet according to the data information; alternately transmits the currently transmitted first data packet and the currently transmitted second data packet until the first data and the second data are transmitted completely; for example, after a first data packet is transmitted, switch to transmitting the second data packet. After that, after a second data packet is transmitted, switch to transmitting the first data packet; it can be seen that by forcibly transmitting the second data packet every time a first data packet is transmitted, it is possible to effectively avoid the complete blocking of ordinary services. In this way, it is possible to avoid the phenomenon of video freezing at the encoding end.

[0076] Repeat this process until the first data and the second data are transmitted completely, thereby avoiding the phenomenon of video freezing at the encoding end.

[0077] In some feasible examples, the data packet information includes a transmission identifier, and the transmission identifier includes a first identifier; combined with Figure 4 , as Figure 5 shown, the above S121 can be specifically implemented by the following S1210.

[0078] S1210. Determine that there is a first data packet with a transmission identifier of the first identifier, and determine the currently transmitted first data packet from the first data packets with a transmission identifier of the first identifier.

[0079] In some examples, the transmission identifier may be a Differentiated Services Code Point (DSCP). For example, after receiving the IP bitstream, the FPGA parses the first data packet and determines the data packet of the first priority according to the DSCP in the first data packet.

[0080] Among them, the FPGA can agree with the ARM in advance on which specific value is used as the first priority (corresponding one-to-one with the first identifier), and other values except the agreed value are the second priority (corresponding one-to-one with the second identifier). For example, if the agreed DSCP is 46, at this time the FPGA will identify the DSCP value of the first data packet. If the DSCP value is equal to 46, it is determined that the transmission identifier of the first data packet is the first identifier. Of course, the DSCP can also be agreed as other data, and this application does not limit this.

[0081] After that, the FPGA caches it separately in the high-priority channel in the order of the bitstream (the traffic of high-priority data packets is usually very small, but the requirement for latency is relatively high, and it can be stored in the internal memory space of the FPGA, which has the advantage of saving a large amount of logic resources and the bandwidth of the DDR). Similarly, for the first data packet with the transmission identifier of the second identifier and a low requirement for network transmission speed, it is separately cached in the low-priority channel in the order of arrival (the traffic is relatively large and stored in an independent area of the DDR).

[0082] In some examples, the high-priority data packet is the first data packet with the transmission identifier of the first identifier. Since the first data packet has a relatively high requirement for transmission latency, such as the transmission latency of the first data packet is less than the latency threshold, it is necessary to give priority to transmitting the first data packet to ensure the normal display of the picture.

[0083] As can be seen from the above, in the data processing method provided by the embodiments of the present disclosure, when the encoding device receives the video source data, it compresses the video source data at the first coding rate and the second coding rate respectively to obtain the first data corresponding to the first coding rate and the second data corresponding to the second coding rate; wherein, the first coding rate is less than the second coding rate; when transmitting the first data packet in the first data, obtain the data packet information of the first data packet; if there is a first data packet with the transmission identifier of the first identifier, then transmit the first data packet with the transmission identifier of the first identifier. After any first data packet with the transmission identifier of the first identifier is transmitted, switch to transmitting the second data packet included in the second data; after that, after one second data packet is transmitted, switch to transmitting the first data packet; in this way, by setting the first identifier, it can be ensured that the first data with high latency requirements can be transmitted first, effectively reducing the transmission delay of high-latency sensitive data and reducing the probability of data packet retransmission.

[0084] In some implementable examples, in combination with Figure 5 , such as Figure 6 shown, the data transmission method provided by the embodiments of the present disclosure further includes S13.

[0085] S13. Determine that there is no first data packet with a transmission identifier of the first identifier, and there is a first data packet with a transmission identifier of the second identifier, and determine the currently transmitted first data packet from the first data packets with a transmission identifier of the second identifier.

[0086] In some examples, determine that there is no first data packet with a transmission identifier of the first identifier, and there is no first data packet with a transmission identifier of the second identifier, and determine the currently transmitted second data packet from the second data packets.

[0087] As can be seen from the above, for the data processing method provided by the embodiments of the present disclosure, when the encoding device receives the video source data, it compresses the video source data at the first bit rate and the second bit rate respectively to obtain the first data corresponding to the first bit rate and the second data corresponding to the second bit rate; wherein, the first bit rate is less than the second bit rate; when transmitting the first data packet in the first data, obtain the packet information of the first data packet; if there is no first data packet with a transmission identifier of the first identifier, and there is a first data packet with a transmission identifier of the second identifier, then transmit the first data packet with a transmission identifier of the second identifier, and after any first data packet with a transmission identifier of the second identifier is transmitted, switch to transmitting the second data packet included in the second data; then, after a second data packet is transmitted, switch to transmitting the first data packet; and so on, thereby avoiding the phenomenon of video freezing at the encoding end.

[0088] In some implementable examples, in combination with Figure 5 , such as Figure 7 shown, the above S1210 can be specifically implemented by the following S1210-0 to S1210-2.

[0089] S1210-0. Determine that there is a first data packet with a transmission identifier of the first identifier, and obtain the reception time of each first data packet received with a transmission identifier of the first identifier;

[0090] S1210-1. Calculate the time difference between the current time and the reception time;

[0091] S1210-2. Use the first data packet corresponding to the largest time difference as the currently transmitted first data packet.

[0092] As can be seen from the above, in the data processing method provided by the embodiments of the present disclosure, when the encoding device receives video source data, it compresses the video source data at the first bit rate and the second bit rate respectively to obtain the first data corresponding to the first bit rate and the second data corresponding to the second bit rate; wherein, the first bit rate is less than the second bit rate; when transmitting the first data packet in the first data, obtain the packet information of the first data packet; determine that there is a first data packet with a transmission identifier of the first identifier, and obtain the reception time of each first data packet with a transmission identifier of the first identifier; calculate the time difference between the current time and the reception time; use the first data packet corresponding to the largest time difference as the first data packet currently being transmitted, so as to ensure that the first data packet can be transmitted according to the first-in, first-out rule, thereby ensuring the continuity of data transmission. After that, after any first data packet with a transmission identifier of the first identifier is transmitted, switch to transmitting the second data packet included in the second data; after that, after a second data packet is transmitted, switch to transmitting the first data packet; and so on, thereby avoiding the phenomenon of video stuttering at the encoding end.

[0093] In some implementable examples, in combination with Figure 4 , such as Figure 8 shown, the packet information includes the packet length and the transmission identifier, and the transmission identifier includes the first identifier; the above S121 can be specifically implemented by the following S1211 and S1212.

[0094] S1211. Determine the first total data volume based on the sum of the packet lengths of each first data packet transmitted in the current period;

[0095] S1212. Determine that the first total data volume is less than the first traffic threshold and there is a first data packet with a transmission identifier of the first identifier, and determine the first data packet currently being transmitted from the first data packets with a transmission identifier of the first identifier.

[0096] In some examples, in order to avoid the phenomenon of frame loss and stuttering, in the data processing method provided by the embodiments of the present disclosure, the user can set the size of the quantity transmitted per unit time, such as the first traffic threshold, based on actual needs. At this time, when the first total data volume is greater than or equal to the first traffic threshold, it means that too many first data packets are actually transmitted in the current period. Therefore, it is necessary to switch to transmitting the second data packet included in the second data. When the first total data volume is less than the first traffic threshold, it means that fewer first data packets are actually transmitted in the current period. In order to balance the currently transmitted data packets and avoid the situation of the same data packets being piled up and sent, the first data packet can be continuously transmitted based on the transmission identifier and / or the packet length.

[0097] Exemplarily, such as Figure 9As shown in the figure, the FPGA sets the output bit rate of the IP bitstream (the bit rate control is only related to the load size. For example, if the first traffic threshold is set to 300M / s, then within one cycle (e.g., 1s), only 300M of data can be output from the IP bitstream). After a specified time (it can be understood that the FPGA can process 1000M of data internally in 1s. If 1s is divided into 1000ms, and the IP bitstream bit rate is set to 300M, then within every 1000ms, only 300ms can be used to transmit the IP bitstream, and transmission is not allowed during the remaining 700ms), the first data packet will be preferentially sent to the network in sequence. Only after all the first data packets are sent will the second data packet be transmitted in sequence. In this way, the number of the first data packets transmitted within each cycle can be controlled, thus avoiding the situation of packet loss caused by insufficient network resources.

[0098] As can be seen from the above, the data processing method provided by the embodiments of the present disclosure uses a traffic threshold to control the number of data packets with different compression bit rates within one cycle. Thus, based on the requirements of the display quality, the traffic threshold can be dynamically adjusted. While ensuring the transmission quantity of data packets with different compression bit rates within one cycle, the display quality can be guaranteed. For example, based on the sum of the data packet lengths of each first data packet transmitted in the current cycle, the first total data volume is determined; when the first total data volume is less than the first traffic threshold, it indicates that fewer first data packets are currently transmitted. If the first data packets are high-priority data, this can ensure that high-priority data is transmitted first, ensuring that key services can enjoy low latency; at the same time, every time a first data packet is transmitted, a second data packet is forcibly transmitted, which can effectively avoid the complete blocking of ordinary services. In this way, the phenomenon of video jitter at the encoding end can be avoided.

[0099] In some feasible examples, the transmission identifier further includes a second identifier; combined with Figure 8 , such as Figure 10 shown in the figure, the data transmission method provided by the present disclosure further includes S14.

[0100] S14. Determine that the first total data volume is less than the first traffic threshold, and there is no first data packet with the transmission identifier being the first identifier, and there is a first data packet with the transmission identifier being the second identifier, and determine the currently transmitted first data packet from the first data packets with the transmission identifier being the second identifier.

[0101] In some examples, the process of determining the currently transmitted first data packet from the first data packets with the transmission identifier being the second identifier is similar to the process of determining the currently transmitted first data packet from the first data packets with the transmission identifier being the first identifier, and will not be elaborated here.

[0102] In some examples, when it is determined that the first total data volume is less than the first traffic threshold, there is no first data packet with a transmission identifier of the first identifier, and there is no first data packet with a transmission identifier of the second identifier, the currently transmitted second data packet is determined from the second data packets.

[0103] As can be seen from the above, for the data processing method provided by the embodiments of the present disclosure, in order to avoid waste of bandwidth resources, when it is determined that the first total data volume is less than the first traffic threshold, there is no first data packet with a transmission identifier of the first identifier, and there is a first data packet with a transmission identifier of the second identifier, it means that there is currently no first data packet with a transmission identifier of the first identifier that can be sent. If we continue to wait for the first data packet with a transmission identifier of the first identifier, it will waste bandwidth resources. To improve the utilization rate of bandwidth resources, when it is determined that there is a first data packet with a transmission identifier of the second identifier, the currently transmitted first data packet is determined from the first data packets with a transmission identifier of the second identifier, so as to ensure the quantity of the first data sent within one cycle. When the first data packet is high-priority data, the high-priority data can be transmitted first to ensure that critical services can enjoy low latency; at the same time, every time a first data packet is transmitted, the second data packet is forcibly transmitted, which can effectively avoid the complete blocking of ordinary services. Repeating this process can avoid the phenomenon of video stuttering at the encoding end. In some implementable examples, in combination with Figure 4 , such as Figure 11 shown, the above S122 can be specifically implemented through the following S1220 and S1221.

[0104] S1220. Determine the second total data volume based on the sum of the data packet lengths of each second data packet transmitted in the current cycle.

[0105] S1221. If the second total data volume is less than the second traffic threshold, determine the currently transmitted second data packet from the second data packets.

[0106] In some examples, the process of determining the currently transmitted second data packet from the second data packets is similar to the process of determining the currently transmitted first data packet from the first data packets, and will not be elaborated here.

[0107] Exemplarily, as Figure 12 shown, the FPGA sets the output bit rate size for the uncompressed bitstream (the bit rate control is only related to the load size. For example, if the second traffic threshold is set to 600M, then within one cycle (such as 1s), only 600M of data can be output from the uncompressed bitstream). After waiting for the specified time (it can be understood that the FPGA can process 1000M of data internally in 1s. If 1s is divided into 1000ms, and the uncompressed bitstream bit rate is set to 600M, then the uncompressed bitstream can only be transmitted for 600ms within every 1000ms, and it is not allowed to transmit the data packets of the uncompressed bitstream during the remaining 400ms).

[0108] In some examples, the FPGA determines the second total data volume based on the sum of the packet lengths of each second packet transmitted in the current cycle; when the second total data volume is less than the second traffic threshold, the second packet is transmitted; after any second packet is transmitted, the transmission switches to the first packet included in the first data; or when the second total data volume is greater than or equal to the second traffic threshold, the transmission switches to the first packet included in the first data.

[0109] In some examples, the data information further includes a priority identifier. The FPGA determines the second total data volume based on the sum of the packet lengths of each second packet transmitted in the current cycle; when the second total data volume is less than the second traffic threshold and there is a second packet with a priority identifier of a third identifier, the second packet with a priority identifier of the third identifier is transmitted; after any second packet with a priority identifier of the third identifier is transmitted, the transmission switches to the first packet included in the first data; or when the second total data volume is less than the second traffic threshold, there is no second packet with a priority identifier of the third identifier, and there is a second packet with a priority identifier of a fourth identifier, the second packet with a priority identifier of the fourth identifier is transmitted; after any second packet with a priority identifier of the fourth identifier is transmitted, the transmission switches to the first packet included in the first data; or when the second total data volume is less than the second traffic threshold, there is no second packet with a priority identifier of the third identifier, and there is no second packet with a priority identifier of the fourth identifier, the transmission switches to the first packet included in the first data; or when the second total data volume is greater than or equal to the second traffic threshold, the transmission switches to the first packet included in the first data.

[0110] As can be seen from the above, in the data processing method provided by the embodiments of the present disclosure, when the encoding device receives the video source data, the video source data is respectively data-compressed at the first coding rate and the second coding rate to obtain the first data corresponding to the first coding rate and the second data corresponding to the second coding rate; for example, the first data corresponding to the first coding rate is high-priority data, and the second data corresponding to the second coding rate is low-priority data. By controlling the number of packets with different compression coding rates in a cycle through the traffic threshold, the traffic threshold can be dynamically adjusted based on the requirements of the display quality. While ensuring the transmission quantity of packets with different compression coding rates in a cycle, the display quality can be guaranteed; at the same time, every time a first packet is transmitted, a second packet is forcibly transmitted, which can effectively avoid the complete blocking of ordinary services. In this way, on the one hand, the threshold can limit the burst traffic of high priority, and on the other hand, the alternate transmission method can balance the bandwidth occupancy and reduce the risk of buffer overflow and packet loss. Repeating this process can avoid the phenomenon of video freezing at the encoding end.

[0111] In some implementable examples, the sum of the first total data volume of the first data packets transmitted per unit time and the second total data volume of the second data packets transmitted per unit time is less than or equal to the actual total data volume transmitted by the network per unit time.

[0112] Embodiment 2

[0113] The structural schematic diagram of the data processing device provided in Embodiment 2 of the present application is as Figure 13 shown. The data processing device includes: a processing module 201 and a transceiver module 202.

[0114] The processing module 201 is configured to, when the transceiver module 202 receives video source data, compress the video source data received by the transceiver module 202 at a first bit rate and a second bit rate respectively to obtain first data corresponding to the first bit rate and second data corresponding to the second bit rate; wherein, the first bit rate is less than the second bit rate;

[0115] The processing module 201 is further configured to alternately transmit at least one first data packet in the first data and at least one second data packet in the second data until the first data and the second data are completely transmitted.

[0116] In some implementable examples, the transceiver module 202 is specifically configured to obtain the packet information of the first data packet in the first data and the data information of the second data packet in the second data; wherein, the packet information includes one or more of a transmission identifier and a packet length, and the data information includes at least the packet length; the processing module 201 is specifically configured to determine the currently transmitted first data packet according to the packet information obtained by the transceiver module 202; the processing module 201 is specifically configured to determine the currently transmitted second data packet according to the data information obtained by the transceiver module 202; the processing module 201 is specifically configured to alternately transmit the currently transmitted first data packet and the currently transmitted second data packet until the first data and the second data are completely transmitted.

[0117] In some implementable examples, the packet information includes a transmission identifier, and the transmission identifier includes a first identifier; the processing module 201 is specifically configured to determine that there is a first data packet with a transmission identifier of the first identifier, and determine the currently transmitted first data packet from the first data packets with a transmission identifier of the first identifier.

[0118] In some implementable examples, the transmission identifier further includes a second identifier; the processing module 201 is further configured to determine that there is no first data packet with a transmission identifier of the first identifier and there is a first data packet with a transmission identifier of the second identifier, and determine the currently transmitted first data packet from the first data packets with a transmission identifier of the second identifier.

[0119] In some implementable examples, the processing module 201 is specifically configured to determine that there is a first data packet with a transmission identifier being the first identifier, and obtain the reception time of each first data packet that receives the transmission identifier being the first identifier; the processing module 201 is specifically configured to calculate the time difference between the current time and the reception time; the processing module 201 is specifically configured to use the first data packet corresponding to the maximum time difference as the first data packet currently being transmitted.

[0120] In some implementable examples, the data packet information includes the data packet length and the transmission identifier, and the transmission identifier includes the first identifier; the processing module 201 is specifically configured to determine the first total data volume based on the sum of the data packet lengths of each first data packet transmitted in the current period; the processing module 201 is specifically configured to determine that the first total data volume is less than the first traffic threshold and there is a first data packet with a transmission identifier being the first identifier, and determine the first data packet currently being transmitted from the first data packets with a transmission identifier being the first identifier.

[0121] In some implementable examples, the transmission identifier further includes a second identifier; the processing module 201 is further configured to determine that the first total data volume is less than the first traffic threshold, there is no first data packet with a transmission identifier being the first identifier, and there is a first data packet with a transmission identifier being the second identifier, and determine the first data packet currently being transmitted from the first data packets with a transmission identifier being the second identifier.

[0122] In some implementable examples, the processing module 201 is specifically configured to determine the second total data volume based on the sum of the data packet lengths of each second data packet transmitted in the current period; the processing module 201 is specifically configured to, if the second total data volume is less than the second traffic threshold, determine the second data packet currently being transmitted from the second data packets.

[0123] Among them, all relevant contents of each step involved in the above method embodiment can be cited to the function description of the corresponding functional module, and its function will not be elaborated here.

[0124] Of course, the data processing device provided in the embodiment of the present invention includes but is not limited to the above modules. For example, the data processing device may further include a storage module 203. The storage module 203 can be used to store the program code of the data processing device, and can also be used to store the data generated during the operation of the data processing device, such as diagnostic data, etc.

[0125] A schematic structural diagram of an electronic device provided in an embodiment of the present invention is shown as Figure 14 shown. The electronic device may include: at least one processor 51, a memory 52, a communication interface 53, and a communication bus 54.

[0126] The following specifically introduces each component of the electronic device:

[0127] Among them, the processor 51 is the control center of the electronic device, which can be a single processor or a collective term for multiple processing elements. For example, the processor 51 is a central processing unit (CPU), or can be an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present invention, such as one or more DSPs, or one or more field programmable gate arrays (FPGAs).

[0128] In a specific implementation, as an embodiment, the processor 51 may include one or more CPUs, such as CPU0 and CPU1 included in the CPU. And, as an embodiment, the electronic device may include multiple processors, such as the processor 51 and the processor 55 included in the CPU. Each of these processors can be a single-core processor (Single-CPU) or a multi-core processor (Multi-CPU). Here, the processor may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0129] The memory 52 can be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 52 can exist independently and be connected to the processor 51 through the communication bus 54. The memory 52 can also be integrated with the processor 51.

[0130] In a specific implementation, the memory 52 is used to store the data in the present invention and execute the software program of the present invention. The processor 51 can execute various functions of the air conditioner by running or executing the software program stored in the memory 52 and calling the data stored in the memory 52.

[0131] A communication interface 53, using a device such as any transceiver, is used to communicate with other devices or communication networks, such as a Radio Access Network (RAN), Wireless Local Area Networks (WLAN), a terminal, the cloud, etc. The communication interface 53 may include a transceiver module to implement the receiving and acquiring functions.

[0132] A communication bus 54 can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, etc. This bus can be divided into an address bus, a data bus, a control bus, etc. For the sake of simplicity, it is represented by a thick line only, but it does not mean that there is only one bus or one type of bus.

[0133] As an example, in combination with Figure 13 , such as Figure 14 shown, the functions implemented by the transceiver module 202 of the data processing device are the same as those of the communication interface 53, the functions implemented by the processing module 201 in the data processing device are the same as those of the processor 51, and the functions implemented by the storage module 203 in the data processing device are the same as those of the memory 52.

[0134] The embodiments of the present application further provide a computer-readable storage medium, in which computer-executable instructions are stored, and when the computer-executable instructions are executed by a processor, they are used to implement the method in any of the embodiments.

[0135] The above are only specific embodiments of the present disclosure, enabling those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to these embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A data transmission method, characterized in that: include: receiving video source data, and compressing the video source data according to a first bit rate and a second bit rate, respectively, to obtain first data corresponding to the first bit rate and second data corresponding to the second bit rate; wherein the value of the first bit rate is smaller than the value of the second bit rate; At least one first data packet in the first data and at least one second data packet in the second data are transmitted alternately until the transmission of the first data and the second data is completed.

2. The data transmission method according to claim 1, characterized in that: The alternately transmitting at least one first data packet in the first data and at least one second data packet in the second data until the transmission of the first data and the second data is completed comprises: Acquire data packet information of a first data packet in the first data and data information of a second data packet in the second data; Determine the first data packet currently being transmitted according to the data packet information; Determining a second data packet currently being transmitted according to the data information; The first data packet currently being transmitted and the second data packet currently being transmitted are transmitted alternately until the transmission of the first data and the second data is completed.

3. The data transmission method according to claim 2, characterized in that: in, The data packet information includes one or more of a transmission identifier and a data packet length; the transmission identifier includes a first identifier; The step of determining the first data packet currently being transmitted according to the data packet information includes: It is determined that there is a first data packet whose transmission identifier is the first identifier, and a first data packet currently being transmitted is determined from the first data packets whose transmission identifier is the first identifier.

4. The data transmission method according to claim 3, characterized in that: The transmission identifier also includes a second identifier; The method further comprises: It is determined that there is no first data packet with the transmission identifier being the first identifier, and there is a first data packet with the transmission identifier being the second identifier, and the first data packet currently being transmitted is determined from the first data packets with the transmission identifier being the second identifier.

5. The data transmission method according to claim 2, characterized in that: The data packet information includes data packet length and transmission identification; The transmission identifier includes a first identifier; The step of determining the first data packet currently being transmitted according to the data packet information includes: Determine a first total data volume based on the sum of the data packet lengths of each of the first data packets transmitted in the current cycle; It is determined that the first total data volume is less than a first traffic threshold, and there is a first data packet whose transmission identifier is the first identifier, and the first data packet currently being transmitted is determined from the first data packets whose transmission identifier is the first identifier.

6. The data transmission method according to claim 5, characterized in that: The transmission identifier also includes a second identifier; The method further comprises: Determine that the first total data volume is less than the first traffic threshold, and there is no first data packet with the transmission identifier being the first identifier, and there is a first data packet with the transmission identifier being the second identifier, and determine the first data packet currently being transmitted from the first data packets with the transmission identifier being the second identifier.

7. The data transmission method according to claim 2, characterized in that: in, The data information at least includes a data packet length; and determining the second data packet currently being transmitted according to the data information includes: Determine a second total data amount based on the sum of the data packet lengths of each of the second data packets transmitted in the current cycle; If the second total data volume is less than a second traffic threshold, a second data packet currently being transmitted is determined from the second data packet.

8. A data transmission device, characterized in that: include: a processing module, configured to, when the transceiver module receives the video source data, respectively compress the video source data received by the transceiver module according to a first bit rate and a second bit rate, to obtain first data corresponding to the first bit rate and second data corresponding to the second bit rate; wherein the value of the first bit rate is smaller than the value of the second bit rate; The processing module is further used to transmit at least one first data packet in the first data and at least one second data packet in the second data in turn until the transmission of the first data and the second data is completed.

9. A coding device, characterized in that: The encoding device comprises: processor; a memory configured to store instructions executable by the processor; The processor is configured to execute the instructions to implement the data transmission method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and when the computer-executable instructions are executed by a processor, they are used to implement the data transmission method according to any one of claims 1 to 7.

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