Point defect property distinguishing method and system for p-type gate GaN-based power device
Through the C-V curve and variable temperature capacitance transient test combined with DLTS analysis, the problem of difficulty in positioning and quantitatively analyzing the internal point defects of p-type gate GaN-based power devices in the prior art is solved, and the accurate analysis and understanding of defect properties are achieved.
Patent Information
- Application Number
- CN202510361023.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-26
- Publication Date
- 2025-06-27
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The prior art is difficult to directly position and quantitatively analyze point defects inside p-type gate GaN-based power devices, affecting the output current, transconductance and threshold voltage of the device.
By obtaining the C-V curve of the p-type gate GaN-based power device, the majority carrier concentration and test voltage are determined, and combined with the variable temperature capacitance transient test and DLTS analysis, the deep energy level transient spectral signal map is obtained to distinguish the properties of point defects.
Quantitative analysis of internal point defects of p-type gate GaN-based power devices is realized, and the energy level of defects, capture cross-section and trap concentration are accurately measured, which improves the understanding of the device's electrical and dynamic performance.
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Figure CN120214528A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of electronic device detection, and relates to a method and system for differentiating the point defect properties of p-type gate GaN-based power devices. Background Art
[0002] P-type gate GaN-based high electron mobility transistors (GaN-based HEMT) have received extensive attention due to their excellent electrical properties and potential for high-frequency high-power applications. P-type gate GaN-based power devices are usually based on the AlGaN / GaN heterojunction structure, and use the polarization effect to form a two-dimensional electron gas (2DEG) with high mobility at the interface, thereby achieving efficient electrical properties. However, crystal defects such as point defects and dislocations will capture carriers, reduce the 2DEG concentration and mobility, and thus affect the output current, transconductance and threshold voltage of the device. Although traditional electrical characteristic tests (such as output characteristics and transfer characteristics) can reflect the changes in device performance, it is difficult to directly locate and quantitatively analyze internal defects. Summary of the Invention
[0003] The purpose of the present invention is to solve the problem that it is difficult to directly locate and quantitatively analyze the internal defects of p-type gate GaN-based power devices in the prior art by electrical characteristic tests, and to provide a method and system for differentiating the point defect properties of p-type gate GaN-based power devices.
[0004] To achieve the above purpose, the present invention adopts the following technical solutions:
[0005] A method for differentiating the point defect properties of a p-type gate GaN-based power device includes:
[0006] Ground the drain of the p-type gate GaN-based power device to be tested, and apply a working voltage to the gate of the p-type gate GaN-based power device to be tested to obtain the C-V curve of the gate-source of the p-type gate GaN-based power device;
[0007] Based on the fitting of the C-V curve of the gate-source of the p-type gate GaN-based power device Determine the majority carrier concentration, and determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp and period width Tw according to the voltage range where the space charge region is located;
[0008] Based on the determined test voltage Vm, fill pulse voltage Vp and period width Tw, perform temperature variation within the set temperature range, perform capacitance transient testing on the p-type gate GaN-based power device to be tested, and obtain the DLTS peak signal at different pulse widths by changing different pulse widths Tp, and then obtain the deep level transient spectroscopy signal map;
[0009] Based on the deep-level transient spectroscopy signal diagram, analyze the functional relationship between the DLTS peak signal and the fill pulse width. The isolated point defects have an exponential function relationship with the fill pulse width, and the point defects related to dislocations have a linear function relationship.
[0010] In the deep-level transient spectroscopy signal diagram, select points for fitting the obtained DLTS peak signal to obtain the Arrhenius curve, and obtain the defect information of the p-type gate GaN-based power device according to the Arrhenius curve.
[0011] A further improvement of the present invention lies in:
[0012] Further, ground the drain of the p-type gate GaN-based power device to be tested, and apply a working voltage to the gate of the p-type gate GaN-based power device to be tested to obtain the C-V curve of the gate-source of the p-type gate GaN-based power device. Specifically:
[0013] Install the p-type gate GaN-based power device to be tested on the test sample holder, connect the test sample holder to the variable-temperature test bench of the deep-level transient spectrometer and keep it stable, ground the drain of the p-type gate GaN-based power device; connect the gate to the high-level line and apply an AC working voltage, connect the source to the low-level connector, preset the gate-source voltage scanning range, and obtain the C-V curve of the gate-source of the p-type gate GaN-based power device.
[0014] Further, based on the fitting of the C-V curve of the gate-source of the p-type gate GaN-based power device Determine the majority carrier concentration. Specifically:
[0015] The p-type gate GaN-based power device is similar to the MIS metal-insulator-semiconductor structure. The insulating layer in the MIS metal-insulator-semiconductor structure has a capacitance value, and the maximum capacitance C in the accumulation region is reached under the high-frequency C-V curve max represents the insulating layer capacitance. The insulating layer capacitance C max forms a series equivalent circuit with the semiconductor depletion region capacitance below. The capacitance in series can be approximately calculated as Fit the majority carrier concentration inside the transistor and convert it to Convert the C-V curve to relationship curve, and fit based on the Mott-Schottky equation relationship curve; use the obtained slope to calculate the majority carrier concentration.
[0016] Further, according to the voltage range where the space charge region is located, determine the test voltage Vm, the fill pulse voltage Vp, the pulse width Tp, and the period width Tw. Specifically:
[0017] Observe the C-V curve to determine the voltage range where the space charge region starts and ends; within the range of the space charge region, determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw according to the selection principles of the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw; where the test voltage Vm is the voltage value on the C-V curve that can reflect the behavior of majority carriers and will not cause damage to the p-type gate GaN-based power device; the fill pulse voltage Vp is the voltage value higher than the threshold voltage but not sufficient to cause significant current flow, ensuring that the p-type gate GaN-based power device can fully recover during the pulse test; the pulse width Tp allows the p-type gate GaN-based power device to reach a steady state during the fill pulse; the test period Tw includes the pulse width Tp and the necessary recovery time of the p-type gate GaN-based power device; the period width Tw is the duration of the test voltage Vm.
[0018] Furthermore, based on the determined test voltage Vm, fill pulse voltage Vp, and period width Tw, perform temperature variation within the set temperature range, conduct capacitance transient testing on the p-type gate GaN-based power device to be measured, obtain the DLTS peak signals at different pulse widths by changing different pulse widths Tp, and further obtain the deep level transient spectroscopy signal diagram. Specifically:
[0019] Perform capacitance transient testing on the p-type gate GaN-based power device to be measured from low temperature to high temperature scanning range, while changing the pulse width Tp, and record the transient capacitance curves of the p-type gate GaN-based power device corresponding to different temperature points; perform Fourier transform on the transient capacitance signals to convert the time-domain signals into frequency-domain signals, and obtain the relationship between the Fourier coefficients of the capacitance change at different frequencies and temperature, that is, the deep level transient spectroscopy signal diagram, where each coefficient corresponds to the maximum time constant.
[0020] Furthermore, based on the deep level transient spectroscopy signal diagram, analyze the functional relationship between the DLTS peak signal and the fill pulse width. Specifically:
[0021] For isolated point defects, the concentration of the occupied defect state depends on the duration of the fill pulse. Specifically:
[0022] n T (t p )=N T +(n T (0)-N T )exp(-c n t p )
[0023] Where n T is the DLTS signal at the peak temperature at the pulse fill width t p , NT is the trap concentration, c n is the carrier capture rate, and the isolated point defects are exponentially distributed.
[0024] For the point defects related to dislocations, the concentration of the occupied trap states is linearly distributed with the logarithm of the filling pulse width, specifically:
[0025]
[0026] where τ is the time constant of defect capture, and the DLTS peak signal of this type of defect has a linear relationship with the logarithm of the filling pulse width.
[0027] Furthermore, in the deep level transient spectroscopy signal graph, select points for fitting the obtained DLTS peak signal to obtain the Arrhenius curve, specifically:
[0028] By selecting points for fitting the DLTS peak signals under different emission rate windows, the Arrhenius curve describing the kinetic behavior of the capture and emission processes of carriers in the defect energy levels is obtained. The ordinate is ln(T 2 / e n ); the abscissa is 1000 / T. Based on the Arrhenius plot fitting, the energy level and capture cross section of the defect are obtained, specifically:
[0029]
[0030] where τ n is the time constant, the reciprocal of which is e n , v th is the emission rate of hot electrons or holes, N V,C is the effective density of states in the valence band or conduction band, v th ·N V,C is proportional to the square of the temperature T 2 , E a is the defect activation energy, k is the Boltzmann constant, T is the Kelvin temperature, γ is the entropy factor, and σ is the capture cross section area.
[0031] Furthermore, the defect information of the p-type gate GaN-based power device is obtained according to the Arrhenius curve, specifically: the energy level of the point defect is obtained based on the slope of the Arrhenius curve, and the capture cross section is obtained based on the intercept. The defect information of the p-type gate GaN-based power device includes: the concentration and type of point defects;
[0032] The concentration of the point defects in the p-type gate GaN-based power device is the ratio of the change in transient capacitance to the steady-state capacitance value;
[0033] The concentration of the point defects in the p-type gate GaN-based power device is specifically:
[0034]
[0035] Among them, N T is the trap concentration; ΔC is the transient capacitance value C(t) at time t minus the initial capacitance value C0, and C M is the steady-state value of the transient capacitance; n e is for the electron concentration fitted by
[0036] The defect type of the p-type gate GaN-based power device is as follows: the positive peak of the DLTS spectrum represents the majority carriers, and the negative peak of the DLTS spectrum represents the minority carriers; since the AlGaN / GaN heterojunction of the p-type gate GaN-based power device generates a two-dimensional electron gas due to spontaneous polarization and piezoelectric polarization, combined with the selected voltage range, it is determined that the majority carriers in the space charge region formed by the AlGaN / GaN heterojunction in the p-type gate GaN-based power device are electrons, and the minority carriers are holes, so as to judge that the currently measured defect type is electron trap E i (i = 1, 2, 3…), or hole trap H i (i = 1, 2, 3…).
[0037] A system for distinguishing the point defect properties of a p-type gate GaN-based power device, comprising:
[0038] An acquisition module, which grounds the drain of the p-type gate GaN-based power device to be measured and applies a working voltage to the gate of the p-type gate GaN-based power device to be measured to obtain the C-V curve of the gate-source of the p-type gate GaN-based power device;
[0039] A determination module, which determines the majority carrier concentration based on the fitting of the C-V curve of the gate-source of the p-type gate GaN-based power device, and determines the test voltage Vm, the fill pulse voltage Vp, the pulse width Tp, and the period width Tw according to the voltage range where the space charge region is located; A test module, which based on the determined test voltage Vm, fill pulse voltage Vp, and period width Tw, performs temperature variation within the set temperature range to perform capacitance transient testing on the p-type gate GaN-based power device to be measured, and obtains the DLTS peak signal at different pulse widths by changing different pulse widths Tp, and further obtains the deep level transient spectroscopy signal graph;
[0040] An analysis module, which based on the deep level transient spectroscopy signal graph, analyzes the functional relationship between the DLTS peak signal and the fill pulse width. The isolated point defects have an exponential function relationship with the fill pulse width, and the point defects related to dislocations have a linear function relationship;
[0041]
[0042] A fitting module, which selects points and fits the obtained DLTS peak signals in the deep level transient spectroscopy signal graph to obtain an Arrhenius curve; and obtains defect information of the p-type gate GaN-based power device according to the Arrhenius curve.
[0043] Compared with the prior art, the present invention has the following beneficial effects:
[0044] The present invention obtains the C-V curve of the gate-source of the p-type gate GaN-based power device and fits it And different pulse widths are applied to the p-type gate GaN-based power device. By analyzing the logarithmic relationship between the DLTS peak signal and the pulse width, it is distinguished whether the point defects exist in isolation or along the dislocation distribution. Through the voltage pulse excitation test under the temperature scanning condition from low temperature to high temperature, the key information such as the energy level, capture cross section, and trap concentration of the point defects inside the p-type gate GaN-based power device is accurately measured, so as to quantitatively analyze the influence of the defects on the electrical performance and dynamic performance of the p-type gate GaN-based power device. BRIEF DESCRIPTION OF THE DRAWINGS
[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0046] Figure 1 It is a schematic flow chart of the method for distinguishing the nature of point defects of the p-type gate GaN-based power device of the present invention;
[0047] Figure 2 It is a schematic diagram of the gate-source C-V curve of the p-type gate GaN-based power device;
[0048] Figure 3 (a) is a schematic diagram of the deep level transient spectroscopy signal of the p-type gate GaN-based power device under different pulse widths;
[0049] Figure 3 (b) is a schematic diagram showing a linear relationship between the deep level transient spectroscopy signal of the p-type gate GaN-based power device and the logarithm of the pulse width;
[0050] Figure 4 It is a schematic diagram of the Arrhenius curve corresponding to the deep level transient spectroscopy signal graph measured by the p-type gate GaN-based power device;
[0051] Figure 5 It is a schematic structural diagram of the system for distinguishing the nature of point defects of the p-type gate GaN-based power device of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0052] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some but not all of the embodiments of the present invention. Components of the embodiments of the present invention usually described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.
[0053] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but merely represents selected embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without any creative work fall within the scope of protection of the present invention.
[0054] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not require further definition and explanation in subsequent drawings.
[0055] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper", "lower", "horizontal", "inner", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the present invention is usually placed during use. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention. In addition, terms such as "first", "second", etc. are only used for descriptive distinction and cannot be construed as indicating or implying relative importance.
[0056] In addition, if the term "horizontal" appears, it does not mean that the component is required to be absolutely horizontal, but it can be slightly inclined. For example, "horizontal" only means that its direction is more horizontal relative to "vertical", and does not mean that the structure must be completely horizontal, but it can be slightly inclined.
[0057] In the description of the embodiments of the present invention, it should also be noted that unless otherwise clearly specified and limited, if terms such as "set", "installed", "connected", "connected" are used, they should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.
[0058] The present invention will be further described in detail below with reference to the accompanying drawings:
[0059] See Figure 1 , the present invention discloses a method for distinguishing point defect properties of a p-type gate GaN-based power device, including:
[0060] S101, ground the drain of the p-type gate GaN-based power device to be measured, apply a working voltage to the gate of the p-type gate GaN-based power device to be measured, and obtain the C-V curve of the gate-source of the p-type gate GaN-based power device;
[0061] Mount the p-type gate GaN-based power device to be measured on the test sample holder, connect the test sample holder to the variable temperature test bench of the deep level transient spectrometer and keep it stable, ground the drain of the p-type gate GaN-based power device; connect the gate to the high level line and apply an AC working voltage, connect the source to the low level connector, preset the gate-source voltage scanning range, and obtain the C-V curve of the gate-source of the p-type gate GaN-based power device. As Figure 2 shown.
[0062] S102, fit based on the C-V curve of the gate-source of the p-type gate GaN-based power device to determine the majority carrier concentration, and determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw according to the voltage range where the space charge region is located;
[0063] Fit based on the C-V curve of the gate-source of the p-type gate GaN-based power device to determine the majority carrier concentration, specifically:
[0064] The p-type gate GaN-based power device is similar to the MIS metal-insulator-semiconductor structure. The insulating layer in the MIS metal-insulator-semiconductor structure has a capacitance value, and the maximum capacitance C at the accumulation region under the high-frequency C-V curve max represents the insulating layer capacitance. The insulating layer capacitance C max forms a series equivalent circuit with the semiconductor depletion region capacitance below. The capacitance in series can be approximately calculated as to fit the majority carrier concentration inside the transistor and convert it to Convert the C-V curve to the relationship curve of, and fit based on the Mott-Schottky equation the relationship curve; use the obtained slope to calculate the majority carrier concentration.
[0065] According to the voltage range where the space charge region is located, determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw, specifically:
[0066] Observe the C-V curve to determine the voltage range where the space charge region starts and ends; within the range of the space charge region, determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw according to the selection principles of the test voltage Vm, fill pulse voltage Vp, pulse width Tp, and period width Tw; where the test voltage Vm is the voltage value on the C-V curve that can reflect the behavior of majority carriers and will not cause damage to the p-type gate GaN-based power device; the fill pulse voltage Vp is the voltage value higher than the threshold voltage but not sufficient to cause significant current flow, ensuring that the p-type gate GaN-based power device can fully recover during the pulse test; the pulse width Tp allows the p-type gate GaN-based power device to reach a steady state during the fill pulse; the test period Tw includes the pulse width Tp and the necessary recovery time of the p-type gate GaN-based power device; the period width Tw is the duration of the test voltage Vm.
[0067] S103, Based on the determined test voltage Vm, fill pulse voltage Vp, and period width Tw, vary the temperature within the set temperature range, perform a capacitance transient test on the p-type gate GaN-based power device to be measured, obtain the DLTS peak signal at different pulse widths by changing different pulse widths Tp, and further obtain the deep level transient spectroscopy signal graph;
[0068] Perform a capacitance transient test on the p-type gate GaN-based power device to be measured from low temperature to high temperature scanning range, while changing the pulse width Tp, record the transient capacitance curve of the p-type gate GaN-based power device corresponding to different temperature points; perform a Fourier transform on the transient capacitance signal to convert the time-domain signal into a frequency-domain signal, and obtain the relationship between the Fourier coefficient of the capacitance change at different frequencies and the temperature, that is, the deep level transient spectroscopy signal graph, as Figure 3 (a) and Figure 3 (b) shown, where each coefficient corresponds to the maximum time constant. For example, change the pulse width from 5×10 -5 s, 1×10 -4 s, 5×10 -4 s, 1×10 -3 s, 5×10 -3 s, 1×10 -2 s, etc.
[0069] S104, Based on the deep level transient spectroscopy signal graph, analyze the functional relationship between the DLTS peak signal and the fill pulse width. The isolated point defects have an exponential function relationship with the fill pulse width, and the point defects related to dislocations have a linear function relationship;
[0070] For isolated point defects, the concentration of the occupied defect state depends on the duration of the fill pulse, specifically:
[0071] nT (t p ) = N T + (n T (0) - N T ) exp(-c n t p )
[0072] Among them, n T is the DLTS signal at the peak temperature when the pulse filling width is t p , N T is the trap concentration, and c n is the carrier capture rate. The isolated point defects are exponentially distributed.
[0073] For the point defects related to dislocations, the concentration of the occupied trap states is linearly distributed with the logarithm of the filling pulse width, specifically:
[0074]
[0075] Among them, τ is the time constant of defect capture, and the DLTS peak signal of this type of defect has a linear relationship with the logarithm of the filling pulse width.
[0076] S105. In the deep level transient spectroscopy signal diagram, perform point selection fitting on the obtained DLTS peak signal to obtain the Arrhenius curve, and obtain the defect information of the p-type gate GaN-based power device according to the Arrhenius curve.
[0077] In the deep level transient spectroscopy signal diagram, perform point selection fitting on the obtained DLTS peak signal to obtain the Arrhenius curve, specifically:
[0078] By performing point selection fitting on the DLTS peak signals under different emission rate windows, obtain the Arrhenius curve that describes the kinetic behavior of the capture and emission processes of carriers in the defect energy levels, as Figure 4 shown, where E1 is marked as the detected electron trap 1, H1 is marked as the detected hole trap 1, and H2 is marked as the detected hole trap 2. The ordinate is ln(T 2 / e n ), the abscissa is 1000 / T, and the energy level and capture cross section of the defect are obtained based on the Arrhenius plot fitting, specifically:
[0079]
[0080] Among them, τ n is the time constant, the reciprocal of which is e n , v th is the emission rate of hot electrons or holes, N V,C is the effective density of states in the valence band or conduction band, v th ·NV,C is proportional to the square of the temperature T 2 , where E a is the defect activation energy, k is the Boltzmann constant, T is the Kelvin temperature, γ is the entropy factor, and σ is the capture cross-sectional area.
[0081] The defect information of the p-type gate GaN-based power device includes: the concentration of point defects in the p-type gate GaN-based power device and the type of point defects in the p-type gate GaN-based power device;
[0082] The defect information of the p-type gate GaN-based power device obtained according to the Arrhenius curve is specifically: the energy level of point defects is obtained based on the slope of the Arrhenius curve, and the capture cross-section is obtained from the intercept. The defect information of the p-type gate GaN-based power device includes: the concentration of point defects in the p-type gate GaN-based power device and the type of point defects in the p-type gate GaN-based power device; the concentration of point defects in the p-type gate GaN-based power device is the ratio of the change in transient capacitance to the steady-state capacitance value;
[0083] The concentration of point defects in the p-type gate GaN-based power device is specifically:
[0084]
[0085] where N T is the trap concentration; ΔC is the transient capacitance value C(t) at time t minus the initial capacitance value C0, and C M is the steady-state value of the transient capacitance; n e is the electron concentration fitted by fitting;
[0086] The defect type of the p-type gate GaN-based power device is: the positive peak of the DLTS spectrum represents the majority carriers, and the negative peak of the DLTS spectrum represents the minority carriers; since the AlGaN / GaN heterojunction of the p-type gate GaN-based power device generates a two-dimensional electron gas due to spontaneous polarization and piezoelectric polarization, by combining the selected voltage range, it is determined that the majority carriers in the space charge region formed by the AlGaN / GaN heterojunction in the p-type gate GaN-based power device are electrons and the minority carriers are holes, so as to judge that the currently measured defect type is an electron trap E i (i = 1, 2, 3...), or a hole trap H i (i = 1, 2, 3...).
[0087] See Figure 2 , the present invention discloses a system for distinguishing the properties of point defects in a p-type gate GaN-based power device, including:
[0088] An acquisition module, which grounds the drain of the p-type gate GaN-based power device to be tested and applies a working voltage to the gate of the p-type gate GaN-based power device to be tested, and acquires the C-V curve of the gate-source of the p-type gate GaN-based power device;
[0089] A determination module, which fits based on the C-V curve of the gate-source of the p-type gate GaN-based power device Determine the majority carrier concentration, and determine the test voltage Vm, the fill pulse voltage Vp, the pulse width Tp, and the period width Tw according to the voltage range where the space charge region is located;
[0090] A test module, which performs temperature variation within a set temperature range based on the determined test voltage Vm, fill pulse voltage Vp, and period width Tw, and performs capacitance transient testing on the p-type gate GaN-based power device to be tested. By changing different pulse widths Tp, DLTS peak signals at different pulse widths are obtained, and then a deep level transient spectroscopy signal diagram is acquired;
[0091] An analysis module, which analyzes the functional relationship between the DLTS peak signal and the fill pulse width based on the deep level transient spectroscopy signal diagram. The isolated point defects have an exponential function relationship with the fill pulse width, and the point defects related to dislocations have a linear function relationship;
[0092] A fitting module, which selects points and fits the obtained DLTS peak signals in the deep level transient spectroscopy signal diagram to obtain an Arrhenius curve; defect information of the p-type gate GaN-based power device is obtained according to the Arrhenius curve.
[0093] The terminal device provided by the embodiment of the present invention. The terminal device of this embodiment includes: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the steps in the above-mentioned various method embodiments are implemented. Or, when the processor executes the computer program, the functions of each module / unit in the above-mentioned various device embodiments are implemented.
[0094] The computer program can be divided into one or more modules / units, and the one or more modules / units are stored in the memory and executed by the processor to complete the present invention.
[0095] The terminal device can be a computing device such as a desktop computer, a notebook, a palm computer, and a cloud server. The terminal device may include, but is not limited to, a processor and a memory.
[0096] The processor may be a Central Processing Unit (CPU), or may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.
[0097] The memory can be used to store the computer program and / or module. By running or executing the computer program and / or module stored in the memory, and by invoking the data stored in the memory, the processor implements various functions of the terminal device.
[0098] If the modules / units integrated in the terminal device are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, to implement all or part of the processes in the above-described embodiment methods of the present invention, it can also be completed by a computer program instructing relevant hardware. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-described various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc. It should be noted that the content included in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium does not include electrical carrier signals and telecommunication signals.
[0099] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.
Claims
1. A method for distinguishing point defect properties of a p-type gate GaN-based power device, characterized in that: include: The drain of the p-type gate GaN-based power device to be tested is grounded, and an operating voltage is applied to the gate of the p-type gate GaN-based power device to be tested, so as to obtain a gate-source CV curve of the p-type gate GaN-based power device; CV curve fitting based on gate-source of p-type gate GaN-based power devices Determine the majority carrier concentration, and determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp and cycle width Tw according to the voltage range of the space charge region; Based on the determined test voltage Vm, fill pulse voltage Vp and cycle width Tw, the temperature is changed within the set temperature range, and the capacitance transient test is performed on the p-type gate GaN-based power device to be tested. By changing different pulse widths Tp, the DLTS peak signal under different pulse widths is obtained, and then the deep energy level transient spectrum signal diagram is obtained; Based on the deep level transient spectrum signal diagram, the functional relationship between the DLTS peak signal and the filling pulse width is analyzed. The isolated point defects have an exponential functional relationship with the filling pulse width, while the point defects related to dislocations have a linear functional relationship. In the deep level transient spectrum signal diagram, the obtained DLTS peak signal is fitted by point selection to obtain the Arrhenius curve, and the defect information of the p-type gate GaN-based power device is obtained according to the Arrhenius curve.
2. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 1, characterized in that: The drain of the p-type gate GaN-based power device to be tested is grounded, and a working voltage is applied to the gate of the p-type gate GaN-based power device to be tested to obtain a gate-source CV curve of the p-type gate GaN-based power device, specifically: The p-type gate GaN-based power device to be tested is mounted on the test sample holder, the test sample holder is connected to the variable temperature test bench of the deep energy level transient spectrometer and kept stable, the drain of the p-type gate GaN-based power device is grounded; the gate is connected to the high level line and an AC working voltage is applied, the source is connected to the low level connector, the gate-source voltage scanning range is preset, and the gate-source CV curve of the p-type gate GaN-based power device is obtained.
3. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 2, characterized in that: The CV curve fitting based on the gate source of p-type gate GaN-based power device Determine the majority carrier concentration as: The p-type gate GaN-based power device is similar to a MIS metal-insulator-semiconductor structure, in which the insulating layer has a capacitance value, reaching a maximum capacitance C in the accumulation region under a high-frequency CV curve. max Represents the insulation layer capacitance, insulation layer capacitance C max It forms an equivalent circuit in series with the semiconductor depletion region capacitor below. The capacitor series can be approximately calculated as Fitting the majority carrier concentration inside the transistor, converted to Convert CV curve to The relationship curve is based on the Mott-Schottky equation fitting Relationship curve; the majority carrier concentration is calculated using the slope obtained by fitting.
4. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 3, characterized in that: The test voltage Vm, the fill pulse voltage Vp, the pulse width Tp and the cycle width Tw are determined according to the voltage range of the space charge region, specifically: Observe the CV curve to determine the voltage range at the beginning and end of the space charge region; within the range of the space charge region, determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp and cycle width Tw according to the selection principles of test voltage Vm, fill pulse voltage Vp, pulse width Tp and cycle width Tw; wherein the test voltage Vm is a voltage value on the CV curve that can reflect the behavior of majority carriers and will not cause damage to the p-type gate GaN-based power device; the fill pulse voltage Vp is a voltage value that is higher than the threshold voltage but not enough to cause significant current flow, ensuring that the p-type gate GaN-based power device can fully recover during the pulse test; the pulse width Tp is to allow the p-type gate GaN-based power device to reach a stable state during the fill pulse; the test cycle Tw is a necessary recovery time including the pulse width Tp and the p-type gate GaN-based power device; the cycle width Tw is the duration of the test voltage Vm.
5. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 4, characterized in that: Based on the determined test voltage Vm, fill pulse voltage Vp and cycle width Tw, the temperature is changed within the set temperature range, and the capacitance transient test is performed on the p-type gate GaN-based power device to be tested. By changing different pulse widths Tp, the DLTS peak signal under different pulse widths is obtained, and then the deep energy level transient spectrum signal diagram is obtained, which is specifically: The capacitance transient test is performed on the p-type gate GaN-based power device to be tested in the scanning range from low temperature to high temperature. The pulse width Tp is changed at the same time, and the transient capacitance curves of the p-type gate GaN-based power device corresponding to different temperature points are recorded; the transient capacitance signal is subjected to Fourier transform, and the time domain signal is converted into a frequency domain signal to obtain the relationship between the Fourier coefficient of the capacitance change at different frequencies and the temperature, that is, the deep energy level transient spectrum signal diagram, in which each coefficient corresponds to the maximum time constant.
6. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 5, characterized in that: The functional relationship between the DLTS peak signal and the filling pulse width is analyzed based on the deep level transient spectrum signal diagram, specifically: For isolated point defects, the concentration of occupied defect states depends on the duration of the filling pulse and is: n T (t p )=N T +(n T (0)-N T )exp(-c n t p ) Among them, n T is the pulse filling width t p DLTS signal at peak temperature, N T is the trap concentration, c n is the carrier capture rate, and isolated point defects are exponentially distributed. For point defects associated with dislocations, the concentration of occupied trap states is linearly distributed with the logarithm of the filling pulse width, specifically: Among them, τ is the time constant of defect capture, and the DLTS peak signal of this type of defect is linearly related to the logarithm of the filling pulse width.
7. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 6, characterized in that: In the deep level transient spectrum signal diagram, the obtained DLTS peak signal is subjected to point fitting to obtain the Arrhenius curve, specifically: By fitting the DLTS peak signal under different emissivity windows, the Arrhenius curve describing the kinetic behavior of the carrier capture and emission process in the defect energy level is obtained. The ordinate is ln(T 2 / e n ); the abscissa is 1000 / T, and the energy level and capture cross section of the defect are obtained based on the Arrhenius diagram fitting, specifically: Among them, τ n is the time constant, whose reciprocal is e n , ν th is the emission rate of hot electrons or holes, N V,C is the effective density of states in the valence band or conduction band, ν th ·N V,C The square of the temperature T 2 Directly proportional to E a is the defect activation energy, k is the Boltzmann constant, T is the Kelvin temperature, γ is the entropy factor, and σ is the capture cross-sectional area.
8. A method for distinguishing point defect properties of a p-type gate GaN-based power device according to claim 7, characterized in that: The defect information of the p-type gate GaN-based power device is obtained according to the Arrhenius curve, specifically: the energy level of the point defect is obtained based on the slope of the Arrhenius curve, and the capture cross section is obtained based on the vertical intercept, and the defect information of the p-type gate GaN-based power device includes: the concentration of the point defect and the type of the point defect; The concentration of point defects in the p-type gate GaN-based power device is the ratio of the change in transient capacitance to the steady-state capacitance value; The concentration of point defects in the p-type gate GaN-based power device is specifically: Among them, N T is the trap concentration; ΔC is the transient capacitance value C(t) at time t minus the initial capacitance value C0, C M is the steady-state value of the transient capacitance; n e To pass Fitted electron concentration; The defect type of the p-type gate GaN-based power device is: the positive peak of the DLTS spectrum peak diagram represents the majority carriers, and the negative peak of the DLTS spectrum peak diagram represents the minority carriers; since the AlGaN / GaN heterojunction of the p-type gate GaN-based power device generates a two-dimensional electron gas due to spontaneous polarization and piezoelectric polarization, combined with the selected voltage range, it is determined that the majority carriers of the space charge region formed by the AlGaN / GaN heterojunction in the p-type gate GaN-based power device are electrons, and the minority carriers are holes, so it is judged that the currently measured defect type is an electron trap E i (i=1,2,3…), or hole trap H i (i=1, 2, 3...).
9. A point defect property differentiation system for p-type gate GaN-based power devices, characterized in that: include: An acquisition module, wherein the acquisition module grounds the drain of the p-type gate GaN-based power device to be tested, applies an operating voltage to the gate of the p-type gate GaN-based power device to be tested, and acquires a gate-source CV curve of the p-type gate GaN-based power device; A determination module, the determination module is based on CV curve fitting of the gate source of a p-type gate GaN-based power device Determine the majority carrier concentration, and determine the test voltage Vm, fill pulse voltage Vp, pulse width Tp and cycle width Tw according to the voltage range of the space charge region; A test module, wherein the test module varies the temperature within a set temperature range based on the determined test voltage Vm, fill pulse voltage Vp and cycle width Tw, performs a capacitance transient test on the p-type gate GaN-based power device to be tested, obtains DLTS peak signals under different pulse widths by changing different pulse widths Tp, and then obtains a deep energy level transient spectrum signal diagram; An analysis module, wherein the analysis module analyzes the functional relationship between the DLTS peak signal and the filling pulse width based on the deep level transient spectrum signal diagram, wherein an isolated point defect has an exponential functional relationship with the filling pulse width, and a point defect associated with a dislocation has a linear functional relationship; A fitting module is provided, wherein the fitting module performs point fitting on the obtained DLTS peak signal in the deep level transient spectrum signal diagram to obtain an Arrhenius curve; and defect information of a p-type gate GaN-based power device is obtained according to the Arrhenius curve.
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