A probe test device and a test method
Through the multi-probe signal coupling feature map and adaptive optimization mechanism, the problems of inter-probe interference and coupling effects in traditional chip testing systems are solved, and the intelligent and automation of chip electrical characteristics testing is realized, and the testing accuracy and flexibility are improved.
Patent Information
- Application Number
- CN202510663165.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-22
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2045-05-22
AI Technical Summary
When traditional chip test probe systems face high-density and multi-pin chips, there are problems such as degradation in the quality of the test signal, inaccurate positioning of the test point, and mutual interference between probes, resulting in unstable test results and high error judgment rates, and lack of an effective processing mechanism for signal interference and coupling effects between probes.
By establishing an adaptive optimization mechanism based on test feedback, using multi-probe signal coupled feature maps to identify the target signal transmission channel, performing collaborative analysis and feature extraction of multiple probes, dynamically adjusting the test parameters and contact positions of the probes, building a closed-loop optimization test strategy, and realizing the intelligence and automation of probe testing.
It improves the accuracy and flexibility of chip electrical characteristics testing, enhances the ability to detect abnormal chip electrical performance, especially the ability to identify small defects in early stages, reduces probe wear, and reduces test time and equipment service life.
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Figure CN120214546B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of probe testing, and particularly to a probe testing device and a testing method. Background Art
[0002] Traditional chip testing probe systems mainly adopt single-probe sequence testing or simple multi-probe parallel testing methods, lacking an effective mechanism for dealing with signal interference and coupling effects between probes. When facing high-density and multi-pin chips, such testing methods often suffer from problems such as a decline in test signal quality, inaccurate positioning of test points, and mutual interference between probes, resulting in unstable test results and an increased error determination rate, seriously affecting the accuracy and reliability of chip testing.
[0003] Current chip testing technologies have obvious deficiencies in multi-probe collaborative work, especially lacking systematic analysis and optimization methods for dealing with complex signal transmission interference relationships between probes. Most testing systems use the same test parameters and fixed contact positions for each probe, failing to make dynamic adjustments according to chip characteristics and test requirements, and ignoring the important impact of probe configuration on test signal quality. At the same time, existing technologies mostly use data analysis of a single probe for detecting abnormal chip electrical performance, failing to make full use of the rich information provided by multi-probe collaboration, resulting in limited detection ability and positioning accuracy for chip defects. Summary of the Invention
[0004] The present invention provides a probe testing device and a testing method. The present invention establishes an adaptive optimization mechanism based on test feedback, enabling the test system to intelligently adjust subsequent test strategies according to preliminary test results, and realizing the intelligence and automation of the test process.
[0005] In a first aspect, the present invention provides a probe testing method, which includes:
[0006] Synchronously collecting the electrical signal response characteristics of multiple chip test probes during the process of contacting the chip and analyzing the signal transmission interference relationship between the probes to obtain a multi-probe signal coupling feature map;
[0007] Using the multi-probe signal coupling feature map to identify the target signal transmission channel to obtain a first test probe configuration scheme;
[0008] Inputting test signals to the chip and collecting responses through the first test probe configuration scheme to obtain time-frequency data of the chip electrical characteristics;
[0009] Performing multi-probe collaborative analysis and feature extraction on the time-frequency data of the chip electrical characteristics to obtain chip electrical performance abnormal indication information and adjusting the test parameters and contact positions of the multiple chip test probes to obtain a second test probe configuration scheme.
[0010] In a second aspect, the present invention provides a probe test device, which includes:
[0011] An acquisition module, configured to synchronously acquire the electrical signal response characteristics of multiple chip test probes during the process of contacting the chip, analyze the signal transmission interference relationship between the probes, and obtain a multi-probe signal coupling feature map;
[0012] An identification module, configured to identify a target signal transmission channel by using the multi-probe signal coupling feature map, and obtain a first test probe configuration scheme;
[0013] A response module, configured to input test signals to the chip and acquire responses through the first test probe configuration scheme, and obtain chip electrical characteristic time-frequency data;
[0014] An adjustment module, configured to perform multi-probe collaborative analysis and feature extraction on the chip electrical characteristic time-frequency data, obtain chip electrical performance abnormality indication information, and adjust the test parameters and contact positions of the multiple chip test probes to obtain a second test probe configuration scheme.
[0015] In the technical solution provided by the present invention, through the synchronous acquisition of the electrical signal response characteristics of multiple probes and the systematic analysis of the signal transmission interference relationship between the probes, a multi-probe signal coupling feature map is established, enabling the test system to accurately identify the target signal transmission channel, effectively reducing the influence of mutual interference between the probes on the test results, and improving the accuracy of chip electrical characteristic testing. Based on the multi-probe collaborative analysis and feature extraction technology, a comprehensive analysis of the chip electrical characteristic time-frequency data is realized. By using the convex hull representation model and the hierarchical attention fusion network to extract key features, the detection ability for chip electrical performance abnormalities is significantly enhanced, especially the ability to identify early tiny defects. By constructing a probe sensitivity evaluation model and a probe-defect response relationship matrix, precise adjustment of the probe parameters and contact positions for different chip defect characteristics is achieved, forming a second test probe configuration scheme with closed-loop optimization, greatly improving the adaptability and flexibility of the test system for different types of chips. Hierarchical clustering analysis is used to divide the probe function groups, optimize the probe contact sequence and timing configuration, reduce unnecessary test point contacts and redundant test steps, significantly reduce the test time and probe wear, and extend the service life of the test equipment. By dynamically adjusting the probe physical configuration and electrical configuration, an adaptive optimization mechanism based on test feedback is established, enabling the test system to intelligently adjust the subsequent test strategy according to the preliminary test results, and realizing the intelligence and automation of the test process. Description of the Drawings
[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the description of the embodiments. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.
[0017] Figure 1 It is a schematic diagram of the steps of the probe test method in the embodiment of the present invention;
[0018] Figure 2 It is a schematic diagram of the structure of the probe test device in the embodiment of the present invention. Specific embodiments
[0019] The embodiments of the present invention provide a probe test device and a test method. Terms such as "first", "second", "third", "fourth", etc. (if any) in the specification, claims and the above accompanying drawings of the present invention are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments described here can be implemented in an order different from that shown or described here. In addition, the term "comprising" or "having" and any variation thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.
[0020] For ease of understanding, the following describes the specific process of the embodiments of the present invention. Please refer to Figure 1 , an embodiment of the probe test method in the embodiments of the present invention includes:
[0021] Step S1: Synchronously collect the electrical signal response characteristics of multiple chip test probes during the process of contacting the chip and analyze the signal transmission interference relationship between the probes to obtain a multi-probe signal coupling characteristic diagram;
[0022] It can be understood that the execution subject of the present invention can be a probe test device, or a terminal or a server. Specifically, it is not limited here. The embodiments of the present invention take the server as the execution subject as an example for illustration.
[0023] Specifically, a micro high-bandwidth three-axis signal sensor is installed on each chip test probe. This sensor has a high signal-to-noise ratio and fast response ability to ensure that the intrinsic characteristics of the signal can still be accurately restored under the conditions of high-frequency electrical signal input and weak response changes. At the same time, through a low-weight design, it avoids interfering with the stiffness and resonance characteristics of the probe body. The sampling behavior of all sensors is driven by a unified master clock. In the system architecture, microsecond-level synchronization between multiple probes is achieved through a highly stable crystal oscillator and a master-slave synchronous sampling mechanism, supplemented by a predictive trigger mechanism to achieve trigger advance compensation based on the expected signal response pattern. Before each probe contacts the chip, the contact position and contact force of each probe are adjusted through a high-precision displacement control and force feedback unit to ensure that the set loading force window is reached during contact. At the same time, a preset test current is applied to the probe by a constant current source, so that a steady conduction state is formed at the probe-chip contact interface, and a controlled electrical contact excitation condition is constructed. After the probe-chip system enters the working state, the acquisition system samples the original electrical signal data in a high-frequency parallel manner for each channel, and the sampling frequency is not less than 50 kHz to obtain the original electrical signal response data. The original electrical signal response data is processed by Butterworth filtering. This filter adopts a linear phase design to effectively filter out high-frequency harmonic interference and pseudo signals and retain the true response signals within the main frequency range. Subsequently, a dynamic range normalization operation is performed on the filtered data. By statistically analyzing the overall amplitude distribution and compressing it into a unified amplitude range, the preprocessed signal response data is obtained. A time-domain to frequency-domain joint analysis transformation is performed on the preprocessed signal response data. By complementary methods such as short-time Fourier transform, continuous wavelet transform, or Hilbert transform, the signals of each channel are projected onto the joint time-frequency plane to extract their instantaneous frequencies, main response modes, and frequency stability characteristics, and an electrical signal response dataset in a unified format is constructed. According to the multi-probe electrical signal response dataset, by analyzing the signal phase coupling, spectrum overlap, and instantaneous response delay sequence between channels, a signal interference correlation matrix between probes is constructed, and topological mapping is performed on it using methods such as similarity measurement, covariance projection, or mutual information analysis to obtain a directed graph model where nodes represent probes, edges represent signal transmission coupling paths, and edge weights represent coupling strengths, that is, a multi-probe signal coupling characteristic map.
[0024] In this embodiment, high-resolution frequency-domain decomposition operations are performed on the electrical signal responses of each probe. The frequency-domain decomposition uses methods such as short-time Fourier transform, continuous wavelet transform, or the combination of empirical mode decomposition and Hilbert spectrum. Response characteristic functions of each probe in different frequency bands are extracted therefrom to form a multi-dimensional spectral data set including amplitude spectrum, phase spectrum, and energy distribution within the frequency band. The frequency-domain data is organized into a response tensor with frequency as the main axis and probe numbers as the channel dimension, and singular value decomposition processing is performed on this tensor to separate the dominant modes and common response characteristics in the signal, and a signal transfer function matrix reflecting the dynamic coupling relationship of the multi-probe system is constructed. Each element therein represents the response gain and phase shift from the i-th probe to the j-th probe at a specific frequency. This matrix reflects the signal transmission coupling strength and phase modulation characteristics on the cross-probe path. Based on this signal transfer function matrix, the signal transfer strengths (e.g., measured using the two-norm or energy spectral density integration) and the corresponding phase differences between all pairs of probes in all main frequency bands are calculated pairwise. These data combinations form a data set of signal transfer characteristics between probe pairs. Using this data set, an initial signal transfer network graph is constructed, where each node represents a probe, each edge represents the existence of effective signal coupling between probes, and the weight of the edge is jointly determined by the transfer strength and phase stability. The set of target signal transfer paths is extracted according to the initial signal transfer network graph. Algorithms such as maximum weight path search, dominant frequency path identification, or community detection algorithms are used to extract the set of target signal transfer paths. This set marks the subset of paths where critical signal crosstalk, information transfer distortion, or feature overlap are most likely to occur under the current test conditions. Around the set of target paths, two key metrics are calculated for each probe node in the network: one is the influence metric, which is used to measure the ability of the node to transmit information outward, and the calculation is based on the sum of the weights of the edges emitted by the node, the path crossing frequency, or its betweenness on multiple paths; the other is the target metric, which is used to measure the importance of the node as an information receiving end, with the sum of the edge weights received by it, the frequency coverage, and signal consistency as the constituent factors. The influence metric, target metric, and the set of target paths are jointly constructed into a multi-layer structured graph model, and the entire structure graph is deconstructed and analyzed using hierarchical network analysis methods to evaluate the role levels and transfer modulation capabilities of different nodes in the entire graph. For example, a hierarchical decomposition strategy based on clustering coefficient and influence mobility is adopted to classify high-influence and high-target nodes into the core layer, and the rest are divided into the intermediate layer and the edge layer according to the edge connection characteristics. A multi-probe signal coupling characteristic graph is obtained.
[0025] Step S2: Use the multi-probe signal coupling characteristic graph to identify the target signal transfer channel to obtain the first test probe configuration scheme;
[0026] Specifically, perform eigenvector centrality and path complexity analysis on the multi-probe signal coupling feature map. By extracting the eigenvector centrality index of each node in the map, quantify its information transfer status in the entire coupling map. This index reflects the frequency of occurrence of the probe in multiple key pathways and its control over the signal flow structure of the local subnet. At the same time, by calculating the path complexity of each signal channel, including path length, edge weight change range, node crossing frequency, and the number of branches, judge the information transfer stability and the probability of being disturbed of each channel. Based on the information in the above two dimensions, generate a comprehensive channel priority index for each potential channel. The higher this index, the more critical the channel is under the current chip structure and excitation mode. Based on the high-channel value areas reflected by the channel priority index, perform hierarchical clustering analysis operations on the coupling feature map. Use an adaptive distance metric method to group probe nodes with similar structures, close information densities, or strong coupling behavior correlations into the same functional subgroup, forming several probe function clusters. These clusters represent the basic units for collaborative control or parallel sampling in the subsequent probe deployment process. Combine the dominant response frequency, coupling delay model, and contact force change characteristics within each probe function group to optimize and rearrange the entire test sequence, and construct a probe contact timing configuration matrix. Each row of the matrix represents the probe group activated at a certain moment, and the columns represent the participation sequence of each probe in the sampling period. The optimization goal is to activate key probes first, stagger the activation of coupled probes, and minimize the sampling frequency of non-critical probes, so as to avoid signal overlap and interference increase to the greatest extent. Perform prediction error sensitivity analysis on the probe timing configuration matrix, use a vibration model or existing experimental data to predict the deviation range of the chip electrical signal response under the current configuration, and evaluate the influence degree of the corresponding parameters of each probe (such as contact force, current amplitude, excitation frequency) on the overall response quality of the system under this deviation, and construct a sensitivity matrix of parameters to performance output. Based on this sensitivity matrix and the channel interference map, perform interference minimization processing on the configuration matrix, shield the conflict behaviors of highly sensitive and highly interfering probes, and adjust their parameters to make the configuration scheme tend to be stable. Around the initial parameter settings of each probe, in the predefined parameter space of contact force, current excitation, phase compensation, etc., use a multi-parameter joint optimization search algorithm (such as genetic algorithm, particle swarm optimization, or grid search + local hill climbing) to find a set of optimal parameter combinations to obtain the first test probe configuration scheme.
[0027] In this embodiment, normalization processing and weight reconstruction modeling operations are performed on the channel priority metrics to ensure that all structural attributes are on the same measurement scale in the feature space. Each channel priority metric (such as transmission strength, centrality, path stability, frequency domain contribution, etc.) is converted into a unified numerical value in the range of 0 to 1 using min-max normalization or Z-score standardization, avoiding the dimension dominance effect in subsequent vector representations. According to the priority setting principle in the test strategy, weight coefficients are assigned to different metrics to construct a weighted fusion function, which compresses the channel association features of each probe in the coupling graph into a feature vector, forming a set of probe node feature vectors. Based on the set of probe node feature vectors, a similarity matrix between probes is constructed by measuring the Euclidean distance, cosine similarity, or Mahalanobis distance between vectors. Each element in this matrix represents the functional approximation degree of any two probes in terms of their structural roles. After the similarity matrix is constructed, the Ward hierarchical clustering algorithm is introduced to perform layer-by-layer aggregation analysis on the matrix. The Ward algorithm takes minimizing the incremental variance between groups as the criterion in each layer of aggregation, and has strong structure preservation ability and intra-cluster compactness. During the construction of the clustering tree of this algorithm, all probes are regarded as initial independent nodes, and the probe pairs or probe groups with the highest similarity are merged in turn, and the inter-group distance is continuously updated to form a probe functional hierarchical tree structure containing all aggregation paths and hierarchical relationships. After the hierarchical tree structure is constructed, pruning processing is performed to obtain a preliminary functional grouping. The pruning process analyzes the change trend of the loss function in each layer of aggregation to find the inflection point position as the optimal cutting level, which corresponds to the best number of groupings with significant differences between probes and strong intra-group consistency. Intra-group consistency verification and inter-group difference evaluation are performed on the preliminary functional grouping of probes. Intra-group consistency verification is measured based on the average similarity between probes within the group, the consistency of channel feature means, or the consistency of spectral responses. Inter-group difference evaluation is measured using indicators such as group center distance, cross-channel interference degree, or discriminant projection distribution difference. These two evaluation dimensions act together on each grouping state to form a probe functional group stability index, which measures the reliability and physical rationality of each group's division. Based on this stability index, boundary optimization operations are performed on the preliminary grouping, that is, boundary drift analysis is performed on each probe at the boundary. If the probe has low intra-group consistency in the current group but greater contribution in the adjacent group, it is reclassified into the optimal adjacent group; at the same time, combination adjustments are performed on functional clusters with high inter-group similarity, and multiple functionally similar but independent clusters are merged into a unified functional area to eliminate the over-segmentation phenomenon in the clustering algorithm. The probe functional group division result is formed.
[0028] Step S3: Input test signals to the chip and collect responses through the first test probe configuration scheme to obtain the time-frequency data of the chip's electrical characteristics;
[0029] Specifically, according to the first test probe configuration scheme, determine the spatial positioning parameters and dynamic behavior parameters of each chip test probe, and separately set the contact position coordinates and corresponding contact force thresholds of the probes. According to the contact position and contact force parameters, conduct an initial verification test on the chip through a constant voltage or constant current mode, monitor the curve of contact impedance varying with time under different probe channels, evaluate the stability of the probe-chip interface and the reliability of electrical contact, and extract the stability characteristic indexes of contact impedance, including impedance mean volatility, number of transient jumps, and high-frequency noise energy, etc. Based on the contact impedance stability data, construct a multi-channel test signal sequence through a feature-driven signal design logic. This signal sequence needs to have capabilities such as cross-frequency domain coverage, pulse density regulation, and timing offset compensation to match the structural differences, time-delay response, or frequency-dependent behavior existing inside the chip. Synchronously load the test signal sequence onto all test probe channels, use a high-precision signal driver to drive each probe to apply an electrical signal excitation to the target area of the chip, and simultaneously perform synchronous acquisition of the original response signal returned by the chip at a high sampling rate. Perform multi-resolution time-frequency transformation and interference suppression processing on the original response signal of the chip. By introducing multi-resolution time-frequency analysis techniques, such as continuous wavelet transform, empirical mode decomposition combined with Hilbert spectrum analysis, or multi-scale Fourier packet decomposition, etc., expand the original response signal in the time-frequency domain and reconstruct the energy structure, identify and mask the abnormal disturbance components without characteristic patterns in different frequency bands, and at the same time supplement with an adaptive filter bank to perform amplitude attenuation and phase correction processing on the identified interference sources to obtain a cleaned response signal with a high signal-to-noise ratio. Extract time, frequency, and amplitude characteristics from the cleaned response signal. Time characteristics include rise time, pulse duration, response delay, edge density, etc., frequency characteristics include main frequency, harmonic spectrum distribution, frequency drift rate, frequency band energy density, and amplitude characteristics include amplitude peak, root mean square value, volatility, and normalized energy distribution, etc. Compose the time-frequency characteristics of each channel into three-dimensional structured data in a unified format according to the timing synchronization relationship, that is, the time-frequency data of the chip electrical characteristics, where each dimension represents the sampling time point, characteristic frequency band, and channel number respectively.
[0030] In this embodiment, short-time Fourier transform and continuous wavelet transform operations are respectively performed on the cleaned response signals. The short-time Fourier transform is suitable for obtaining the overall trend information of the changing frequency components and has a balance between time segmentation and frequency clarity. The continuous wavelet transform captures spectral edge features, transient structures, and non-stationary signal patterns through the analysis of wavelet functions at different scales. The two complement each other to form a two-domain time-frequency distribution map. This distribution map maps the response structure in which the frequency components change over time into a two-dimensional image. The high-energy regions and sharp-edge regions in the image represent the key structures with significant physical characteristics or sensitive to interference in the signal. Adaptive threshold segmentation and peak detection operations are performed on the two-domain time-frequency distribution map. By performing segmented dynamic statistics on the energy distribution in the time-frequency map, a threshold function jointly driven by energy density and local change rate is set to distinguish the energy-concentrated regions from the background, and an improved peak search algorithm is used to identify the local maximum points of each energy blob, forming a set of target time-frequency feature points. This set represents the typical excitation modes, resonance frequency points, and non-linear perturbation peaks in the chip electrical response. Density clustering analysis and boundary extraction processing are performed on the set of target time-frequency feature points. Non-parametric clustering methods such as DBSCAN are used to construct a cluster structure based on the local density of the feature points and the Euclidean distance between them, and the boundary contours of each cluster are identified to obtain multiple independent time-frequency feature regions. The energy distribution and phase coherence features are extracted around these regions. The energy distribution is completed through the integration operation of the time-frequency spectrum within the region, describing the contribution of this region to the overall signal energy, while the phase coherence measures whether there is a physical coupling response or strong signal resonance behavior in this region by calculating the variance or synchronization index of the phase angle change within the region. After combining these two types of information, a region feature descriptor is formed to describe the energy behavior and phase consistency of this time-frequency subspace respectively. Non-linear dimensionality reduction processing is performed on the region feature descriptor to map the original high-dimensional feature vector to a low-dimensional space, retaining its internal structural relationship and distance distribution characteristics, and obtaining a compressed low-dimensional representation of the chip features. At the same time, global calculations are performed on the statistical distribution characteristics of the original response signal in the amplitude domain, and statistical features such as amplitude peak, mean, standard deviation, range, skewness, and kurtosis are extracted to supplement the description ability of the chip response state from the amplitude dimension. The reduced-dimensional chip time-frequency feature representation and the amplitude statistical features are spliced and fused to form a multi-source feature joint structure, which is uniformly organized into chip electrical characteristic time-frequency data. Structurally, it is a set of vectors and logically has the triple expression ability of time evolution trend, frequency domain resonance mode, and amplitude dynamic range.
[0031] Step S4: Perform multi-probe collaborative analysis and feature extraction on the chip electrical characteristic time-frequency data to obtain chip electrical performance anomaly indication information and adjust the test parameters and contact positions of multiple chip test probes to obtain a second test probe configuration scheme.
[0032] Specifically, a state feature space model is constructed based on the chip electrical characteristic time-frequency data. In this process, the time-frequency feature data of multiple chips in normal operating states and various known defect states are used as a sample set. The method of high-dimensional data geometric modeling is adopted, and the convex hull construction algorithm is used to form a closed convex polyhedron around each chip state in the feature space, which is defined as the chip state convex hull feature space. This space effectively encompasses the currently known feature variation range in terms of structure and provides a geometric boundary basis for subsequent state discrimination. For the chip electrical time-frequency feature vector obtained by real-time acquisition, the nearest point convex hull optimization operation is performed. By minimizing the distance between this vector and all state convex hull boundaries, the projection point of the vector on the closest state convex hull is obtained, and its mapping error is calculated. Then, a set of time-frequency feature weighting coefficients with the strongest discrimination ability is deduced, and the corresponding time-frequency weight matrix is constructed. Each element of this matrix represents the importance of the response of a certain probe in a certain time-frequency window to the current state discrimination, and it has spatial distribution and physical interpretability. Statistical analysis is performed row by row (corresponding to the probes) and column by column (corresponding to the time-frequency windows) on this time-frequency weight matrix, and the comprehensive contribution degree of each probe and the information density of each time-frequency region are calculated respectively. Based on this, the target probe subset and the target time-frequency region subset are selected. Numerically, these two subsets represent the dominant components in the global feature space, and physically, they collectively reflect the most sensitive observation channels and abnormal induction frequency bands in the chip internal response mechanism. Based on these two subsets, a multi-probe collaborative feature vector is constructed, and its structure is a tensor or vector in a compressed representation, which integrates the core information of features in multiple channels, multiple frequency bands, and multiple time slices. This collaborative feature vector, as a compact representation of the current state of the chip, will be used for subsequent state anomaly judgment. The Mahalanobis distance is used to calculate the distance between the current multi-probe collaborative feature vector and the known normal state center vector. The Mahalanobis distance captures the overall state deviation behavior considering the covariance distribution characteristics, and based on this, a state deviation degree index is defined. At the same time, combined with the time series trend analysis of the state deviation, the directionality, rate of the state change, and whether there is an intensification sign are evaluated. After obtaining the state deviation degree index, it is compared with the system-predefined performance deviation threshold for judgment. When it exceeds the threshold, the abnormal indication mechanism is triggered, and according to the specific dimension and influence intensity of the deviation, chip electrical performance abnormal indication information is generated, which includes abnormal position prediction, abnormal frequency feature distribution, and speculation of possible defect types.According to the response anomaly path, probe failure trend or observation blind spot revealed by the anomaly indication information, the parameters of multiple current test probes are fine-tuned in a targeted manner, including resetting the test parameters such as contact force, current amplitude, excitation frequency, etc. for the target probe subset. At the same time, an optimal contact point migration strategy is derived based on the frequency domain sensitive area to adjust the position layout of the probes on the chip. Especially in areas with coupled overlap interference or sudden changes in contact impedance, the contact geometry or sampling time offset should be preferentially optimized, so as to restore and strengthen the overall observation ability of the probe system, and form a second test probe configuration scheme with higher sensitivity and robustness.
[0033] In this embodiment, systematic analysis of the abnormal indication information is performed, including abnormal type identification and spatial region positioning. The type identification is based on the distribution of abnormal time-frequency feature points, the main frequency component, and the amplitude jump mode, and in combination with the prior knowledge base or the trained classification model, the abnormality is classified into typical defect types such as poor contact, local resistance drift, device short circuit, open circuit, or high-frequency signal distortion. At the same time, the region positioning is carried out by methods such as the phase difference between multi-probe responses, the amplitude ratio, and the delay path analysis to restore the position of the abnormal starting point or the affected diffusion region in the chip space coordinates. After completing the type and spatial positioning, the results are encoded into defect feature mapping data. Based on the defect feature mapping data, the probe sensitivity is evaluated, and the difference propagation model or the response partial derivative calculation method is used to establish the response relationship between the "probe - defect", that is, to construct a probe-defect response relationship matrix, where each element of the matrix represents the degree of change in the response signal strength or discrimination weight of a certain probe when facing a specific defect. This matrix provides a mapping path from the defect manifestation to the probe scheduling, enabling the subsequent adjustment strategy to reverse-derive the optimal layout method from the "action - reaction" level. Perform parameter sensitivity analysis on the probe-defect response relationship matrix, identify the set of probes with poor defect response effects in the current configuration, and perform contact position optimization in combination with the chip local structure geometric information and contact history data. Use optimization methods based on local gradient descent or graph search to find new candidate regions for contact points, and at the same time evaluate their geometric compatibility, electrical connection probability, and thermal noise tolerance at the new positions to form a probe position adjustment strategy. According to this probe adjustment strategy, the physical coordinates of each target probe are repositioned at the micron level, and at the same time, the contact loading mechanism is incrementally adjusted to match the newly set contact force standard to form an optimized probe physical configuration. On this basis, considering the differences in electrical excitation requirements caused by position changes and different defect properties, based on the updated coupling characteristics of the probe distribution and the defect region, the test current magnitude, signal frequency range, and excitation waveform of each probe are reconfigured to more specifically stimulate the electrical characteristic response of the target region, thereby enhancing the resolution and feature highlighting ability of signal detection. This stage performs matching operations according to the "optimal response frequency band" and the "excitation form - defect type adaptation table" established in the previous feedback model, and outputs the exclusive excitation parameter set for each probe to form an optimized probe electrical configuration. By logically integrating the optimized probe physical configuration and the optimized probe electrical configuration, and unifying the encoding and parameter binding, a second test probe configuration scheme is constructed.
[0034] In the embodiments of the present invention, through the synchronous acquisition of the multi-probe electrical signal response characteristics and the systematic analysis of the signal transmission interference relationship between probes, a multi-probe signal coupling characteristic map is established, enabling the test system to accurately identify the target signal transmission channels, effectively reducing the influence of mutual interference between probes on the test results, and improving the accuracy of chip electrical characteristic testing. Based on the multi-probe collaborative analysis and feature extraction technology, a comprehensive analysis of the time-frequency data of the chip electrical characteristics is realized. By using the convex hull representation model and the hierarchical attention fusion network to extract key features, the detection ability of chip electrical performance anomalies is significantly enhanced, especially the ability to identify early tiny defects. By constructing a probe sensitivity evaluation model and a probe-defect response relationship matrix, the precise adjustment of probe parameters and contact positions for different chip defect characteristics is achieved, forming a second test probe configuration scheme with closed-loop optimization, greatly improving the adaptability and flexibility of the test system to different types of chips. Hierarchical clustering analysis is used to divide the probe function groups, optimizing the probe contact sequence and timing configuration, reducing unnecessary test point contacts and redundant test steps, significantly reducing the test time and probe wear, and extending the service life of the test equipment. By dynamically adjusting the probe physical configuration and electrical configuration, an adaptive optimization mechanism based on test feedback is established, enabling the test system to intelligently adjust the subsequent test strategy according to the preliminary test results, and realizing the intelligence and automation of the test process.
[0035] In a specific embodiment, the process of executing step S1 may specifically include the following steps:
[0036] Install three-axis signal sensors on multiple chip test probes and set a synchronous sampling clock and a trigger mechanism to obtain a multi-probe synchronous acquisition control system;
[0037] Apply a preset contact force and test current to each chip test probe based on the multi-probe synchronous acquisition control system to obtain the probe-chip contact state;
[0038] Perform multi-channel parallel sampling on the signal response in the probe-chip contact state to obtain the original electrical signal response data;
[0039] Perform Butterworth filtering and dynamic range normalization processing on the original electrical signal response data to obtain the preprocessed signal response data, and perform time-domain to frequency-domain joint analysis conversion on the preprocessed signal response data to obtain a multi-probe electrical signal response data set;
[0040] Analyze the signal transmission interference relationship between probes according to the multi-probe electrical signal response data set to obtain a multi-probe signal coupling characteristic map.
[0041] Specifically, a set of lightweight and highly sensitive triaxial signal sensors are integrated into each chip test probe structure. These sensors feature miniaturization, low power consumption, and high bandwidth. The triaxial structure corresponds respectively to the X-Y plane displacement during probe contact, the Z-axis contact pressure fluctuation, and the perturbation change of the electrical signal response in any direction, thereby ensuring that the system still has the ability to accurately measure electrical responses under contact dynamic and weak signal excitation conditions. To ensure data synchronization among all probe acquisition channels within the same time reference frame, a high-precision master clock driving mechanism is constructed. A temperature-compensated crystal oscillator or an oven-controlled crystal oscillator is used to generate a stable frequency reference signal, and the distributed clock distribution and timing alignment logic are implemented through FPGA, enabling the sampling control logic of all probe nodes to achieve sub-microsecond-level time synchronization. At the same time, a trigger compensation mechanism based on the signal propagation prediction model is established. According to the distance and path model between different probes and the excitation source, the signal arrival time delay is estimated, and thus the trigger threshold of specific channels is dynamically corrected in advance to ensure that the sampling system still maintains a unified start boundary and effective window in high-frequency and high-concurrent signal events. A preset contact force and test current are applied to each chip test probe based on the multi-probe synchronous acquisition control system. A preset contact force is applied to each probe through a high-precision force-controlled displacement platform, which has sub-micron resolution and supports closed-loop force control feedback to monitor contact stability in real time. At the same time, a standard test current is loaded onto each probe to stimulate the electrical response mode of the chip contact area under weak loads, ensuring that device damage or electrothermal drift is not caused by large currents during the test process. Through this step, a conduction state is formed between the probe and the chip, constituting the probe-chip contact state, and the system enters the test state. When the probe-chip is in a stable contact state, the response signals are rapidly acquired through a multi-channel parallel sampling module. Each channel corresponds to a test probe, and the signal is converted from analog to digital by a high-performance multi-channel synchronous ADC (such as 24-bit, sampling rate ≥50kSPS) and is transmitted to the central buffer area in real time through the DMA method. To avoid the bus bottleneck, a distributed architecture design is adopted. Every four probe signals are independently controlled by a sub-acquisition module and are connected to the main control node through optical fiber or gigabit Ethernet to achieve horizontal scalability and vertical bandwidth compatibility. After the acquisition of the original signals is completed, it enters the data preprocessing stage. A Butterworth low-pass filter is used to suppress the noise of the signals. This filter has a linear phase response and a smooth cut-off characteristic, efficiently filtering out the power frequency interference, high-frequency harmonics, and parasitic components brought by structural resonance in the test environment, and retaining the electrical response details within the effective frequency band. The filter order and cut-off frequency are adaptively set according to the response characteristics. For example, the order is set to 4, and the cut-off frequency is set to 1.5 times the upper limit of the signal main frequency band.Subsequently, dynamic range normalization is performed to linearly stretch or compress the maximum and minimum amplitudes of each signal path, so that its amplitude range is unified to the standard interval of [−1,1] or [0,1], avoiding problems such as weight offset or amplitude dominance in subsequent analysis due to amplitude scale differences, and at the same time improving the comparability of subsequent feature extraction and coupling analysis. After the preprocessing is completed, a joint time-frequency domain analysis transformation is performed on the cleaned signals, including the joint application of short-time Fourier transform and continuous wavelet transform. The short-time Fourier transform calculates the signal spectrum by sliding a fixed window, which is suitable for pattern extraction in frequency-stable segments, while the continuous wavelet transform uses wavelet basis functions with variable scales to analyze non-stationary signals, capturing transient jump features, short-period oscillations, and micro-defect responses. The two transforms respectively output two-dimensional time-frequency maps of each probe channel, and then the two types of maps are weighted and fused through information entropy to form a unified time-frequency representation, which is stored as a multi-probe electrical signal response data set, where each data unit represents the response energy or phase information of a specific moment, specific frequency, and specific probe. Based on this multi-probe electrical signal response data set, the signal transmission interference relationship between probes is analyzed, and a signal propagation model between probes is constructed by quantitatively analyzing the similarity within the frequency band, delay response curve, signal energy flow direction and intensity, etc. between different probes. On this basis, indicators such as the cross-correlation coefficient, spectral overlap ratio, phase synchronization index, and energy transfer ratio between each pair of probes are calculated to form a coupling relationship matrix between probes, and then a multi-probe signal coupling graph with probes as nodes and coupling indicators as edge weights is constructed. In this graph, the higher the weight of the edge indicates a stronger signal resonance, interference, or coupling relationship between the two probes. By further calculating graph structure features of this graph, such as node centrality, edge weight distribution entropy, number of coupled connected subgraphs, and graph clustering coefficient, etc., a multi-probe signal coupling feature graph for feature clustering, abnormal path recognition, and optimization configuration feedback is generated.
[0042] In a specific embodiment, the process of analyzing the signal transmission interference relationship between probes according to the multi-probe electrical signal response data set and obtaining the multi-probe signal coupling feature graph may specifically include the following steps:
[0043] Perform frequency domain decomposition and singular value decomposition on the multi-probe electrical signal response data set to obtain a probe signal transfer function matrix, and calculate the signal transfer strength and phase difference between probes based on the probe signal transfer function matrix to obtain probe pair transfer characteristic data;
[0044] Construct an initial signal transmission network graph for the probe pair transfer characteristic data, and extract a set of target signal transmission paths according to the initial signal transmission network graph;
[0045] Calculate the influence degree index and the target degree index of each probe node according to the set of target signal transmission paths, and perform hierarchical network analysis based on the influence degree index, the target degree index, and the set of target signal transmission paths to obtain a multi-probe signal coupling feature map.
[0046] Specifically, perform frequency-domain decomposition operations on the multi-probe electrical signal response dataset. By performing Fourier transform or its windowed variant (such as short-time Fourier transform) on the time-series response data in each probe channel, map the original signal from the time domain to the frequency domain, obtain the amplitude-frequency response function and phase-frequency response function of each probe in multiple main frequency bands, and establish the spectral response template of the probe. On this basis, construct a response tensor composed of the output spectra of all probe pairs in the same frequency window, with frequency as the third dimension and probe pairs as a two-dimensional mapping structure, and perform singular value decomposition on this tensor. Singular value decomposition is a means of matrix orthogonal decomposition that decomposes high-dimensional coupled data into several orthogonal modal components. Each pair of singular vectors represents a dominant signal propagation mode, and the amplitude of the singular value reflects the degree of energy dominance of this mode in the system. By retaining the dominant singular components and reconstructing the projection matrix composed of the frequency-domain response contributions between each probe pair, the probe signal transfer function matrix is obtained. This matrix has frequency as the horizontal axis and probe pairs as indices, and each element in the matrix represents the response ratio and relative phase shift from the i-th probe to the j-th probe at a certain frequency. After obtaining the transfer function matrix, extract two key indicators that quantify the signal propagation behavior: transfer strength and phase difference. The transfer strength is obtained by normalizing the modulus of the amplitude of each element in the matrix, resulting in the relative distribution characteristics of the signal propagation energy ratio between each probe pair at different frequency bands; while the phase difference is calculated through the phase angle difference of the phase-frequency response, that is, taking the argument difference of the complex transfer function from the i-th probe to the j-th probe. The above two indicators are compressed into global transfer characteristic indicators by performing integration or weighted averaging operations in the frequency dimension, forming a transfer characteristic data structure between probe pairs. Each probe pair is labeled with its coupling state in two dimensions of transfer strength and phase difference, constituting a set of probe pair transfer characteristic data. Based on this data set, construct the initial topological graph structure of the signal propagation network, that is, the initial signal transfer network graph. Each node in the graph represents a test probe, each edge represents an effective signal transfer path, and the weight of the edge is determined by the transfer strength between the corresponding probe pairs. The direction of the edge is determined according to the signal time delay, energy sequence, or excitation response path recognition algorithm, thus forming a directed weighted graph structure. To avoid the over-dense graph structure affecting the subsequent analysis efficiency, set a minimum transfer strength threshold, screen out the edges below the threshold, and retain the dominant coupling paths. After completing the construction of the initial graph structure, extract the set of the most significant information propagation paths, that is, the target signal transfer path set. This extraction process is achieved through several methods, such as searching for the path with the maximum transfer strength (such as the reverse shortest path algorithm), path clustering based on maximizing information flow (such as the maximum flow minimum cut method), or path aggregation degree scoring based on the topological structure.The target path set contains several path segments with different lengths and structures. These paths are the main channels for complex behaviors such as electrical signal coupling, interference propagation, and resonance enhancement in a multi-probe system, and are the core framework for coupling graph modeling. For all nodes (i.e., probes) in this path set, calculate their functional role indicators in the network structure, namely the influence index and the target index. The influence index is used to measure the transmission ability of a certain probe as a signal source, and the calculation method can be based on the sum of the out-degree weights of the nodes, the number of paths starting from it, the cumulative value of the transmission intensity on this node, etc.; the target index measures the receiving ability of this probe as a signal sink, and is measured based on the sum of the in-degree weights, the number of paths ending at it, and the proportion of the received energy. These two indicators together constitute the propagation control role and the controlled degree of each probe in the coupling network. Integrate the influence index, the target index, and the target path set to form a network functional map structure with nodes as the core, and perform hierarchical network analysis on it, specifically including node level division, structural module division, and path concentration analysis. Divide the entire network into multiple sub-regions through methods such as hierarchical clustering, clustering coefficient evaluation, and module division algorithms (such as the Louvain algorithm), and each region corresponds to a coupling module or structural functional unit. On this basis, construct a multi-probe signal coupling feature map by integrating the path dominance, regional coupling density, and cross-module signal transition probability. This map uses the main path as the backbone and the node weights and module boundaries as hierarchical markers to depict the global topological map of signal propagation, interference interaction, and collaborative response in the multi-probe structure.
[0047] In a specific embodiment, the process of executing step S2 may specifically include the following steps:
[0048] Perform eigenvector centrality and path complexity analysis on the multi-probe signal coupling feature map to obtain the channel priority index;
[0049] Perform hierarchical clustering analysis on the multi-probe signal coupling feature map based on the channel priority index to obtain the probe functional group division result;
[0050] Optimize the probe contact sequence based on the probe functional group division result to obtain the probe timing configuration matrix;
[0051] Perform prediction error sensitivity analysis and interference minimization processing on the probe timing configuration matrix to obtain the initial probe parameter values, and perform multi-parameter joint optimization search based on the initial probe parameter values to obtain the first test probe configuration scheme.
[0052] Specifically, perform quantitative structure analysis on the multi-probe signal coupling feature map, calculate the eigenvector centrality and path complexity of each channel in the map, and construct a channel priority index based on this. The eigenvector centrality is the main eigenvector component calculated based on the adjacency matrix of the coupling feature map, and its value reflects the aggregated connection weight status of each channel (i.e., the edge between node pairs in the map) in the entire map; the higher the centrality, the stronger the control force of the channel on the signal propagation path, and it is the hub node of multiple propagation paths. At the same time, the path complexity is used to measure the structural nesting degree and the intensity of mutual interference experienced by the signal during propagation in this channel, and is comprehensively calculated through composite indicators such as the path length, coupling frequency density, number of cross nodes, and signal redundancy rate on the channel. When constructing the channel priority index, the eigenvector centrality and path complexity are weighted and combined into a unified scoring function, and the weights are adjusted according to the fault tolerance requirements or detection accuracy requirements in the specific chip structure. The higher the scoring result, the more critical the channel is in terms of structure and the more sensitive it is in signal scheduling, and the higher the priority. Map the channel priority index back to the coupling feature map to construct a high-low channel weight distribution map between probes. Based on this map, perform clustering division at the functional level on the probes to construct the probe functional group division result. This step uses a hierarchical clustering algorithm, such as the bottom-up merging method based on the Ward minimum variance criterion. First, regard each probe as an independent node, and then gradually merge them according to the similarity of the priority index of the channels they are connected to until several probe clusters with functional cohesion are formed. The probes in each functional group are consistent in spatial position, signal response path, or coupling structure, and are uniformly controlled as independent units in subsequent co-stimulation or parallel acquisition, thereby reducing the coupling complexity and concurrent interference risk of the test strategy. Based on the structural information of the probe functional groups, perform probe contact sequence optimization operations. The goal of this process is to formulate a reasonable contact scheduling order to avoid interference resonance caused by the simultaneous activation of high-coupling channels and improve test stability and information independence. The contact sequence optimization algorithm sets the priority activation order according to the functional cluster level where each group of probes is located, so that the probes responding to the core channels are given priority to participate in signal input and sampling tasks, while the probes of the edge channels or secondary functional groups are arranged to be activated in subsequent time windows. At the same time, arrange the activation frequency, trigger window, and excitation phase of each probe within the sampling period to avoid concurrent triggering of probes that are adjacent in space but strongly coupled in function. Obtain a probe timing configuration matrix, where the rows represent the time slices within the sampling period, the columns represent the probe numbers, and the matrix elements record whether the probe is activated at this time point and its trigger parameter settings. Perform prediction error sensitivity analysis on the probe timing configuration matrix.Based on the probe response prediction function established in the previous electrical characteristic model, the response deviation degree under each timing combination is evaluated. By calculating the residual statistical characteristics (such as mean square error, maximum deviation, offset trend, etc.) between the actual sampling value and the model prediction value, the error-sensitive paths in the timing configuration are identified and reconstructed. At the same time, interference minimization processing is performed, that is, according to the mutual influence intensity in the probe coupling path diagram, the cross-interference index of the multi-channel activation combination under the current configuration is calculated, and the maximum allowable coupling threshold is set. By means of local reordering, staggered triggering, or alternating switching of functional probes, the interference paths are shielded or weakened, forming a set of probe activation configuration samples that meet the timing logic constraints and have excellent noise tolerance capabilities. After the prediction error and interference intensity are compressed into the allowable range, this basic configuration is used as the initial solution space, and the multi-dimensional joint optimization search of probe parameters is performed. The optimization objectives include multiple dimensions such as test current amplitude, voltage bias, electrical signal excitation frequency, sampling rate, contact force magnitude, and contact duration, and each parameter corresponds to a control channel. The joint optimization process is carried out based on meta-heuristic methods such as genetic algorithms, particle swarm algorithms, and simulated annealing. The objective function is a combination of composite indicators such as maximum response energy coverage rate, minimum energy leakage ratio, minimum timing drift degree, and minimum error sensitivity. Through multiple rounds of evolutionary iteration in the optimization process, the matching degree of the parameter group and the strategy matrix is continuously updated, and finally a set of globally optimal or approximately optimal test parameter combinations is output. This set of test parameter combinations and the probe timing configuration matrix together constitute the first test probe configuration scheme. This scheme takes the signal structure law as the input and the response stability and data discrimination ability as the goal, and completes the full-link closed-loop from path structure recognition to test behavior planning.
[0053] In a specific embodiment, the process of performing hierarchical clustering analysis on the multi-probe signal coupling feature map based on the channel priority index to obtain the probe function group division result may specifically include the following steps:
[0054] Normalize and assign weights to the channel priority index to obtain a set of probe node feature vectors, and construct a similarity matrix between probes based on the set of probe node feature vectors;
[0055] Perform the Ward hierarchical clustering algorithm on the similarity matrix between probes to obtain the probe function hierarchical tree structure;
[0056] Perform optimal pruning processing based on the probe function hierarchical tree structure to obtain the preliminary probe function grouping;
[0057] Perform within-group consistency verification and between-group difference evaluation on the preliminary probe function grouping to obtain the function group stability index, and perform boundary optimization and combination adjustment on the preliminary function grouping according to the function group stability index to obtain the probe function group division result.
[0058] Specifically, normalize the channel priority metrics and assign weights. Normalize the priority metrics of each channel so that they fall within a unified numerical range (such as [0, 1]). The normalization method can be the maximum-minimum normalization or the Z-score standardization, which is flexibly selected according to the actual channel distribution. According to the importance weight requirements of factors such as channel centrality, path complexity, signal energy flow, and delay margin for the task, introduce a weighting coefficient to perform weighted synthesis on the normalized metrics to form a comprehensive scoring vector for each channel. Map the channel-level scoring vector structure to the node-level feature representation, that is, construct a set of feature vectors for each probe node. This process aggregates the weighted metric vectors of all channels participated by each probe through statistical means, weighted sums, or convolutional operations, so that each probe finally has a multi-dimensional vector. Each dimension of the vector corresponds to the probe's comprehensive performance ability in all channel attribute dimensions, forming a set of probe node feature vectors. This set is a feature matrix with N rows × M columns, where N is the number of probes and M is the feature dimension. Based on this feature set, calculate the similarity between any two probes and construct a similarity matrix between the probes. Each element in this matrix represents the geometric proximity relationship between two probes in the high-dimensional feature space. Select metric functions such as Euclidean distance, cosine similarity, or Mahalanobis distance for calculation and perform similarity transformation (such as similarity = 1 - normalized distance) to ensure that the similarity matrix has symmetry and interpretability. After constructing the similarity matrix, perform the Ward hierarchical clustering algorithm on it for clustering analysis. This algorithm is based on the criterion of minimizing the increase in the within-cluster variance after each merge and has strong structure-preserving ability and noise resistance. In the specific operation, each probe is regarded as an independent clustering unit, and then the cost function for pairwise clustering merges is calculated in turn. Aggregation operations are performed on the minimum-cost path, and the merge order, merge cost, and merge structure information are recorded at each step to construct a probe functional hierarchy tree structure (i.e., a clustering tree or Dendrogram). This structure forms branches with node merge paths and uses the merge cost as the vertical axis height, reflecting the relative distribution position and merge tightness of each probe in the functional space. After completing the construction of the hierarchical tree, perform optimal pruning, that is, select an optimal level from the clustering tree as the functional grouping boundary to cut off the aggregation path, forming multiple preliminary probe functional groupings with high functional consistency. The pruning strategy is based on the global variance change rate or the inflection point of the change in the clustering quality function to find the truncation position with the optimal clustering stability as the pruning height. After pruning, several initial functional clusters are formed, and each cluster contains a group of probes with high similarity in the functional metric space. To verify the scientificity and stability of the preliminary functional grouping, perform within-group consistency verification and between-group difference evaluation on it.The within-group consistency is measured by calculating indicators such as the average similarity, within-group variance, and density function convergence degree among all probes within the same group. The higher the value, the stronger the internal feature consistency of the functional cluster. The between-group difference degree is evaluated by measuring the degree of differentiation between functional clusters through methods such as the minimum distance between cross-cluster probe pairs, average boundary distance, and proportion of between-class variance. The two jointly constitute the stability index system of the probe functional group, and this index system will be fed back to the structural path analysis of the clustering tree in matrix form for identifying over-segmented or over-aggregated substructures. Based on the evaluation results of the stability index, a boundary optimization operation is performed, that is, identifying probe nodes near the group boundary with the tendency of cross-cluster characteristics, and using the boundary drift algorithm or reallocation strategy to migrate them to a better cluster to improve within-group consistency and enhance between-group separability; for the situation where the difference degree between multiple functional clusters is low and the structural compactness is high, a combination adjustment is carried out, and such functionally similar but independent clusters are merged to avoid the system falling into an overfitting configuration dilemma or signal redundancy test pressure in subsequent configurations. Through multiple rounds of linkage of pruning, verification, and optimization as described above, a set of probe functional group division results with stable structure, clear functions, and reasonable distribution is obtained.
[0059] In a specific embodiment, the process of executing step S3 may specifically include the following steps:
[0060] Set the contact positions and contact force parameters of multiple chip test probes according to the first test probe configuration scheme, and perform electrical characteristic verification tests on the chip according to the contact positions and contact force parameters to obtain contact impedance stability data;
[0061] Generate a multi-channel test signal sequence based on the contact impedance stability data, and input test signals to the chip through multiple chip test probes according to the multi-channel test signal sequence to obtain the original response signal of the chip;
[0062] Perform multi-resolution time-frequency transformation and interference suppression processing on the original response signal of the chip to obtain the cleaned response signal;
[0063] Extract time, frequency, and amplitude characteristics from the cleaned response signal to obtain the time-frequency data of the chip electrical characteristics.
[0064] Specifically, according to the probe number - spatial coordinate - contact force triple combination provided by the first test probe configuration scheme, set the contact positions and contact force parameters of multiple chip test probes. Call the micro-displacement actuator with nanometer-level displacement accuracy and closed-loop force control feedback function to drive the tip of each probe to move to the preset contact position one by one. The set contact points are aligned with the surface electrode pads, bumps or key metal interconnection nodes of the chip to ensure double alignment of geometric positioning and functional response. At the same time, through the force sensor integrated in the probe carrier, the contact loading process is monitored in real time, and the loading force is controlled to be stable in the range of 50±5mN, which not only ensures conductivity but also avoids device damage or local piezovoltage caused by excessive structural stress. After the probe contact reaches a stable state, the system switches to the contact impedance monitoring stage, that is, a small current is applied to all probes under static conditions and the voltage at both ends is measured to calculate the stability data of the contact impedance changing with time. This data is continuously collected within a time window of several seconds to evaluate the conductive stability, mechanical disturbance resistance and thermal drift trend of the contact process, and form the contact impedance stability curve of each probe. Based on this impedance stability data, perform signal drive strategy adaptive adjustment, that is, according to the impedance fluctuation degree, initial capacitance behavior and contact consistency index of each channel, select the matching test signal waveform, frequency range and input current amplitude to generate a multi-channel test signal sequence for all channels. This sequence is organized in matrix form, with each column corresponding to a probe and each row corresponding to a sampling time point. The matrix element value represents the signal excitation parameters to be injected into the corresponding channel at this time slice, including excitation type (sine, pulse, ramp), excitation amplitude, frequency distribution and phase offset, etc. Call the high-precision signal source matrix control module, and load this test signal sequence to the excitation ends of all probes through the synchronous drive system, so that all probes complete the functional excitation of multiple regions of the chip in parallel or sequential trigger mode. Under the action of the excitation signal, the chip generates an electrical response signal under the combined action of its internal complex interconnection structure, parasitic parameters, thin film contact layer, etc. The system performs real-time sampling on the output of each probe through a high-bandwidth, low-noise differential signal acquisition circuit, performs analog-to-digital conversion at a sampling rate of not less than 50kHz and a resolution of 24 bits and writes it into the central sampling buffer to obtain the original response signal sequence of the chip. This sequence retains the instantaneous response dynamics of all observable regions in the chip under the excitation. Perform multi-resolution time-frequency transformation and interference suppression processing on the original response signal sequence of the chip to improve the feature clarity and recognition effectiveness. Execute multi-scale time-frequency analysis algorithms such as continuous wavelet transform or empirical mode decomposition combined with Hilbert spectrum transform to perform time-frequency mapping on each channel signal from different time windows and frequency scales, extract the main frequency band distribution, transient intensity change and local frequency drift characteristics of the signal, and form the two-dimensional time-frequency map of each channel.With the help of the band energy threshold judgment mechanism and the mode selection strategy, high-amplitude interference, spectral mutation components, and non-response signals are identified, shielded or replaced in terms of frequency structure, and the passband is restored and the low-pass is repaired through a filter bank, and a cleaned response signal sequence with high signal-to-noise ratio and information fidelity is output. Time, frequency, and amplitude features of the cleaned response signal are extracted. In the time domain, indicators reflecting the response timing structure such as rising edge duration, response delay, duration, pulse interval, etc. are extracted; in the frequency domain, main frequency distribution, harmonic number, band energy density, and frequency drift rate, etc. are extracted to construct a frequency stability map of the chip under excitation; in terms of amplitude, indicators such as amplitude peak, amplitude change rate, root mean square voltage, and local amplitude mutation rate are calculated to characterize the energy distribution and non-linear behavior of the response signal. The above features are arranged and combined in the channel dimension to form a time-frequency data matrix of the chip electrical characteristics in a unified format. Its data structure is a three-dimensional tensor, corresponding to the time axis, frequency axis, and probe number axis respectively, and the matrix element is the feature value or amplitude response of the corresponding channel in a certain time-frequency window.
[0065] In a specific embodiment, the process of performing the steps of extracting time, frequency, and amplitude features of the cleaned response signal to obtain the time-frequency data of the chip electrical characteristics may specifically include the following steps:
[0066] Perform short-time Fourier transform and continuous wavelet transform on the cleaned response signal to obtain a dual-domain time-frequency distribution map, and perform adaptive threshold segmentation and peak detection based on the dual-domain time-frequency distribution map to obtain a set of target time-frequency feature points;
[0067] Perform density clustering and boundary extraction on the set of target time-frequency feature points to obtain the time-frequency feature region division result;
[0068] Calculate the energy distribution and phase coherence of each region based on the time-frequency feature region division result to obtain a region feature descriptor, and perform non-linear dimensionality reduction processing on the region feature descriptor to obtain a low-dimensional representation of the chip features;
[0069] Combine the low-dimensional representation of the chip features with the amplitude statistical features to obtain the time-frequency data of the chip electrical characteristics.
[0070] Specifically, the cleaned response signals are respectively input into the short-time Fourier transform and continuous wavelet transform processing modules to achieve the dual expansion of the signals on the time axis and frequency axis. The short-time Fourier transform performs segment-by-segment Fourier transform on the signal through a sliding window of a fixed length, effectively capturing the spectral characteristics of steady-state and medium-speed changing components and retaining the frequency resolution; while the continuous wavelet transform performs continuous transformation on the signal with a set of mother wavelets of different scales, and its results show the dynamic behavior of fast-changing characteristics such as short periods, transients, and edge fluctuations at different frequency scales. The combination of the two can obtain good frequency resolution in the low-frequency region and stronger time localization ability in the high-frequency region, forming a set of dual-domain time-frequency distribution maps, constituting a two-dimensional composite image structure, where each pixel corresponds to the response amplitude value or phase information under a specific time and frequency window. Based on the dual-domain time-frequency distribution map, in order to extract the key points in the signal with response peak characteristics, non-stationary structural changes, or resonance concentration behaviors, adaptive threshold segmentation and peak detection processing are performed. Energy statistical analysis is carried out on the time-frequency spectrum, and the local region energy mean and the full map energy variance are set as the basic threshold functions to adaptively adjust the segmentation thresholds in different time periods and frequency intervals to eliminate background noise components and retain the high-energy aggregation regions. Then, the non-maximum suppression and neighborhood extreme value search algorithms are applied to the retained regions to mark all response points with local maximum characteristics and evaluate the stability of their adjacent structures, excluding isolated noise points and short-period pulse interferences, forming a set of target time-frequency feature points. Density clustering and boundary extraction processing are performed on the set of target time-frequency feature points. The clustering process uses unsupervised density clustering algorithms such as DBSCAN or MeanShift. The former divides the point set into several core density clusters based on the density reachability relationship, identifies feature regions of any shape, and automatically eliminates low-density background points; the latter finds density peaks through kernel density estimation and merges neighboring structures, and has good effects in dealing with non-linear distribution characteristics. After clustering, a boundary extraction operation is performed on each clustering cluster, and the outer contours of each feature cluster are outlined through the convex hull algorithm or the edge extraction algorithm based on gradient changes, forming a set of time-frequency feature regions with spatial continuity and energy structure consistency on the time axis and frequency axis. Each region is regarded as the explicit expression of a certain response mechanism in a specific time-frequency window, and has a relatively independent physical excitation background and structural mapping significance. Based on the above time-frequency feature region division results, the energy distribution and phase coherence of each region are calculated to form region feature descriptors. The energy distribution descriptor obtains indicators such as the total region energy, main frequency energy density, and energy center frequency by integrating the squared amplitude values of all pixel points in the region, reflecting the contribution degree of the region to the overall response; the phase coherence descriptor is calculated through the phase gradient in the region, the standard deviation of the phase difference between adjacent points, and the number of phase mutation points, etc., to evaluate the consistency of signal fluctuations, delay behavior, and electromagnetic interference stability within the region, and is the core indicator for characterizing non-stationary coupling and local propagation mechanisms.These region descriptors form a high-dimensional feature vector space, where each row represents a time-frequency region and each column represents a certain feature dimension, constituting a structural expression matrix of the chip's time-frequency response. To compress redundant representations, highlight discriminative information, and improve subsequent analysis efficiency, a non-linear dimensionality reduction process is performed on the region feature descriptor matrix. In this process, manifold learning algorithms such as t-SNE, UMAP, or Laplacian Eigenmaps are selected. t-SNE has good performance in preserving local structures and is suitable for identifying inter-cluster relationships in time-frequency features; UMAP can retain topological continuity in a low-dimensional space, facilitating the subsequent construction of an interpretable time-frequency pattern space. Through the dimensionality reduction operation, the multi-dimensional feature space is mapped to a 2D or 3D space, and the complex descriptions of each feature region are compressed into a set of low-dimensional vectors while preserving their original relative relationships, energy densities, and response trends. The low-dimensional representation of the chip features is fused with the amplitude statistical features to construct the time-frequency data of the chip's electrical characteristics.
[0071] In a specific embodiment, the process of performing step S4 may specifically include the following steps:
[0072] Construct a chip state convex hull feature space based on the chip electrical characteristic time-frequency data, and perform nearest point convex hull optimization based on the chip state convex hull feature space to obtain a time-frequency weight matrix;
[0073] Perform row-column analysis and contribution degree calculation on the time-frequency weight matrix to obtain a target probe subset and a target time-frequency region subset, and construct a multi-probe collaborative feature vector based on the target probe subset and the target time-frequency region subset;
[0074] Perform Mahalanobis distance calculation and state change trend analysis on the multi-probe collaborative feature vector to obtain a state deviation index, and compare the state deviation index with a preset threshold to generate chip electrical performance anomaly indication information;
[0075] Adjust the test parameters and contact positions of multiple chip test probes according to the chip electrical performance anomaly indication information to obtain a second test probe configuration scheme.
[0076] Specifically, a chip state convex hull feature space is constructed based on the chip electrical characteristic time-frequency data. A state space boundary model is established under multiple chip state samples (including normal state and various typical defect states). The high-dimensional time-frequency feature vector sets collected under each state are mapped into the feature space, and the convex hull construction algorithm is used to perform geometric envelope operations on the data point sets corresponding to this state, forming the chip state convex hull feature space. This convex hull defines the boundary form of the current state in the time-frequency feature space and provides a state discrimination mechanism based on geometric distance. For a chip to be tested, its corresponding test sample constitutes an input feature vector. After this vector is mapped to this feature space, the minimum Euclidean distance between it and various state convex hulls is judged. At the same time, the nearest point convex hull optimization is performed, that is, the convex hull surface closest to this test sample is found among all state convex hulls, and its corresponding projection point is calculated, thereby constructing the deviation vector of the sample towards the state boundary. Calculate the weighted contribution of this deviation vector, construct the state offset weights of the input vector on each frequency dimension and each probe dimension, and form the time-frequency weight matrix. Each element of this matrix represents the response sensitivity or state offset contribution degree of a certain probe under a certain frequency window to the state difference. The higher the value, the greater the contribution of this dimension to the chip state recognition. Perform structural analysis and contribution degree calculation in the row and column directions of the time-frequency weight matrix. Respectively, perform operations such as weighted average, standard deviation statistics, or cumulative main frequency band response on each row (corresponding to a probe channel) to obtain the average contribution degree of each probe in the overall response, and screen out the target probe subset with a contribution degree exceeding the preset threshold; perform the same operations on each column (corresponding to a frequency window or frequency band), screen out the target frequency subset or target time-frequency region subset that can best reflect the state change, and construct the target probe subset and the target time-frequency region subset. Cross-map the target probe subset and the target time-frequency region subset, and extract and vectorize the corresponding matrix segments in the time-frequency weight matrix to form a multi-probe collaborative feature vector. Perform Mahalanobis distance calculation and state change trend analysis on the multi-probe collaborative feature vector. Evaluate the distance between the current feature and the normal state center feature based on the Mahalanobis distance. As a measurement method considering the covariance structure between variables, the result of the Mahalanobis distance reflects the offset amplitude of the current state in the standard state space, and the calculation result is the state deviation degree index. The larger this index, the more the electrical state of the current chip deviates from the normal mode, and the more likely it is to have functional disorders, local mismatches, or structural defects. Compare the state deviation degree index with the preset state anomaly judgment threshold in the system. If it exceeds the threshold, it is determined to be an abnormal state and chip electrical performance anomaly indication information is generated. This information includes a binary judgment of whether it is abnormal, and also includes multi-dimensional structural contents such as the source of the deviation feature, the leading probe number, the sensitive frequency window, and the possibility score of the abnormal type.Based on this abnormal indication information, the probe test parameters and contact positions are structurally adjusted, and the optimization strategy is carried out in two directions: one is to adjust the parameters such as contact force, test current, and voltage bias for the probes in the target probe subset that have significantly abnormal responses but poor stability, so as to enhance the signal-to-noise ratio of their responses and the stability of contact impedance; the other is to judge whether the probe is located in a high-interference area or a low-excitation efficiency area according to the abnormal response occurrence frequency and position information. If this is the case, then re-plan the contact position coordinates of the probe, migrate it to the low-coupling area or the area where the excitation is easily propagated within the micron-level displacement range, and re-allocate the test current frequency or excitation signal waveform parameters according to the geometric contact relationship after migration to ensure that the target response behavior can still be effectively observed at its new spatial position. Integrate and encode the updated probe contact position parameter set and the adjusted probe electrical excitation parameter set to construct the second test probe configuration scheme.
[0077] In a specific embodiment, the process of performing the step of adjusting the test parameters and contact positions of multiple chip test probes according to the abnormal indication information of the chip electrical performance to obtain the second test probe configuration scheme may specifically include the following steps:
[0078] Perform type recognition and regional location analysis on the abnormal indication information of the chip electrical performance to obtain defect feature mapping data, and perform probe sensitivity evaluation based on the defect feature mapping data to obtain the probe-defect response relationship matrix;
[0079] Perform parameter sensitivity calculation and contact position optimization on the probe-defect response relationship matrix to obtain the probe adjustment strategy;
[0080] Adjust the position coordinates and contact force of multiple chip test probes according to the probe adjustment strategy to obtain the optimized probe physical configuration;
[0081] Re-configure the probe test current, frequency, and waveform parameters based on the optimized probe physical configuration to obtain the optimized probe electrical configuration;
[0082] Integrate the optimized probe physical configuration and the optimized probe electrical configuration to obtain the second test probe configuration scheme.
[0083] Specifically, perform a structural analysis on the chip electrical performance anomaly indication information, which includes time-frequency anomaly feature points, dominant channel identification results, deviation metric indicators, response intensity curves, and other status diagnosis outputs. Perform type identification and regional positioning operations on it. Type identification is carried out by performing pattern matching and label discrimination between the statistical patterns of anomaly features in the frequency domain, phase, and amplitude structures and known fault templates, and classifying it into specific categories such as poor contact, metal fracture, capacitor shortage, impedance drift, lattice trap, signal hysteresis, etc.; while regional positioning is based on parameters such as the topological position of the anomaly response channel in the probe structure, signal delay propagation path, frequency resonance component position, etc. Through cluster analysis, response density distribution, and boundary condition inversion, deduce the spatial position coordinate range where the defect occurs, thereby constructing a "type-region" binary defect feature mapping data. Based on the defect feature mapping data, analyze the sensitivity level of each probe channel in defect detection, that is, perform probe sensitivity assessment. This assessment process establishes a quantitative mapping mechanism from probe excitation response behavior to defect manifestation degree. The specific operations include statistically analyzing the response amplitude increment, phase jump rate, frequency fluctuation range, etc. triggered by each probe when exciting a certain type of defect, and calculating the correlation between them and the corresponding defect indication variables, such as Pearson correlation coefficient, mutual information, or Granger causality test, and then constructing a "probe-defect" response relationship matrix. Each row of this matrix corresponds to a probe, each column corresponds to a defect type, and each element is the response intensity or discriminability value of the probe to this type of defect. The probe corresponding to the high-value element in the matrix is the key observation site under the current defect model. Perform parameter sensitivity analysis and contact position optimization derivation on the probe-defect response relationship matrix, that is, construct a multivariate sensitivity gradient analysis model with the defect response quality as the objective function. Through micro-perturbation experiments or model simulations on parameters such as the contact force, current excitation amplitude, contact angle, and micro-displacement position of the probe, calculate its local derivative or perturbation response curve to the probe response behavior, and form a probe parameter sensitivity vector. Combining with the high-sensitivity probe columns in the response relationship matrix, perform an optimization strategy based on sensitivity gradient on this type of probe, and use the gradient descent or quasi-Newton method in the parameter space to search for the optimal contact point position in the contact space, so that under the condition of retaining structural integrity and system mechanical constraints, the probe can maximize its defect response performance. Finally, output a set of probe adjustment strategies, including configuration parameters such as the spatial position correction vector (such as Δx, Δy, Δz), contact force adjustment interval, and priority excitation order for each probe to be adjusted. According to the above probe adjustment strategy, reset the probe position coordinates and loading parameters on the test platform.The displacement execution system accurately drives the probe holder to perform micron-level displacement along the set direction according to the adjustment vector instruction, and confirms that each probe has reached the newly set target position through the closed-loop displacement detection system; at the same time, the probe loading control module is updated to re-adjust the contact force curve at the new position, so that the loading curve enters a new stable working range, thereby completing the optimization and reconstruction of the probe physical configuration. Based on the optimized probe physical configuration, the probe test current, frequency, and waveform parameters are reconfigured to adapt to the new contact state and defect mode matching structure. According to the coupling degree between the frequency response behavior of each probe under its new configuration and the target defect spectrum structure, the amplitude, frequency distribution, carrier phase, and waveform type of its test current are reset. For example, for probes with low response, increase the current injection amplitude or stretch the excitation pulse width; for channels close to the defect frequency, use a narrowband swept-frequency signal to enhance the coupling; for structure hysteresis defects, introduce a ramp excitation waveform or dynamic phase encoding method to improve the response separability. After the above signal parameter adjustments, all probes have a new excitation mode combination and sampling strategy, so as to form a fine response enhancement behavior for the target area in the next round of testing. Integrate the optimized probe physical configuration and electrical configuration at the system level to construct a second test probe configuration scheme with reasonable structure, optimized excitation distribution, and improved response efficiency.
[0084] The probe test method in the embodiment of the present invention has been described above. Next, the probe test device in the embodiment of the present invention will be described. Please refer to Figure 2 , an embodiment of the probe test device in the embodiment of the present invention includes:
[0085] An acquisition module, configured to synchronously acquire the electrical signal response characteristics of multiple chip test probes during the process of contacting the chip and analyze the signal transmission interference relationship between the probes to obtain a multi-probe signal coupling characteristic diagram;
[0086] An identification module, configured to identify the target signal transmission channel by using the multi-probe signal coupling characteristic diagram to obtain a first test probe configuration scheme;
[0087] A response module, configured to input test signals to the chip and acquire responses through the first test probe configuration scheme to obtain the chip electrical characteristic time-frequency data;
[0088] An adjustment module, configured to perform multi-probe collaborative analysis and feature extraction on the chip electrical characteristic time-frequency data to obtain chip electrical performance anomaly indication information and adjust the test parameters and contact positions of multiple chip test probes to obtain a second test probe configuration scheme.
[0089] Through the collaborative cooperation of the above-mentioned various components, through the synchronous acquisition of the multi-probe electrical signal response characteristics and the systematic analysis of the signal transmission interference relationship between probes, a multi-probe signal coupling characteristic map is established, enabling the test system to accurately identify the target signal transmission channel, effectively reducing the influence of mutual interference between probes on the test results, and improving the accuracy of chip electrical characteristic testing. Based on the multi-probe collaborative analysis and feature extraction technology, a comprehensive analysis of the time-frequency data of chip electrical characteristics is realized. Key features are extracted through the convex hull representation model and the hierarchical attention fusion network, significantly enhancing the detection ability of chip electrical performance anomalies, especially the identification ability of early micro-defects. By constructing a probe sensitivity evaluation model and a probe-defect response relationship matrix, precise adjustment of probe parameters and contact positions for different chip defect characteristics is achieved, forming a second test probe configuration scheme with closed-loop optimization, greatly improving the adaptability and flexibility of the test system to different types of chips. Hierarchical clustering analysis is used to divide the probe functional groups, optimizing the probe contact sequence and timing configuration, reducing unnecessary test point contacts and redundant test steps, significantly reducing the test time and probe wear, and extending the service life of the test equipment. By dynamically adjusting the probe physical configuration and electrical configuration, an adaptive optimization mechanism based on test feedback is established, enabling the test system to intelligently adjust the subsequent test strategy according to the preliminary test results, and realizing the intelligence and automation of the test process.
[0090] Those skilled in the art can clearly understand that for the convenience and brevity of description, the specific working processes of the above-described systems, systems, and units can refer to the corresponding processes in the foregoing method embodiments and will not be elaborated herein.
[0091] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical discs that can store program codes.
[0092] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than limiting it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A probe testing method, characterized in that, Including: Synchronously collecting the electrical signal response characteristics of multiple chip test probes during the contact with the chip, analyzing the signal transfer interference relationship between the probes, and obtaining a multi-probe signal coupling characteristic diagram; Identifying the target signal transfer channel by using the multi-probe signal coupling characteristic diagram to obtain the first test probe configuration scheme; Inputting test signals and collecting responses to the chip according to the first test probe configuration scheme to obtain the time-frequency data of the chip electrical characteristics; Performing multi-probe collaborative analysis and feature extraction on the time-frequency data of the chip electrical characteristics to obtain the chip electrical performance anomaly indication information, and adjusting the test parameters and contact positions of the multiple chip test probes to obtain the second test probe configuration scheme.
2. The probe testing method according to claim 1, wherein The synchronously collecting the electrical signal response characteristics of multiple chip test probes during the contact with the chip, analyzing the signal transfer interference relationship between the probes, and obtaining a multi-probe signal coupling characteristic diagram includes: Installing three-axis signal sensors on multiple chip test probes and setting a synchronous sampling clock and a trigger mechanism to obtain a multi-probe synchronous acquisition control system; Applying a preset contact force and test current to each chip test probe based on the multi-probe synchronous acquisition control system to obtain the probe-chip contact state; Performing multi-channel parallel sampling on the signal response in the probe-chip contact state to obtain the original electrical signal response data; Performing Butterworth filtering and dynamic range normalization processing on the original electrical signal response data to obtain the preprocessed signal response data, and performing time-domain to frequency-domain joint analysis transformation on the preprocessed signal response data to obtain a multi-probe electrical signal response data set; Analyzing the signal transfer interference relationship between the probes according to the multi-probe electrical signal response data set to obtain a multi-probe signal coupling characteristic diagram.
3. The probe testing method according to claim 2, characterized in that The analyzing the signal transfer interference relationship between the probes according to the multi-probe electrical signal response data set to obtain a multi-probe signal coupling characteristic diagram includes: Performing frequency-domain decomposition and singular value decomposition on the multi-probe electrical signal response data set to obtain a probe signal transfer function matrix, and calculating the signal transfer intensity and phase difference between the probes based on the probe signal transfer function matrix to obtain the probe pair transfer characteristic data; Constructing an initial signal transfer network diagram according to the probe pair transfer characteristic data, and extracting a set of target signal transfer paths according to the initial signal transfer network diagram; Calculating the influence degree index and the target degree index of each probe node according to the set of target signal transfer paths, and performing hierarchical network analysis according to the influence degree index, the target degree index and the set of target signal transfer paths to obtain a multi-probe signal coupling characteristic diagram.
4. The probe test method according to claim 1, wherein The identifying the target signal transfer channel by using the multi-probe signal coupling characteristic diagram to obtain the first test probe configuration scheme includes: Performing eigenvector centrality and path complexity analysis on the multi-probe signal coupling characteristic diagram to obtain a channel priority index; Performing hierarchical clustering analysis on the multi-probe signal coupling characteristic diagram based on the channel priority index to obtain the probe function group division result; Optimizing the probe contact sequence based on the probe function group division result to obtain a probe timing configuration matrix; Perform predictive error sensitivity analysis and interference minimization processing on the probe timing configuration matrix to obtain the initial values of the probe parameters, and perform multi-parameter joint optimization search based on the initial values of the probe parameters to obtain the first test probe configuration scheme.
5. The probe testing method according to claim 4, wherein Perform hierarchical clustering analysis on the multi-probe signal coupling feature map based on the channel priority index to obtain the probe functional group division result, including: Perform normalization processing and weight assignment on the channel priority index to obtain a set of probe node feature vectors, and construct a similarity matrix between probes based on the set of probe node feature vectors; Perform the Ward hierarchical clustering algorithm on the similarity matrix between probes to obtain the probe functional hierarchical tree structure; Perform optimal pruning processing based on the probe functional hierarchical tree structure to obtain the preliminary probe functional grouping; Perform within-group consistency verification and between-group difference evaluation on the preliminary probe functional grouping to obtain the functional group stability index, and perform boundary optimization and combination adjustment on the preliminary functional grouping according to the functional group stability index to obtain the probe functional group division result.
6. The probe test method according to claim 1, wherein Input test signals and collect responses for the chip through the first test probe configuration scheme to obtain the chip electrical characteristic time-frequency data, including: Set the contact positions and contact force parameters of multiple chip test probes according to the first test probe configuration scheme, and perform electrical characteristic verification tests on the chip according to the contact positions and the contact force parameters to obtain the contact impedance stability data; Generate a multi-channel test signal sequence based on the contact impedance stability data, and input test signals to the chip through the multiple chip test probes according to the multi-channel test signal sequence to obtain the original chip response signal; Perform multi-resolution time-frequency transformation and interference suppression processing on the original chip response signal to obtain the cleaned response signal; Extract time, frequency, and amplitude characteristics from the cleaned response signal to obtain the chip electrical characteristic time-frequency data.
7. The probe test method according to claim 6, wherein The extraction of time, frequency, and amplitude characteristics from the cleaned response signal to obtain the chip electrical characteristic time-frequency data includes: Perform short-time Fourier transform and continuous wavelet transform on the cleaned response signal to obtain a dual-domain time-frequency distribution map, and perform adaptive threshold segmentation and peak detection based on the dual-domain time-frequency distribution map to obtain a set of target time-frequency feature points; Perform density clustering and boundary extraction on the set of target time-frequency feature points to obtain the time-frequency feature region division result; Calculate the energy distribution and phase coherence of each region based on the time-frequency feature region division result to obtain a region feature descriptor, and perform non-linear dimensionality reduction processing on the region feature descriptor to obtain a low-dimensional representation of the chip features; Combine the low-dimensional representation of the chip features with the amplitude statistical features to obtain the chip electrical characteristic time-frequency data.
8. The probe test method according to claim 1, characterized in that, Perform multi-probe collaborative analysis and feature extraction on the chip electrical characteristic time-frequency data to obtain chip electrical performance anomaly indication information and adjust the test parameters and contact positions of the multiple chip test probes to obtain the second test probe configuration scheme, including: Construct a chip state convex hull feature space based on the chip electrical characteristic time-frequency data, and perform nearest point convex hull optimization based on the chip state convex hull feature space to obtain a time-frequency weight matrix; Perform row-column analysis and contribution degree calculation on the time-frequency weight matrix to obtain a target probe subset and a target time-frequency region subset, and construct a multi-probe collaborative feature vector based on the target probe subset and the target time-frequency region subset; Perform Mahalanobis distance calculation and state change trend analysis on the multi-probe collaborative feature vector to obtain a state deviation index, and generate chip electrical performance anomaly indication information by comparing the state deviation index with a preset threshold; Adjust the test parameters and contact positions of the multiple chip test probes according to the chip electrical performance anomaly indication information to obtain a second test probe configuration scheme.
9. The probe test method according to claim 8, characterized in that, The adjusting the test parameters and contact positions of the multiple chip test probes according to the chip electrical performance anomaly indication information to obtain a second test probe configuration scheme includes: Perform type recognition and regional location analysis on the chip electrical performance anomaly indication information to obtain defect feature mapping data, and perform probe sensitivity evaluation based on the defect feature mapping data to obtain a probe-defect response relationship matrix; Perform parameter sensitivity calculation and contact position optimization on the probe-defect response relationship matrix to obtain a probe adjustment strategy; Adjust the position coordinates and contact force of the multiple chip test probes according to the probe adjustment strategy to obtain an optimized probe physical configuration; Reconfigure the probe test current, frequency, and waveform parameters based on the optimized probe physical configuration to obtain an optimized probe electrical configuration; Integrate the optimized probe physical configuration and the optimized probe electrical configuration to obtain a second test probe configuration scheme.
10. A probe test device, characterized in that, For performing the probe test method according to any one of claims 1-9, the probe test device includes: An acquisition module, configured to synchronously acquire the electrical signal response characteristics of multiple chip test probes during the process of contacting the chip and analyze the signal transmission interference relationship between the probes to obtain a multi-probe signal coupling feature map; An identification module, configured to identify a target signal transmission channel by using the multi-probe signal coupling feature map to obtain a first test probe configuration scheme; A response module, configured to input a test signal to the chip and collect the response through the first test probe configuration scheme to obtain chip electrical characteristic time-frequency data; An adjustment module, configured to perform multi-probe collaborative analysis and feature extraction on the chip electrical characteristic time-frequency data to obtain chip electrical performance anomaly indication information and adjust the test parameters and contact positions of the multiple chip test probes to obtain a second test probe configuration scheme.
Citation Information
Patent Citations
Intelligent test system and test method for improving probe card test abnormality
CN103439643A
Electromagnetic field measurement system
CN108700622A