Storage device and controller and data reading method thereof

Abstract

The embodiment of the invention discloses a storage device, a controller of the storage device and a data reading method, the storage device comprises a plurality of storage areas, each storage area comprises a plurality of storage blocks, and the controller of the storage device comprises a cache management unit, a data cache unit and a control unit. The control unit is configured to determine whether read data meets a preset pre-reading condition or not, and in response to the fact that the read data meets the pre-reading condition, pre-reading operation of the at least one storage area is started, so that the read data in the at least one storage area is sequentially read into the data cache unit, and the read data in the at least one storage area are stored in the data cache unit. And storing the cache management information to a cache management unit, wherein the cache management information comprises a logic address of a storage block of the pre-read data. Therefore, according to the embodiment, pre-reading can be started after the read data meets the pre-reading condition, so that the problems of pre-reading failure, pre-reading cutoff and the like are avoided, the cache management information is managed by adopting the cache management unit, a software record management structure is reduced, and access delay is further reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of storage devices, and more particularly, to a storage device, its controller, and a data reading method. Background Art

[0002] A storage device, such as a Solid State Drive (SSD), is one of the key components in a computer storage system and is widely used in the storage field of computer systems due to its high-speed data access speed and reliable performance. With the development of technology, there now appears a solid-state drive that divides the space in the SSD into partitions, and this technology is called ZNS, i.e., Zoned namespace.

[0003] For various storage devices, in order to reduce the latency of data reading, a prefetching strategy is usually provided. However, existing prefetching strategies, such as sequential reading based on LBA (Logical Block Address), may encounter scenarios where prefetching fails, resulting in a drop in read bandwidth for a period of time or a problem of excessive partial read latency. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a storage device, its controller, and a data reading method, which start prefetching after the read data meets the prefetching conditions to avoid problems such as prefetching failure and prefetching disconnection, and manage cache management information by using a cache management unit, reducing the software record management structure, and thus reducing the access latency.

[0005] In a first aspect, an embodiment of the present invention provides a controller of a storage device. The storage device includes a plurality of storage areas, and each storage area includes a plurality of storage blocks. The controller of the storage device includes:

[0006] A cache management unit configured to store cache management information, where the cache management information includes the logical address of the storage block for prefetching data;

[0007] A data cache unit configured to store prefetching data;

[0008] A control unit configured to determine whether the read data meets a predetermined prefetching condition, and in response to the read data meeting the prefetching condition, start a prefetching operation for at least one storage area to sequentially read the read data in the at least one storage area into the data cache unit and store the cache management information into the cache management unit.

[0009] Further, the control unit is configured to determine that the read data meets a predetermined prefetch condition in response to a predetermined logical address continuity rule existing in the storage area where the read data is located.

[0010] Further, the control unit is configured to determine a list of storage blocks of the storage area according to the identifier of the storage area, and sequentially read the data in the storage area to the data cache unit according to the starting logical address corresponding to the storage area.

[0011] Further, the cache management unit includes at least one prefetch queue, and each prefetch queue is used to store the logical addresses of the prefetched storage blocks in the corresponding storage area.

[0012] Further, each prefetch queue adopts a ping - pong mechanism, and the number of simultaneously started prefetch storage areas is determined according to the number of prefetch queues.

[0013] Further, the head pointer of the prefetch queue is updated according to the hit status of the read command received by the controller, and the tail pointer of the prefetch queue is updated according to the prefetch process.

[0014] Further, the control unit is further configured to query the cache management information stored in the cache management unit according to the logical address of the received read command. In response to the logical address of the read command being within the prefetch address range corresponding to the cache management information, read the corresponding data from the data cache unit according to the logical address of the read command, and update the head pointer of the corresponding prefetch queue in the cache management unit.

[0015] In a second aspect, an embodiment of the present invention provides a storage device, where the storage device includes:

[0016] A storage space, where the storage space includes multiple storage areas, and the storage area includes multiple storage blocks;

[0017] The controller as described above.

[0018] In a third aspect, an embodiment of the present invention provides a method for reading data of a storage device. The storage device includes multiple storage areas, and the storage area includes multiple storage blocks. The method includes:

[0019] Determine whether the read data meets a predetermined prefetch condition, where the read data is stored in the corresponding storage area;

[0020] In response to the read data meeting the prefetch condition, start a prefetch operation for at least one corresponding storage area;

[0021] Sequentially read the read data in the at least one storage area into the corresponding data cache unit;

[0022] Store the cache management information into the corresponding cache management unit, where the cache management information includes the logical address of the storage block of the pre-read data.

[0023] Further, the determining whether the read data meets a predetermined pre-read condition includes:

[0024] In response to the existence of a predetermined logical address continuity rule in the storage area where the read data is located, determine that the read data meets the predetermined pre-read condition.

[0025] Further, the cache management unit includes at least one pre-read queue, and the storing the cache management information into the corresponding cache management unit includes:

[0026] Sequentially cache the logical addresses of the storage blocks read from the storage areas where pre-reading is started into the pre-read queues respectively corresponding to the storage areas where pre-reading is started.

[0027] In a fourth aspect, an embodiment of the present invention provides an electronic device, which includes:

[0028] The storage device as described above;

[0029] A host, configured to send a data processing request to the storage device and receive a data processing result from the storage device.

[0030] In a fifth aspect, an embodiment of the present invention provides a computer-readable storage medium, in which a computer program or data is stored, and when the computer program is executed by a processor, the method as described above is implemented.

[0031] An embodiment of the present invention discloses a storage device, its controller, and a data reading method. The storage device includes a plurality of storage areas, each storage area includes a plurality of storage blocks. The controller of the storage device includes a cache management unit, a data cache unit, and a control unit. The control unit is configured to determine whether the read data meets a predetermined pre-read condition. In response to the read data meeting the pre-read condition, start a pre-read operation for at least one storage area to sequentially read the read data in the at least one storage area into the data cache unit, and store the cache management information into the cache management unit, where the cache management information includes the logical address of the storage block of the pre-read data. Thus, this embodiment can start pre-reading after the read data meets the pre-read condition to avoid problems such as pre-read failure and pre-read disconnection, and by using the cache management unit to manage the cache management information, reduce the software record management structure, and further reduce the access latency. Description of the Drawings

[0032] Through the following description of the embodiments of the present invention with reference to the accompanying drawings, the above and other objects, features, and advantages of the present invention will become clearer. In the drawings:

[0033] Figure 1 is a schematic structural diagram of a storage device according to an embodiment of the present invention;

[0034] Figure 2 is a schematic diagram of the data prefetching process of the storage device according to an embodiment of the present invention;

[0035] Figure 3 is a flowchart of a data reading method of the storage device according to an embodiment of the present invention;

[0036] Figure 4 is a schematic diagram of the data reading process of the storage device according to an embodiment of the present invention;

[0037] Figure 5 is a schematic diagram of an electronic device according to an embodiment of the present invention. Detailed Embodiments

[0038] The following describes the present application based on embodiments, but the present application is not limited to these embodiments. In the following detailed description of the present application, some specific details are described in detail. Those skilled in the art can fully understand the present application without the description of these details. In order to avoid obscuring the essence of the present application, well-known methods, processes, procedures, elements, and circuits are not described in detail.

[0039] In addition, those of ordinary skill in the art should understand that the accompanying drawings provided herein are for illustrative purposes only, and the drawings are not necessarily drawn to scale.

[0040] Unless the context clearly requires otherwise, words such as "including" and "comprising" in the entire application document should be interpreted as having an inclusive meaning rather than an exclusive or exhaustive meaning; that is, it is the meaning of "including but not limited to".

[0041] In the description of the present application, it should be understood that terms such as "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance. In addition, in the description of the present application, unless otherwise specified, the meaning of "a plurality" is two or more.

[0042] For the solutions described in this specification and embodiments, if they involve personal information processing, they will be processed on the premise of having a legal basis (such as obtaining the consent of the personal information subject, or being necessary for performing a contract, etc.), and will only be processed within the specified or agreed scope. If a user refuses to process personal information other than the necessary information required for basic functions, it will not affect the user's use of basic functions.

[0043] For a storage device, especially a ZNS SSD, the multi-storage zone sequential read process in the related art is usually as follows: when the host sends a sequential read, the subsequent LBA data content is pre-read according to the LBA read by the host, and waits for the read command sent by the subsequent host to hit. However, since the LBAs between storage zones in the ZNS SSD are not necessarily continuous, the specific interval between the LBAs of different storage zones is related to the size of different storage zones in the disk and the upper-layer ZNS storage design. This makes it possible that the data pre-reading method of directly pre-reading the subsequent LBA in the related art may encounter a scenario of pre-reading failure, and thus may cause a problem of a drop in read bandwidth for a period of time or an excessive partial read delay. Based on this, this embodiment provides a storage device, its controller, and a data reading method. Among them, the storage device includes multiple storage zones, each storage zone includes multiple storage blocks, and the controller of the storage device includes a cache management unit, a data cache unit, and a control unit. The control unit is configured to determine whether the read data meets a predetermined pre-reading condition. In response to the read data meeting the pre-reading condition, the control unit starts a pre-reading operation of at least one storage zone to sequentially read the read data in at least one storage zone into the data cache unit, and stores cache management information in the cache management unit. The cache management information includes the logical address of the storage block of the pre-read data. Thus, this embodiment can avoid problems such as pre-reading failure and pre-reading disconnection by starting pre-reading after the read data meets the pre-reading condition, and by using the cache management unit to manage the cache management information, it reduces the software record management structure, and thus reduces the access delay.

[0044] This embodiment mainly takes the ZNS SSD as an example for detailed description. However, it should be understood that other storage devices that divide the storage space into multiple storage zones can all apply the design of this embodiment, and no further examples will be given here.

[0045] Figure 1 is a schematic structural diagram of the storage device according to an embodiment of the present invention. As Figure 1 shown, the storage device 10 of this embodiment includes a controller 11 and a storage space 12. Among them, the storage space 12 includes multiple storage zones (Zones), and each storage zone includes multiple storage blocks (Blocks).

[0046] In an optional implementation manner, the storage device of this embodiment uses non-volatile memory to store data. Further, the storage space 12 is implemented by using flash memory technology. For example, the storage space 12 can use NAND flash memory. It should be understood that this embodiment does not limit the flash memory technology used in the storage space 12.

[0047] The controller 11 can be an integrated circuit chip with corresponding signal processing capabilities, and is used to perform operations such as reading, writing, and erasing on the data in the storage space 12.

[0048] Further, in this embodiment, the controller 11 can control the control unit 111, the cache management unit 112, and the data cache unit 113. Among them, the control unit 111 is used to parse the data processing requests from the host 20 and control the execution of corresponding data processing operations. Further, the control unit 111 can include a front-end control module (FE, Front End), an intermediate control module (FTL, Flash Translation Layer), and a back-end control module (BE, Back End). The front-end control module is used to perform functions such as protocol parsing and request queue management on the received data processing requests. The intermediate control module is used to map the logical address corresponding to the data processing request to a specific physical storage unit, and implement functions such as wear leveling, garbage collection, bad block management, and partition structure planning. The back-end control module is used to perform interactive operations with the physical storage medium (i.e., the storage space 12), such as issuing read / write, erase, garbage collection, and other commands to the storage space 12. The control unit 111 of this embodiment realizes the data reading function through the FE module, the FTL module, and the BE module.

[0049] In this embodiment, the storage device in this embodiment supports a prefetch operation to reduce the latency of reading data. Further, the control unit 111 is configured to determine whether the read data meets a predetermined prefetch condition. In response to the read data meeting the prefetch condition, start the prefetch operation of at least one storage area to sequentially read the read data in at least one storage area into the data cache unit, and store the cache management information into the cache management unit. The cache management unit 112 is configured to store the cache management information. Among them, the cache management information includes the logical address of the storage block of the prefetch data. The data cache unit 113 is configured to store the prefetch data.

[0050] Further, in this embodiment, the data cache unit 113 can adopt DDR (Double Data Rate SDRAM, Double Data Rate Synchronous Dynamic Random Access Memory). However, it should be understood that this embodiment does not limit the storage type adopted by the data cache unit 113, as long as it can achieve fast data access, and no further examples will be given here.

[0051] In this embodiment, it is possible to pre-read subsequent data after determining in advance whether the read data meets a predetermined pre-read condition, which can avoid the problem of data interruption during the data reading process. Further, the control unit 111 is further configured to determine that the read data meets the predetermined pre-read condition in response to the existence of a predetermined logical address continuity rule in the storage area where the read data is located. That is to say, the control unit 111 determines whether there is a regional logical address continuity rule for the data to be read based on the read position corresponding to the current read command. If the logical addresses of the data to be read in the corresponding storage area are continuous, it is determined that the read data meets the predetermined pre-read condition.

[0052] In an alternative implementation, the control unit 111 is configured to determine the storage block list of the corresponding storage area according to the identifier of the corresponding storage area, and sequentially read the data in the storage area into the data cache unit 113 according to the starting logical address order of the corresponding storage area. In this embodiment, after the controller 11 starts the pre-reading, according to the identifiers of the storage areas to be read, it determines the storage block order recorded when the data of each storage area is written, so as to determine the storage block list of each storage area when writing data in order. It should be understood that in this embodiment, it is possible to determine the data that may need to be read subsequently through the currently received read command, so as to pre-read these data that may need to be read into the data cache unit 113, so that subsequent read commands can hit in the data cache unit 113, reducing the latency of reading data.

[0053] Further, the data that may need to be read subsequently may be distributed in multiple different storage areas. The control unit 111 of this embodiment can sequentially start the pre-reading operations of multiple different storage areas. Further, the starting logical address of each storage area can be determined according to the storage block list of the storage area, or it can also be determined based on other methods. This embodiment does not limit this.

[0054] Further, the cache management unit 112 includes at least one pre-read queue, and each pre-read queue is used to store the logical addresses of the pre-read storage blocks in the corresponding storage area. In this embodiment, the pre-read queue can be used to manage information such as the pre-read address range, reducing the management structure that needs to be recorded by software in the control unit 111, and further reducing the access latency. Among them, the pre-read queue of this embodiment can be implemented by a cache hardware module. Further optionally, the pre-read queue of this embodiment can be a FIFO (First-In-First-Out) queue based on registers. It should be understood that this embodiment does not limit the type of hardware module for implementing the pre-read queue, as long as it can effectively manage the storage block addresses of the data that needs to be read in the storage area.

[0055] Further, the cache management unit 112 records the head and tail pointers of the prefetch queue in operation. The head pointer of the prefetch queue is updated according to the hit status of the read command received by the controller, and the tail pointer of the prefetch queue is updated according to the prefetch process. That is, when the control unit 111 reads the data of a storage block into the data cache unit 113, the logical address of the storage block is written into the corresponding prefetch queue, and the tail pointer of the prefetch queue is updated. That is, the tail pointer of the prefetch queue points to the logical address of the latest written storage block.

[0056] Further, after the control unit 111 receives a read command from the host 20, it parses the read command to obtain the logical address of the read command, queries the cache management information stored in the cache management unit 112 according to the logical address of the read command, and in response to the logical address of the read command being within the prefetch address range corresponding to the cache management information, reads the corresponding data from the data cache unit 113 according to the logical address of the read command, and updates the head pointer of the corresponding prefetch queue in the cache management unit 112. That is, when a new read command hits and reads in the data cache unit 113, the cache management unit 112 controls the head pointer of the corresponding prefetch queue to move to the logical address of the unread storage block.

[0057] Further, if the head and tail pointers of the prefetch queue coincide, it indicates that the storage area corresponding to the prefetch queue has been read, and at this time the prefetch queue is in an idle state and can be used to manage the cache management information for prefetching the next storage area. Thus, in this embodiment, multiple storage areas can be prefetched sequentially through the prefetch queue.

[0058] Further, in this embodiment, the number of storage areas prefetched simultaneously is determined according to the number of prefetch queues. Among them, multiple prefetch queues can be set in the cache management unit 112 to implement the prefetch operation of multiple storage areas simultaneously, that is, multiple prefetch queues are respectively responsible for the cache management information of prefetching the corresponding storage areas to achieve the simultaneous prefetch of multiple storage areas.

[0059] Further optionally, each prefetch queue in this embodiment adopts a ping-pong mechanism. In hardware design, the ping-pong mechanism refers to using two or more identical modules (such as buffers) to work alternately so that while one module is being written, the other can be read. Thus, in this embodiment, the data reading efficiency can be further improved and the data read latency can be reduced by setting multiple prefetch queues and adopting the ping-pong mechanism.

[0060] The storage device according to an embodiment of the present invention includes a plurality of storage areas, each storage area includes a plurality of storage blocks, and the controller of the storage device includes a cache management unit, a data cache unit, and a control unit. The control unit is configured to determine whether the read data meets a predetermined prefetch condition. In response to the read data meeting the prefetch condition, it starts a prefetch operation for at least one storage area to sequentially read the read data in at least one storage area into the data cache unit, and stores cache management information in the cache management unit. The cache management information includes the logical address of the storage block where the prefetch data is located. Thus, this embodiment can start prefetching after the read data meets the prefetch condition to avoid problems such as prefetch failure and prefetch disconnection, and by using the cache management unit to manage the cache management information, it reduces the software record management structure, thereby reducing the access latency. At the same time, the prefetch effect of the storage device in this embodiment depends entirely on the data cache unit and the read bandwidth at the backend, avoiding misjudgment of prefetch failure caused by excessive software judgment.

[0061] Figure 2 FIG. is a schematic diagram of the data prefetch process of the storage device according to an embodiment of the present invention. In this embodiment, the controller 11 determines whether the continuity of the data in the storage area read by the current read command meets a predetermined prefetch condition. When the predetermined prefetch condition is met, it starts prefetching, and determines at least one storage area to be prefetched and the logical address of each storage block in each storage area to be prefetched according to the identifier of the storage area read by the current read command, and generates a storage block list corresponding to each area to be prefetched.

[0062] Further, as Figure 2 shown, this embodiment takes the cache management unit 112 including two prefetch queues FIFO1 and FIFO2, and the storage areas to be prefetched including Zone0-ZoneN as an example for illustration. It should be understood that the number of storage areas to be prefetched in this embodiment can be determined according to the number of prefetch queues and the size of the data cache unit 113, and the number of prefetch queues can be configured based on actual application requirements.

[0063] As Figure 2 shown, the controller 11 sequentially starts the prefetch operations for Zone0-ZoneN. Among them, the starting logical addresses of different storage areas are different. For example, the starting logical address of storage area Zone0 is LBA0, the starting logical address of storage area Zone2 is LBAm+z1, and the starting logical address of storage area Zone3 is LBA n+z2.

[0064] In practical applications, the starting logical addresses of adjacent storage areas may be continuous or discontinuous. To avoid problems such as prefetch disconnection, this embodiment uses a prefetch queue to be responsible for a corresponding storage area. As Figure 2As shown, based on the required data reading order, this embodiment first initiates the prefetch operations for storage areas Zone0 and Zone1. Among them, prefetch queue FIFO1 manages the cache management information of storage area Zone0, and prefetch queue FIFO2 manages the cache management information of storage area Zone1.

[0065] Further, control unit 111 sequentially controls to read the data in each storage block in storage area Zone0 into data cache unit 113 according to the starting logical block address LBA0 of storage area Zone0, and sequentially puts the logical block addresses LBA0 - LBAm of each storage block in storage area Zone0 into prefetch queue FIFO1, and updates the tail pointer Tail of prefetch queue FIFO1 to point to the logical block address LBAm of the last storage block put into prefetch queue FIFO1. Synchronously, control unit 111 also sequentially controls to read the data in each storage block in storage area Zone1 into data cache unit 113 according to the starting logical block address LBAm+z1 of storage area Zone1, and sequentially puts the logical block addresses LBA m+z1 - LBAn of each storage block in storage area Zone1 into prefetch queue FIFO2, and updates the tail pointer Tail of prefetch queue FIFO2 to point to the logical block address LBAn of the last storage block put into prefetch queue FIFO2.

[0066] Further, if control unit 111 receives a subsequent read command, it parses and obtains the logical address range of this read command, and queries each prefetch queue in cache management unit 112 according to the logical address range of this read command to determine whether the logical address range of this read command is within the logical address range formed by the head and tail pointers of the corresponding prefetch queue. If cache management unit 112 queries and determines that the logical address range of this read command is within the logical address range of the corresponding prefetch queue (that is, this read command hits), it feeds back the corresponding management information to control unit 111, so that control unit 111 reads the corresponding data from data cache unit 113 based on this corresponding management information and feeds back the data to host 20. Among them, the corresponding management information fed back by cache management unit 112 is used to represent that this read command hits. Optionally, the corresponding management information may include the prefetch queue hit by the logical address range of this read command, and control unit 111 may include the mapping relationship between each logical address in each prefetch queue and the address in data cache unit 113, so that control unit 111 can read the corresponding data from data cache unit 113 based on this mapping relationship.

[0067] Further, after the read command received by cache management unit 112 of this embodiment hits, it updates the head pointer of the corresponding prefetch queue so that it points to the first unread logical address in this prefetch queue. As Figure 2As shown, if the logical address of the read command currently received by the control unit 111 is LBA0, after reading the corresponding data in the storage block LBA0 from the data cache unit 113, the head pointer Head of the prefetch queue FIFO1 is updated from pointing to LBA0 to pointing to LBA1.

[0068] Further, the prefetch queue can switch to the read state after the prefetch of the storage blocks in its corresponding storage area is completed or after the prefetch queue is full, so that when a subsequent read command is received, the prefetch queue in this state can be read to determine whether the read command hits.

[0069] Further, in this embodiment, after all the data in the storage blocks managed by the prefetch queue are read from the data cache unit 113 by subsequent read commands, that is, after the head pointer and the tail pointer in this prefetch queue coincide, the prefetch queue is switched to the write state and manages the prefetch operation of the next started storage area. As Figure 2 shown, if all the data in the storage blocks LBA 0-LBA m managed by the prefetch queue FIFO1 are read from the data cache unit 113 by subsequent read commands, the prefetch queue FIFO1 is switched to the write state, and the prefetch queue FIFO1 is made to manage the prefetch operation of the storage area Zone2. At this time, the control unit 111 starts the prefetch operation of the storage area Zone2, and sequentially controls the data in each storage block in the storage area Zone2 to be read into the data cache unit 113 according to the starting logical address LBA n+z2 of the storage area Zone2, and sequentially puts the logical addresses LBA n+z2-LBA x of each storage block in the storage area Zone2 into the prefetch queue FIFO1, and updates the tail pointer Tail of the prefetch queue FIFO1 to point to the logical address LBA x of the last storage block put into the prefetch queue FIFO1.

[0070] Thus, this embodiment can start prefetching after the read data meets the prefetch conditions to avoid problems such as prefetch failure and prefetch interruption, and by using the cache management unit to manage the cache management information, the software record management structure is reduced, thereby reducing the access latency. At the same time, the prefetch effect of the storage device in this embodiment completely depends on the data cache unit and the read bandwidth of the backend, avoiding misjudgment of prefetch failure caused by excessive software judgment. At the same time, this embodiment can start the prefetch of multiple storage areas simultaneously by setting multiple prefetch queues in the cache management unit, and uses the ping-pong mechanism so that the prefetch queue can manage the sequentially started storage areas, further improving the prefetch efficiency. And, the storage device in this embodiment makes the prefetch effect completely depend on the data cache unit and the read bandwidth of the backend, avoiding the misjudgment of prefetch failure caused by excessive software judgment when using software to manage prefetch information.

[0071] Figure 3 It is a flowchart of the data reading method of the storage device according to an embodiment of the present invention. Among them, the storage space of the storage device includes multiple storage areas, and each storage area includes multiple storage blocks. As Figure 3 shown, the data reading method of the storage device according to the embodiment of the present invention includes the following steps:

[0072] Step S110, determine whether the read data meets a predetermined prefetch condition. The read data is stored in the corresponding storage area.

[0073] Step S120, in response to the read data meeting the prefetch condition, start the prefetch operation for at least one corresponding storage area.

[0074] Optionally, in this embodiment, in response to the existence of a predetermined logical address continuity rule in the storage area where the read data is located, it is determined that the read data meets the predetermined prefetch condition. Further, in this embodiment, it is determined whether the continuity of the data in the storage area read by the current read command meets the predetermined prefetch condition. When the predetermined prefetch condition is met, prefetch is started, and at least one storage area to be prefetched and the logical addresses of the storage blocks in each storage area to be prefetched are determined according to the identifier of the storage area read by the current read command, and a storage block list corresponding to each area to be prefetched is generated. Optionally, after starting the prefetch in this embodiment, the storage block order recorded when the data of each storage area is written can be determined according to the identifier of each storage area to be read, so as to determine the storage block list of each storage area when writing data in order.

[0075] Step S130, sequentially read the read data in at least one storage area into the corresponding data cache unit.

[0076] Step S140, store the cache management information into the corresponding cache management unit, and the cache management information includes the logical addresses of the storage blocks of the prefetched data.

[0077] Further, in this embodiment, the logical addresses of the storage blocks read in each storage area where the prefetch is started are sequentially cached into the prefetch queues respectively corresponding to each storage area where the prefetch is started.

[0078] In this embodiment, the prefetch operations of each storage area can be started sequentially according to the number of prefetch queues in the cache management unit, and the specific process is similar to that of the Figure 2 embodiment shown, and will not be described in detail here.

[0079] Further, the data reading method of this embodiment further includes: receiving a read command, parsing the received read command, querying the cache management information stored in the cache management unit according to the logical address of the read command obtained by parsing, and in response to the logical address of the read command being within the prefetch address range corresponding to the cache management information, reading the corresponding data from the data cache unit according to the logical address of the read command, and updating the head pointer of the corresponding prefetch queue in the cache management unit.

[0080] Figure 4 is a schematic diagram of the data reading process of the storage device according to an embodiment of the present invention. As Figure 4 shown, the host 20 sends a read command req to the storage device 10, and the control unit 111 of the controller 11 in the storage device 10 parses the read command req, parses and obtains the address information of the read command req (that is, the logical address range of the storage block to be read), and queries the cache management unit 112 according to the address information of the read command req. Assume that the address information of the read command req is LBA0-LBAm, that is, the address information of the read command req is within the logical address range of the corresponding prefetch queue FIFO1. The cache management unit 112 feeds back the hit management information to the control unit 111. The control unit 111 reads the corresponding data d from the data cache unit 113 based on the hit management information and feeds back the corresponding data d to the host 20. Optionally, the hit management information may include the prefetch queue hit by the logical address range of the read command, and the control unit 111 may include the mapping relationship between each logical address in each prefetch queue and the address in the data cache unit 113, so that the control unit 111 can read the corresponding data from the data cache unit 113 based on this mapping relationship. Thus, this embodiment can improve the data reading efficiency of subsequent read commands through prefetching and reduce the latency of reading data.

[0081] The storage device according to an embodiment of the present invention includes multiple storage areas, and each storage area includes multiple storage blocks. By determining whether the read data meets a predetermined prefetch condition, in response to the read data meeting the prefetch condition, a prefetch operation of at least one storage area is started to sequentially read the read data in at least one storage area into the data cache unit, and the cache management information is stored in the cache management unit. The cache management information includes the logical address of the storage block of the prefetch data. This embodiment can start prefetching after the read data meets the prefetch condition to avoid problems such as prefetch failure and prefetch interruption, and by using the cache management unit to manage the cache management information, the software record management structure is reduced, thereby reducing the access latency. At the same time, the prefetch effect of the storage device in this embodiment completely depends on the data cache unit and the read bandwidth at the back end, avoiding misjudgment of prefetch failure caused by excessive software judgment.

[0082] Figure 5It is a schematic diagram of an electronic device according to an embodiment of the present invention. As Figure 5 shown, the electronic device 5 of this embodiment includes a storage device 10 and a host 20. Among them, the host 20 is configured to send a data processing request to the storage device 10 and receive a data processing result from the storage device 10. Optionally, the host 20 may be a data processing device capable of reading data in the storage device, and the type of the host 20 is not limited in this embodiment.

[0083] The storage device 10 in the electronic device 5 of this embodiment includes multiple storage areas, the storage areas include multiple storage blocks, and the controller of the storage device 10 includes a cache management unit, a data cache unit, and a control unit. The control unit is configured to determine whether the read data meets a predetermined prefetch condition. In response to the read data meeting the prefetch condition, the control unit starts a prefetch operation for at least one storage area to sequentially read the read data in at least one storage area into the data cache unit and store cache management information in the cache management unit. The cache management information includes the logical address of the storage block of the prefetched data. It should be understood that the hardware structure and working principle of the storage device 10 can refer to the above embodiments and will not be elaborated here. Thus, this embodiment can implement the prefetch function of the storage device 10, reduce the latency of the host 20 for reading data, and moreover, the storage device of this embodiment starts prefetching after the read data meets the prefetch condition to avoid problems such as prefetch failure and prefetch disconnection, and by using the cache management unit to manage the cache management information, it reduces the software record management structure, thereby reducing the access latency. At the same time, the prefetch effect of the storage device of this embodiment depends entirely on the data cache unit and the read bandwidth at the backend, avoiding misjudgment of prefetch failure caused by excessive software judgment.

[0084] Another embodiment of the present invention relates to a non-volatile storage medium for storing a computer-readable program, and the computer-readable program is used for a computer to execute the above-mentioned partial or all method embodiments.

[0085] That is, those skilled in the art can understand that all or part of the steps in implementing the above-mentioned method embodiments can be completed by a program instructing relevant hardware. The program is stored in a storage medium, including several instructions for causing a device (which may be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. And the foregoing storage medium includes: various media such as a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk, or an optical disc that can store program codes.

[0086] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various modifications and variations can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A controller of a storage device, characterized in that: The storage device includes a plurality of storage areas, each of which includes a plurality of storage blocks, and the controller of the storage device includes: A cache management unit is configured to store cache management information, wherein the cache management information includes a logical address of a storage block of pre-read data, wherein the cache management unit includes at least one pre-read queue, each of the pre-read queues is used to store the logical address of the pre-read storage block in the corresponding storage area; A data cache unit configured to store pre-read data; A control unit is configured to determine whether the read data satisfies a predetermined pre-read condition, and in response to the read data satisfying the pre-read condition, initiate a pre-read operation of at least one storage area to sequentially read the read data in the at least one storage area into the data cache unit, and store cache management information in the cache management unit.

2. The controller of the storage device according to claim 1, characterized in that: The control unit is configured to determine whether the read data satisfies a predetermined pre-reading condition in response to a predetermined logic address continuity rule existing in a storage area where the read data is located.

3. The controller of the storage device according to claim 1, characterized in that: The control unit is configured to determine a storage block list of the storage area according to an identifier of the storage area, and sequentially read data in the storage area into the data cache unit according to a starting point logical address corresponding to the storage area.

4. The controller of the storage device according to claim 1, characterized in that: Each of the pre-reading queues adopts a ping-pong mechanism, and the number of storage areas for which pre-reading is started is determined according to the number of the pre-reading queues.

5. The controller of the storage device according to claim 1, characterized in that: The head pointer of the pre-read queue is updated according to the hit status of the read command received by the controller, and the tail pointer of the pre-read queue is updated according to the pre-read process.

6. The controller of the storage device according to claim 5, characterized in that: The control unit is further configured to query the cache management information stored in the cache management unit according to the logical address of the received read command, and in response to the logical address of the read command being within the pre-read address interval corresponding to the cache management information, read the corresponding data from the data cache unit according to the logical address of the read command, and update the head pointer of the corresponding pre-read queue in the cache management unit.

7. A storage device, characterized in that: The storage device comprises: A storage space, wherein the storage space includes a plurality of storage areas, and the storage area includes a plurality of storage blocks; A controller as claimed in any one of claims 1 to 6.

8. A method for reading data from a storage device, characterized in that: The storage device includes a plurality of storage areas, the storage area includes a plurality of storage blocks, and the method includes: Determining whether the read data meets a predetermined pre-reading condition, the read data being stored in a corresponding storage area; In response to the read data satisfying a pre-read condition, starting a pre-read operation of at least one corresponding storage area; Sequentially reading the read data in the at least one storage area into a corresponding data cache unit; Storing cache management information in a corresponding cache management unit, the cache management information including a logical address of a storage block of pre-read data; The cache management unit includes at least one pre-read queue, and each pre-read queue is used to store the logical address of the pre-read storage block in the corresponding storage area.

9. The method according to claim 8, characterized in that The step of determining whether the read data meets a predetermined pre-reading condition comprises: In response to the storage area where the read data is located having a predetermined logic address continuity rule, it is determined that the read data meets a predetermined pre-reading condition.

10. The method according to claim 8, characterized in that The cache management unit includes at least one pre-read queue, and storing the cache management information in the corresponding cache management unit includes: The logical addresses of the storage blocks read by the storage areas for starting pre-reading are sequentially cached in the pre-reading queues respectively corresponding to the storage areas for starting pre-reading.

11. An electronic device, characterized in that: The electronic device comprises: The storage device as claimed in claim 7; The host is configured to send a data processing request to the storage device and receive a data processing result from the storage device.

12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program or data, and when the computer program is executed by a processor, the method according to any one of claims 8 to 10 is implemented.

Images