Task processing method and device and related equipment
By dividing tasks into subtasks in a multi-core processor architecture and prioritizing high-priority tasks after the subtasks of low-priority tasks are completed, the problem of delays in high-priority tasks exceeding tolerance is solved, and efficient task processing and performance optimization is achieved.
Patent Information
- Application Number
- CN202411173481.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2043-12-27
AI Technical Summary
In a multi-core processor architecture, high-priority tasks (such as delay-sensitive services) need to be processed after the execution of low-priority tasks is completed, resulting in the processing delay of high-priority tasks exceeding the tolerance range and affecting the operation of upper-level services.
By dividing the task into multiple subtasks, and after the subtasks of the low-priority task are completed, the high-priority task is performed first, until the high-priority task is completed, and then the remaining subtasks of the low-priority task are continued.
It effectively reduces the processing delay of high-priority tasks, meets the low-delay requirements of high-priority tasks, and optimizes the performance of the application.
Smart Images

Figure CN120216113A_ABST
Abstract
Description
[0001] This application is a divisional application. The application number of the original application is 202311832069.6, the filing date of the original application is December 27, 2023, and the entire content of the original application is incorporated herein by reference. Technical Field
[0002] This application relates to the technical field of task processing, and in particular, to a task processing method, apparatus, and related devices. Background Art
[0003] With the development of multi-core processor core architectures, using multi-core parallel processing to handle tasks has become the mainstream task processing method.
[0004] Currently, during the process of multiple processor cores each handling tasks, there are often situations where multiple tasks need to be processed using the same processor core. Since the execution mode of the processor core architecture is usually run-to-completion, that is, after the first task is started, the processor core will continuously execute the first task until the first task is executed to completion. Therefore, the second task needs to wait for the first task to be executed to completion before it can use this processor core to continue executing the second task.
[0005] However, this way of handling tasks will increase the processing duration of the second task and reduce the processing efficiency of the second task. When the second task is a latency-sensitive task, the latency at which the second task is executed will exceed the latency upper limit that the second task can tolerate, thereby affecting the operation of the upper-layer service corresponding to the second task. Summary of the Invention
[0006] This application provides a task processing method to enable high-priority tasks (such as latency-sensitive services) to be preferentially executed to completion under the condition that the execution mode of the processor core architecture is run-to-completion, thereby meeting the low-latency requirements for processing high-priority tasks. In addition, this application also provides a task processing apparatus, a computing device, a computer-readable storage medium, and a computer program product.
[0007] In a first aspect, the present application provides a task processing method, which can be executed by a corresponding task processing device. Specifically, the task processing device executes a first task, and the first task includes multiple subtasks. For example, the task processing device can divide the first task into multiple subtasks, and currently, the subtask being executed is the first subtask. During the execution of the first subtask, when a second task to be executed is detected and the priority of the second task is higher than that of the first task, after the task processing device finishes executing the first subtask, it preferentially executes the second task. The first subtask and the second task are executed by the same processing unit, and the processing unit can specifically be a processor core, etc. Moreover, after the second task is executed, the task processing device then executes the remaining subtasks in the first task, that is, the other subtasks in the multiple subtasks included in the first task except the first subtask. For example, the remaining subtasks can continue to be executed using the processor core, etc.
[0008] During the execution of the first task, for a second task with a higher priority, after the first subtask in the currently executed first task is completed, the task processing device will use the processing unit to execute the second task. That is, during the execution of the first task, the task processing device will insert and execute the second task with a higher priority without waiting for the entire first task to be completed, thereby reducing the latency of processing the second task with a higher priority and being able to meet the requirements of the application for the processing latency of the second task, optimizing the performance of the application.
[0009] In a possible implementation manner, before executing the first task, the task processing device identifies the first task as a low-priority task according to the type of the first task and divides the first task into multiple subtasks. In this way, during the subsequent execution of each subtask in the first task with a lower priority, if there is a task with a higher priority waiting to be executed, the task with a higher priority can be started after the currently executed subtask in the first task is completed, thereby reducing the latency of processing the second task with a higher priority.
[0010] In a possible implementation manner, if the first task includes multiple task classes, the task processing device can divide the first task into multiple subtasks according to the multiple task classes included in the first task. At this time, each subtask includes at least one task class. In this way, the task processing device can implement the division of subtasks according to the task classes in the task.
[0011] In a possible implementation manner, if the first task includes multiple operators, the task processing device can divide the first task into multiple subtasks according to the multiple operators included in the first task. At this time, each subtask includes at least one operator. In this way, the task processing device can implement the division of subtasks according to the operators in the task.
[0012] In a possible implementation, if the above-mentioned first task and second task are thread tasks in a first process task, then the task processing device can also edit the first process task into a first computation graph including the first task and the second task according to an editing model. Dependencies between different thread tasks in the first process task are set in the first computation graph. For example, different nodes in the first computation graph can be used to represent different thread tasks, and directed edges between the nodes can be used to indicate the dependencies between different thread tasks. The dependency relationship refers to the dependency relationship for the execution of thread tasks. Thus, the task processing device can detect the second task that can be currently executed from the first computation graph. In this way, the task processing device can sequentially process each thread task through the computation graph to ensure the smooth execution of the thread tasks.
[0013] In a possible implementation, when the application starts, the runtime scheduler (i.e., the task processing device) can apply for processor resources from the memory and use the processor resources as user-mode resources. The processor resources include multiple cores. Thus, when the first process task starts, the runtime scheduler can intercept the resource application request for the first process task and allocate the user-mode resources to the first process task. In this way, during the process of using the user-mode resources to execute each thread task in the first process task, there is no need to execute the switching process from the user mode to the kernel mode, thereby effectively reducing the overhead generated by the switching from the user mode to the kernel mode and then back to the user mode.
[0014] In a possible implementation, before executing the second task, the task processing device obtains a resource scheduling result, which indicates that multiple subtasks are to be executed by a first processor core. Then, after completing the execution of the second task, when the task processing device schedules the corresponding hardware resources to execute the remaining subtasks in the first task, specifically, it can, according to the resource scheduling result, use the first processor core to execute the remaining subtasks in the first task. In this way, even if a second task with a higher execution priority is inserted, the task processing device still continues to use the first processor core to execute the remaining subtasks in the first task based on the previously set resource scheduling result, without having to re-schedule new hardware resources for the remaining subtasks. This can effectively reduce the overhead of resource scheduling and thus improve the utilization rate of hardware resources.
[0015] In a possible implementation, if the application includes multiple programming models, such as a first programming model and a second programming model, then the application can edit different process tasks into multiple thread tasks through different programming models.
[0016] In a second aspect, the present application provides a task processing device. An execution module is configured to execute a first task, where the first task includes multiple subtasks, and the subtask being executed is the first subtask. A detection module is configured to detect that the priority of a to-be-executed second task is higher than that of the first task. The execution module is further configured to, when detecting that the priority of the to-be-executed second task is higher than that of the first task, execute the second task after completing the first subtask, where the first subtask and the second task are executed by the same processing unit; and after the second task is executed, execute the remaining subtasks in the first task.
[0017] In a possible implementation manner, the task processing device further includes: an identification module configured to identify the first task as a low-priority task according to the type of the first task before executing the first task; and a division module configured to divide the first task into multiple subtasks.
[0018] In a possible implementation manner, the first task includes multiple task classes; the division module is configured to divide the first task into multiple subtasks according to the multiple task classes, and each subtask in the multiple subtasks includes at least one task class.
[0019] In a possible implementation manner, the first task includes multiple operators; the division module is configured to divide the first task into multiple subtasks according to the multiple operators, and each subtask in the multiple subtasks includes at least one operator.
[0020] In a possible implementation manner, the first task and the second task are thread tasks in a first process task, and the task processing device further includes: an editing module configured to edit the first process task into a first computation graph including the first task and the second task according to an editing model, where the dependency relationship between different thread tasks in the first process task is set in the first computation graph; and the detection module is configured to detect the second task from the first computation graph.
[0021] In a possible implementation manner, the task processing device may be a runtime scheduler, and the task processing device further includes: an application module configured to apply to the kernel for processor resources when the application starts, and use the processor resources as user-mode resources, where the processor resources include multiple cores; and an interception module configured to intercept the resource application request of the first process when the first process task starts, and allocate the user-mode resources to the first process task.
[0022] In a possible implementation manner, the task processing device further includes: an acquisition module configured to acquire a resource scheduling result before executing the second task, where the resource scheduling result indicates that multiple subtasks are executed by a first processor core; and then, the execution module is configured to, after the second task is executed, execute the remaining subtasks in the first task using the first processor core according to the resource scheduling result.
[0023] In a possible implementation, the application includes multiple programming models, such as a first programming model and a second programming model. Then, the application can edit different process tasks into multiple thread tasks through different programming models.
[0024] In a third aspect, the present application provides a computing device, which includes a processor and a memory. The processor and the memory communicate with each other. The processor is used to execute instructions stored in the memory so that the computing device executes the task processing method in the first aspect or any implementation manner of the first aspect. It should be noted that the memory can be integrated into the processor or independent of the processor. The computing device may further include a bus. Among them, the processor is connected to the memory through the bus. Among them, the memory may include a readable memory and a random access memory.
[0025] In a fourth aspect, the present application provides a computer-readable storage medium, in which instructions are stored. When it runs on a computing device, it causes the computing device to execute the operation steps of the task processing method described in the first aspect or any implementation manner of the first aspect.
[0026] In a fifth aspect, the present application provides a computer program product containing instructions. When it runs on a computing device, it causes the computing device to execute the operation steps of the task processing method described in the first aspect or any implementation manner of the first aspect.
[0027] Based on the implementation manners provided in the above aspects, the present application can be further combined to provide more implementation manners. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 It is a schematic structural diagram of an exemplary data processing system provided by the present application;
[0029] Figure 2 It is a schematic flowchart of a task processing method provided by the present application;
[0030] Figure 3 It is a schematic diagram of the execution dependency between multiple thread tasks provided by the present application;
[0031] Figure 4 It is a schematic diagram showing that the execution delay of the second task provided by the present application is reduced;
[0032] Figure 5 It is a schematic structural diagram of a task processing device provided by the present application;
[0033] Figure 6 It is a schematic hardware structure diagram of a computing device provided by the present application. Detailed implementation manners
[0034] In the description and claims of this application and the above-mentioned drawings, terms such as "first", "second", etc. are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that such terms can be interchanged under appropriate circumstances, which is only a way of distinguishing objects with the same attributes when describing the embodiments of this application.
[0035] Next, the technical solutions in this application will be described in conjunction with the drawings provided in this application.
[0036] Refer to Figure 1 , which shows a schematic structural diagram of a data processing system. As Figure 1 shown, the data processing system 10 includes an application layer 101, a hardware layer 102, and a task processing device 200.
[0037] Among them, the application layer 101 includes at least one application, such as an image recognition application, etc. Figure 1 In Figure 1 , an example is given with one application 1 included. And the application 1 can include at least one programming model.
[0038] In
[0039] , an example is given with programming models 1 to 3 included. Exemplarily, the programming model can specifically be a message passing interface (MPI) model, a shared memory parallel programming (open multi-processing, OpenMP) model, a SYCL model (which is a high-level programming model of the open computing language (OpenCL)), or other types of programming models. Figure 1 Furthermore, the hardware layer 102 may also include other devices, such as Figure 1The network interface controller (NIC), memory, accelerator shown, or it can be other types of devices. Exemplarily, the memory can be direct memory access (DMA), etc. The accelerator can be a graphics processing unit (GPU), etc.
[0040] The task processing device 200 is used to schedule the processor cores (and other hardware) in the hardware layer 102 to execute thread tasks. Exemplarily, the task processing device 200 can be implemented by software. For example, the task processing device 200 can be specifically called a runtime scheduler, and this runtime scheduler can run on the processor core, etc.
[0041] During the running of Application 1, at least one task can be generated based on the user's operations on this Application 1, such as a data search task, etc. For each task, the programming model can edit the task into one or more process tasks, and there can be a dependency relationship between these multiple process tasks. For example, the execution of process task A among these multiple process tasks depends on the execution result of process task B (that is, process task B needs to be executed first). Then, the programming model can generate multiple computations Figure 1 , this computation Figure 1 where each node in it represents a process task, and, this computation Figure 1 The directed edges between different nodes in it are used to indicate the dependency relationships between different process tasks. Then, for each process task, the orchestration model can edit the process task into multiple thread tasks, and there is a dependency relationship between these multiple thread tasks. For example, the execution of thread task A among these multiple thread tasks depends on thread task B being executed first, so that the programming model can generate a computation Figure 2 . In the actual application scenario, each process task can correspond to a computation Figure 2 . Thus, the programming model can utilize the computation Figure 1 and the computation Figure 2 to achieve the orchestration of process tasks and thread tasks.
[0042] Based on the orchestration results of the programming model for process tasks and thread tasks (for example, it can be the above-mentioned computation Figure 1 and the computation Figure 2) The task processing device can schedule multiple processor cores in the hardware layer 102 to execute in parallel multiple thread tasks included in each process task. Among them, the data processing system 10 processes thread tasks based on the run-to-completion execution mode, that is, after a thread task starts to execute, the thread task will keep executing until the task is completed, and the thread task will not be interrupted by other thread tasks during its execution; correspondingly, the resources used by the thread task during execution are not preempted by other thread tasks.
[0043] However, during the execution of the first thread task with a lower priority by a processor core, there are often other thread tasks with higher priorities in a waiting state for execution. At this time, the second thread task needs to wait for the processor core to complete the execution of the first thread task before it can start to execute the second thread task, which causes the second thread task to be in a waiting state for a long time, resulting in a longer overall execution delay for the second thread task with a higher priority and affecting the business operations in the application layer 101, such as business response timeouts.
[0044] To this end, the task processing device 200 provided in this application can control the hardware resources such as processor cores in the hardware layer 102 to interleave and execute other tasks with higher priorities during the task execution process.
[0045] Specifically, for the first thread task with a lower priority, the task processing device 200 will split the first thread task into multiple subtasks before execution and use the processor cores in the hardware layer 102 to execute the first subtask among the multiple subtasks. During the execution of the first subtask, there may be a second thread task with a higher priority currently in a waiting state for execution. Then, when the task processing device 200 detects that the priority of the to-be-executed second thread task is higher than that of the first thread task, and the second thread task can also use the processor core to execute the second thread task, the task processing device 200 will, after completing the execution of the first subtask, preferentially use the processor core to execute the second thread task. After the second thread task is executed, the task processing device 200 will continue to execute the remaining subtasks in the first task (such as the second subtask, the third subtask, etc. obtained by splitting the first thread task).
[0046] Since the first task of the thread will be split into multiple subtasks, during the execution of the first task of the thread, the task processing device 200 can execute the second task of the thread with a higher priority issued by the application layer 101 after the execution of the first subtask in the currently executed first task of the thread. That is, during the execution of the first task of the thread, the task processing device 200 will insert and execute the second task of the thread with a higher priority, which enables the second task of the thread to be executed without waiting for the entire first task of the thread to be completed, thereby reducing the latency of processing the second task of the thread with a higher priority, and thus meeting the requirements of the services in the application layer 101 for the processing latency of the second task of the thread and optimizing the performance of the applications in the application layer 101.
[0047] In actual application, during the process of the task processing device 200 scheduling multiple processor cores in the hardware layer 102 to execute multiple thread tasks in parallel, the above process can be used to accelerate the processing of high-priority thread tasks, thereby processing multiple thread tasks included in a process task. And when all the multiple thread tasks included in the process tasks are processed in the above manner, the tasks generated by the application 1 can be processed and completed.
[0048] It should be noted that the above Figure 1 shown data processing system 10 is only for illustrative purposes and is not used for limitation. For example, in an actual application scenario, the data processing system 10 may also include parts such as the kernel of the operating system ( Figure 1 not shown in the figure). For another example, in other data processing systems, the application layer 101 may include a larger number of applications, and the types and quantities of programming models included in different applications may vary; or, the hardware layer 102 may also include other types or other quantities of hardware.
[0049] For ease of understanding, the embodiments of the task processing method provided in the present application will be described below with reference to the accompanying drawings.
[0050] See Figure 2 , Figure 2 which is a schematic flowchart of a task processing method provided in an embodiment of the present application. This method can be applied to Figure 1 the data processing system 10 described above, or can be applied to other applicable data processing systems. For ease of description, this embodiment takes the data processing system 10 shown in Figure 1 as an example for illustrative description.
[0051] Among them, Figure 2 the task processing method shown can specifically include:
[0052] S201: The task processing device 200 obtains a first task to be executed.
[0053] In this embodiment, after a programming model (such as programming model 1, etc.) edits a corresponding plurality of thread tasks and a computation graph corresponding to the plurality of thread tasks for each process task, the programming model can determine the first task that can be executed currently according to the dependency relationship between different thread tasks indicated by the computation graph. The first task can be one of the plurality of thread tasks. For example, the computation graph generated by the programming model can be as shown in Figure 3 shown. Among them, Figure 3 it includes a plurality of nodes, and each node is used to indicate a thread task; the directed edges between different nodes are used to indicate the execution dependencies between different thread tasks. For example, the directed edge between node 1 and node 3 is used to indicate that the execution of the thread task identified by node 3 depends on the thread task identified by node 1 being executed first. And, the priorities of the tasks identified by different nodes are different. For example, Figure 3 the thread tasks indicated by node 3 and node 8 in it have higher execution priorities (higher than the execution priorities of the thread tasks indicated by the remaining nodes). In this embodiment, the first task that can be executed currently described in step S201 can be the tasks with lower priorities indicated by nodes 4, 6, and 9.
[0054] Then, the programming model sends the first task to the kernel of the operating system through the first type of interface to request the kernel of the operating system to schedule resources for the first task to execute the first task. Among them, the first type of interface is the interface through which the programming model sends thread tasks externally.
[0055] Correspondingly, the task processing device 200 can continuously monitor the first type of interface (which can be one or more); and when the programming model outputs the first task through the first type of interface, the task processing device 200 can intercept the first task sent by the programming model 1 to the kernel, so that the task processing device 200 can perform resource scheduling for the first task subsequently, such as scheduling the processing unit to execute the first task, etc. Among them, the scheduled processing unit can be the processor core in the hardware layer 102, and can also include other hardware such as an acceleration card and a network card.
[0056] Alternatively, after the programming model programs a plurality of thread tasks and generates a computation graph, the task processing device 200 can detect the thread task that can be executed currently according to the dependency relationship between different thread tasks indicated by the computation graph, that is, detect the thread task that does not depend on other thread tasks being executed first. Assume that the thread task that can be executed currently detected is the first task, then the task processing device 200 schedules the processor core 1 to execute the task for the first task.
[0057] In actual application, before the task processing device 200 obtains the first task, the task processing device 200 (or referred to as the runtime scheduler) can also pre-create user-mode resources based on the hardware in the hardware layer 102 in order to process the first task in the user mode. Among them, the created user-mode resources can be, for example, user-mode threads.
[0058] In specific implementation, when the application 1 starts, the programming model can apply to the kernel of the operating system to create processor resources for task execution through the second type of interface. The processor resources include multiple processor cores (or simply referred to as cores). Correspondingly, the task processing device 200 can continuously monitor the second type of interface, and when the programming model outputs a request for applying for processor resources through multiple second-type interfaces, the task processing device 200 can intercept the request, apply to the memory for processor resources, and use the applied processor resources as user-mode resources. The user-mode resources refer to the processor resources used in the user mode. For example, the task processing device 200 can create multiple user-mode threads according to the number of the applied processor resources (that is, multiple processor cores). A user-mode thread, which can also be referred to as a user-level thread, is a thread implemented in a user program without the support of the kernel of the operating system and the thread creation is completed in the user space. Each user-mode thread can be responsible for scheduling a processor core and can be used to execute a thread task. At this time, the number of user-mode threads created by the task processing device 200 for each programming model can match the number of multiple processor cores in the hardware layer 102. For example, assuming that the hardware layer 102 includes 32 processor cores, then the task processing device 200 can create 32 user-mode threads for each of the programming models 1 to 3, so that the task processing device 200 can create a total of 96 user-mode threads. In this way, after the task processing device 200 creates corresponding multiple user-mode threads for the processor resources, the processor resources can be used as user-mode resources.
[0059] In actual application, when the task processing device 200 starts to run, it can first manage all the hardware in the hardware layer 102, including processor cores and devices utilized by the processor cores (such as network cards, accelerators, DMA, etc.) to determine the hardware resources included in the hardware layer 102. Then, the task processing device 200 can notify the hardware resource information included in the hardware layer 102 (such as the number of processor cores included in the hardware layer 102, etc.) to each programming model. In this way, each programming model can apply for corresponding processor resources based on the hardware resource information, such as applying for 32 processor cores included in the hardware layer 102, etc.
[0060] After the creation of user-mode resources is completed, when the first process task starts, that is, when multiple thread tasks included in the first process task start to execute, the programming model can send a resource application request to the kernel through a third type of interface to request corresponding processor resources to execute the multiple thread tasks included in the first process task. Correspondingly, the task processing device 200 can intercept the resource application request and allocate the user-mode resources to the first process task, that is, allocate the user-mode resources to each thread task included in the first process task.
[0061] The following takes the processing of the first task among multiple thread tasks and the allocation of user-mode resources as an example for illustration.
[0062] S202: The task processing device 200 splits the first task into multiple subtasks, and the multiple subtasks include a first subtask and a second subtask.
[0063] In this embodiment, before the task processing device 200 executes the first task by using the allocated user-mode resources, it can first obtain the execution priority of the first task.
[0064] Among them, the execution priority of the first task can be specified by technicians / users. For example, technicians / users can define that the tasks issued by the OpenMP model have a lower execution priority, and define that the tasks issued by the SYCL model have a higher execution priority, etc. The first task (thread task) generated by the programming model can include priority information. For example, the first task can include a priority. When the priority is "high" or "1", it is used to indicate that the execution priority of the first task is higher, and when the priority is "low" or "0", it is used to indicate that the execution priority of the first task is lower.
[0065] Alternatively, the execution priority of the first task can be obtained by the task processing device 200 through analysis. For example, the first task can include its type. When the type of the first task indicates that the first task is a data calculation type or a data storage type task, the task processing device 200 can determine that the execution priority of the first task is lower, and when the type of the first task indicates that the first task is a data movement type task (such as data backup, data migration, etc.), the task processing device 200 can determine that the execution priority of the first task is higher.
[0066] Therefore, after the task processing device 200 obtains the first task, it can further determine the execution priority of the first task, and the level of this priority can be identified by corresponding numerical values, marks, etc. For the sake of easy understanding, in this embodiment, the first task is taken as an example of a task with a lower priority for illustration.
[0067] After determining that the first task is a task with a lower priority, the task processing device 200 may split the first task into multiple subtasks, and the priorities of the multiple split subtasks are the same as the priority when the first task is executed.
[0068] As a first implementation example of splitting the first task, when the programming model generates the first task based on the task class (task_base), the first task may include multiple task classes. Thus, the task processing device 200 may use each task class as a subtask in the first task to achieve the splitting of the first task. Among them, a task class refers to a class defined for a task, and different classes may include different task contents.
[0069] As a second implementation example of splitting the first task, the task processing device 200 may block the execution logic of the first task, and each block of executing the task can be used as a subtask of the first task, thereby achieving splitting the first task into multiple subtasks. For example, the first task may include multiple operators, and each operator can be a block of execution logic. Thus, the task processing device 200 can split the first task into multiple subtasks with the operator as the granularity, and each subtask includes at least one operator.
[0070] In practical applications, the task processing device 200 may also use other methods to split the first task into multiple subtasks, and this is not limited.
[0071] Among them, the multiple subtasks corresponding to the first task can be executed in parallel. For example, the task processing device 200 may split the first task into subtask A, subtask B, and subtask C. And the task processing device 200 may use multiple processor cores to execute subtask A and subtask B in parallel. After subtask A and subtask B are executed, then use 1 processor core to execute subtask C.
[0072] Or, the multiple subtasks corresponding to the first task can be executed serially. For example, the task processing device 200 may split the first task into subtask a, subtask b, and subtask c. And the task processing device 200 uses 1 processor core to sequentially execute the subtask a, subtask b, and subtask c.
[0073] For ease of explanation, in this embodiment, it is taken as an example that the multiple subtasks obtained by splitting the first task include a first subtask and a second subtask. Among them, the execution order of the first subtask is before the execution order of the second subtask, such as the execution of the second subtask depends on the execution result of the first subtask, etc.
[0074] S203: The task processing device 200 uses the processing unit to execute the first subtask in the first task.
[0075] After splitting the first task with a lower priority into multiple subtasks, the task processing device 200 may execute the first subtask among the multiple subtasks by using the allocated user-mode resources. In this embodiment, the user-mode resources allocated to the first subtask may include a processing unit, and the processing unit includes a processor core. Further, the processing unit may further include other hardware in the hardware layer 102, such as an accelerator like a GPU. Specifically, a user-mode thread may be running on the processing unit, and the processing unit may execute the first subtask based on the program logic indicated by the user-mode thread.
[0076] S204: During the execution of the first subtask, the task processing device 200 obtains a second task to be executed.
[0077] Exemplarily, the task processing device 200 may obtain the second task output by the programming model by monitoring and intercepting a first type of interface. Or, the task processing device may detect the second task that can be currently executed from the computation graph generated by the programming model for indicating the execution dependencies between different thread tasks. This embodiment does not limit this.
[0078] In practical applications, during the execution of the first subtask by the processor core (processing unit) in the hardware layer 102, there may be other tasks that can also start to be executed currently, and the other tasks are the second tasks described in step S203. For example, when during the execution of the first subtask, the other tasks on which the second task depends are executed and completed by other processor cores, at this time, the second task may be in an executable state and be obtained by the task processing device 200.
[0079] S205: The task processing device 200 detects whether the priority of the second task is higher than the priority of the first task. If not, it continues to execute step S206; if so, it continues to execute step S207.
[0080] Specifically, the second task may carry indication information of the priority, so that the task processing device 200 may determine the priority of the second task according to the indication information. Or, after obtaining the second task, the task processing device 200 may determine the priority of the second task according to the type to which the second task belongs. Among them, for the implementation manner of the task processing device 200 to obtain the priority of the second task, reference may be made to the relevant description of obtaining the priority of the first task above, and details are not described here.
[0081] Then, the task processing device 200 may compare the priority of the second task with the priority at which the first task is being executed, and determine whether the priority of the second task to be executed is higher than the priority of the first task currently being executed. If not, the task processing device 200 may wait for the first task to be completed before scheduling hardware resources to execute the second task, that is, execute step S206. If so, the task processing device 200 may, by executing step S207, insert and execute the second task with a higher priority during the execution of the first task. In this embodiment, it is set that the priority of the second task is higher than the priority of each subtask in the first task, and the execution of the second task requires the use of the same processing unit as the first subtask.
[0082] S206: When it is detected that the priority of the second task is lower than the priority of the first task, the task processing device 200 waits for all subtasks in the first task to be completed, and then uses the processing unit to execute the second task.
[0083] S207: When it is detected that the priority of the second task is higher than the priority of the first task, the task processing device 200, after executing the first subtask, preferentially uses the processing unit to execute the second task.
[0084] S208: After the task processing device 200 completes the execution of the second task, it executes the remaining subtasks in the first task.
[0085] That is, when the priority of the second task is relatively high, the remaining subtasks in the first task except the first subtask may wait for the second task to be completed before starting to execute.
[0086] Specifically, assuming that the processing unit is specifically a processor core, the task processing device 200 may monitor whether the processor core has completed the execution of the first subtask. If the first subtask has not been completed, the second task is in a waiting state until the task processing device 200 determines that the first subtask has been completed. At this time, the task processing device 200 may schedule the second task to the processor core, so that the processor core may start to execute the second task.
[0087] After completing the execution of the second task, the task processing device 200 uses the hardware resources in the hardware layer 102 to execute the remaining subtasks in the first task. For example, the task processing device 200 may call the processor core to continue executing the second subtask, the third subtask, and other remaining subtasks in the first task.
[0088] As an implementation example, the task processing device 200 may execute each subtask included in the first task based on a static scheduling policy. Specifically, when the task processing device 200 executes the second task, the task processing device 200 may obtain the resource scheduling result corresponding to the first task, and this resource scheduling result is used to indicate the processor cores used to execute multiple subtasks in the first task. In this embodiment, it is exemplified that the first subtask and the second subtask are executed by the same processor unit. Among them, the resource scheduling result may be a result generated by the task scheduling device 200 for resource scheduling of each subtask in the first task after splitting the first task.
[0089] In this way, after completing the execution of the second task, the task processing device 200 may continue to use the processing unit indicated by this resource scheduling result to execute the second subtask in the first task. That is, before and after inserting the execution of the second task, the set hardware resources for executing the second subtask remain unchanged. In this way, during the execution of the first task, even if the second task is interspersed, the task processing device 200 still continues to use the processor core 1 to execute the remaining subtasks in the first task based on the previously set resource scheduling result, and does not need to re-schedule the hardware resources for the remaining subtasks, which can effectively reduce the overhead of resource scheduling, thereby improving the utilization rate of hardware resources.
[0090] Moreover, when the mode of the data processing system 10 for executing tasks is running to completion, by splitting the first task into multiple subtasks and interspersing the execution of the second task with a higher priority during the execution of the first task, this can enable the second task to be executed without waiting for the entire first task to be completed, thereby effectively reducing the overall latency of the second task being executed and improving the execution efficiency of the second task. As Figure 3 shown, the second task can start to be executed at time T1 without waiting until time T2 to be executed, so that the latency of the second task being executed can be shortened by the duration of (T2 - T1).
[0091] When the second task can be preferentially executed and completed, the running performance of the service in the application layer 101 corresponding to this second task can also be improved. For example, the response latency of the service can be reduced, optimizing the performance of Application 1.
[0092] In practical applications, the task processing device 200 may, based on the above method, use processor resources to execute multiple thread tasks included in each process task, so as to ensure that during the execution of multiple thread tasks, the latency of the thread task with a higher priority waiting to be executed can reach a smaller state, thereby improving the overall execution efficiency for these multiple threads, that is, improving the execution efficiency for this process task.
[0093] The process of the above-mentioned task processing device 200 executing tasks is described by taking the example that the task processing device 200 obtains the second task included in the same process task during the execution of the first task. In other embodiments, the programming models 1 to 3 in Application 1 can all issue multiple thread tasks to be executed through the first type of interface. Then, the task processing device 200 can intercept the multiple thread tasks, and the task processing device 200 can schedule the processor core to execute the thread task A with a lower priority issued by the programming model 1. During the execution of the thread task A, if the thread task B with a higher priority issued by the programming model 2 is obtained, the task processing device 200 can refer to the method described in the above embodiments. After executing some subtasks in the thread task A, the thread task B is preferentially executed, and after the thread task B is executed, the remaining subtasks in the thread task A are continued to be executed, so as to improve the execution efficiency of the thread task B. For the specific implementation method, reference can be made to the description of the relevant parts of the above-mentioned execution of the first task and the second task, which will not be elaborated here.
[0094] Moreover, the processor resources allocated by the task processing device 200 to the thread tasks are user-mode resources, which enables the same processor core to complete the switch in the user mode when switching to execute thread tasks generated by different programming models based on different time slices. For example, the user-mode thread a required to execute the thread task A generated by the programming model 1 can be switched to the user-mode thread b required to execute the thread task B generated by the programming model 2 on the processor core. This enables the processor core to switch the executed thread from the user-mode thread A to the user-mode thread B without performing the process of switching from the user mode to the kernel mode and then from the kernel mode to the user mode, thereby effectively reducing the overhead of thread switching.
[0095] In actual application, when the task processing device 200 obtains multiple thread tasks to be executed at the same time, if the task with a lower priority to be executed has not started execution, the task processing device 200 can determine the task with a higher priority among the multiple thread tasks that can be executed currently according to the execution dependencies between the tasks, and preferentially allocate the processing unit to the task with a higher priority so that the task with a higher priority is preferentially executed. After the thread task with a higher priority is executed, the task processing device 200 then schedules the processing unit to start executing the thread task with a lower priority. If the thread task with a lower priority is executed before the thread task with a higher priority, the task processing device 200 can indicate to pause the execution of the remaining subtasks of the thread task after some subtasks included in the thread task with a lower priority are executed, and preferentially schedule the processing unit to the task with a higher priority. When the task with a higher priority is executed, the task processing device 200 then uses the processing unit to continue executing the remaining unexecuted subtasks in the thread task with a lower priority.
[0096] It should be noted that Figure 2 the method embodiments shown above are only for illustrative purposes. Based on Figure 2 the method flow shown, the process of the task processing device 200 using the hardware resources in the hardware layer 102 to execute tasks can also adopt the following embodiments.
[0097] Example 1: Figure 2 In the method embodiment shown, the first task and the second task obtained by the task processing device 200 are taken as an example of thread tasks generated and sent by the same programming model. In other possible embodiments, multiple programming models in Application 1 can all send multiple thread tasks with different priorities. At this time, the task processing device 200 can refer to the above method and preferentially execute the thread tasks with higher priorities.
[0098] Example 2: Figure 2 In the method embodiment shown, it is taken as an example for illustrative purposes that during the execution of the first task, the task processing device 200 intersperses and executes a single second task with a higher priority. In other possible embodiments, the task processing device 200 may simultaneously obtain multiple tasks with higher priorities to be executed. Taking the simultaneous reception of the second task and the third task as an example, assuming that the execution of the second task and the third task requires the processing unit used during the execution of the first sub-task, after the first sub-task is completed, the task processing device 200 can schedule the processor core to preferentially execute the second task with a higher priority. After the second task is completed, the processor core will continue to execute the third task with a higher priority. And when the third task is also completed, the task processing device then instructs the processor core to continue executing the remaining unexecuted sub-tasks in the first task. In this way, during the execution of the first task with a lower priority, the task processing device 200 can insert and execute multiple thread tasks with higher priorities, that is, the second task and the third task, thereby reducing the waiting execution delay of the data processing system 10 for multiple thread tasks with higher priorities.
[0099] Example 3: In addition to preferentially executing thread tasks with higher priorities, for multiple thread tasks with lower priorities, the task processing device 200 can execute these multiple thread tasks in parallel. Further, when these multiple thread tasks are issued by different programming models, the thread task processing device 200 can also, with time slices as the granularity, instruct the processor core to execute different thread tasks allocated to this processor core at different time slices. For example, assume that the thread tasks allocated to the processor core include thread task x issued by programming model 1 and thread task y issued by programming model 2. Then, the task processing device 200 can schedule this processor core to execute thread task x within time slice 1; when time slice 1 ends, even if thread task x has not been completed, the processor core will stop executing thread task x and start executing thread task y within the immediately adjacent time slice 2 (i.e., the next time slice after time slice 1). Similarly, when time slice 2 ends, regardless of whether thread task y has been completed, the processor core will stop executing thread task y and continue to execute thread task x within the immediately adjacent time slice 3 (i.e., the next time slice after time slice 2). And so on. Within a period of time (including multiple time slices), a single processor core can achieve parallel execution of thread tasks issued by different programming models.
[0100] In addition, for multiple thread tasks issued by multiple thread models, in addition to being able to instruct the processor core to execute thread tasks issued by different programming models with time slices as the granularity, the thread task processing device 200 also supports executing thread tasks with other granularities. For example, the task processing device 200 can support the processor core to execute each thread task with a thread task as the granularity. That is, the processor core will start to execute a thread task issued by programming model 2 only after completing a thread task issued by programming model 1 within a period of time. Also, for example, the thread task processing device 200 can support the processor core to execute thread tasks issued by different programming models with a user-defined granularity, and no limitation is imposed on this.
[0101] It should be noted that other reasonable combinations of steps that those skilled in the art can think of based on the content described above also fall within the protection scope of this application. Secondly, those skilled in the art should also be familiar that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential for this application.
[0102] The above combines Figures 1 to 4 introduces the task processing method provided by the embodiments of this application. Next, the structures of the task processing device and the computing device provided by the embodiments of this application will be introduced with reference to the accompanying drawings.
[0103] See Figure 5, showing a schematic structural diagram of a task processing device, the task processing device 500 includes:
[0104] An execution module 501, configured to execute a first task, the first task includes multiple subtasks, and the subtask being executed is the first subtask;
[0105] A detection module 502, configured to when detecting that the priority of the to-be-executed second task is higher than the priority of the first task;
[0106] The execution module 501 is further configured to, when detecting that the priority of the to-be-executed second task is higher than the priority of the first task, after executing the first subtask, execute the second task, and the first subtask and the second task are executed by the same processing unit; after the second task is executed, execute the remaining subtasks in the first task.
[0107] In a possible implementation manner, the task processing device 500 further includes:
[0108] An identification module 503, configured to identify the first task as a low-priority task according to the type of the first task before executing the first task;
[0109] A division module 504, configured to divide the first task into multiple subtasks.
[0110] In a possible implementation manner, the first task includes multiple task classes;
[0111] The division module 504 is configured to divide the first task into multiple subtasks according to the multiple task classes, and each subtask in the multiple subtasks includes at least one task class.
[0112] In a possible implementation manner, the first task includes multiple operators;
[0113] The division module 504 is configured to divide the first task into multiple subtasks according to the multiple operators, and each subtask in the multiple subtasks includes at least one operator.
[0114] In a possible implementation manner, the first task and the second task are thread tasks in a first process task, and the task processing device 500 further includes:
[0115] An editing module 505, configured to edit the first process task into a first computational graph including the first task and the second task according to an editing model, and the dependency relationship between different thread tasks in the first process task is set in the first computational graph;
[0116] The detection module 502 is configured to detect the second task from the first computational graph.
[0117] In a possible implementation, the task processing device 500 may be a runtime scheduler. The task processing device 500 further includes:
[0118] An application module 506, configured to apply to the kernel for processor resources when the application is started, and use the processor resources as user-mode resources. The processor resources include multiple cores;
[0119] An interception module 507, configured to intercept a resource application request of a first process when the first process task is started, and allocate the user-mode resources to the first process task.
[0120] In a possible implementation, the task processing device 500 further includes:
[0121] An acquisition module 508, configured to acquire a resource scheduling result before executing a second task. The resource scheduling result indicates that multiple subtasks are to be executed by a first processor core;
[0122] Then, an execution module 501, configured to, after the second task is executed, execute the remaining subtasks in the first task using the first processor core according to the resource scheduling result.
[0123] In a possible implementation, the application includes multiple programming models, such as a first programming model and a second programming model. Then, the application can edit different process tasks into multiple thread tasks through different programming models.
[0124] Since Figure 5 the task processing device 500 shown corresponds to the task processing device 200 in the above Figure 2 shown embodiment, therefore Figure 5 For the specific implementation manner of the task processing device 500 shown and the technical effects thereof, refer to the relevant descriptions in the above Figure 2 shown embodiment, and details are not described herein again.
[0125] Figure 6 FIG. is a schematic hardware structure diagram of a computing device 600 provided in this application. The computing device 600 may implement, for example, the task processing device 200 in the above Figure 2 shown embodiment, etc.
[0126] Such as Figure 6As shown, the computing device 600 includes a processor 601, a memory 602, and a communication interface 603. Among them, the processor 601, the memory 602, and the communication interface 603 communicate through a bus 604, and can also achieve communication through other means such as wireless transmission. The memory 602 is used to store instructions, and the processor 601 is used to execute the instructions stored in the memory 602. Further, the computing device 600 may further include a memory unit 605, and the memory unit 605 can be connected to the processor 601, the storage medium 602, and the communication interface 603 through the bus 604. Among them, the memory 602 stores program codes, and the processor 601 can use the program codes stored in the memory 602 to perform the following operations:
[0127] Execute a first task, where the first task includes multiple subtasks, and the subtask being executed is the first subtask;
[0128] When it is detected that the priority of the second task to be executed is higher than the priority of the first task, after the first subtask is executed, execute the second task, and the first subtask and the second task are executed by the same processing unit;
[0129] After the second task is executed, execute the remaining subtasks in the first task.
[0130] It should be understood that in this embodiment, the processor 601 may be a CPU, and the processor 601 may also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete device components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.
[0131] The memory 602 may include a read-only memory and a random access memory, and provide instructions and data to the processor 601. The memory 602 may further include a non-volatile random access memory.
[0132] The memory 602 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct rambus RAM (DR RAM).
[0133] The communication interface 603 is used to communicate with other devices connected to the computing device 600. In addition to including a data bus, the bus 604 can also include a power bus, a control bus, a status signal bus, etc. However, for the sake of clarity, all kinds of buses are labeled as the bus 604 in the figure.
[0134] It should be understood that the computing device 600 according to the embodiments of the present application can correspond to the task processing device 500 in the embodiments of the present application, and can correspond to the method executed by the task processing device 200 in the method shown in Figure 2 the embodiments of the present application. The above and other operations and / or functions implemented by the computing device 600 are respectively for implementing Figure 2 the corresponding method flows in, and for the sake of brevity, they will not be described in detail here.
[0135] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium may be any available medium that can be stored by a computing device or a data storage device such as a data center including one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive), etc. The computer-readable storage medium includes instructions that direct the computing device to execute the above-mentioned task processing method.
[0136] The embodiments of the present application also provide a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, they generate, in whole or in part, the processes or functions described in the embodiments of the present application.
[0137] The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, or data center to another website, computer, or data center by wire (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wirelessly (e.g., infrared, wireless, microwave, etc.).
[0138] The computer program product may be a software installation package. In the case where any of the above-mentioned task processing methods is needed, the computer program product can be downloaded and executed on a computing device.
[0139] The above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more collections of available media. The available media can be magnetic media (such as floppy disks, hard disks, magnetic tapes), optical media (such as DVDs), or semiconductor media. The semiconductor media can be a solid-state drive.
[0140] The terms used in the above embodiments are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the specification and claims of the present application, the singular forms "a", "an", "the", "above", "said", "this" are also intended to include expressions such as "one or more", unless the context clearly indicates otherwise. It should also be understood that in the embodiments of the present application, "one or more" means one, two, or more than two; the character " / " generally indicates an "or" relationship between the associated objects before and after. In the embodiments of the present application, "simultaneously" means within the same time period, including the case of being at the same moment.
[0141] The reference to "one embodiment" or "some embodiments" or the like described in this specification means that a specific feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, the statements "in one embodiment", "in some embodiments", "in other some embodiments", "in still other embodiments" and the like that appear in different places in this specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in another way. The terms "comprising", "including", "having" and their variants all mean "including but not limited to", unless otherwise specifically emphasized in another way.
[0142] As described above, it is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims
1. A task processing method, characterized in that, The method includes: A processing unit executes a first task, the first task includes multiple subtasks, and the subtask being executed by the processing unit is the first subtask; In response to detecting that the priority of a second task to be executed is higher than the priority of the first task, after executing the first subtask, the processing unit executes the second task; After the second task is executed, the subtasks after the first subtask in the first task are executed.
2. The method according to claim 1, wherein The method further includes: Before executing the first task, identify the first task as a low-priority task according to the type of the first task; Divide the first task into the multiple subtasks.
3. The method according to claim 2, wherein The first task includes multiple task classes, and dividing the first task into the multiple subtasks includes: According to the multiple task classes, divide the first task into the multiple subtasks, and each subtask in the multiple subtasks includes at least one task class.
4. The method according to claim 2, wherein The first task includes multiple operators, and dividing the first task into the multiple subtasks includes: According to the multiple operators, divide the first task into the multiple subtasks, and each subtask in the multiple subtasks includes at least one operator.
5. The method according to any one of claims 1 to 4, characterized in that, The first task and the second task are thread tasks in a first process task, and the method further includes: Edit the first process task into a first computation graph including the first task and the second task according to an editing model, and dependencies between different thread tasks in the first process task are set in the first computation graph; Detect the second task from the first computation graph.
6. The method according to any one of claims 1 to 5, characterized in that The method includes: When the application starts, a runtime scheduler applies to the kernel for processor resources, and takes the processor resources as user-mode resources, and the processor resources include multiple cores; When the first process task starts, the runtime scheduler intercepts a resource application request for the first process task and allocates the user-mode resources to the first process task.
7. The method according to any one of claims 1 to 6, characterized in that, The method further includes: Before executing the second task, obtain a resource scheduling result, and the resource scheduling result indicates that the multiple subtasks are executed by a first processor core; Then, after the second task is executed, executing the remaining subtasks in the first task includes: After the second task is executed, according to the resource scheduling result, use the first processor core to execute the remaining subtasks in the first task.
8. A task processing device, characterized in that, The device includes: An execution module, configured to execute a first task through a processing unit, the first task includes multiple subtasks, and the subtask being executed is the first subtask; A detection module, configured to detect whether the priority of a second task to be executed is higher than the priority of the first task; The execution module is further configured to, in response to detecting that the priority of the second task to be executed is higher than the priority of the first task, after executing the first subtask through the processing unit, execute the second task through the processing unit; after the second task is executed, execute the subtasks after the first subtask in the first task.
9. The device according to claim 8, wherein The device further includes: An identification module, configured to identify the first task as a low-priority task according to the type of the first task before executing the first task; A division module, configured to divide the first task into the multiple subtasks.
10. The device according to claim 9, characterized in that, The first task includes multiple task classes; The division module is configured to divide the first task into the multiple subtasks according to the multiple task classes, and each subtask in the multiple subtasks includes at least one task class.
11. The device according to claim 9, characterized in that, The first task includes multiple operators; The division module is configured to divide the first task into the multiple subtasks according to the multiple operators, and each subtask in the multiple subtasks includes at least one operator.
12. The device according to any one of claims 8 to 11, characterized in that, The first task and the second task are thread tasks in a first process task, and the apparatus further includes: An editing module, configured to edit the first process task into a first computation graph including the first task and the second task according to an editing model, and dependencies between different thread tasks in the first process task are set in the first computation graph; A detection module, configured to detect the second task from the first computation graph.
13. The device according to any one of claims 8 to 12, characterized in that, The apparatus further includes: An application module, configured to, when the application is started, the runtime scheduler applies to the kernel for processor resources, and takes the processor resources as user-mode resources, and the processor resources include multiple cores; An interception module, configured to, when the first process task is started, the runtime scheduler intercepts a resource application request of the first process, and allocates the user-mode resources to the first process task.
14. The device according to any one of claims 8 to 13, characterized in that, The apparatus further includes: An acquisition module, configured to acquire a resource scheduling result before executing the second task, where the resource scheduling result indicates that the multiple subtasks are executed by a first processor core; Then, an execution module, configured to, after the second task is executed, execute the remaining subtasks in the first task by using the first processor core according to the resource scheduling result.
15. A computing device, characterized in that, Including a processor and a memory; The processor is configured to execute instructions stored in the memory, so that the computing device executes the steps of the method according to any one of claims 1 to 7.
16. A computer-readable storage medium, characterized in that, Including instructions, when running on a computing device, enabling the computing device to execute the steps of the method according to any one of claims 1 to 7.
17. A computer program product comprising instructions, characterized in that, When running on at least one computing device, enabling the at least one computing device to execute the method according to any one of claims 1 to 7.
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