A driving circuit for a high-power switching power supply

Abstract

The present invention provides a driving circuit for a high-power switching power supply, comprising a voltage generating circuit for generating a first reference voltage V1; a first driving module for generating a first driving signal based on the first reference voltage V1 and the voltage of a first input signal S1; a second driving module for generating a second driving signal based on the first driving module and the first reference voltage V1; a first driving switch tube M1, a control end of which is connected to the first driving module and is configured to be turned on or off based on the first driving signal; and a second driving switch tube M2, a control end of which is connected to the second driving module and is configured to be turned on or off based on the second driving signal. The first and second driving switches M1 and M2 are configured so that only one of them is turned on, and a voltage difference between the control end and the current output end of the first driving switch tube M1 is less than a power supply voltage VIN, and a voltage difference between the control end and the current input end of the second driving switch tube M2 is less than the power supply voltage VIN.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a driving circuit of a high-power switching power supply. Background Art

[0002] Conventional switching power supply control chips typically include a driver circuit for generating drive signals for external power switches. In high-power switching power supplies, the external power switches operate at relatively high voltages, so their drive signals also require correspondingly high voltage levels. This requires the driver switches in the driver circuit, which output the drive signals, to have a matching high gate-source voltage withstand capability—that is, they must withstand the power supply voltage VIN. This results in larger and more expensive driver switches. Summary of the Invention

[0003] The purpose of the present invention is to solve the problem in existing switching power supply control chips that the drive circuit needs to output a high voltage drive signal and must use a high-voltage drive switch tube, resulting in a large device size and high cost.

[0004] According to a first aspect of the present invention, there is provided a driving circuit for a high-power switching power supply, comprising:

[0005] a voltage generating circuit, the input end of which is connected to the power supply voltage VIN, for generating a first reference voltage V1, wherein the first reference voltage V1 is lower than the power supply voltage VIN;

[0006] a first driving module, wherein a first terminal of the first driving module is connected to the first reference voltage V1, a second terminal of the first driving module is grounded, and a third terminal of the first driving module is connected to the first input signal S1, and is configured to generate a first driving signal according to the first reference voltage V1 and the voltage of the first input signal S1;

[0007] a second driving module, wherein a first terminal of the second driving module is connected to a power supply voltage VIN, a second terminal and a third terminal of the second driving module are both connected to the first driving module, and a fourth terminal of the second driving module is connected to the first reference voltage V1, and is configured to generate a second driving signal according to the first driving module and the first reference voltage V1;

[0008] A first driving switch tube M1, having a control terminal connected to the first driving module and a current output terminal grounded, and configured to be turned on or off based on the first driving signal;

[0009] The second driving switch tube M2 has a current input terminal connected to the power supply voltage VIN, a current output terminal connected to the current input terminal of the first driving switch tube M1, and a control terminal connected to the second driving module, and is configured to be turned on or off based on the second driving signal;

[0010] The output terminal OUT of the driving circuit of the high-power switching power supply is arranged between the first driving switch tube M1 and the second driving switch tube M2; the first driving switch tube M1 and the second driving switch tube M2 are arranged so that only one of them is turned on, and the voltage difference between the control terminal and the current output terminal of the first driving switch tube M1 is less than the power supply voltage VIN, and the voltage difference between the control terminal and the current input terminal of the second driving switch tube M2 is less than the power supply voltage VIN.

[0011] In one possible implementation, the first driving module includes:

[0012] A first inverter A1, whose input terminal serves as the third terminal of the first driving module, whose first voltage reference terminal serves as the first terminal of the first driving module, and whose second voltage reference terminal is grounded;

[0013] a second inverter A2, having an input terminal connected to the output terminal of the first inverter A1, a first voltage reference terminal of the second inverter A2 connected to the first voltage reference terminal of the first inverter A1, and a second voltage reference terminal of the second inverter A2 grounded;

[0014] The third inverter A3 has an input end connected to the output end of the second inverter A2, a first voltage reference end of the third inverter A3 connected to the first voltage reference end of the first inverter A1, a second voltage reference end of the third inverter A3 is grounded, and an output end is connected to the control end of the first driving switch tube M1.

[0015] In a possible implementation, the first driving module further includes:

[0016] A third switch tube M3, having a current input terminal connected to the second driving module, a current output terminal connected to ground, and a control terminal connected to the output terminal of the second inverter A2;

[0017] The fourth switch tube M4 has a current input terminal connected to the second driving module, a current output terminal connected to the ground, and a control terminal connected to the output terminal of the third inverter A3.

[0018] In a possible implementation, the second driving module includes:

[0019] a logic control unit, wherein a first end of the logic control unit serves as the first end of the second driving module, a second end of the logic control unit serves as the second end of the second driving module, a third end of the logic control unit serves as the third end of the second driving module, and a fourth end of the logic control unit serves as the fourth end of the second driving module; a second end of the logic control unit is connected to the current input end of the third switch tube M3, and a third end of the logic control unit is connected to the current input end of the fourth switch tube M4;

[0020] An output unit, wherein the first input terminal and the second input terminal of the output unit are both connected to the logic control unit, and the output terminal of the output unit is connected to the control terminal of the second driving switch tube M2.

[0021] In one possible implementation, the output unit includes:

[0022] a first NAND gate A4, wherein a first input terminal of the first NAND gate A4 serves as a first input terminal of the output unit;

[0023] a second NAND gate A5, wherein the first input terminal of the second NAND gate A5 serves as the second input terminal of the output unit, the second input terminal of the second NAND gate A5 is connected to the first output terminal of the first NAND gate A4, and the output terminal of the second NAND gate A5 is connected to the second input terminal of the first NAND gate A4;

[0024] A fourth inverter A6 , wherein an input end of the fourth inverter A6 is connected to the output end of the second NAND gate A5 , and an output end of the fourth inverter A6 serves as an output end of the output unit.

[0025] In a possible implementation, the logic control unit includes a fifth switch tube M5, a sixth switch tube M6, a seventh switch tube M7 and a fifth inverter A7;

[0026] In the logic control unit, a power supply voltage VIN is connected to the current input terminal of the third switch tube M3 via the fifth switch tube M5 and the sixth switch tube M6 in sequence; the control terminal of the seventh switch tube M7 is connected to the control terminal of the fifth switch tube M5, the current input terminal of the seventh switch tube M7 is connected to the current output terminal of the fifth switch tube M5, and the current output terminal of the seventh switch tube M7 is connected to the control terminal of the sixth switch tube M6 and serves as the fourth terminal of the second driving module;

[0027] The input end of the fifth inverter A7 is connected to the current output end of the fifth switch tube M5 , and the output end of the fifth inverter A7 is connected to the first input end of the first NAND gate A4 .

[0028] In a possible implementation, the logic control unit further includes an eighth switch tube M8, a ninth switch tube M9, a tenth switch tube M10, and a sixth inverter A8;

[0029] In the logic control unit, the power supply voltage VIN is connected to the current input terminal of the fourth switch tube M4 via the eighth switch tube M8 and the ninth switch tube M9 in sequence; the control terminal of the tenth switch tube M10 is connected to the control terminal of the eighth switch tube M8, the current input terminal of the tenth switch tube M10 is connected to the current output terminal of the eighth switch tube M8, the current output terminal of the tenth switch tube M10 is connected to the control terminal of the ninth switch tube M9, and the current output terminal of the tenth switch tube M10 is also connected to the control terminal of the sixth switch tube M6;

[0030] The input end of the sixth inverter A8 is connected to the current output end of the eighth switch tube M8 , and the output end is connected to the first input end of the second NAND gate A5 .

[0031] In one possible implementation, the logic control unit further includes:

[0032] a seventh inverter A9, wherein an input end of the seventh inverter A9 is connected to the output end of the fifth inverter A7, and an output end of the seventh inverter A9 is connected to the control end of the eighth switch tube M8;

[0033] An eighth inverter A10 , wherein an input terminal of the eighth inverter A10 is connected to the output terminal of the sixth inverter A8 , and an output terminal of the eighth inverter A10 is connected to the control terminal of the fifth switch tube M5 .

[0034] In a possible implementation, the first NAND gate A4, the second NAND gate A5, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9 and the eighth inverter A10 are all connected to the power supply voltage VIN and the first reference voltage V1.

[0035] In one possible implementation, the voltage generating circuit includes a first resistor R1 and a second resistor R2; in the voltage generating circuit, a power supply voltage VIN is grounded through the first resistor R1 and the second resistor R2 in sequence; a first node A between the first resistor R1 and the second resistor R2 is connected to a first voltage reference terminal of the first inverter A1, and the first node A is connected to a first terminal of the first driving module and a fourth terminal of the second driving module, for outputting a first reference voltage V1 to the first driving module and the second driving module.

[0036] In a possible implementation, the resistance of the first resistor R1 and the second resistor R2 are both less than or equal to 1 KΩ.

[0037] In one possible implementation, when the first driving switch tube M1 is turned on and the second driving switch tube M2 is turned off, the voltage difference between the control terminal and the current output terminal of the first driving switch tube M1 is the first reference voltage V1, and the voltage difference between the control terminal and the current input terminal of the second driving switch tube M2 is 0;

[0038] In a possible implementation, when the first drive switch tube M1 is turned off and the second drive switch tube M2 is turned on, the voltage difference between the control terminal and the current output terminal of the first drive switch tube M1 is 0, and the voltage difference between the current input terminal and the control terminal of the second drive switch tube M2 is the difference between the power supply voltage VIN and the first reference voltage V1.

[0039] According to a second aspect of the present invention, a high-power switching power supply is provided, comprising a control chip and an external power circuit, wherein the control chip comprises the driving circuit of the high-power switching power supply as described above, and the external power circuit comprises an external high-power switching tube.

[0040] According to the present invention, a voltage generation circuit is provided to generate a first reference voltage V1 lower than the power supply voltage VIN. Based on this, the first and second driver modules are designed so that the voltage difference between the control terminal and the current output terminal of the first driver switch M1 is less than the power supply voltage VIN, and the voltage difference between the control terminal and the current input terminal of the second driver switch M2 is also less than the power supply voltage VIN. This technical solution significantly reduces the withstand voltage requirements for the first and second driver switches M1, M2. Therefore, switches with lower withstand voltages can be selected, thereby reducing device size and cost.

[0041] Furthermore, by designing the resistance of the first resistor R1 and the second resistor R2 to be less than or equal to 1 kΩ, the current flowing through the first resistor R1 and the second resistor R2 is ensured to be much greater than the operating current of the driver module during circuit operation, ensuring that the current flowing through the first resistor R1 and the second resistor R2 remains nearly constant. This design effectively ensures that the first reference voltage V1 remains stable throughout the entire operation process, preventing voltage fluctuations from affecting circuit performance.

[0042] The driving circuit of the high-power switching power supply of the present invention can input a relatively low-voltage first input signal S1 and output a relatively high-voltage driving signal OUT, so that the driving signal can smoothly drive an external high-power switching tube, thereby improving the reliability of the high-voltage driving signal and the power conversion efficiency.

[0043] In addition, by providing a control chip including the above-mentioned drive circuit in the high-power switching power supply, not only the size of the drive circuit is effectively reduced, but also the design of the entire power supply system is optimized, thereby significantly reducing the volume and cost of the high-power switching power supply.

[0044] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention and implement it according to the contents of the specification, the following is a detailed description of the preferred embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A structural block diagram of a driving circuit of a high-power switching power supply according to an embodiment of the present invention is shown;

[0046] Figure 2 FIG2 shows a topological structure diagram of a driving circuit of a high-power switching power supply according to another embodiment of the present invention;

[0047] Figure 3 An embodiment of the present invention is shown Figure 2 Voltage waveforms of some signals in the driving circuit;

[0048] Figure 4 FIG2 shows a topological structure diagram of a driving circuit of a high-power switching power supply according to another embodiment of the present invention;

[0049] Figure 5 A structural block diagram of a high-power switching power supply according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0050] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. It will be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0051] The terms "comprise," "comprising," and "having," and any variations thereof, as used herein, are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or apparatus comprising a series of steps or elements is not limited to the listed steps or elements, but may optionally include steps or elements not listed, or may optionally include other steps or elements inherent to the process, method, product, or apparatus.

[0052] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute a separate or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0053] Figure 1 FIG1 shows a structural block diagram of a driving circuit of a high-power switching power supply according to an embodiment of the present invention. Figure 1 As shown, the driving circuit of the high-power switching power supply includes a voltage generating circuit 100, a first driving module 200, a second driving module 300, a first driving switch M1, and a second driving switch M2. The input terminal of the voltage generating circuit 100 is connected to the power supply voltage VIN to generate a first reference voltage V1, which is lower than the power supply voltage VIN. The voltage generating circuit 100 is also grounded. The first terminal of the first driving module 200 is connected to the voltage generating circuit 100, the second terminal of the first driving module 200 is grounded, and the third terminal of the first driving module 200 is connected to the first input signal S1. The first driving module 200 is configured to generate a first driving signal based on the first reference voltage V1 and the voltage of the first input signal S1. The first terminal of the second driving module 300 is connected to the power supply voltage VIN, the second and third terminals of the second driving module 300 are both connected to the first driving module, and the fourth terminal of the second driving module 300 is connected to the first reference voltage V1. The second driving module 300 is configured to generate a second driving signal based on the first reference voltage V1 and the voltage of the first driving module 200. The control terminal of the first driver switch M1 is connected to the first driver module 200, and the current output terminal is grounded. The first driver switch M1 is configured to be turned on or off based on a first drive signal. The current input terminal of the second driver switch M2 is connected to the power supply voltage VIN, the current output terminal is connected to the current input terminal of the first driver switch M1, and the control terminal is connected to the second driver module 300. The second driver switch M2 is configured to be turned on or off based on a second drive signal. The output terminal OUT of the drive circuit of the high-power switching power supply is provided between the first driver switch M1 and the second driver switch M2. The first driver switch M1 and the second driver switch M2 are configured so that only one of them is turned on at a time. The voltage difference between the control terminal and the current output terminal of the first driver switch M1 is less than the power supply voltage VIN, and the voltage difference between the control terminal and the current input terminal of the second driver switch M2 is also less than the power supply voltage VIN.

[0054] According to the solution of the embodiment of the present invention, a voltage generation circuit is provided to generate a first reference voltage V1 lower than the power supply voltage VIN. Based on this, the first and second driver modules are designed so that the voltage difference between the control terminal and the current output terminal of the first driver switch M1 is less than the power supply voltage VIN, and the voltage difference between the control terminal and the current input terminal of the second driver switch M2 is also less than the power supply voltage VIN. The technical solution of the present invention significantly reduces the withstand voltage requirements for the first and second driver switches M1, M2, thereby allowing the selection of switches with lower withstand voltages, thereby reducing the size and cost of the device.

[0055] It should be explained that in conventional high-power switching power supply drive circuits, because external power switches need to withstand high voltages, those skilled in the art have long typically used drive switches with higher voltage resistance to ensure the output of highly reliable high-voltage drive signals. Against this backdrop, a technical bias has gradually developed, arguing that high-voltage drive switches must be used. However, the high-power switching power supply drive circuit proposed in this application utilizes a voltage generation circuit 100 to generate a first reference voltage V1 lower than the power supply voltage VIN, and constructs a drive module based on the first reference voltage V1. The first drive module 200 and the second drive module 300 cooperate with each other under the influence of the first reference voltage V1 to control the on and off states of the first drive switch M1 and the second drive switch M2, respectively. This ensures that the voltage difference between the control terminal and the current terminal of the first drive switch M1 and the second drive switch M2 is less than the power supply voltage VIN, allowing the drive module to select the low-voltage drive switch for operation. Through the above-mentioned collaborative working mechanism, the drive circuit ensures the output of high-reliability high-voltage drive signals while not relying on high-voltage drive switching devices. This breaks the technical prejudice of traditional design that relies on high-voltage drive devices, and achieves the optimization of the drive circuit structure and the reduction of system costs.

[0056] Figure 2 FIG. 1 shows a topological structure diagram of a driving circuit of a high-power switching power supply according to another embodiment of the present invention. Figure 2As shown, the first driver module 200 includes a first inverter A1, a second inverter A2, and a third inverter A3. The input terminal of the first inverter A1 serves as the third terminal of the first driver module 200, the first voltage reference terminal of the first inverter A1 serves as the first terminal of the first driver module 200, and the second voltage reference terminal of the first inverter A1 is grounded. The input terminal of the second inverter A2 is connected to the output terminal of the first inverter A1, the first voltage reference terminal of the second inverter A2 is connected to the first voltage reference terminal of the first inverter A1, and the second voltage reference terminal of the second inverter A2 is grounded. The input terminal of the third inverter A3 is connected to the output terminal of the second inverter A2, the first voltage reference terminal of the third inverter A3 is connected to the first voltage reference terminal of the first inverter A1, the second voltage reference terminal of the third inverter A3 is grounded, and the output terminal of the third inverter A3 is connected to the control terminal of the first driver switch M1.

[0057] In this embodiment, the operating principle of the first driver module 200 is as follows: after the circuit is powered on, the power supply voltage VIN is input to the voltage generation circuit 100, which then outputs a first reference voltage V1. This first reference voltage V1 is input to the first driver module 200 and serves as a high reference voltage for the first, second, and third inverters A1, A2, and A3 of the first driver module 200. Furthermore, the low reference voltages of the first, second, and third inverters A1, A2, and A3 are all ground. The input terminal of the first inverter A1, serving as the third terminal of the first driver module 200, is connected to the first input signal S1. When the voltage of the first input signal S1 is low, the first inverter A1 outputs a high level, causing the second inverter A2 to output a low level and the third inverter A3 to output a high level. At this point, the first driver switch M1 is turned on. When the voltage of the first input signal S1 is high, the first inverter A1 outputs a low level, so the second inverter A2 outputs a high level, and the third inverter A3 outputs a low level. At this time, the first driving switch tube M1 is turned off.

[0058] In one embodiment, when the voltage of the first input signal S1 is lower than When the voltage of the first input signal S1 is higher than When it is a high level, it is preferably the first reference voltage V1.

[0059] In one embodiment, reference Figure 2 The first driver module 200 further includes a third switch M3 and a fourth switch M4. The third switch M3 has a current input connected to the second driver module 300, a current output connected to ground, and a control connected to the output of the second inverter A2. The fourth switch M4 has a current input connected to the second driver module 300, a current output connected to ground, and a control connected to the output of the third inverter A3.

[0060] In this embodiment, as can be seen from the above embodiment, when the voltage of the first input signal S1 is at a low level, the third inverter A3 outputs a high level, thereby turning off the third switch M3 and turning on the fourth switch M4. When the voltage of the first input signal S1 is at a high level, the third inverter A3 outputs a low level, thereby turning on the third switch M3 and turning off the fourth switch M4.

[0061] In one embodiment, reference Figure 2 The second driver module 300 includes a logic control unit 310 and an output unit 320. The first end of the logic control unit 310 serves as the first end of the second driver module 300, the second end of the logic control unit 310 serves as the second end of the second driver module 300, the third end of the logic control unit 310 serves as the third end of the second driver module 300, and the fourth end of the logic control unit 310 serves as the fourth end of the second driver module 300. The second end of the logic control unit 310 is connected to the current input end of the third switch tube M3, and the third end of the logic control unit 310 is connected to the current input end of the fourth switch tube M4. The first and second input ends of the output unit 320 are both connected to the logic control unit 310, and the output end of the output unit 320 is connected to the control end of the second driver switch tube M2.

[0062] In one embodiment, reference Figure 2 The output unit 320 includes a first NAND gate A4, a second NAND gate A5, and a fourth inverter A6. The first input of the first NAND gate A4 serves as the first input of the output unit 320. The first input of the second NAND gate A5 serves as the second input of the output unit 320. The second input of the second NAND gate A5 is connected to the output of the first NAND gate A4, and the output of the second NAND gate A5 is connected to the second input of the first NAND gate A4. The input of the fourth inverter A6 is connected to the output of the second NAND gate A5, and the output of the fourth inverter A6 serves as the output of the output unit 320.

[0063] In one embodiment, the logic control unit 310 includes a fifth switch M5, a sixth switch M6, a seventh switch M7, and a fifth inverter A7. In the logic control unit 310, the power supply voltage VIN is connected to the current input terminal of the third switch M3 via the fifth switch M5 and the sixth switch M6. The control terminal of the seventh switch M7 is connected to the control terminal of the fifth switch M5, the current input terminal of the seventh switch M7 is connected to the current output terminal of the fifth switch M5, and the current output terminal of the seventh switch M7 is connected to the control terminal of the sixth switch M6 and serves as the fourth terminal of the second driver module 300. The input terminal of the fifth inverter A7 is connected to the current output terminal of the fifth switch M5, and the output terminal is connected to the first input terminal of the first NAND gate A4.

[0064] In one embodiment, the logic control unit 310 further includes an eighth switch M8, a ninth switch M9, a tenth switch M10, and a sixth inverter A8. In the logic control unit 310, the power supply voltage VIN is connected to the current input terminal of the fourth switch M4 via the eighth and ninth switches M8 and M9, respectively. The control terminal of the tenth switch M10 is connected to the control terminal of the eighth switch M8, the current input terminal of the tenth switch M10 is connected to the current output terminal of the eighth switch M8, the current output terminal of the tenth switch M10 is connected to the control terminal of the ninth switch M9, and the current output terminal of the tenth switch M10 is also connected to the control terminal of the sixth switch M6. The input terminal of the sixth inverter A8 is connected to the current output terminal of the eighth switch M8, and the output terminal is connected to the first input terminal of the second NAND gate A5.

[0065] In one embodiment, the logic control unit 310 further includes a seventh inverter A9 and an eighth inverter A10. The input of the seventh inverter A9 is connected to the output of the fifth inverter A7, and the output of the seventh inverter A9 is connected to the control terminal of the eighth switch M8. The input of the eighth inverter A10 is connected to the output of the sixth inverter A8, and the output of the eighth inverter A10 is connected to the control terminal of the fifth switch M5.

[0066] In one embodiment, the first NAND gate A4, the second NAND gate A5, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9, and the eighth inverter A10 are all connected to the power supply voltage VIN and the first reference voltage V1. The high reference voltage of the first NAND gate A4, the second NAND gate A5, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9, and the eighth inverter A10 is the power supply voltage VIN, and the low reference voltage is the first reference voltage V1.

[0067] In one embodiment, the sixth switch transistor M6 and the ninth switch transistor M9 are preferably PMOS switch transistors.

[0068] In the above embodiment, the operating principle of the high-power switching power supply drive circuit is as follows: the control terminals of the sixth and ninth switching transistors M6 and M9 are connected to a first reference voltage V1. When the current input terminal is connected to the power supply voltage VIN, the first reference voltage V1 serves as a low reference voltage for the sixth and ninth switching transistors M6 and M9. Analysis of the above embodiment indicates that when the voltage of the first input signal S1 is at a low level, the third switching transistor M3 is turned off and the fourth switching transistor M4 is turned on. At this point, the voltage at the current output terminal of the ninth switching transistor M9 is pulled low. Furthermore, the ninth switching transistor M9 operates in the saturation region, generating a current flowing from the current input terminal to the current output terminal in the sixth switching transistor M9. Consequently, the voltage at the current input terminal of the ninth switching transistor M9 is pulled low. Furthermore, the voltage at the control terminal of the ninth switching transistor M9 is the first reference voltage V1. Therefore, the voltage at the current input terminal of the ninth switching transistor M9 is clamped to VGS9 + V1, where VGS9 is the voltage difference between the control terminal and the current input terminal of the ninth switching transistor M9. Since the third switch tube M3 is in the off state, the sixth switch tube M6 is also in the off state. In addition, since the voltage difference VGS9 between the control terminal and the current input terminal of the ninth switch tube M9 is less than the flip threshold voltage of the sixth inverter A8 (preferably ), so for the sixth inverter A8, the voltage at the current input terminal of the ninth switch M9 is low. At this point, the sixth inverter A8 outputs a high level, and the eighth inverter A10 outputs a low level, turning on the fifth switch M5 and off the seventh switch M7. At this point, the voltage at the input terminal of the fifth inverter A7 is pulled high by the fifth switch M5. The fifth inverter A7 outputs a low level, and the seventh inverter A9 outputs a high level, turning off the eighth switch M8 and turning on the tenth switch M10. This ensures that the voltage at the input terminal of the sixth inverter A8 is low, and the sixth inverter A8 outputs a high level. At this point, the first input terminal of the first NAND gate A4 is connected to the output terminal of the fifth inverter A7. Since the fifth inverter A7 outputs a low level, the first NAND gate A4 must output a high level to the second input terminal of the second NAND gate A5. Because the first input terminal of the second NAND gate A5 is connected to the output terminal of the sixth inverter A8, the voltage at the first input terminal of the second NAND gate A5 is at a high level. Therefore, both input terminals of the second NAND gate A5 are at a high level. The second NAND gate A5 outputs a low level, and the fourth inverter A6 outputs a high level, so that the second driving switch tube M2 is turned off.

[0069] According to the above analysis, when the first input signal S1 is at a low level, the first driver switch M1 is turned on and the second driver switch M2 is turned off. The drive voltage OUT output by the driver circuit of the high-power switching power supply is pulled to ground through the first driver switch M1. At this time, since the high reference voltage of the third inverter A3 is the first reference voltage V1, the voltage at the control terminal of the first driver switch M1 when it is turned on is the first reference voltage V1. The voltage difference between the control terminal and the current output terminal of the first driver switch M1 is the first reference voltage V1. Furthermore, since the high reference voltage of the fourth inverter A6 is the power supply voltage VIN, the voltage at the control terminal of the second driver switch M2 when it is turned off is the power supply voltage VIN. The voltage difference between the control terminal and the current input terminal of the second driver switch M2 is zero. In summary, when the first input signal S1 is at a low level, the voltage difference between the control terminal and the current output terminal of the first driving switch tube M1 and the voltage difference between the control terminal and the current input terminal of the second driving switch tube M2 are both much smaller than the power supply voltage VIN, thereby effectively reducing the withstand voltage requirements of the first driving switch tube M1 and the second driving switch tube M2, and reducing their size and cost.

[0070] When the voltage of the first input signal S1 is at a high level, the third switch tube M3 is turned on and the fourth switch tube M4 is turned off. At this time, the voltage at the current output terminal of the sixth switch tube M6 is pulled down, and the sixth switch tube M6 operates in the saturation region. A current is generated in the sixth switch tube M6 that flows from the current input terminal to the current output terminal. Therefore, the voltage at the current input terminal of the sixth switch tube M6 is pulled down. In addition, the voltage at the control terminal of the sixth switch tube M6 is the first reference voltage V1. Therefore, the voltage at the current input terminal of the sixth switch tube M6 is clamped at VGS6+ V1, where VGS6 is the voltage difference between the control terminal and the current input terminal of the sixth switch tube M6. Since the fourth switch tube M4 is in the off state, the ninth switch tube M9 is also in the off state. In addition, since the voltage difference VGS6 between the control terminal and the current input terminal of the sixth switch tube M6 is less than the flip threshold voltage (preferably VGS6) of the fifth inverter A7, ), so for the fifth inverter A7, the voltage at the current input terminal of the sixth switch M6 is low. At this time, the fifth inverter A7 outputs a high level, and the seventh inverter A9 outputs a low level, turning on the eighth switch M8 and turning off the tenth switch M10. At this time, the voltage at the input terminal of the sixth inverter A8 is pulled high by the eighth switch M8. The sixth inverter A8 outputs a low level, and the voltage at the first input terminal of the second NAND gate A5 is low. The second NAND gate A5 must output a high level. Therefore, the fourth inverter A6 outputs a low level, turning on the second drive switch M2. Simultaneously, the eighth inverter A10 outputs a high level, turning on the seventh switch M7, ensuring that the voltage at the input terminal of the fifth inverter A7 is low.

[0071] According to the above analysis, when the first input signal S1 is at a high level, the first driver switch M1 is turned off and the second driver switch M2 is turned on. The drive voltage OUT output by the driver circuit of the high-power switching power supply is then pulled to the power supply voltage VIN via the second driver switch M2. At this time, since the low reference voltage of the fourth inverter A6 is the first reference voltage V1, the voltage at the control terminal of the second driver switch M2 when it is turned on is the first reference voltage V1. The voltage difference between the current input terminal and the control terminal of the second driver switch M2 is VIN-V1. Furthermore, since the low reference voltage of the third inverter A3 is ground, the voltage at the control terminal of the first driver switch M1 when it is turned off is ground, resulting in a voltage difference between the control terminal and the current output terminal of the first driver switch M1 of zero. In summary, when the first input signal S1 is at a high level, the voltage difference between the control terminal and the current output terminal of the first driving switch tube M1 and the voltage difference between the control terminal and the current input terminal of the second driving switch tube M2 are both much smaller than the power supply voltage VIN, thereby effectively reducing the withstand voltage requirements of the first driving switch tube M1 and the second driving switch tube M2, and reducing their size and cost.

[0072] According to the above analysis, when the first input signal S1 is at a low level, the gate-source voltage difference of the first driver switch M1 is V1, and the gate-source voltage difference of the second driver switch M2 is 0. When the first input signal S1 is at a high level, the gate-source voltage difference of the first driver switch M1 is 0, and the gate-source voltage difference of the second driver switch M2 is VIN-V1. It should be noted that in actual circuit applications, due to factors such as device process differences, power supply ripple, and circuit parasitic parameters, the above-mentioned gate-source voltage difference between the first driver switch M1 and the second driver switch M2 may vary to a certain extent. Therefore, it should be understood as an approximation, rather than a strictly constant ideal value.

[0073] Figure 3 An embodiment of the present invention is shown Figure 2 The voltage waveform of some signals in the driving circuit. Figure 3 As shown, the driving circuit of the high-power switching power supply of the present invention can input a relatively low-voltage first input signal S1 and output a relatively high-voltage driving signal OUT, so that the driving signal OUT can smoothly drive an external high-power switching tube, thereby improving the reliability of the high-voltage driving signal and the power conversion efficiency.

[0074] Figure 4 FIG. 1 shows a topological structure diagram of a driving circuit of a high-power switching power supply according to another embodiment of the present invention. Figure 4As shown, the voltage generating circuit 100 includes a first resistor R1 and a second resistor R2. In the voltage generating circuit 100, the power supply voltage VIN is grounded in sequence through the first resistor R1 and the second resistor R2. A first node A between the first resistor R1 and the second resistor R2 is connected to the first voltage reference terminal of the first inverter A1, the second inverter A2, and the third inverter A3. The first node A is also connected to the control terminal of the sixth switch tube M6 and the current output terminal of the seventh switch tube M7. The first node A is also connected to the control terminal of the ninth switch tube M9 and the current output terminal of the tenth switch tube M10. The first node A is also connected to the first NAND gate A4, The second voltage reference terminal of the second NAND gate A5, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9, and the eighth inverter A10 is used to output a first reference voltage V1 to the first inverter A1, the second inverter A2, the third inverter A3, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9, the eighth inverter A10, the first NAND gate A4, the second NAND gate A5, the sixth switch M6, the seventh switch M7, the ninth switch M9, and the tenth switch M10. In this embodiment, the power supply voltage VIN is divided by the first resistor R1 and the second resistor R2 to obtain the first reference voltage V1. The voltage at point A, the connection point between the first resistor R1 and the second resistor R2, is the first reference voltage V1.

[0075] In one embodiment, the resistance of the first resistor R1 and the second resistor R2 are both less than or equal to 1KΩ. At this time, the voltage-dividing current formed by the first resistor R1 and the second resistor R2 in series is at least , and the static current and the steady-state current of the first driving module 200 and the second driving module 300 are much smaller than , it can be ensured that no matter whether the first driving module 200 and the second driving module 300 are working, the current flowing through the first resistor R1 and the second resistor R2 remains almost unchanged, thereby ensuring that the first reference voltage V1 is always a fixed value.

[0076] Figure 5 FIG1 shows a structural block diagram of a high-power switching power supply according to an embodiment of the present invention. Figure 5 The high-power switching power supply includes a control chip and an external power circuit. The control chip includes the aforementioned high-power switching power supply drive circuit, and the external power circuit includes an external high-power switching transistor. By incorporating the control chip including the aforementioned drive circuit into the high-power switching power supply, not only is the size of the drive circuit effectively reduced, but the design of the entire power supply system is also optimized, thereby significantly reducing the size and cost of the high-power switching power supply.

[0077] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0078] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A driving circuit for a high-power switching power supply, characterized in that: include: A voltage generating circuit, having an input terminal connected to a power supply voltage VIN, for generating a first reference voltage V1, wherein the first reference voltage V1 is lower than the power supply voltage VIN; a first driving module, wherein a first terminal of the first driving module is connected to the first reference voltage V1, a second terminal of the first driving module is grounded, and a third terminal of the first driving module is connected to the first input signal S1, and is configured to generate a first driving signal according to the first reference voltage V1 and the voltage of the first input signal S1; a second driving module, wherein a first terminal of the second driving module is connected to a power supply voltage VIN, a second terminal and a third terminal of the second driving module are both connected to the first driving module, and a fourth terminal of the second driving module is connected to the first reference voltage V1, and is configured to generate a second driving signal according to the first driving module and the first reference voltage V1; A first driving switch tube M1, having a control terminal connected to the first driving module and a current output terminal grounded, and configured to be turned on or off based on the first driving signal; The second driving switch tube M2 has a current input terminal connected to the power supply voltage VIN, a current output terminal connected to the current input terminal of the first driving switch tube M1, and a control terminal connected to the second driving module, and is configured to be turned on or off based on the second driving signal; The output terminal OUT of the driving circuit of the high-power switching power supply is arranged between the first driving switch tube M1 and the second driving switch tube M2; the first driving switch tube M1 and the second driving switch tube M2 are arranged so that only one of them is turned on, and the voltage difference between the control terminal and the current output terminal of the first driving switch tube M1 is less than the power supply voltage VIN, and the voltage difference between the control terminal and the current input terminal of the second driving switch tube M2 is less than the power supply voltage VIN.

2. The driving circuit according to claim 1, wherein: The first driving module includes: A first inverter A1, whose input terminal serves as the third terminal of the first driving module, whose first voltage reference terminal serves as the first terminal of the first driving module, and whose second voltage reference terminal is grounded; a second inverter A2, having an input terminal connected to the output terminal of the first inverter A1, a first voltage reference terminal of the second inverter A2 connected to the first voltage reference terminal of the first inverter A1, and a second voltage reference terminal of the second inverter A2 grounded; The third inverter A3 has an input end connected to the output end of the second inverter A2, a first voltage reference end of the third inverter A3 connected to the first voltage reference end of the first inverter A1, a second voltage reference end of the third inverter A3 is grounded, and an output end is connected to the control end of the first driving switch tube M1.

3. The driving circuit according to claim 2, wherein: The first driving module further includes: A third switch tube M3, having a current input terminal connected to the second driving module, a current output terminal connected to ground, and a control terminal connected to the output terminal of the second inverter A2; The fourth switch tube M4 has a current input terminal connected to the second driving module, a current output terminal connected to the ground, and a control terminal connected to the output terminal of the third inverter A3.

4. The driving circuit according to claim 3, wherein: The second driving module includes: a logic control unit, wherein a first end of the logic control unit serves as the first end of the second driving module, a second end of the logic control unit serves as the second end of the second driving module, a third end of the logic control unit serves as the third end of the second driving module, and a fourth end of the logic control unit serves as the fourth end of the second driving module; a second end of the logic control unit is connected to the current input end of the third switch tube M3, and a third end of the logic control unit is connected to the current input end of the fourth switch tube M4; An output unit, wherein the first input terminal and the second input terminal of the output unit are both connected to the logic control unit, and the output terminal of the output unit is connected to the control terminal of the second driving switch tube M2.

5. The driving circuit according to claim 4, wherein: The output unit includes: a first NAND gate A4, wherein a first input terminal of the first NAND gate A4 serves as a first input terminal of the output unit; a second NAND gate A5, wherein the first input terminal of the second NAND gate A5 serves as the second input terminal of the output unit, the second input terminal of the second NAND gate A5 is connected to the output terminal of the first NAND gate A4, and the output terminal of the second NAND gate A5 is connected to the second input terminal of the first NAND gate A4; A fourth inverter A6 , wherein an input end of the fourth inverter A6 is connected to the output end of the second NAND gate A5 , and an output end of the fourth inverter A6 serves as an output end of the output unit.

6. The driving circuit according to claim 5, wherein: The logic control unit includes a fifth switch tube M5, a sixth switch tube M6, a seventh switch tube M7 and a fifth inverter A7; In the logic control unit, a power supply voltage VIN is connected to the current input terminal of the third switch tube M3 via the fifth switch tube M5 and the sixth switch tube M6 in sequence; the control terminal of the seventh switch tube M7 is connected to the control terminal of the fifth switch tube M5, the current input terminal of the seventh switch tube M7 is connected to the current output terminal of the fifth switch tube M5, and the current output terminal of the seventh switch tube M7 is connected to the control terminal of the sixth switch tube M6 and serves as the fourth terminal of the second driving module; The input end of the fifth inverter A7 is connected to the current output end of the fifth switch tube M5 , and the output end of the fifth inverter A7 is connected to the first input end of the first NAND gate A4 .

7. The driving circuit according to claim 6, wherein: The logic control unit further includes an eighth switch tube M8, a ninth switch tube M9, a tenth switch tube M10 and a sixth inverter A8; In the logic control unit, the power supply voltage VIN is connected to the current input terminal of the fourth switch tube M4 via the eighth switch tube M8 and the ninth switch tube M9 in sequence; the control terminal of the tenth switch tube M10 is connected to the control terminal of the eighth switch tube M8, the current input terminal of the tenth switch tube M10 is connected to the current output terminal of the eighth switch tube M8, the current output terminal of the tenth switch tube M10 is connected to the control terminal of the ninth switch tube M9, and the current output terminal of the tenth switch tube M10 is also connected to the control terminal of the sixth switch tube M6; The input end of the sixth inverter A8 is connected to the current output end of the eighth switch tube M8 , and the output end is connected to the first input end of the second NAND gate A5 .

8. The driving circuit according to claim 7, wherein: The logic control unit also includes: a seventh inverter A9, wherein an input end of the seventh inverter A9 is connected to the output end of the fifth inverter A7, and an output end of the seventh inverter A9 is connected to the control end of the eighth switch tube M8; An eighth inverter A10 , wherein an input terminal of the eighth inverter A10 is connected to the output terminal of the sixth inverter A8 , and an output terminal of the eighth inverter A10 is connected to the control terminal of the fifth switch tube M5 .

9. The driving circuit according to claim 8, wherein: The first voltage reference terminal and the second voltage reference terminal of the first NAND gate A4, the second NAND gate A5, the fourth inverter A6, the fifth inverter A7, the sixth inverter A8, the seventh inverter A9 and the eighth inverter A10 are respectively connected to the power supply voltage VIN and the first reference voltage V1.

10. The driving circuit according to claim 1, wherein: The voltage generating circuit includes a first resistor R1 and a second resistor R2. In the voltage generating circuit, a power supply voltage VIN is connected to ground via the first resistor R1 and the second resistor R2 in sequence. A first node A between the first resistor R1 and the second resistor R2 is connected to a first terminal of the first driving module and a fourth terminal of the second driving module, for outputting a first reference voltage V1 to the first driving module and the second driving module.

11. The driving circuit according to claim 10, wherein: The resistance of the first resistor R1 and the second resistor R2 are both less than or equal to 1KΩ.

12. The driving circuit according to any one of claims 1 to 11, characterized in that: When the first drive switch tube M1 is turned on and the second drive switch tube M2 is turned off, the voltage difference between the control terminal and the current output terminal of the first drive switch tube M1 is the first reference voltage V1, and the voltage difference between the control terminal and the current input terminal of the second drive switch tube M2 is 0.

13. The driving circuit according to any one of claims 1 to 11, characterized in that: When the first drive switch tube M1 is turned off and the second drive switch tube M2 is turned on, the voltage difference between the control terminal and the current output terminal of the first drive switch tube M1 is 0, and the voltage difference between the current input terminal and the control terminal of the second drive switch tube M2 is the difference between the power supply voltage VIN and the first reference voltage V1.

14. A high-power switching power supply, comprising a control chip and an external power circuit, wherein the control chip comprises the driving circuit of the high-power switching power supply according to any one of claims 1 to 13, and the external power circuit comprises an external high-power switching tube.

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