Device provided with piezoelectric element, laminated substrate, and method for manufacturing device

Abstract

The invention provides a device provided with a piezoelectric element, a laminated substrate, and a method for manufacturing the device. [Problem] To provide a device in which a semiconductor element and a piezoelectric element having a piezoelectric film comprising an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen are formed on the same substrate. [Solution] The piezoelectric device is provided with a semiconductor element and a piezoelectric element, the semiconductor element and the piezoelectric element being formed on the same substrate, and the piezoelectric element having a piezoelectric film comprising an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen.

Description

Technical Field

[0001] The present application relates to a device including a piezoelectric element, a laminated substrate, and a method for manufacturing the device. Background Art

[0002] Piezoelectric bodies are widely used in functional electronic components such as sensors and actuators. As materials for piezoelectric bodies, lead-based materials, particularly PZT-based ferroelectrics represented by the compositional formula Pb(Zr 1-x Ti x )O3, are widely used. Since PZT-based piezoelectric bodies contain lead, they are not preferred from the perspective of anti-pollution and the like. Therefore, as lead-free piezoelectric materials, piezoelectric materials containing potassium, sodium, niobium, and oxygen have been proposed, and piezoelectric elements having a piezoelectric film formed of such a piezoelectric material (hereinafter referred to as a KNN film) have been proposed (for example, refer to Patent Documents 1 and 2).

[0003] Prior Art Documents

[0004] Patent Documents

[0005] Patent Document 1: Japanese Patent Application Laid-Open No. 2007-184513

[0006] Patent Document 2: Japanese Patent Application Laid-Open No. 2008-159807 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] For example, it is sometimes required to form a piezoelectric element having the above-described KNN film on a substrate on which a semiconductor element is formed. At this time, it is sometimes required to reduce the thermal history with respect to the semiconductor element. Therefore, when forming a KNN film on a substrate on which a semiconductor element is formed, it is sometimes required to form the KNN film at a low temperature. However, if the KNN film is formed at a low temperature, the piezoelectric characteristics sometimes deteriorate. Therefore, it is sometimes difficult to form a piezoelectric element having a KNN film on a substrate on which a semiconductor element is formed.

[0009] An object of the present application is to provide a device in which a semiconductor element and a piezoelectric element having a KNN film are formed on the same substrate.

[0010] Means for Solving the Problems

[0011] According to one aspect of the present application,

[0012] there is provided a device or a laminated substrate including a semiconductor element and a piezoelectric element, the piezoelectric element having a piezoelectric film formed of an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen,

[0013] wherein the semiconductor element and the piezoelectric element are formed on the same substrate.

[0014] According to another aspect of the present application, there is provided a method for manufacturing a device, comprising:

[0015] a step of preparing a substrate on which a semiconductor element is formed; and

[0016] a step of forming a piezoelectric element on the substrate,

[0017] wherein the step of forming the piezoelectric element includes a step of forming a piezoelectric film made of an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen on the substrate under the conditions that the film formation temperature is 400 °C or higher and lower than 500 °C, the oxygen partial pressure is 0.0025 Pa or higher and less than 0.01 Pa, and the atmosphere pressure is 0.03 Pa or higher and less than 0.1 Pa.

[0018] Effects of the Invention

[0019] According to the present application, a device in which a semiconductor element and a piezoelectric element having a KNN film are formed on the same substrate can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a diagram showing an example of a cross-sectional structure of the device according to one aspect of the present application.

[0021] Figure 2 is a diagram showing an example of a cross-sectional structure of the piezoelectric laminate according to one aspect of the present application.

[0022] Figure 3 is a diagram showing a modified example of a cross-sectional structure of the device according to one aspect of the present application.

[0023] DESCRIPTION OF REFERENCE NUMERALS

[0024] 1 Substrate

[0025] 2 Lower electrode film

[0026] 3 Piezoelectric film (KNN film)

[0027] 4 Upper electrode film

[0028] 6 Lower adhesion layer

[0029] 7 Upper adhesion layer

[0030] 8 Insulating film

[0031] 9a, 9b Metal wiring

[0032] 10 Laminate

[0033] 20 Piezoelectric element

[0034] 30 Semiconductor element

[0035] 100 (Device with a piezoelectric film) Detailed implementation manner

[0036] <One aspect of the present application>

[0037] Hereinafter, one aspect of the present application will be described with reference to the accompanying drawings.

[0038] (1) Structure of the device with a piezoelectric element

[0039] Figure 1 FIG. shows a schematic configuration diagram of a device 100 with a piezoelectric element according to this aspect. The device 100 includes a semiconductor element 30 and a piezoelectric element (an element with a piezoelectric film) 20. In addition, in the device 100, the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1.

[0040] The device 100 is obtained by processing a laminated substrate with a piezoelectric film (a laminated body with a piezoelectric film (piezoelectric laminated body)) 10 (hereinafter also referred to as the laminated body 10). Figure 2 FIG. shows a schematic configuration diagram of the laminated body 10 according to this aspect. As Figure 2 shown, the laminated body 10 includes: a substrate 1, a lower electrode film 2 formed by film deposition on the substrate 1, a piezoelectric film (piezoelectric thin film) 3 formed by film deposition on the lower electrode film 2, and an upper electrode film 4 formed by film deposition on the piezoelectric film 3. It should be noted that the film obtained by "film deposition" in the present application is a film directly deposited on the substrate 1 and does not include a film bonded (joined) to the substrate 1.

[0041] As the substrate 1, for example, a p-type single crystal silicon (Si) substrate 1a can be used. The thickness of the substrate 1 can be set to, for example, 300 μm or more and 1000 μm or less.

[0042] A semiconductor element 30 is formed on either one of the two main surfaces of the substrate 1. The semiconductor element 30 has, for example, a CMOS (Complementary Metal Oxide Semiconductor) structure including a p-type MOSFET 31 and an n-type MOSFET 32 that function complementarily. The p-type MOSFET 31 includes: an n-well 311 formed in the substrate 1; a p-type source region 312 and a p-type drain region 313 separately provided from each other within the n-well 311; a gate insulating film 314; a gate electrode 315 formed on the gate insulating film 314; a source electrode 316 electrically connected to the p-type source region 312; and a drain electrode 317 electrically connected to the p-type drain region 313. In addition, the n-type MOSFET 32 includes: an n-type source region 321 and an n-type drain region 322 separately provided from each other on the substrate 1; a gate insulating film 323; a gate electrode 324 formed on the gate insulating film 323; a source electrode 325 electrically connected to the n-type source region 321; and a drain electrode 326 electrically connected to the n-type drain region 322. The n-well 311, the n-type source region 321, and the n-type drain region 322 are regions formed on either one of the two main surfaces of the substrate 1 by thermal diffusion of an n-type dopant or the like. The p-type source region 312 and the p-type drain region 313 are regions formed on the surface of the n-well 311 by thermal diffusion of a p-type dopant or the like.

[0043] The substrate 1 may further be formed with a protective film 33 such as an oxide film or a nitride film that protects the semiconductor element 30. It can be considered that the protective film 33 is included within the semiconductor element 30.

[0044] Among the surfaces of the substrate 1 on which the semiconductor element 30 is formed (hereinafter also referred to as "the upper surface of the substrate 1"), a surface oxide film (SiO2 film) 1b such as a thermal oxide film or a CVD (Chemical Vapor Deposition) oxide film may be formed on the portions other than the formation site of the semiconductor element 30. That is, the substrate 1 may be a p-type single crystal Si substrate 1a having the surface oxide film 1b. The thickness of the surface oxide film 1b can be set, for example, to be 1 nm or more and 4000 nm or less. The substrate 1 may have an insulating film formed of an insulating material other than SiO2 instead of the surface oxide film 1b. In addition, the substrate 1 may not have the surface oxide film 1b or the insulating film.

[0045] The lower electrode film 2 is formed at a position on the upper surface of the substrate 1 different from the formation site of the semiconductor element 30 (when the substrate 1 has a surface oxide film 1b or an insulating film, etc., it is formed on the surface oxide film 1b or the insulating film). The lower electrode film 2 can be formed, for example, using platinum (Pt). The lower electrode film 2 is a polycrystalline film. Hereinafter, the polycrystalline film obtained by using Pt film formation will also be referred to as a Pt film. It is preferred that the (111) plane of the Pt film is parallel to the main plane of the substrate 1 (including the case where the (111) plane is inclined at an angle of within ±5° with respect to the main plane of the substrate 1), that is, it is preferred that the Pt film is oriented in the (111) plane orientation. The Pt film being oriented in the (111) plane orientation means that in the X-ray diffraction pattern obtained by X-ray diffraction (XRD) measured on the surface of the piezoelectric film 3, no peaks other than the peak derived from the (111) plane are observed. In this way, the main plane of the lower electrode film 2 (the plane that becomes the base of the piezoelectric film 3) is preferably composed of the Pt(111) plane. The lower electrode film 2 can be formed by methods such as sputtering or evaporation. As the material of the lower electrode film 2, in addition to Pt, various metals such as gold (Au), ruthenium (Ru), or iridium (Ir), alloys having them as the main component, metal oxides such as strontium ruthenate (SrRuO3, abbreviated: SRO) or lanthanum nickelate (LaNiO3, abbreviated: LNO), etc. can also be used to form it. It should be noted that when forming the lower electrode film 2 using a metal oxide, the crystal constituting the lower electrode film 2 preferably has a preferential orientation in the (001) plane orientation with respect to the surface of the substrate 1. The lower electrode film 2 can be a single-layer film formed using the above various metals, alloys having the above various metals as the main component, or metal oxides, etc. The lower electrode film 2 can be a laminate of a Pt film and a film having SRO as the main component provided on the Pt film, a laminate of a Pt film and a film having LNO as the main component provided on the Pt film, etc. The thickness of the lower electrode film 2 (when the lower electrode film 2 is a laminate, it is the total thickness of each layer) can be set, for example, to be 100 nm or more and 400 nm or less.

[0046] Between the substrate 1 and the lower electrode film 2, an adhesion layer 6 may be provided to improve their adhesion. The adhesion layer 6 may be, for example, a layer containing zinc (Zn) and oxygen (O) as main components (hereinafter also referred to as "ZnO layer"). The ZnO layer can be formed using zinc oxide, for example. The composition ratio of Zn to O constituting the ZnO layer preferably satisfies the relationship of Zn:O = 1:1, but is not limited thereto, and there may be some deviation. The ZnO layer is a polycrystalline layer. The (0001) plane of the ZnO layer is preferably parallel to the main plane of the substrate 1 (including the case where the (0001) plane is inclined at an angle of ±5° or less with respect to the main plane of the substrate 1), that is, the ZnO layer is preferably oriented in the (0001) plane orientation. The ZnO layer being oriented in the (0001) plane orientation means that in the X-ray diffraction pattern obtained by XRD measured on the surface of the piezoelectric film 3, the intensity of the peak derived from the (0002) plane is high. Thus, the main plane of the ZnO layer (the plane that becomes the base of the lower electrode film 2) is preferably composed of the ZnO (0001) plane. The ZnO layer can be formed by methods such as sputtering and evaporation. The thickness of the ZnO layer can be set, for example, to 1 nm or more and 200 nm or less, preferably 10 nm or more and 50 nm or less. As the adhesion layer 6, for example, a layer containing titanium (Ti), tantalum (Ta), titanium oxide (TiO2), nickel (Ni), ruthenium oxide (RuO2), iridium oxide (IrO2), etc. as main components can be provided. Such an adhesion layer 6 can also be formed by methods such as sputtering and evaporation. The thickness of the adhesion layer 6 can be set, for example, to 1 nm or more and 200 nm or less, preferably 10 nm or more and 50 nm or less. In this specification, the adhesion layer 6 provided between the substrate 1 and the lower electrode film 2 is sometimes referred to as the lower adhesion layer 6.

[0047] The piezoelectric film 3 is a film formed of an alkali metal niobium oxide containing, for example, potassium (K), sodium (Na), niobium (Nb), and oxygen (O). That is, the piezoelectric film 3 is a film having an alkali metal niobium oxide containing K, Na, Nb, and O as main components. The piezoelectric film 3 can be formed using the alkali metal niobium oxide represented by the composition formula (K 1-x Na x )NbO3, that is, potassium sodium niobate (KNN). The coefficient x [= Na / (K + Na)] in the above composition formula can be set in the range of 0 < x < 1, preferably 0.4 ≤ x ≤ 0.8. The piezoelectric film 3 becomes a polycrystalline film of KNN (hereinafter also referred to as KNN film 3). In addition, the crystal structure of KNN exhibits a perovskite structure. That is, the KNN film 3 has a perovskite structure. In addition, it is preferable that more than half of the crystals in the crystal group constituting the KNN film 3 have a columnar structure. It should be noted that in this specification, the crystal system of KNN is regarded as a tetragonal system. The KNN film 3 can be formed by sputtering. The thickness of the KNN film 3 can be set, for example, to 0.5 μm or more and 5 μm or less, preferably 1 μm or more and 3 μm or less.

[0048] The crystals constituting the KNN film 3 are preferentially oriented in the (001) plane orientation with respect to the main surface of the substrate 1 (when the substrate 1 is, for example, a Si substrate 1a having a surface oxide film 1b or an insulating film, etc., with respect to the Si substrate 1a). That is, the main surface of the KNN film 3 (the surface that becomes the base of the upper electrode film 4) is mainly composed of the KNN (001) plane. For example, by directly forming the KNN film 3 on a Pt film (lower electrode film 2) whose main surface is mainly composed of the Pt (111) plane, a KNN film 3 whose main surface is mainly composed of the KNN (001) plane can be obtained. It should be noted that in this specification, the crystals constituting the KNN film 3 being oriented in the (001) plane orientation means that the (001) plane of the crystals constituting the KNN film 3 is parallel or substantially parallel to the main surface of the substrate 1. In addition, the crystals constituting the KNN film 3 being preferentially oriented in the (001) plane orientation means that there are many crystals whose (001) plane is parallel or substantially parallel to the main surface of the substrate 1.

[0049] In addition, the alkali metal niobium oxide constituting the KNN film 3 may further contain at least one element (dopant) selected from the group consisting of lithium (Li), magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), bismuth (Bi), antimony (Sb), vanadium (V), indium (In), tantalum (Ta), molybdenum (Mo), tungsten (W), chromium (Cr), Ti, zirconium (Zr), hafnium (Hf), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu), copper (Cu), zinc (Zn), silver (Ag), manganese (Mn), iron (Fe), cobalt (Co), Ni, aluminum (Al), Si, germanium (Ge), tin (Sn), and gallium (Ga). The concentration of these elements in the alkali metal niobium oxide can be set, for example, to 5 at% or less (when multiple of the above elements are contained, the total concentration is 5 at% or less).

[0050] The upper electrode film 4 has various metals such as Pt, Au, Al, Cu or their alloys as the main components. The upper electrode film 4 can be formed by methods such as sputtering, evaporation, plating, and metal paste methods. The upper electrode film 4 does not significantly affect the crystal structure of the KNN film 3 like the lower electrode film 2 does. Therefore, the material, crystal structure, and film formation method of the upper electrode film 4 are not particularly limited. It should be noted that between the KNN film 3 and the upper electrode film 4, in order to improve their adhesion, an adhesion layer 7 having, for example, RuO2, IrO2, Ti, Ta, TiO2, Ni, etc. as the main components can be provided. The thickness of the upper electrode film 4 can be set, for example, to 50 nm or more and 5000 nm or less, preferably 50 nm or more and 300 nm or less. In the case where the adhesion layer 7 is provided, the thickness of the adhesion layer 7 can be set, for example, to 1 nm or more and 200 nm or less, preferably 5 nm or more and 50 nm or less. In this specification, the adhesion layer 7 provided between the KNN film 3 and the upper electrode film 4 is sometimes referred to as the upper adhesion layer 7.

[0051] As described above, the device 100 including the semiconductor element 30 and the piezoelectric element 20 can be obtained by processing the laminate 10. As Figure 1 shown, the piezoelectric element 20 includes a lower electrode film 2, a KNN film 3, and an upper electrode film 4. It should be noted that the substrate 1 can be considered to be included in the piezoelectric element 20. In addition, as described above, the lower electrode film 2 is formed at a position different from the formation position of the semiconductor element 30 in the surface of the substrate 1 on which the semiconductor element 30 is formed. As a result, the piezoelectric element 20 is formed at a position different from the formation position of the semiconductor element 30 in the surface of the substrate 1 on which the semiconductor element 30 is formed.

[0052] In addition, the piezoelectric element 20 further includes an insulating film 8 and metal wirings 9a, 9b.

[0053] The metal wiring 9a is provided so as to be connected (in contact) with the lower electrode film 2 and not connected (not in contact) with the upper electrode film 4. In addition, the metal wiring 9b is provided so as to be connected with the upper electrode film 4 and not connected with the lower electrode film 2. The metal wirings 9a, 9b can be formed using various metals such as Au, Al, Ti, Cr, etc., or alloys having these various metals as the main components. The metal wirings 9a, 9b can be single-layer films or laminated bodies having multiple layers laminated. The metal wirings 9a, 9b can be formed by methods such as sputtering, evaporation, plating, and metal paste methods.

[0054] The insulating film 8 is provided in such a manner as to insulate the metal wiring 9b from the lower electrode film 2. The insulating film 8 is provided, for example, from the upper electrode film 4 to the substrate 1 so as to cover a part of the side surface of the KNN film 3. The insulating film 8 can be formed using oxides such as silicon oxide (SiO2), aluminum oxide (Al2O3), tantalum oxide (Ta2O5), etc. The insulating film 8 can be a single-layer film or a laminate in which a plurality of layers are stacked. The insulating film 8 can be formed by a method such as CVD method or sputtering method.

[0055] In the device 100, the piezoelectric element 20 and the semiconductor element 30 are electrically connected by means of the metal wirings 9a and 9b, and the piezoelectric element 20 is controlled by the semiconductor element 30.

[0056] For example, when the piezoelectric element 20 functions as an actuator, the (deformation) operation of the piezoelectric element 20 is controlled by the semiconductor element 30. Specifically, a voltage is applied between the lower electrode film 2 and the upper electrode film 4 by the semiconductor element 30, and the KNN film 3 included in the piezoelectric element 20 can be deformed. By the deformation operation of the piezoelectric element 20 (KNN film 3), various members connected to the device 100 can be operated. In this case, examples of the use of the device 100 include a nozzle for an inkjet printer, a MEMS mirror for a scanner, an oscillator for an ultrasonic generating device, etc.

[0057] In addition, for example, when the piezoelectric element 20 functions as a sensor, the signal detected by the piezoelectric element 20 is processed by the semiconductor element 30. For example, if the KNN film 3 included in the piezoelectric element 20 is deformed as a certain physical quantity changes, a voltage is generated between the lower electrode film 2 and the upper electrode film 4 due to this deformation. The piezoelectric element 20 detects this voltage in the form of a signal, and the signal detected by the piezoelectric element 20 is processed by the semiconductor element 30, whereby the magnitude of the physical quantity applied to the KNN film 3 can be measured. In this case, examples of the use of the device 100 include an angular velocity sensor, an ultrasonic sensor, a pressure sensor, an acceleration sensor, etc.

[0058] In addition, for example, when the piezoelectric element 20 functions as a collector, the semiconductor element 30 is operated using the electric energy generated by the piezoelectric element 20.

[0059] As will be described later in detail, in this embodiment, during the manufacturing process of the device 100 (laminate 10), the KNN film 3 is formed by film formation under the conditions of low temperature, high oxygen partial pressure, and low atmosphere pressure. Thus, the laminate 10 and the device 100 in this embodiment can have at least any one of the following features 1, 2, and 3. Hereinafter, various features that the laminate 10 and the device 100 in this embodiment can have will be described.

[0060] (Feature 1)

[0061] When forming the KNN film 3, alkali metals (potassium atoms, sodium atoms) sometimes diffuse into the substrate 1 through the lower electrode film 2 (and the lower adhesion layer 6). If the alkali metals diffuse into the substrate 1, the adhesion between the substrate 1 and the lower electrode film 2 (the lower adhesion layer 6 when there is a lower adhesion layer 6) may sometimes decrease. As a result, when the device 100 (piezoelectric element 20) is driven, if excessive external force is repeatedly applied to the periphery (components) of the lower electrode film 2 due to repeated significant deformation of the KNN film 3, etc., the lower electrode film 2 and the KNN film 3 may sometimes peel off from the substrate 1.

[0062] In view of this problem, in this embodiment, during the manufacturing process of the device 100, the KNN film 3 is formed at a low temperature. Thereby, the diffusion of alkali metals into the substrate 1 is successfully suppressed. Specifically, the device 100 in this embodiment has the following characteristics (Characteristic 1): When analyzing the surface layer region of the substrate 1 using Secondary Ion Mass Spectrometry (SIMS), the potassium concentration (K concentration) is 5E15 cm -3 Hereinafter, the sodium concentration (Na concentration) is 5E15 cm -3 Hereinafter.

[0063] Thus, as a result of in-depth research by the present inventors, the following new insight was discovered for the first time: By forming the KNN film 3 at a low temperature, the diffusion of alkali metals into the substrate 1 can be suppressed, and a device 100 with low K concentration and Na concentration in the surface layer region of the substrate 1 can be obtained.

[0064] It should be noted that the "surface layer region of the substrate 1" in this embodiment refers to the entire region within a depth of 1 μm from the interface between the piezoelectric element 20 and the substrate 1 (when the substrate 1 has a surface oxide film 1b, it is from the interface between the piezoelectric element 20 and the surface oxide film 1b) toward the back surface of the substrate 1. It should be noted that the "back surface of the substrate 1" in this specification refers to the surface on the side opposite to the surface of the substrate 1 (the upper surface of the substrate 1) on which the semiconductor element 30 is formed.

[0065] By making the K concentration and Na concentration in the surface layer region of the substrate 1 be 5E15 cm -3 Hereinafter, respectively, the adhesion between the substrate 1 and the lower electrode film 2 (or the lower adhesion layer 6) can be improved. Thereby, when the device 100 (piezoelectric element 20) is driven, even if excessive external force is repeatedly applied to the periphery of the lower electrode film 2, peeling of the lower electrode film 2 and the KNN film 3 from the substrate 1 can be avoided. As a result, the reliability of the device 100 (piezoelectric element 20) can be improved.

[0066] The lower the K concentration and the Na concentration in the surface layer region of the substrate 1, the more the adhesion between the substrate 1 and the lower electrode film 2 (or the lower adhesion layer 6) can be further improved. The K concentration and the Na concentration in the surface layer region of the substrate 1 are preferably 3E14 cm -3 Hereinafter, thereby, the above-mentioned adhesion can be further improved. In addition, the K concentration in the surface layer region of the substrate 1 is, for example, more preferably 1E14 cm -3 Hereinafter, thereby, the above-mentioned adhesion can be further improved.

[0067] The lower limit values of the K concentration and the Na concentration in the surface layer region of the substrate 1 are not particularly limited. It should be noted that the current detection limit of the K concentration based on SIMS analysis is 1E14 cm -3 or so, and the detection limit of the Na concentration is 3E14 cm -3 or so.

[0068] (Feature 2)

[0069] If the KNN film 3 is formed at a low temperature, the diffusion of alkali metals into the substrate 1 can be suppressed, but the (001) orientation ratio of the KNN film 3 sometimes decreases. As a result, the performance of the piezoelectric element 20 sometimes decreases.

[0070] In view of this problem, in this embodiment, during the manufacturing process of the device 100, the KNN film 3 is formed under the conditions of low temperature, high oxygen partial pressure, and low atmosphere pressure. That is, not only the film formation conditions of the KNN film 3 are set to low temperature, but also to high oxygen partial pressure and low atmosphere pressure. Thereby, even when the film is formed at a low temperature, a KNN film 3 with a high (001) orientation ratio (high crystal orientation) is successfully obtained. This is a new insight first discovered as a result of in-depth research by the present inventors.

[0071] Specifically, the device 100 (the laminate 10) may have a feature (feature 2) that the (001) orientation ratio of the KNN film 3 is, for example, 96% or more, preferably 98% or more.

[0072] By making the (001) orientation ratio of the KNN film 3 96% or more, the piezoelectric element 20 can have high performance. By making the (001) orientation ratio of the KNN film 3 98% or more, the piezoelectric element 20 can have higher performance.

[0073] It should be noted that the (001) orientation ratio of the KNN film 3 refers to the orientation ratio in the (001) plane orientation of the crystals constituting the KNN film 3. "The (001) orientation ratio of the KNN film 3 is 96% or more" means that among the crystals constituting the KNN film 3, for example, 96% or more of the crystals are oriented in the (001) plane orientation with respect to the main surface of the substrate 1. It should be noted that the "orientation ratio" in this specification refers to the value calculated using the following formula (1) based on the peak intensity of the X-ray diffraction pattern (2θ / θ) obtained by performing XRD measurement on the KNN film 3.

[0074] Orientation ratio (%) = {(001) peak intensity / ((001) peak intensity + (110) peak intensity)} × 100…(1)

[0075] The "(001) peak intensity" in the above formula (1) refers to the intensity of the diffraction peak caused by the crystals oriented in the (001) plane orientation among the crystals constituting the KNN film 3 (i.e., the crystals with the (001) plane parallel to the main surface of the substrate 1) in the X-ray diffraction pattern obtained by performing XRD measurement on the KNN film 3, which is the intensity of the peak appearing in the range of 2θ from 20° to 23°. When multiple peaks appear in the range of 2θ from 20° to 23°, it is the intensity of the highest peak. In addition, the "(110) peak intensity" in the above formula (1) refers to the intensity of the diffraction peak caused by the crystals oriented in the (110) plane orientation among the crystals constituting the KNN film 3 (i.e., the crystals with the (110) plane parallel to the main surface of the substrate 1) in the X-ray diffraction pattern obtained by performing XRD measurement on the KNN film 3, which is the intensity of the peak appearing in the range of 2θ from 30° to 33°. It should be noted that when multiple peaks appear in the range of 2θ from 30° to 33°, it is the intensity of the highest peak.

[0076] It should be noted that in order to exhibit this characteristic, the KNN film 3 must have a perovskite structure. This is because when the KNN film 3 does not have a perovskite structure, peaks cannot be observed at least in the range of 2θ from 20° to 23° in the X-ray diffraction pattern obtained by performing XRD measurement, and as a result, the (001) orientation ratio cannot be calculated.

[0077] (Characteristic 3)

[0078] In this method, during the manufacturing process of the device 100, the KNN film 3 is formed by film deposition under the conditions of low temperature, high oxygen partial pressure, and low atmosphere pressure. As a result, even when film deposition is performed at a low temperature, a KNN film 3 with a high (001) orientation ratio is successfully obtained. As a result, a KNN film 3 with a high piezoelectric constant can also be obtained.

[0079] Specifically, the device 100 (laminated body 10) may have a piezoelectric constant e of the KNN film 331 The absolute value of [it] is, for example, 7 C / m 2 Above, preferably 10 C / m 2 The above feature (Feature 3).

[0080] By making the piezoelectric constant e of the KNN film 3 31 The absolute value of [it] is 7 C / m 2 Above, the piezoelectric element 20 can thus have higher performance. By making the piezoelectric constant e of the KNN film 3 31 The absolute value of [it] is 10 C / m 2 Above, the piezoelectric element 20 can further have high performance.

[0081] (2) Method for manufacturing a piezoelectric laminate and a device having a piezoelectric element

[0082] A method for manufacturing the above laminate 10 and device 100 will be described.

[0083] (Preparation of substrate)

[0084] First, as the substrate 1, a p-type Si substrate is prepared. In addition, on either one of the two main surfaces of the substrate 1, a semiconductor element 30 having, for example, a CMOS structure is formed in advance. In addition, on the surface of the substrate 1 (the upper surface of the substrate 1) on which the semiconductor element 30 is formed, a surface oxide film 1b is formed on the portion other than the formation portion of the semiconductor element 30. It should be noted that various known methods can be used to form the semiconductor element 30. In addition, for the formation of the n-type regions (n-well 311, n-type source region 321, n-type drain region 322) and p-type regions (p-type source region 312, p-type drain region 313) of the semiconductor element 30, methods such as a method of thermally diffusing a dopant and a method of activating ions by ion implantation and annealing can be used. The CMOS structure formed using these methods is not heat-resistant. For example, when the n-type region and p-type region are heated, the dopant sometimes migrates and the doping concentration changes.

[0085] (Film formation of lower adhesion layer and lower electrode film)

[0086] On the upper surface (the surface oxide film 1b) of the substrate 1, a lower adhesion layer 6 (for example, a ZnO layer) and a lower electrode film 2 (for example, a Pt film) are sequentially formed by, for example, sputtering. It should be noted that a substrate 1 on which the lower adhesion layer 6 and the lower electrode film 2 are pre-formed on the upper surface of the substrate 1 can be prepared.

[0087] Regarding the conditions for forming the ZnO layer as the lower adhesion layer 6, the following conditions can be exemplified. The film formation time of the lower adhesion layer 6 is appropriately adjusted according to the thickness of the target lower adhesion layer 6.

[0088] Target: ZnO sintered body

[0089] Temperature (substrate temperature): 200 °C or higher and lower than 500 °C, preferably 300 °C or higher and 450 °C or lower, more preferably 400 °C or higher and 450 °C or lower

[0090] Discharge power density: 2 W / cm 2 or higher and 6 W / cm 2 or lower, preferably 3 W / cm 2 or higher and 5 W / cm 2 or lower

[0091] Atmosphere: Atmosphere of a mixed gas of argon (Ar) gas and oxygen (O2) gas (hereinafter also referred to as "Ar / O2 mixed gas atmosphere")

[0092] Partial pressure ratio of Ar gas to O2 gas (Ar gas partial pressure / O2 gas partial pressure): 5 / 1 to 30 / 1, preferably 7 / 1 to 20 / 1, more preferably 10 / 1 to 15 / 1

[0093] Atmosphere pressure: 0.1 Pa or higher and 0.5 Pa or lower, preferably 0.2 Pa or higher and 0.4 Pa or lower

[0094] Thickness: 1 nm or higher and 200 nm or lower, preferably 10 nm or higher and 50 nm or lower

[0095] The expression of a numerical range such as "5 / 1 to 30 / 1" in this specification means that the lower limit value and the upper limit value are included in this range. The same applies to other numerical ranges. In addition, the "substrate temperature" in this specification refers to the surface temperature of the substrate during the film formation of each film (each layer).

[0096] It should be noted that regarding the conditions for forming the Ti layer or the like as the lower adhesion layer 6 during film formation, the following conditions can be exemplified.

[0097] Target: Ti plate or the like

[0098] Temperature (substrate temperature): 100 °C or higher and lower than 500 °C, preferably 200 °C or higher and 400 °C or lower

[0099] Atmosphere: Ar gas atmosphere

[0100] Atmosphere pressure: 0.1 Pa or higher and 0.5 Pa or lower, preferably 0.2 Pa or higher and 0.4 Pa or lower

[0101] Other conditions can adopt the same conditions as those for setting the ZnO layer.

[0102] Regarding the conditions for forming the Pt film as the lower electrode film 2, the following conditions can be exemplified. The film formation time of the lower electrode film 2 is appropriately adjusted according to the thickness of the target lower electrode film 2.

[0103] Target: Pt plate

[0104] Temperature (substrate temperature): 200 °C or higher and lower than 500 °C, preferably 300 °C or higher and 450 °C or lower

[0105] Discharge power density: 1 W / cm 2 or higher and 5 W / cm 2 or lower, preferably 2 W / cm 2 or higher and 4 W / cm 2 or lower

[0106] Atmosphere: Ar gas atmosphere

[0107] Atmosphere pressure: 0.1 Pa or higher and 0.5 Pa or lower, preferably 0.2 Pa or higher and 0.4 Pa or lower

[0108] Thickness: 100 nm or higher and 400 nm or lower

[0109] By forming the lower adhesion layer 6 and the lower electrode film 2 under the above conditions, especially by setting the film formation temperature within the above specified conditions to form the lower adhesion layer 6 and the lower electrode film 2, the thermal history for the semiconductor element 30 can be reduced. Thereby, the shortening of the life and the deterioration of the performance of the semiconductor element 30 can be suppressed.

[0110] (Film formation of KNN film)

[0111] After the film formation of the lower adhesion layer 6 and the lower electrode film 2 is completed, then, the KNN film 3 is formed on the lower electrode film 2 by a sputtering method such as RF magnetron sputtering. The composition of the KNN film 3 can be adjusted, for example, by controlling the composition of the target used during the sputtering film formation. The target can be produced by mixing and calcining powders such as K2CO3 powder, Na2CO3 powder, Nb2O5 powder, etc. The composition of the target can be controlled by adjusting the mixing ratio of powders such as K2CO3 powder, Na2CO3 powder, Nb2O5 powder, etc. When forming the KNN film 3 containing the above elements such as Cu and Mn, it is only necessary to use a target in which Cu powder (or CuO powder), Mn powder (or MnO powder), etc. are further mixed at a specified ratio based on the above respective powders.

[0112] In this method, the film formation conditions of the KNN film 3 are set to low temperature, the oxygen partial pressure is increased, and further, the atmosphere pressure is reduced. Specifically, as the conditions for forming the KNN film 3, the following conditions can be exemplified. The film formation time of the KNN film 3 is appropriately adjusted according to the thickness of the target KNN film 3.

[0113] Temperature (substrate temperature): 400 °C or higher and lower than 500 °C, more preferably 400 °C or higher and 450 °C or lower

[0114] Atmosphere: Ar / O2 mixed gas atmosphere

[0115] Oxygen partial pressure in the atmosphere (O2 gas partial pressure): 0.0025 Pa or higher and less than 0.01 Pa, preferably 0.003 Pa or higher and less than 0.01 Pa

[0116] Atmospheric pressure (chamber pressure): 0.03 Pa or higher and less than 0.1 Pa, preferably 0.03 Pa or higher and 0.08 Pa or lower

[0117] Discharge power density: 2.7 W / cm 2 and 4.1 W / cm 2 or lower, preferably 2.8 W / cm 2 or higher and 3.8 W / cm 2 or lower

[0118] Film formation rate: 0.5 μm / hr or higher and 4 μm / hr or lower, preferably 0.5 μm / hr or higher and 2 μm / hr or lower

[0119] Thickness: 0.5 μm or higher and 5 μm or lower, preferably 1 μm or higher and 3 μm or lower

[0120] By forming the KNN film 3 under the above conditions, particularly by setting the film formation temperature within the above-specified conditions to form the KNN film 3, the thermal history for the semiconductor element 30 can be reduced. As a result, migration of dopants in, for example, the n-type region and p-type region of the semiconductor element 30 can be suppressed. Consequently, shortening of the lifespan and deterioration of the performance of the semiconductor element 30 can be suppressed. In addition, the manufacturing yield of the device 100 can also be improved.

[0121] In addition, by forming the KNN film 3 under the above conditions, particularly by setting the film formation temperature within the above-specified conditions to form the KNN film 3, diffusion of alkali metals into the substrate 1 can be suppressed. As a result, the K concentration and Na concentration in the surface layer region of the substrate 1 can be set to 5E15 cm -3 or lower. That is, the laminate 10 and the device 100 having the above-described feature 1 can be obtained.

[0122] In addition, by forming the KNN film 3 under the above conditions, particularly by forming the KNN film 3 with the film formation temperature, oxygen partial pressure, and atmosphere pressure within the above-specified conditions, the (001) orientation ratio of the KNN film 3 can be set to 96% or more. That is, the laminate 10 and the device 100 having the above-described characteristic 2 can be obtained.

[0123] In addition, by setting the (001) orientation ratio of the KNN film 3 to 96% or more, the piezoelectric constant e of the KNN film 3 can also be 31 set to an absolute value of 7 C / m 2 or more. That is, by forming the KNN film 3 under the above conditions, particularly by forming the KNN film 3 with the film formation temperature, oxygen partial pressure, and atmosphere pressure within the above-specified conditions, the piezoelectric constant e of the KNN film 3 can also be 31 set to an absolute value of 7 C / m 2 or more. As a result, the laminate 10 and the device 100 having the above-described characteristic 3 can also be obtained.

[0124] When the film formation temperature of the KNN film 3 is 500°C or higher, the thermal history with respect to the semiconductor element 30 cannot be reduced. As a result, shortening of the life and deterioration of the performance of the semiconductor element 30 may not be suppressed. In addition, when the film formation temperature of the KNN film 3 is 500°C or higher, diffusion of alkali metals into the substrate 1 may sometimes not be suppressed.

[0125] By making the film formation temperature of the KNN film 3 lower than 500°C, the thermal history with respect to the semiconductor element 30 can be reduced. Thereby, migration of dopants in the n-type region and p-type region of the semiconductor element 30, for example, can be suppressed. As a result, shortening of the life and deterioration of the performance of the semiconductor element 30 can be suppressed. In addition, the manufacturing yield of the device 100 can also be improved. In addition, by making the film formation temperature of the KNN film 3 lower than 500°C, diffusion of alkali metals can be suppressed, and the K concentration and Na concentration in the surface layer region of the substrate 1 can be reduced respectively. As a result, the K concentration and Na concentration in the surface layer region of the substrate 1 can be set to 5E15 cm -3 or less.

[0126] In addition, by making the film formation temperature of the KNN film 3, for example, 450°C or lower, the thermal history with respect to the semiconductor element 30 can be further reduced. In addition, diffusion of alkali metals can be reliably suppressed, and the K concentration and Na concentration in the surface layer region of the substrate 1 can be further reduced respectively. For example, the K concentration and Na concentration in the surface layer region of the substrate 1 can be set to 3E14 cm -3 or less, and the K concentration in the surface layer region of the substrate 1 can be further set to 1E14 cm -3 or less.

[0127] When the film formation temperature of the KNN film 3 is, for example, lower than 400°C, the effect of suppressing the diffusion of alkali metals to the substrate 1 reaches its peak. On the other hand, the (001) orientation ratio of the KNN film 3 sometimes becomes low. As a result, even when the oxygen partial pressure and the atmosphere pressure during the film formation of the KNN film 3 are within the specified conditions, the (001) orientation ratio of the KNN film 3 sometimes cannot be made 96% or more. Therefore, sometimes the absolute value of the piezoelectric constant e 31 cannot be 7 C / m 2 or more. As a result, the performance of the piezoelectric element 20 sometimes deteriorates.

[0128] By making the film formation temperature of the KNN film 3, for example, 400°C or higher, it is possible to suppress the diffusion of alkali metals to the substrate 1 and make the (001) orientation ratio of the KNN film 3 96% or more, or make the absolute value of the piezoelectric constant e 31 7 C / m 2 or more. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained.

[0129] In addition, when the oxygen partial pressure during the film formation of the KNN film 3 is less than 0.0025 Pa, the (001) orientation ratio of the KNN film 3 sometimes cannot be sufficiently increased. That is, when the film formation temperature of the KNN film 3 is 400°C or higher and lower than 500°C, if the oxygen partial pressure is less than 0.0025 Pa, the (001) orientation ratio of the KNN film 3 sometimes cannot be made 96% or more. Therefore, sometimes the absolute value of the piezoelectric constant e 31 cannot be 7 C / m 2 or more. As a result, the performance of the piezoelectric element 20 sometimes deteriorates.

[0130] By making the oxygen partial pressure 0.0025 Pa or more, the (001) orientation ratio of the KNN film 3 can be sufficiently increased. Even when the film formation temperature of the KNN film 3 is 400°C or higher and lower than 500°C, the (001) orientation ratio of the KNN film 3 can be made 96% or more, or the absolute value of the piezoelectric constant e 31 7 C / m 2 or more. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained. By making the oxygen partial pressure 0.003 Pa or more, the (001) orientation ratio of the KNN film 3 can be further increased, and the (001) orientation ratio of the KNN film 3 can also be made 98% or more, or the absolute value of the piezoelectric constant e of the KNN film 3 31 10 C / m 2 or more. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the further high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained.

[0131] When the oxygen partial pressure is above 0.01 Pa, the sputtering energy required for the crystallization of the KNN film 3 is taken away due to the ionization of oxygen. Therefore, the (001) orientation ratio of the KNN film 3 tends to decrease. Thus, when the film formation temperature is 400 °C or higher and lower than 500 °C, if the oxygen partial pressure is 0.01 Pa or higher, sometimes the (001) orientation ratio of the KNN film 3 cannot be 96% or higher. Therefore, sometimes the absolute value of the piezoelectric constant e 31 cannot be 7 C / m 2 or more. As a result, the performance of the piezoelectric element 20 sometimes deteriorates.

[0132] By making the oxygen partial pressure lower than 0.01 Pa, it is possible to suppress the decrease in the (001) orientation ratio of the KNN film 3. Even when the film formation temperature of the KNN film 3 is 400 °C or higher and lower than 500 °C, the (001) orientation ratio of the KNN film 3 can be 96% or higher, or the absolute value of the piezoelectric constant e of the KNN film 3 31 can be 7 C / m 2 or more. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained.

[0133] In addition, when the atmospheric pressure during the film formation of the KNN film 3 is 0.1 Pa or higher, sometimes the (001) orientation ratio of the KNN film 3 cannot be sufficiently increased. Thus, when the film formation temperature of the KNN film 3 is 400 °C or higher and lower than 500 °C, if the atmospheric pressure is 0.1 Pa or higher, sometimes the (001) orientation ratio of the KNN film 3 cannot be 96% or higher. Therefore, sometimes the absolute value of the piezoelectric constant e 31 cannot be 7 C / m 2 or more. As a result, the performance of the piezoelectric element 20 sometimes deteriorates.

[0134] By making the atmospheric pressure less than 0.1 Pa, it is possible to sufficiently increase the (001) orientation ratio of the KNN film 3. Even when the film formation temperature of the KNN film 3 is 400 °C or higher and lower than 500 °C, the (001) orientation ratio of the KNN film 3 can be 96% or higher, or the absolute value of the piezoelectric constant e of the KNN film 3 31 can be 7 C / m 2 or more. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained. In addition, by making the atmospheric pressure 0.08 Pa or less, it is possible to further increase the (001) orientation ratio of the KNN film 3, and the (001) orientation ratio of the KNN film 3 can also be 98% or higher, or the absolute value of the piezoelectric constant e of the KNN film 3 31 can be 10 C / m 2As described above. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the further high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained.

[0135] In addition, when the atmospheric pressure is less than 0.03 Pa, the (001) orientation ratio of the KNN film 3 may not be sufficiently increased. Therefore, when the film formation temperature of the KNN film 3 is 400 °C or higher and lower than 500 °C, if the atmospheric pressure is less than 0.03 Pa, the (001) orientation ratio of the KNN film 3 may not be 96% or higher. Therefore, the absolute value of the piezoelectric constant e 31 may not be 7 C / m 2 or higher. As a result, the performance of the piezoelectric element 20 may sometimes become low.

[0136] By setting the atmospheric pressure to 0.03 Pa or higher, the (001) orientation ratio of the KNN film 3 can be sufficiently increased. Even when the film formation temperature of the KNN film 3 is 400 °C or higher and lower than 500 °C, the (001) orientation ratio of the KNN film 3 can be 96% or higher, or the absolute value of the piezoelectric constant e of the KNN film 3 31 may be 7 C / m 2 or higher. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained.

[0137] As described above, by forming the KNN film 3 by setting all of the film formation temperature, oxygen partial pressure, and atmospheric pressure within the above-specified conditions, it is possible to obtain a device 100 (laminate 10) in which the thermal history with respect to the semiconductor element 30 is reduced and the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1. In addition, although the thermal history with respect to the semiconductor element 30 is reduced, a device 100 (laminate 10) having at least any one of the above-described features 1, 2, and 3, preferably all of the above-described features 1, 2, and 3, can be obtained. That is, a laminate 10 and a device 100 in which the semiconductor element 30 and the high-performance piezoelectric element 20 are formed on the same substrate 1 can be obtained. If at least any one of the conditions of the film formation temperature, oxygen partial pressure, and atmospheric pressure is outside the above condition range, the shortening of the life and the deterioration of the performance of the semiconductor element 30, or the reduction of the performance of the piezoelectric element 20 may not be suppressed. As a result, a laminate 10 and a device 100 in which the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1 may not be obtained.

[0138] (Formation of Upper Bonding Layer and Upper Electrode Film)

[0139] After the film formation of the KNN film 3 is completed, an upper bonding layer 7 (e.g., RuO2 layer) and an upper electrode film 4 (e.g., Pt film) are sequentially formed on the KNN film 3 by, for example, sputtering.

[0140] Regarding the conditions for forming the RuO2 layer or the like as the upper sealing layer 7, the following conditions can be exemplified. The film formation time of the upper sealing layer 7 is appropriately adjusted according to the thickness of the target upper sealing layer 7.

[0141] Target: Ru plate, etc.

[0142] Temperature (substrate temperature): Room temperature (25 °C) or higher and lower than 500 °C, preferably room temperature (25 °C) or higher and 450 °C or lower

[0143] Discharge power density: 0.3 W / cm 2 or higher and 2 W / cm 2 or lower, preferably 0.5 W / cm 2 or higher and 1 W / cm 2 or lower

[0144] Atmosphere: Ar / O2 mixed gas atmosphere

[0145] Partial pressure ratio of Ar gas to O2 gas (Ar gas partial pressure / O2 gas partial pressure): 3 / 5 to 1 / 1, preferably 3 / 4 to 1 / 1

[0146] Atmosphere pressure: 0.1 Pa or higher and 1.0 Pa or lower, preferably 0.2 Pa or higher and 0.7 Pa or lower

[0147] Thickness: 1 nm or higher and 200 nm or lower, preferably 5 nm or higher and 50 nm or lower

[0148] Regarding the conditions for forming the Pt film or the like as the upper electrode film 4, the following conditions can be exemplified. The film formation time of the upper electrode film 4 is appropriately adjusted according to the thickness of the target upper electrode film 4.

[0149] Target: Pt plate, etc.

[0150] Temperature (substrate temperature): Room temperature (25 °C) or higher and lower than 500 °C, preferably room temperature (25 °C) or higher and 450 °C or lower

[0151] Discharge power density: 1 W / cm 2 or higher and 5 W / cm 2 or lower, preferably 2 W / cm 2 or higher and 4 W / cm 2 or lower

[0152] Atmosphere: Ar gas atmosphere

[0153] Atmosphere pressure: 0.1 Pa or higher and 0.5 Pa or lower, preferably 0.2 Pa or higher and 0.4 Pa or lower

[0154] Thickness: 50 nm or more and 5000 nm or less, preferably 50 nm or more and 300 nm or less

[0155] By forming the upper sealing layer 7 and the upper electrode film 4 under the above conditions, particularly by forming the upper sealing layer 7 and the upper electrode film 4 with the film formation temperature within the above-specified range, it is possible to more reliably suppress the diffusion of alkali metals into the substrate 1 despite reducing the thermal history of the semiconductor element 30. As a result, it is possible to more reliably obtain the device 100 (laminated body 10) that reduces the thermal history of the semiconductor element 30 and has at least any one of the above characteristics 1, 2, and 3, preferably all of the above characteristics 1, 2, and 3.

[0156] As described above, by successively forming the lower sealing layer 6, the lower electrode film 2, the KNN film 3, the upper sealing layer 7, and the upper electrode film 4, the Figure 2 laminated body 10 as shown is obtained.

[0157] (Formation of piezoelectric element)

[0158] After manufacturing the Figure 2 laminated body 10 as shown, the laminated body 10 is processed to form a piezoelectric element 20 on the substrate 1.

[0159] Specifically, first, the upper electrode film 4 (including the upper sealing layer 7) and the KNN film 3 are separately patterned by dry etching using, for example, Ar gas or a reactive gas. In the patterning process, the upper electrode film 4 (including the upper sealing layer 7) and the KNN film 3 are each formed into a specified shape, and a part of the lower electrode film 2 is exposed. Additionally, in the patterning process, a photoresist can be used as an etching mask.

[0160] After the patterning of the upper electrode film 4 (including the upper sealing layer 7) and the KNN film 3 is completed, the lower electrode film 2 and the lower sealing layer 6 are separately patterned by dry etching using, for example, Ar gas or a reactive gas, and the lower electrode film 2 and the lower sealing layer 6 are each formed into a specified shape. In this patterning process, a photoresist can be used as an etching mask.

[0161] After the patterning of the lower electrode film 2 and the lower sealing layer 6 is completed, an insulating film 8 and metal wirings 9a and 9b are provided. Specifically, first, a layer formed of an insulating material (i.e., the insulating film 8) is provided from the upper electrode film 4 to the substrate 1 by a method such as CVD or sputtering so as to cover the side surface of the KNN film 3. Then, the insulating film 8 is patterned by dry etching or wet etching using a reactive gas such as Ar gas or CF4 gas, and the insulating film 8 is formed into a specified shape.

[0162] After the insulating film 8 is provided, a layer (metal wiring layer) formed of a metal-containing material is provided by methods such as sputtering, evaporation coating, plating, and metal paste methods. Then, the metal wiring layer is patterned by dry etching or wet etching using Ar gas or a reactive gas to form metal wirings 9a and 9b. The metal wiring 9a is formed (patterned) so as to be connected to the lower electrode film 2 and not connected to the upper electrode film 4, and the metal wiring 9b is formed so as to be connected to the upper electrode film 4 and not connected to the lower electrode film 2.

[0163] It should be noted that the etching conditions in the patterning when forming the insulating film 8 and the metal wirings 9a and 9b and the etching conditions of the substrate 1 when processing the piezoelectric laminate 10 into the piezoelectric element 20 can be set as general etching conditions used in the semiconductor device manufacturing process as long as they do not deteriorate the insulation of the KNN film 3.

[0164] In addition, a part of the substrate 1 is removed from the back side of the substrate 1 by Deep-RIE or wet etching. As a result, the piezoelectric element 20 is formed on the substrate 1. As a result, Figure 1 a device 100 in which the piezoelectric element 20 and the semiconductor element 30 shown are formed on the same substrate 1 can be obtained.

[0165] (3) Effects

[0166] According to this embodiment, one or more of the following effects can be obtained.

[0167] (a) In this embodiment, during the manufacturing process of the device 100, the KNN film 3 is formed at a temperature condition of 400 °C or higher and lower than 500 °C. As a result, a device 100 can be obtained in which the thermal history for the semiconductor element 30 is reduced and the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1. In addition, by reducing the thermal history for the semiconductor element 30, the shortening of the life and the deterioration of the performance of the semiconductor element 30 can be suppressed. In addition, the manufacturing yield of the device 100 can also be improved.

[0168] (b) In addition, by forming the KNN film 3 at a temperature condition of 400 °C or higher and lower than 500 °C, the laminate 10 and the device 100 can have "the K concentration in the surface layer region of the substrate 1 is 5E15 cm -3 Hereinafter, the Na concentration is 5E15 cm -3The device 100 (stacked body 10) has the above-mentioned feature 1, so that the adhesion between the substrate 1 and the lower electrode film 2 (lower bonding layer 6) can be improved. Therefore, when the device 100 (piezoelectric element 20) is driven, even if excessive external force is repeatedly applied to the periphery (component) of the lower electrode film 2 due to repeated and significant deformation of the KNN film 3, the lower electrode film 2 and the KNN film 3 can be prevented from peeling off from the substrate 1. As a result, the reliability of the device 100 can be improved.

[0169] (c) In addition, in the present embodiment, during the manufacturing process of the device 100, the KNN film 3 is formed under the conditions of a film forming temperature of 400° C. to less than 500° C., an oxygen partial pressure of 0.0025 Pa to less than 0.01 Pa, and an atmosphere pressure of 0.03 Pa to less than 0.1 Pa. Thus, even though the KNN film 3 is formed at a low temperature of 400° C. to less than 500° C., the (001) orientation ratio of the KNN film 3 formed on the substrate 1 on which the semiconductor element 30 is formed can be made 96% or more, or the piezoelectric constant e can be made 100% or more. 31 The absolute value is 7C / m 2 That is, the laminate 10 and the device 100 can have the characteristic that "the (001) orientation ratio of the KNN film 3 is 96% or more" (characteristic 2). As a result, the laminate 10 and the device 100 can also have the characteristic that "the piezoelectric constant e of the KNN film 3 is 31 The absolute value is 7C / m 2 The device 100 (laminated body 10) has at least one of the above-mentioned features 2 and 3, so that the piezoelectric element 20 can have high performance. In this way, in this embodiment, the thermal history of the semiconductor element 30 can be reduced (the performance degradation of the semiconductor element 30 can be suppressed), and a high-performance piezoelectric element 20 can be formed on the substrate 1 on which the semiconductor element 30 is formed.

[0170] (d) By forming the KNN film 3 while setting the film forming temperature, oxygen partial pressure and atmosphere pressure all within the above-mentioned prescribed ranges, it is possible to obtain a stacked body 10 and a device 100 having all of the above-mentioned features 1 to 3, while reducing the thermal history to the semiconductor element 30.

[0171] Note that a method of manufacturing a piezoelectric laminate by using bonding has also been proposed. That is, a method of manufacturing a piezoelectric laminate has also been proposed in which a first electrode film, a KNN film, and a second electrode film are sequentially formed on a first substrate, a second substrate on which a semiconductor element 30 is pre-formed is bonded to the upper surface of the second electrode film, and then the first substrate is removed. It can be considered that in the piezoelectric laminate manufactured by the bonding method, the thermal history of the semiconductor element 30 is small, and in addition, alkali metals do not diffuse into the second substrate. Note that in the piezoelectric laminate manufactured by this method, the second electrode film functions as a lower electrode film, and the first electrode film functions as an upper electrode film. However, there is a problem that the adhesion between the substrate (second substrate) and the lower electrode film (second electrode film) is very low in the piezoelectric laminate manufactured by this bonding method. In addition, in the bonding method, the number of manufacturing steps of the piezoelectric laminate increases, and thus there are also concerns such as complication of the manufacturing process, reduction in productivity, and increase in cost. In contrast, in the present embodiment, instead of using the bonding method, a laminate 10 in which a semiconductor element 30 and a piezoelectric element 20 are formed on the same substrate 1 is manufactured. Furthermore, during the manufacturing process thereof, the thermal history of the semiconductor element 30 is reduced and the diffusion of alkali metals into the substrate 1 is suppressed. As a result, although the thermal history of the semiconductor element 30 is reduced, the adhesion between the substrate 1 and the lower electrode film 2 (lower adhesion layer 6) is successfully improved. In addition, since the laminate 10 is manufactured without using the bonding method, the laminate 10 (and the piezoelectric element 20) according to the present embodiment does not have traces resulting from bonding. That is, in the laminate 10 (and the piezoelectric element 20) according to the present embodiment, there are no traces resulting from bonding at the interface between the substrate 1 and the KNN film 3, at the interface between the substrate 1 and the lower electrode film 2 (lower adhesion layer 6 when the lower adhesion layer 6 is provided), or at the interface between the lower electrode film 2 and the KNN film 3. Note that examples of the "traces resulting from bonding" mentioned here include the presence (distribution) of inclusions (e.g., adhesives) used for bonding and the presence (distribution) of impurities not resulting from film formation processes (e.g., impurities resulting from adhesives).

[0172] (4) Modified Example

[0173] The present embodiment can be modified as follows. Note that in the description of the following modified examples, the same reference numerals are given to the same components as those in the above embodiment, and the description thereof is omitted. In addition, the above embodiment and the following modified examples can be arbitrarily combined.

[0174] (Modified Example 1)

[0175] In the above method, an example in which the piezoelectric element 20 is formed at a position different from the formation position of the semiconductor element 30 on the upper surface of the substrate 1 has been described, but it is not limited thereto. For example, as Figure 3 shown, the piezoelectric element 20 can be formed on the semiconductor element 30. In this case, the "surface layer region of the substrate 1" becomes the region within the entire range from the interface between the piezoelectric element 20 and the semiconductor element 30 (the protective film 33 when the protective film 33 is provided) to a depth of 1 μm toward the back surface of the substrate 1. Further, for example, the piezoelectric element 20 can be formed on the upper surface of the substrate 1 such that a part of the piezoelectric element 20 is located on the semiconductor element 30. In this case, the "surface layer region of the substrate 1" becomes the region within the entire range from the interface between the piezoelectric element 20 and the semiconductor element 30 (the protective film 33) or the substrate 1 to a depth of 1 μm toward the back surface of the substrate 1.

[0176] In this modification, during the manufacturing process of the device 100, by forming the KNN film 3 under the condition that all of the film formation temperature, the oxygen partial pressure, and the atmosphere pressure are within the above-specified conditions, the thermal history with respect to the semiconductor element 30 can also be reduced. As a result, in this modification, a laminate 10 in which the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1 and the device 100 can also be obtained. Further, in this modification, the laminate 10 and the device 100 can also have at least any one of the above-described features 1, 2, and 3. In this way, in this modification, the same effects as those of the above method can also be obtained.

[0177] (Modification 2)

[0178] In the above method, the case where the substrate 1 is a p-type single crystal Si substrate 1a, that is, the case where the substrate 1 is a p-type semiconductor substrate, has been described as an example, but it is not limited thereto. The substrate 1 can be an n-type semiconductor substrate. In this case, the p-type MOSFET 31 does not have an n-well 311, and the p-type source region 312 and the p-type drain region 313 are respectively provided separately from each other on the upper surface of the substrate 1. In addition, the n-type source region 321 and the n-type drain region 322 of the n-type MOSFET 32 are respectively provided separately from each other in a p-well formed on the upper surface of the substrate 1. In this modification, during the manufacturing process of the device 100, the KNN film 3 is formed by setting all of the film formation temperature, the oxygen partial pressure, and the atmosphere pressure within the above-described specified conditions, so that the thermal history with respect to the semiconductor element 30 can also be reduced. As a result, in this modification, a laminate 10 in which the semiconductor element 30 and the piezoelectric element 20 are formed on the same substrate 1 and the device 100 can also be obtained. In addition, in this modification, the laminate 10 and the device 100 can also have at least any one of the above-described features 1, 2, and 3. In this way, in this modification, the same effects as those of the above method can also be obtained.

[0179] (Modification 3)

[0180] In the above method and modification, an example in which the semiconductor element 30 has a CMOS structure has been described. However, the semiconductor element 30 is not limited to CMOS as long as it has a heat-sensitive element structure. Elements formed by using the methods of thermal diffusion or ion implantation of dopants in the formation of an n-type region or a p-type region are heat-sensitive. Therefore, when the semiconductor element 30 is formed by using these methods, that is, when the semiconductor element 30 has either a region in which a p-type or n-type dopant has been thermally diffused or a region in which the foregoing dopant has been ion-implanted, this method can be suitably applied, and the same effects as those of the above method and modification can be obtained.

[0181] (Modification 4)

[0182] In the above method and modification, an example in which the substrate on which the semiconductor element 30 is formed is used as the substrate 1 has been described, but it is not limited thereto.

[0183] As described above, since the KNN film 3 is formed at a low temperature of 400 °C or higher and lower than 500 °C, as the substrate 1, other substrates that require a reduced thermal history can also be used. For example, as the substrate 1, a substrate formed with a CMUT (Capacitive Micro-machined Ultrasound Transducer) structure can also be used. In addition, as the substrate 1, either a heat-intolerant resin substrate or a glass substrate can be used. When using such a substrate as the substrate 1, in the manufacturing process of the device 100, by setting all of the film formation temperature, oxygen partial pressure, and atmosphere pressure within the above-specified conditions, the KNN film 3 is formed, and a high-performance piezoelectric element 20 can also be formed on the substrate 1 that requires a reduced thermal history or the heat-intolerant substrate 1. In addition, in this modified example, the laminate 10 and the device 100 can also have at least any one of the above-described features 1, 2, and 3.

[0184] In addition, as the substrate 1, an SOI (Silicon On Insulator) substrate or a quartz glass (SiO2) substrate can also be used. In this case, the laminate 10 and the device 100 can also have at least any one of the above-described features 1, 2, and 3.

[0185] (Modified Example 5)

[0186] In the above-described method and modified examples, an example in which the lower adhesion layer 6 and the lower electrode film 2 are provided has been described, but it is not limited thereto. The lower adhesion layer 6 and the lower electrode film 2 may not be provided. That is, the KNN film 3 can be directly formed on the substrate 1. In this modified example, the piezoelectric element 20 is constituted by at least including the KNN film 3 and the upper electrode film 4 (including the upper adhesion layer 7). In addition, in this modified example, since the KNN film 3 is formed at a low temperature of 400 °C or higher and lower than 500 °C, as the substrate 1, the substrates described in any one of the above-described modified examples 1 to 4 can also be used.

[0187] In this modified example, in the manufacturing process of the device 100, by setting all of the film formation temperature, oxygen partial pressure, and atmosphere pressure within the above-specified conditions, the KNN film 3 is formed, so that the semiconductor element 30 and the piezoelectric element 20 can also be formed on the same substrate 1. In addition, in this modified example, the laminate 10 and the device 100 can also have at least any one of the above-described features 1, 2, and 3. In this way, the same effect as the above-described method can also be obtained in this modified example.

[0188] <Other Method>

[0189] As described above, the methods and modification examples of the present application have been specifically described. However, the present application is not limited to the above methods and modification examples, and various changes can be made without exceeding the gist thereof.

[0190] In addition, in the above-described embodiment, the case where the lower adhesion layer 6 is provided between the substrate 1 and the lower electrode film 2 and the upper adhesion layer 7 is provided between the KNN film 3 and the upper electrode film 4 has been described, but it is not limited thereto. The lower adhesion layer 6 and the upper adhesion layer 7 may not be provided as long as the necessary adhesion can be ensured.

[0191] <Preferred Mode of the Present Application>

[0192] Hereinafter, preferred modes of the present application will be noted.

[0193] (Note 1)

[0194] According to one mode of the present application, there is provided a device including a semiconductor element and a piezoelectric element, the piezoelectric element having a piezoelectric film made of an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen.

[0195] The semiconductor element and the piezoelectric element are formed on the same substrate.

[0196] (Note 2)

[0197] Preferably, when SIMS analysis is performed on the entire region from the interface between the piezoelectric element and the semiconductor element or the substrate to a depth of 1 μm toward the surface opposite to the surface of the substrate on which the piezoelectric element is formed, the potassium concentration is 5E15 cm -3 Hereinafter, the sodium concentration is 5E15 cm -3 Hereinafter.

[0198] (Note 3)

[0199] Preferably, the orientation ratio in the (001) plane orientation of the crystal constituting the piezoelectric film is 96% or more.

[0200] (Note 4)

[0201] Preferably, the piezoelectric constant e of the piezoelectric film 31 is 7 C / m 2 or more.

[0202] (Note 5)

[0203] Preferably, the semiconductor element has a CMOS structure.

[0204] (Note 6)

[0205] Preferably, the piezoelectric element is controlled by the semiconductor element.

[0206] (Supplementary Note 7)

[0207] Preferably, the piezoelectric element functions as an actuator,

[0208] and the operation of the piezoelectric element is controlled by the semiconductor element.

[0209] (Supplementary Note 8)

[0210] Preferably, the piezoelectric element functions as a sensor,

[0211] and the signal detected by the piezoelectric element is processed by the semiconductor element.

[0212] (Supplementary Note 9)

[0213] Preferably, the piezoelectric element functions as a sensor,

[0214] and the operation of the piezoelectric element is controlled by the semiconductor element.

[0215] (Supplementary Note 10)

[0216] Preferably, the piezoelectric element functions as an energy harvester,

[0217] and the semiconductor element is operated by the electric energy generated by the piezoelectric element.

[0218] (Supplementary Note 11)

[0219] Preferably, the semiconductor element has either a region where p-type or n-type dopant has been thermally diffused or a region where the dopant has been ion-implanted.

[0220] (Supplementary Note 12)

[0221] According to another aspect of the present application, there is provided a laminated substrate including a semiconductor element and a piezoelectric element, the piezoelectric element having a piezoelectric film composed of an alkali metal niobate oxide containing potassium, sodium, niobium, and oxygen,

[0222] wherein the semiconductor element and the piezoelectric element are formed on the same substrate.

[0223] (Supplementary Note 13)

[0224] For the device according to any one of Supplementary Notes 1 to 11 or the laminated substrate according to Supplementary Note 12, preferably:

[0225] At the interface between the substrate and the piezoelectric film, at the interface between the substrate and the lower electrode film (including the lower adhesion layer when there is a lower adhesion layer), or at the interface between the lower electrode film and the piezoelectric film, there are no traces resulting from bonding. It should be noted that the traces resulting from bonding refer to: inclusions used in pasting, the distribution of impurities not originating from film formation treatment, etc.

[0226] (Appendix 14)

[0227] According to another aspect of the present application, there is provided a method for manufacturing a device, comprising:

[0228] A step of preparing a substrate on which a semiconductor element is formed; and

[0229] A step of forming a piezoelectric element on the substrate,

[0230] The step of forming the piezoelectric element includes the following steps: a step of forming a piezoelectric film composed of an alkali metal niobium oxide containing potassium, sodium, niobium, and oxygen on the substrate under the conditions that the film formation temperature is lower than 500 °C, the oxygen partial pressure is 0.0025 Pa or more and less than 0.01 Pa, and the atmosphere pressure is 0.03 Pa or more and less than 0.1 Pa.

Claims

1. A device comprising a semiconductor element and a piezoelectric element, wherein the piezoelectric element has a piezoelectric film composed of an alkali metal niobium oxide containing potassium, sodium, niobium and oxygen, The semiconductor element and the piezoelectric element are formed on the same substrate.

2. The device according to claim 1, wherein: When SIMS analysis was performed on the entire region from the interface between the piezoelectric element and the semiconductor element or the substrate to the surface opposite to the surface of the substrate on which the piezoelectric element was formed to a depth of 1 μm, the potassium concentration was 5E15 cm -3 Below, the concentration of sodium is 5E15cm -3 the following.

3. The device according to claim 1 or 2, wherein: The orientation rate of the crystals constituting the piezoelectric film in the (001) plane direction is 96% or more.

4. The device according to claim 1 or 2, wherein: The piezoelectric constant e of the piezoelectric film 31 7C / m 2 above.

5. The device according to claim 1 or 2, wherein: The semiconductor element has a CMOS structure.

6. The device according to claim 1 or 2, wherein: The piezoelectric element is controlled by the semiconductor element.

7. The device according to claim 1 or 2, wherein: The piezoelectric element functions as an actuator. The operation of the piezoelectric element is controlled by the semiconductor element.

8. The device according to claim 1 or 2, wherein: The piezoelectric element functions as a sensor. The signal detected by the piezoelectric element is processed by the semiconductor element.

9. The device according to claim 1 or 2, wherein: The piezoelectric element functions as a sensor. The operation of the piezoelectric element is controlled by the semiconductor element.

10. The device according to claim 1 or 2, wherein: The piezoelectric element functions as an energy harvester. The semiconductor element is operated using the electric energy generated by the piezoelectric element.

11. The device according to claim 1 or 2, wherein: The semiconductor element includes either a region where a p-type or n-type dopant is thermally diffused or a region where the dopant is ion-implanted.

12. A laminate substrate comprising a semiconductor element and a piezoelectric element, wherein the piezoelectric element has a piezoelectric film composed of an alkali metal niobium oxide containing potassium, sodium, niobium and oxygen, The semiconductor element and the piezoelectric element are formed on the same substrate.

13. A method for manufacturing a device, comprising: a step of preparing a substrate on which a semiconductor element is formed; and forming a piezoelectric element on the substrate, The process of forming a piezoelectric element includes the following steps: under the conditions that the film forming temperature is higher than 400°C and lower than 500°C, the oxygen partial pressure is higher than 0.0025Pa and lower than 0.01Pa, and the atmosphere pressure is higher than 0.03Pa and lower than 0.1Pa, a piezoelectric film composed of alkali metal niobium oxide containing potassium, sodium, niobium and oxygen is formed on the substrate.

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