Data access switching method and device

Abstract

The invention discloses a data access switching method and device, and relates to the technical field of storage. In the data access process, the host and different controllers in the storage system establish different paths, and the host stores upgrade waiting delay time of the controller on the currently accessed path. Under the condition that a current controller transmitting a data access request of a host in the storage system is about to be upgraded, the current controller notifies the host to switch to a path provided by other controllers in the storage system, and the other controllers execute the data access service of the host, so that the data access service of the host can be upgraded within the upgrade waiting delay time of the current controller. And the host can continue to access the data without waiting for a long time, so that the service interruption time in the host is reduced.

Description

Technical Field

[0001] This application relates to the field of storage technology, and in particular, to a method and device for switching data access. Background Art

[0002] With the development of big data, artificial intelligence (AI), and cloud computing technologies, a large amount of data is continuously generated. Taking a storage system based on NVMe-oF (non-volatile memory express over Fabrics, NVMe-oF) as an example, the storage system includes: multiple controllers and hard disks. Different controllers provide multiple access paths for the host, and the access path indicates the controller that the host needs to communicate with and the hard disk that the controller needs to access. During the process of the host executing services, if the controller in the access path currently used by the host needs to be upgraded, the host needs to wait for a preset long time, such as input output (IO) timeout or keep alive time out (KATO). After waiting, the host then establishes a connection with the controller of other access paths in the storage system and resumes the data access process corresponding to the service. However, the long waiting time of the host results in a long interruption time of the services in the host. Summary of the Invention

[0003] This application provides a method and device for switching data access, which solves the problem that the host waits for a long time when the controller in the storage system is upgraded, and reduces the service interruption time in the host.

[0004] This application adopts the following technical solutions.

[0005] In a first aspect, this application provides a method for switching data access. The method for switching data access is applied to a storage system, which includes multiple controllers and hard disks. For example, the multiple controllers include a first storage controller and a second storage controller. The method for switching data access includes: the first storage controller sends an identification command to the host and establishes a first path with the host; the identification command includes the upgrade waiting delay time of the first storage controller; and, the first storage controller receives a first data access request from the host through the first path and executes the access indicated by the first data access request. The first storage controller sends an upgrade notification command to the host, and the upgrade notification command carries: an identifier indicating the host to send a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same service flow; and, the first storage controller executes an upgrade process within the above-mentioned upgrade waiting delay time.

[0006] In some alternative implementations, the recognition command may also be referred to as the first request, the first message, the first command, etc.; the upgrade notification command may also be referred to as the second request, the second message, the second command, etc.

[0007] In the scenario of controller upgrade in a storage system, the controller actively sends an upgrade notification command to the host. Since this upgrade notification command is used to instruct the host to send a data access request to other controllers, even when the controller that the host is currently communicating with is in an upgrade scenario, the host can respond to this upgrade notification command and send a data access request to other controllers in the storage system. That is, the data access service of the host can quickly switch from the current controller to other controllers for processing, greatly reducing the problem in the conventional technology that the host has to wait for a long time for the controller to switch to other paths, and reducing the service interruption time in the host.

[0008] Moreover, since the current controller executes the upgrade process during the upgrade waiting delay time, even after the time for the host to execute the data access service through other controllers reaches the upgrade waiting delay time, the process of the host re - establishing a path with the current controller will not be affected by the controller's upgrade process, thus further reducing the service interruption time in the host. In addition, when the end time of the host re - establishing a path with the current controller does not reach the above - mentioned upgrade waiting delay time, during the period when the host's data access service switches back from other controllers to the controller after the upgrade is completed, there will be no interruption in the host's data access service, which is beneficial to realizing the smooth switching of the host's data access service in the controller upgrade scenario of the storage system, thus achieving the effect that the host's data access service does not drop to zero.

[0009] Combined with the data access switching method provided in the first aspect, in an alternative implementation, the switching method provided in this application further includes: after the upgrade of the first storage controller is completed, the first storage controller receives a connection establishment request from the host and establishes a second path with the host according to this connection establishment request. And, the first storage controller receives a third data access request from the host through the second path and executes the access indicated by the third data access request; the third data access request and the foregoing second data access request belong to the same service flow. After the upgrade of the current controller is completed, the controller re - establishes a path with the host. Since the data access service of the host during the upgrade waiting delay time has been executed by other controllers, the service interruption time in the host is reduced, avoiding the problem that the host has to wait for a long time in the controller upgrade scenario.

[0010] Second aspect, the present application provides another method for switching data access. The method for switching data access is executed by a host, and the method for switching data access includes: the host receives identification commands of a first storage controller and a second storage controller in a storage system, and establishes a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes an upgrade waiting delay time of the first storage controller. The host sends a first data access request to the first storage controller through the first path. And, the host sends a first data access request to the first storage controller through the first path, and receives an upgrade notification command sent by the first storage controller, where the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. Finally, the host responds to the upgrade notification command and sends a second data access request to the second storage controller through the second path.

[0011] In the scenario of controller upgrade in a storage system, according to the upgrade notification command of the current controller, the host switches the path of the data access request from the path provided by the current controller to the path provided by another controller, enabling the data access service of the host to be quickly switched from the current controller to another controller for processing, greatly reducing the problem in the conventional technology that the host has to wait for a long time for the controller to switch to another path, and reducing the service interruption time in the host. Moreover, since the current controller executes the upgrade process during the upgrade waiting delay time, even after the time for the host to execute the data access service through another controller reaches the upgrade waiting delay time, the process of the host re - establishing a path with the current controller will not be affected by the controller's upgrade process, thereby further reducing the service interruption time in the host.

[0012] In addition, when the end time of the host re - establishing a path with the current controller has not reached the above - mentioned upgrade waiting delay time, during the period when the data access service of the host is switched back from another controller to the controller after the upgrade is completed, there will be no interruption in the data access service of the host, which is conducive to realizing the smooth switching of the data access service of the host in the scenario of controller upgrade in the storage system, thus achieving the effect that the data access service of the host does not drop to zero.

[0013] Combined with the data access switching method provided in the second aspect, in an optional implementation manner, the switching method provided in this application further includes: after the host sends a second data access request to the second storage controller through the second path, the data access switching method provided in this application further includes: the host waits for the upgrade waiting delay time of the first storage controller, sends a connection establishment request to the first storage controller, and establishes a third path with the first storage controller; and, the host sends a third data access request to the first storage controller through the third path, and the third data access request and the second data access request belong to the same service flow. After the upgrade of the current controller is completed, the host re-establishes a path with the controller. Since the data access service of the host during the upgrade waiting delay time has been executed by other controllers, the service interruption time in the host is reduced, avoiding the problem that the host waits for a long time in the controller upgrade scenario.

[0014] Combined with the data access switching method provided in the first aspect and the second aspect, in an optional implementation manner, the above-mentioned upgrade waiting delay time is the control upgrade waiting delay time, the above-mentioned upgrade notification command is an asynchronous event information notification command, and the above-mentioned identifier is the control upgrade start identifier.

[0015] Combined with the data access switching method provided in the first aspect and the second aspect, in an optional implementation manner, the tail of the above-mentioned identification command includes a first reserved field, and the first reserved field is used to carry the above-mentioned control upgrade waiting delay time.

[0016] Combined with the data access switching method provided in the first aspect and the second aspect, in an optional implementation manner, bytes 1806-1807 in the identification command are used to carry the above-mentioned control upgrade waiting delay time.

[0017] Combined with the data access switching method provided in the first aspect and the second aspect, in an optional implementation manner, the upgrade notification command (asynchronous event information notification command) includes a second reserved field, and the second reserved field is used to carry the control upgrade start identifier.

[0018] Combined with the data access switching method provided in the first aspect and the second aspect, in an optional implementation manner, the value of the second reserved field is F1h.

[0019] In a third aspect, this application provides a data access switching device. The data access switching device is applied to the first storage controller in the storage system, and the switching device includes a module or unit for executing the first aspect or any optional implementation manner in the first aspect.

[0020] Exemplarily, the switching device includes: a transceiver module, an execution module, and an upgrade module. The transceiver module is configured to send an identification command to the host and establish a first path with the host; the identification command includes an upgrade waiting delay time; the execution module is configured to receive a first data access request from the host through the first path and execute the access indicated by the first data access request; the transceiver module is further configured to send an upgrade notification command to the host, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to a second storage controller in the storage system, and the second data access request and the first data access request belong to the same traffic flow; the upgrade module is configured to execute an upgrade process within the upgrade waiting delay time.

[0021] In a fourth aspect, the present application provides another switching device for data access. The switching device for data access is applied to a host, and the switching device includes modules or units for executing any optional implementation manner in the second aspect or the first aspect.

[0022] Exemplarily, the switching device includes: a receiving module and a sending module. The receiving module is configured to receive an identification command of a first storage controller and an identification command of a second storage controller in the storage system, and establish a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes an upgrade waiting delay time of the first storage controller. The sending module is configured to send a first data access request to the first storage controller through the first path. The receiving module is further configured to receive an upgrade notification command sent by the first storage controller, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. The sending module is further configured to respond to the upgrade notification command and send a second data access request to the second storage controller through the second path.

[0023] In a fifth aspect, the present application provides a controller. The controller includes: a control circuit and an interface circuit. The interface circuit is configured to send an identification command and cooperate with the control circuit to implement the functions of the controller (such as the first storage controller or the second storage controller) in any optional implementation manner in the first aspect or the second aspect.

[0024] In a sixth aspect, the present application provides a storage system. The storage system includes: a hard disk and a plurality of controllers provided in the fifth aspect. The hard disk is used for storing data; the controller is configured to receive a data access request for the foregoing data and cooperate with the hard disk to implement the method in any optional implementation manner in the first aspect or the first aspect.

[0025] In a seventh aspect, the present application provides a host. The host includes: a processor and a transceiver. The transceiver is configured to receive an identification command and cooperate with the processor to implement the method in any optional implementation manner in the second aspect or the second aspect.

[0026] In an eighth aspect, the present application provides a data access system. The data access system includes: the storage system provided in the sixth aspect, and the host provided in the seventh aspect. The host and the storage system communicate with each other in a wired or wireless connection manner, and cooperate to implement the method in any one of the optional implementation manners in the first aspect or the second aspect.

[0027] In a ninth aspect, the present application provides a readable storage medium. The readable storage medium includes a computer program or instruction. When the computer program or instruction runs on an electronic device, the electronic device executes the method in the first aspect or any one of the optional implementation manners in the first aspect, or, the method in the second aspect or any one of the optional implementation manners in the second aspect. The electronic device may be the above-mentioned controller, storage system, host, etc.

[0028] In a tenth aspect, the present application provides a computer program product. The computer program product includes a computer program or instruction. When the computer program or instruction runs on an electronic device, the electronic device executes the method in the first aspect or any one of the optional implementation manners in the first aspect, or, the method in the second aspect or any one of the optional implementation manners in the second aspect. The electronic device may be the above-mentioned controller, storage system, host, etc.

[0029] Regarding the beneficial effects of the technical solutions provided in the third aspect to the tenth aspect, reference may be made to the description of any one of the optional implementation manners in the first aspect or the second aspect, which will not be elaborated here. Based on the implementation manners provided in the above aspects of the present application, further combinations may be made to provide more implementation manners. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic structural diagram of a data access system provided by the present application;

[0031] Figure 2 is a schematic flowchart of a data access switching method provided by the present application Figure 1 ;

[0032] Figure 3 is a schematic flowchart of a data access switching method provided by the present application Figure 2 ;

[0033] Figure 4 is a schematic flowchart of a data access switching method provided by the present application Figure 3 ;

[0034] Figure 5 is a schematic structural diagram of a data access switching device provided by the present application Figure 1 ;

[0035] Figure 6 Structural schematic diagram of a data access switching device provided by this application Figure 2 ;

[0036] Figure 7 Structural schematic diagram of a host provided by this application. Specific implementation manners

[0037] This application provides a data access switching method. During the data access process, different paths are established between the host and different controllers in the storage system, and the host stores the upgrade waiting delay time of the controller on the currently accessed path. When the current controller that transmits the host's data access request in the storage system is about to be upgraded, the current controller notifies the host to switch to the path provided by other controllers in the storage system, and the other controllers execute the host's data access service. In this way, within the upgrade waiting delay time of the current controller, the host does not need to wait for a long time, reducing the service interruption time in the host.

[0038] Specifically, in the controller upgrade scenario in the storage system, the controller actively sends an asynchronous event information notification command to the host. Since this asynchronous event information notification command is used to instruct the host to send a data access request to other controllers, even when the controller currently communicated with by the host is in the upgrade scenario, the host can respond to this asynchronous event information notification command and send a data access request to other controllers in the storage system. That is, the host's data access service can be quickly switched from the current controller to other controllers for processing, greatly reducing the problem in the conventional technology that the host waits for a long time for the controller to switch to other paths, and reducing the service interruption time in the host. Moreover, since the current controller executes the upgrade process within the (control) upgrade waiting delay time, even after the time for the host to execute the data access service through other controllers reaches the (control) upgrade waiting delay time, the process of the host re - establishing a path with the current controller will not be affected by the controller's upgrade process, further reducing the service interruption time in the host. In addition, when the end time of the host re - establishing a path with the current controller does not reach the above - mentioned (control) upgrade waiting delay time, during the period when the host's data access service is switched back from other controllers to the controller after the upgrade is completed, there will be no interruption in the host's data access service, which is conducive to realizing the smooth switching of the host's data access service in the controller upgrade scenario of the storage system, thus achieving the effect that the host's data access service does not drop to zero.

[0039] The technical solutions involved in this application may be applied not only to current storage technologies or storage standards, but also to future storage technologies or storage standards. The terms used in the implementation part of this application are only used to explain the specific embodiments of this application, rather than aiming to limit this application. Some concepts that this application may involve will be briefly introduced below.

[0040] Non-volatile memory (NVM): A computer memory that has the characteristics of non-volatility, byte-level access, high storage density, low power consumption, etc., and the stored data will not disappear when the current is turned off.

[0041] Non-volatile Memory Express (NVMe): A standard interface protocol developed for the Peripheral Component Interconnect Express (PCIe) protocol, which removes various restrictions imposed by the old standards on SSDs, supports most operating systems, and has good scalability.

[0042] For the sake of clear and concise description of the following embodiments, first, the data access system and storage system to which this application can be applied will be introduced, as Figure 1 shown Figure 1 is a schematic structural diagram of a data access system provided by this application. The data access system includes: a data access device 100 and a storage device 120. In Figure 1 the application scenario shown, the user accesses data through an application program. The computer running these application programs can be called a "computing device".

[0043] The data access device 100 can be a physical machine or a virtual machine. The physical machine may include, but is not limited to, one or both of a user side and a smart network card (smart NIC).

[0044] For example, the data access device 100 includes a user side. The user side may refer to a client, such as a host, a desktop computer, a server, a laptop computer, and a mobile device, etc.

[0045] For another example, the data access device 100 includes a smart network interface card (smart NIC). The smart NIC, also known as a smart network adapter, in addition to being able to complete the network transmission function of a standard network card, also provides a built-in programmable and configurable hardware acceleration engine, which improves the performance of applications and significantly reduces the consumption of the CPU in the communication of the host connected to the smart NIC, providing more CPU resources for applications. For example, in a highly virtualized environment, the CPU in the host needs to run tasks related to the open virtual switch (OVS), and at the same time, the CPU in the host also has to handle operations such as storage, online or offline encryption and decryption of data packets, in-depth inspection of data packets, firewall, and complex routing. These operations not only consume a large amount of CPU resources, but also due to the competition for CPU resources between different services, the performance of the services cannot be optimized. As a hub connecting various services, the smart NIC accelerates the above-mentioned services on the smart NIC.

[0046] For still another example, the data access device 100 includes a client and a smart NIC.

[0047] In a possible example, the data access device 100 accesses the storage device 120 through a network to store and retrieve data. For example, the network may include a switch 110.

[0048] In another possible example, the data access device 100 can also communicate with the storage device 120 through a wired connection, such as a universal serial bus (USB), a Peripheral Component Interconnect Express (PCIe) bus, or other wired connections.

[0049] Figure 1 The storage device 120 shown can be a centralized storage system. The characteristic of a centralized storage system is that there is a unified entry, and all data coming from external devices has to pass through this entry, which is the engine 121 of the centralized storage system. The engine 121 is the most core component in the centralized storage system, and many advanced functions of the storage system are implemented therein.

[0050] Such as Figure 1 shown, there may be one or more controllers in the engine 121. Figure 1 Taking the engine 121 as an example, it contains two controllers (such as Figure 1Taking the controller 0 and controller 1 in it as an example for illustration. In a possible example, if the engine 121 has multiple controllers, there may be mirror channels between any two controllers to implement the function of backing up any two controllers to each other, thereby avoiding the unavailability of the entire storage device 120 caused by hardware failures. In some examples, the controller in the storage device may also be referred to as a storage controller, which is not limited in this application. It should be understood that if the engine 121 includes multiple controllers, the engine 121 may also be referred to as the array controller of the storage device 120.

[0051] The engine 121 also includes a front-end interface 1211 and a back-end interface 1214. The front-end interface 1211 is used to communicate with the data access device 100 to provide data access services for the data access device 100. The back-end interface 1214 is used to communicate with the hard disk to expand the capacity of the storage device 120. Through the back-end interface 1214, the engine 121 can connect more hard disks to form a very large storage resource pool.

[0052] In terms of hardware, as Figure 1 shown, the controller 0 at least includes a processor 1212 and a memory 1213. The processor 1212 is a central processing unit (CPU) used to process data access requests from outside the storage device 120 (servers or other storage systems) and also to process requests generated inside the storage device 120. Exemplarily, when the processor 1212 receives a write data request sent by the data access device 100 through the front-end interface 1211, it temporarily stores the data in these write data requests in the memory 1213. When the total amount of data in the memory 1213 reaches a certain threshold, the processor 1212 sends the data stored in the memory 1213 to at least one of the mechanical hard disk 1221, mechanical hard disk 1222, solid state drive (SSD) 1223 or other hard disk 1224 through the back-end port for persistent storage.

[0053] Memory 1213 refers to the internal memory that directly exchanges data with the processor. It can read and write data at any time and is very fast. It serves as the temporary data memory for the operating system or other running programs. Memory includes at least two types of memories. For example, memory can be either random access memory or read only memory (ROM). For instance, random access memory can be DRAM or SCM. DRAM is a semiconductor memory, and like most random access memories (RAM), it belongs to a volatile memory device. However, DRAM and SCM are only exemplary in this embodiment, and memory can also include other random access memories, such as static random access memory (SRAM), etc. For read only memory, for example, it can be programmable read only memory (PROM), erasable programmable read only memory (EPROM), etc.

[0054] In addition, memory 1213 can also be a dual in-line memory module or a dual in-line memory module (DIMM), that is, a module composed of dynamic random access memory (DRAM), and it can also be an SSD. In practical applications, multiple memories 1213 and different types of memories 1213 can be configured in controller 1. The number and type of memories 1213 are not limited in this embodiment. In addition, the memory 1213 can be configured to have a power retention function. The power retention function means that when the system loses power and then powers on again, the data stored in the memory 1213 will not be lost. Memory with a power retention function is called non-volatile memory.

[0055] Software programs are stored in memory 1213. When the processor 1212 runs the software programs in the memory 1213, it can achieve the management of the hard disk. For example, abstracting the hard disk into a storage resource pool and providing the storage resource pool to the server in the form of a logical unit number (LUN). Here, the LUN is actually the hard disk seen on the server. Of course, some centralized storage systems are also file servers themselves and can provide shared file services for the server.

[0056] Such as Figure 1As shown, in this system, the engine 121 may not have a hard disk slot. The hard disk needs to be placed in the hard disk enclosure 122, and the backend interface 1214 communicates with the hard disk enclosure 122. The backend interface 1214 exists in the form of an adapter card in the engine 121. Two or more backend interfaces can be used simultaneously on one engine 121 to connect multiple hard disk enclosures. Alternatively, the adapter card can also be integrated on the motherboard. In this case, the adapter card can communicate with the processor 1212 through the PCIe bus. For example, the controller 1 includes a front-end interface 1215, a processor 1216, a memory 1217, and a backend interface 1218. For the hardware implementation of the controller 1, refer to the content of the controller 0, which will not be elaborated here.

[0057] It should be noted that Figure 1 an engine 121 is shown in [figure reference], however, in practical applications, the storage system may include two or more engines 121, and redundancy or load balancing is performed among the multiple engines 121.

[0058] The hard disk enclosure 122 includes a control unit 1225 and several hard disks. The control unit 1225 can have various forms. In one case, the hard disk enclosure 122 belongs to an intelligent disk enclosure, such as Figure 1As shown in the figure, the control unit 1225 includes a CPU and a memory. The CPU is used to perform operations such as address translation and data reading and writing. The memory is used to temporarily store the data to be written to the hard disk or the data read from the hard disk to be sent to the controller. In another case, the control unit 1225 is a programmable electronic component, such as a data processing unit (DPU). The DPU has the versatility and programmability of the CPU, but is more specialized and can operate efficiently on network data packets, storage requests, or analysis requests. The DPU is distinguished from the CPU by a high degree of parallelism (requiring the processing of a large number of requests). Optionally, the DPU here can also be replaced with a graphics processing unit (GPU), an embedded neural-network processing unit (NPU), or other processing chips. Usually, the number of control units 1225 can be one, or two or more. The functions of the control unit 1225 can be offloaded to the network card 1226. In other words, in this implementation, the hard disk enclosure 122 does not have a control unit 1225 inside, but the network card 1226 is used to complete data reading and writing, address translation, and other computing functions. At this time, the network card 1226 is a smart network card. It can include a CPU and a memory. The CPU is used to perform operations such as address translation and data reading and writing. The memory is used to temporarily store the data to be written to the hard disk or the data read from the hard disk to be sent to the controller. It can also be a programmable electronic component, such as a DPU. There is no ownership relationship between the network card 1226 and the hard disks in the hard disk enclosure 122. The network card 1226 can access any hard disk in the hard disk enclosure 122 (such as Figure 1 the mechanical hard disk 1221, the mechanical hard disk 1222, the solid-state drive 1223, and the other hard disk 1224 shown), so it is more convenient to expand the hard disk when the storage space is insufficient.

[0059] According to the type of communication protocol between the engine 121 and the hard disk enclosure 122, the hard disk enclosure 122 may be a serial attached small computer system interface (SAS) hard disk enclosure, or an NVMe hard disk enclosure, or other types of hard disk enclosures. The SAS hard disk enclosure uses the SAS 3.0 protocol, and each enclosure supports 25 SAS hard disks. The engine 121 is connected to the hard disk enclosure 122 through an on-board SAS interface or a SAS interface module. The NVMe hard disk enclosure is more like a complete computer system, and the NVMe hard disk is inserted into the NVMe hard disk enclosure. The NVMe hard disk enclosure is then connected to the engine 121 through an RDMA port (or an RDMA interface).

[0060] For example, the storage device 120 may refer to a storage array, such as an all-flash storage array where all storage media are flash memories.

[0061] In an alternative implementation, the storage device 120 is a centralized storage system with integrated disk control. The storage device 120 does not have the above-mentioned hard disk enclosure 122, and the engine 121 is used to manage multiple hard disks connected through hard disk slots. The functions of the hard disk slots can be implemented by the backend interface 1214 or the backend interface 1218.

[0062] In another alternative implementation, Figure 1 the storage device 120 shown is a distributed storage system, which includes a computing device cluster and a storage device cluster. The computing device cluster includes one or more computing devices, and the computing devices can communicate with each other. The computing device can be a type of computing device, such as a server, a desktop computer, or a controller of a storage array, etc. Hardware-wise, the computing device may include a processor, a memory, and a network card, etc. Among them, the processor is a CPU, which is used to process data access requests from outside the computing device or requests generated inside the computing device. Exemplarily, when the processor receives a write data request sent by a user, it temporarily stores the data in these write data requests in the memory. When the total amount of data in the memory reaches a certain threshold, the processor sends the data stored in the memory to the storage device for persistent storage. In addition, the processor is also used to calculate or process data, such as metadata management, deduplication, data compression, virtualizing storage space, and address translation, etc. In one example, any computing device can access any storage device in the storage device cluster through a network. The storage device cluster includes multiple storage devices. A storage device includes one or more controllers, a network card, and multiple hard disks, and the network card is used to communicate with the computing device.

[0063] It should be noted that the above examples are only possible implementation manners of the data access system provided in this embodiment, and should not be construed as a limitation on this application. It can be understood that, Figure 1In the storage device 120 shown, data can be stored on each hard disk in the form of files. The files stored in each hard disk constitute a file storage system, which can be, for example, a distributed file system. Such as the Network File System (NFS), NFS is both a distributed file system and a network protocol for accessing and sharing files between devices on the same local area network. Exemplarily, the NAS system can be implemented with the support of the NFS protocol. The network file system is a low-cost network file sharing option that enables users and applications to access, store, and update files on a remote computer as if using direct attached storage. The network file system uses the Remote Procedure Call protocol to route requests between the client and the server. Although the participating devices need to support the network file system, they do not need to know the details of the network. It should be noted that remote procedure calls may not be secure, so the network file system should only be deployed on a trusted network behind a firewall. Although Windows supports this protocol, it is mainly used in the Linux environment.

[0064] Next, based on Figure 1 , an exemplary description of the data access switching method provided in this application is given. As Figure 2 shown, Figure 2 is a flowchart of a data access switching method provided in this application. Figure 1 . The host 21 can be used to implement the functions of the data access device 100 in Figure 1 , and the storage system 22 can be used to implement the functions of the storage device 120 in Figure 1 . The storage system 22 includes multiple controllers. For example, the controller 221 can be used to implement the functions of the controller 0 in the above Figure 1 , and the controller 222 can be used to implement the functions of the controller 1 in the above Figure 1 . For the hardware implementation of the host 21 and the storage system 22, reference can be made to the relevant description in the above Figure 1 , which will not be elaborated here.

[0065] In this embodiment, the controller 221 can also be referred to as the first controller, the first storage controller, or the current controller executing the upgrade process, the current storage controller, etc. The controller 222 can also be referred to as the second controller, the second storage controller, the standby controller for the host 21 to access the storage system 22, or other controllers, etc.

[0066] Please refer to Figure 1 . The data access switching method provided in this application includes the following steps S210 to S250.

[0067] S210. The controller 221 sends an identification command to the host and establishes path 1 with the host.

[0068] Corresponding to the process of S210, the host receives the identification commands of controller 221 and controller 222 in the storage system, and establishes path 1 with controller 221.

[0069] In some alternative implementation manners, the identify command may also be referred to as an identification message, an authentication command, an authentication message, a first command, a first message, a first request, or other names, etc.

[0070] In this embodiment, the identification command of controller 221 includes the upgrade waiting delay time of controller 221, and the upgrade waiting delay time represents the upgrade waiting time of the controller, such as the time difference between the start time and the end time when the controller executes the upgrade process. In some feasible examples, the upgrade waiting delay time may also be referred to as the controller update wait delay time (ctrl update wait delay time), the controller upgrade waiting delay time, the control upgrade waiting delay, the control upgrade waiting time delay, or other names, etc., and the present application does not limit this.

[0071] Optionally, the tail of the identification command includes a first reserved field, and the first reserved field is used to carry the above-mentioned control upgrade waiting delay time. In some alternative implementation manners, the first reserved field may also be referred to as the ctrl updatewait delay time field.

[0072] Regarding the content represented by each byte in the identification command, Table 1 below provides a possible example.

[0073] Table 1 Identification Command: Identify Controller Data Structure, Independently Set I / O Command

[0074]

[0075]

[0076] Among them, Table 1 only shows the data structure starting from byte 544, and the above-mentioned first reserved field may refer to bytes 1806 - 1807 in the identification command, that is, the first two bytes in byte 2047:1806. In this example, the identification command is calculated starting from byte 0. If the identification command is calculated starting from byte 1, then the above-mentioned first reserved field refers to bytes 1807 - 1808 in the identification command.

[0077] Exemplarily, the 1806 - 1807 bytes in the identification command (i.e., the reserved field Reserved in the last row of Table 1) can be used to carry the above - mentioned control upgrade wait delay time (ctrl update wait delay time).

[0078] In this embodiment, the reserved field (or reserved field) in the identification command is used to carry the control upgrade wait delay time (ctrl update wait delay time) provided by this application, enabling the alignment of the control upgrade wait delay time between the host and the controller, thereby providing effective support for the non - zero drop of service switching in the host during subsequent controller upgrade scenarios.

[0079] Regarding path 1 established between the host and controller 221, path 1 may refer to the first access path or first path used by the host to access the hard disk in storage system 22. Path 1 includes controller 221 and the hard disk to be accessed by controller 221. In some alternative implementation manners, path 1 may also be referred to as connection 1 (association_1) between host 21 and controller 221.

[0080] In addition, host 21 can also establish path 2 with controller 222. Path 2 may refer to the second access path or second path used by the host to access the hard disk in storage system 22. Path 2 includes controller 222 and the hard disk to be accessed by controller 222. In some alternative implementation manners, path 2 may also be referred to as connection 2 (association_2) between host 21 and controller 222. During the establishment process of path 2, controller 222 sends an identification command to host 21, and this identification command carries the (control) upgrade wait delay time of controller 222. The specific implementation can refer to the establishment process of path 1 and will not be elaborated here.

[0081] S220. Host 21 sends a first data access request to controller 221 through path 1.

[0082] Correspondingly, controller 221 receives the first data access request from the host through path 1 and executes the access indicated by the above - mentioned first data access request.

[0083] This first data access request refers to the data access request sent by the host when performing a data access service.

[0084] For example, if the first data access request is a write request, then the first data access request carries the data to be written to the hard disk in storage system 22, and the access executed by controller 221 indicated by the first data access request is: writing the data carried by the first data access request to the hard disk.

[0085] For another example, if the first data access request is a read request, the first data access request carries the storage address of the data to be read from the hard disk in the storage system 22. Then, the access indicated by the first data access request executed by the controller 221 is: reading the data stored at the storage address in the hard disk according to the storage address carried by the first data access request, and feeding back the read data to the host 21.

[0086] In some feasible examples, the data access request provided in this application may also be referred to as a data request, a service request, a service message, an access request, or other names, etc. This application does not limit this.

[0087] S230. The controller 221 sends an upgrade notification command to the host.

[0088] Correspondingly, the host 21 receives the upgrade notification command sent by the controller 221.

[0089] In some optional implementation manners, the upgrade notification command may also be referred to as an upgrade notification message, an asynchronous event information notice command, an asynchronous event information notice message, an asynchronous event (AEN) message, an AEN command, a second command, a second message, a second request, or other names, etc.

[0090] In this embodiment, the upgrade notification command of the controller 221 carries: an identifier indicating the host 21 to send a second data access request to the controller 22. In some cases, this identifier is a control upgrade start identifier (controller update starting / ctrl update starting). Assuming that the upgrade notification command is an asynchronous event information notice command, the asynchronous event information notice command carries a control upgrade start identifier, and this control upgrade start identifier indicates the host 21 to send a second data access request to the controller 222, and the second data access request and the first data access request belong to the same service flow.

[0091] In some feasible cases, this control upgrade start identifier also indicates the controller 221 to start an upgrade event, such as the controller 221 starts to execute an upgrade process or is about to start to execute an upgrade process, etc. In some feasible examples, this control upgrade start identifier may also be referred to as a controller upgrade start identifier, a control (controller) upgrade start identifier, a control (controller) upgrade start identifier, or other names, etc. This application does not limit this.

[0092] The service flows provided in this embodiment may include, but are not limited to, multimedia flows such as audio streams and video streams, and I / O streams to be accessed by the host. Exemplarily, taking the service flow as an I / O stream, the second data access request and the first data access request belonging to the same service flow means that the host 21 needs to send multiple data access requests to implement the data access service, and these multiple data access requests belong to the same data access service. For example, the storage areas to be accessed by these multiple data access requests belong to the same hard disk, the same disk, or the storage space indicated by the same logical unit number (LUN). If the data access service corresponds to an I / O stream, both the first data access request and the second data access request are I / O requests in the I / O stream. For the feasible implementation manners of the type of the second data access request, reference may be made to the description of the first data access request above, which will not be elaborated herein.

[0093] Optionally, the above asynchronous event information notification command includes a second reserved field, which is used to carry the aforementioned control upgrade start flag. Exemplarily, the value of the second reserved field is F1h, and this F1h indicates that the controller 221 starts the upgrade event, such as the controller 221 starts to execute the upgrade process. Thus, the above asynchronous event information notification command can also be referred to as the upgrade notification command of the controller 221.

[0094] Regarding the meanings of different values in the asynchronous event information notification command, Table 2 below provides a possible example.

[0095] Table 2 Asynchronous Event Information Notification Command

[0096]

[0097] Among them, the above F1h is only an optional value mode of the second reserved field provided in this embodiment. In some alternative implementation manners, other values may also be used to indicate that the controller 221 starts the upgrade event, such as other values between F2h and FFh. This application does not limit this.

[0098] S240. The host 21 responds to the upgrade notification command and sends a second data access request to the controller 222 through path 2.

[0099] Correspondingly, the controller 222 receives the second data access request from the host 21 through path 2.

[0100] For the specific implementation of this second data access request, reference may be made to the description of the first data access request above, which will not be elaborated herein.

[0101] In the controller upgrade scenario in a storage system, the controller actively sends an upgrade notification command (asynchronous event information notification command) to the host. Since this upgrade notification command is used to instruct the host to send a data access request to other controllers, even when the controller with which the host is currently communicating is in an upgrade scenario, the host can respond to this upgrade notification command and send a data access request to other controllers in the storage system. That is, the host's data access service can quickly switch from the current controller to other controllers for processing, greatly reducing the problem in the conventional technology where the host has to wait for a long time for the controller to switch to other paths, and reducing the service interruption time in the host.

[0102] S250. The controller 221 executes the upgrade process during the upgrade waiting delay time.

[0103] Since the current controller executes the upgrade process during the upgrade waiting delay time, even after the time for the host to execute the data access service through other controllers reaches the upgrade waiting delay time, the process of the host re - establishing a path with the current controller will not be affected by the controller's upgrade process, thereby further reducing the service interruption time in the host.

[0104] In addition, when the end time of the host re - establishing a path with the current controller has not reached the above - mentioned upgrade waiting delay time, during the period when the host's data access service switches back from other controllers to the controller after the upgrade is completed, there will be no interruption in the host's data access service, which is conducive to realizing the smooth switching of the host's data access service in the controller upgrade scenario of the storage system, thereby achieving the effect that the host's data access service does not drop to zero.

[0105] Regarding the above Figure 2 example, this embodiment also provides a possible specific example. As Figure 3 shown, Figure 3 is a flowchart of a data access switching method provided by this application. Figure 2 Figure 3 Taking Figure 2 the storage system 22 in [the above] as an example, which refers to a non - volatile memory subsystem (NVM subsystem), the hardware implementation of the host 21, the controller 221, and the controller 222 can refer to the description of the foregoing embodiments and will not be elaborated here.

[0106] Please refer to Figure 3 This switching method provided by this embodiment includes the following steps ① to ④.

[0107] ①. The controller 221 starts the upgrade.

[0108] The way to start the upgrade can be to inform the host 21 through a command, as described in ② below. ​

[0109] ②. The controller 221 sends an abnormal event information notification command (AEN command) to the host 21.

[0110] In this example, the controller 221 notifies the host 21 through an AEN notice event (indicated by the AEN command) that the controller 221 starts the upgrade. For the specific implementation of the AEN command, refer to the description of S230 above, which will not be elaborated here.

[0111] ③. The host 21 responds to the AEN command and downgrades the level of the controller 221.

[0112] Exemplarily, the host 21 downgrades the path 1 provided by the controller 221 or sets the path 1 to a failure state, and starts a newly established path (or connection) with the controller 221 after waiting for the control upgrade delay time.

[0113] ④. The host 21 uses the path 2 provided by the controller 222 to smoothly switch the data access service in the NVM subsystem.

[0114] In this way, the data access service to be executed by the host 21 can be smoothly switched from the controller 221 to other controllers, so that the NVM subsystem can continuously execute the data access service, thereby achieving the effect that the data access service of the host does not drop to zero.

[0115] In an alternative implementation, to restore the communication of the access path between the host 21 and the storage system 22 before the controller upgrade and reasonably utilize the controller resources in the storage system 22, on the basis of Figure 2 and Figure 3 , the embodiment of the present application further provides a feasible example. As shown in Figure 4 , Figure 4 is a schematic flow diagram of a data access switching method provided by the present application. Figure 3 . For the hardware implementation of the host 21, the controller 221, and the controller 222, refer to the description of the foregoing embodiments, which will not be elaborated here.

[0116] Please refer to Figure 4 . After the upgrade of the controller 221 is completed, the switching method provided in this embodiment includes the following steps S261 to S263.

[0117] S261. The host 21 waits for the upgrade waiting delay time of the controller 221, sends a connection establishment request to the controller 221, and establishes a path 3 with the controller 221.

[0118] This connection establishment request indicates that the host 21 reconnects the access path to the controller 221, so that the data access service to be executed by the host 21 switches back from other controllers to the controller 221. In some feasible scenarios, this connection establishment request is also referred to as: connection request, connection establishment request, path establishment request, path request, path creation request, third request, or other names, etc., which are not limited in this application.

[0119] Corresponding to the process of S261, the controller 221 receives the connection establishment request from the host and establishes a path 3 with the host 21 according to the connection establishment request.

[0120] In this example, the path 3 may refer to the third access path or the third path adopted by the host for data access to the hard disk in the storage system 22. This path 3 includes the controller 221 and the hard disk to be accessed by the controller 221. In some alternative implementation manners, this path 3 may also be referred to as the connection 3 (association_3) between the host 21 and the controller 221. During the establishment process of the path 3, the controller 221 sends an identification command to the host 21, and this identification command carries the (control) upgrade waiting delay time of the controller 221. For the specific implementation, reference can be made to the establishment process of the path 1, which will not be elaborated here.

[0121] S262. The host 21 sends a third data access request to the controller 221 through the path 3.

[0122] Among them, the third data access request and the second data access request belong to the same service flow. For example, the host 21 needs to send multiple data access requests to implement the data access service, and these multiple data access requests belong to the same data access service. If this data access service corresponds to an I / O flow, both the third data access request and the second data access request are I / O requests in this I / O flow.

[0123] S263. The host 21 controller 222 receives the third data access request from the host through the path 2 and executes the access indicated by the third data access request.

[0124] For the feasible implementation manners of the type of the third data access request, reference can be made to the description of the foregoing first data access request, which will not be elaborated here.

[0125] After the upgrade of the current controller is completed, the controller re - establishes a path with the host. Since the data access service of the host during the upgrade waiting delay time of the current controller has been executed by other controllers, the service interruption time in the host is reduced, avoiding the problem that the host waits for a long time in the controller upgrade scenario.

[0126] It should be noted that S261 to S263 provided in this embodiment are executed after the upgrade of the controller 221 is completed. However, they can also be executed after the host 21 waits for the control upgrade wait delay time. The difference between the two is that the former can be triggered by the controller 221 actively sending a response message indicating the end of the upgrade to the host 21, and the latter is triggered by the timer in the host 21 after waiting for the ctrl update wait delay time. Both can reduce the service interruption time in the host and avoid the problem of the host waiting for a long time in the controller upgrade scenario.

[0127] In summary, during the negotiation phase between the storage system and the host, the storage system can indicate to the host that the storage system supports the smooth switching function of service upgrade and the maximum control upgrade time (upgrade wait delay time) it supports. And in the controller upgrade scenario, the controller actively sends an asynchronous event (such as the above-mentioned AEN command) to the host before the controller upgrade to notify the host to switch the path, and then resets the current controller for upgrade. Since the services in the host do not need to wait for a preset time to timeout, such as IO timeout or KATO, the upgrade process of the controller in the storage system is not perceived by the services in the host. Finally, after the upgrade time window (control upgrade wait delay time) of the current controller expires, the host reinitiates the link establishment and path recovery processing with the original path. Through the above handshaking mechanism between the storage system and the host, it can be ensured that each controller in the storage system is upgraded in a rolling manner, and the services in the host never drop to zero.

[0128] Exemplarily, when the storage system refers to an NVM subsystem including multiple controllers (or multiple controller nodes / control nodes), the host establishes connections with the multiple controllers respectively to form multiple paths. These multiple paths are available for the host to perform data access services on the NVM subsystem, so that the host realizes multi-path management and smooth switching of services in the controller scenario through the NVMe protocol stack in the NVM subsystem.

[0129] In the corresponding drawings of the above embodiment, only one data access device and one host are shown. However, in some alternative implementation manners, the storage system can be accessed by multiple different data access devices or hosts, and it can still implement the data access switching method provided in this application, which will not be elaborated here.

[0130] It can be understood that, in order to implement the functions in the above embodiments, the host and the storage system include corresponding hardware structures and / or software modules for executing various functions. Those skilled in the art should easily realize that, in combination with the units and method steps of each example described in the embodiments disclosed in the present application, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application scenarios and design constraints of the technical solution.

[0131] In the above text, in combination with the accompanying drawings, the method for switching data access provided according to this embodiment has been described in detail. Next, in combination with Figure 5 and Figure 6 , the switching device for data access provided in this embodiment will be described.

[0132] Figure 5 The structural schematic diagram of a switching device for data access provided by the present application Figure 1 , the switching device 500 can be used to implement the functions of the controller in the above method embodiments, and thus can also achieve the beneficial effects possessed by the above method embodiments. In this embodiment, the switching device 500 can be, for example, Figure 1 the controller 0 or controller 1 shown in the figure, or can also be the controller 221 or controller 222 provided in subsequent embodiments. It should be understood that the switching device 500 can also be a module (such as a chip) applied to any one of the foregoing controllers.

[0133] Exemplarily, the switching device 500 includes: a transceiver module 510, an execution module 520, and an upgrade module 530. The transceiver module 510 is used to send an identification command to the host and establish a first path with the host. The identification command includes an upgrade waiting delay time. The execution module 520 is used to receive the first data access request of the host through the first path and execute the access indicated by the first data access request. The transceiver module 510 is further used to send an upgrade notification command (asynchronous event information notification command) to the host, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller in the storage system, and the second data access request and the first data access request belong to the same service flow. The upgrade module 530 is used to execute the upgrade process within the upgrade waiting delay time.

[0134] The transceiver module 510, the execution module 520, the upgrade module 530, and other possible existing modules can cooperate to implement each step of the controller in the above method embodiments. More detailed descriptions of the above transceiver module 510, execution module 520, and upgrade module 530 can be directly obtained by referring to the relevant descriptions of the controller in the method embodiments shown in the foregoing drawings, and will not be elaborated here.

[0135] Figure 6A schematic diagram of a data access switching device provided in this application Figure 2 , the switching device 600 can be used to implement the functions of the host in the above method embodiment, and thus can also achieve the beneficial effects of the above method embodiment. In this embodiment, the switching device 600 can be as follows Figure 1 The data access device 100 shown may also be a host provided in the subsequent embodiments. It should be understood that the switching device 600 may also be a module (such as a chip) applied to any of the aforementioned hosts.

[0136] Exemplarily, the switching device 600 includes: a receiving module 610 and a sending module 620. The receiving module 610 is used to receive an identification command of a first storage controller and an identification command of a second storage controller in a storage system, and to establish a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes an upgrade waiting delay time of the first storage controller. The sending module 620 is used to send a first data access request to the first storage controller through the first path. The receiving module 610 is also used to receive an upgrade notification command (asynchronous event information notification command) sent by the first storage controller, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same service flow. The sending module 620 is also used to respond to the upgrade notification command and send a second data access request to the second storage controller through the second path.

[0137] The receiving module 610, the sending module 620 and other possible modules can cooperate to implement the various steps of the host in the above method embodiment. A more detailed description of the above receiving module 610 and the sending module 620 can be directly obtained by referring to the relevant description of the host in the method embodiment shown in the above figures, and no further description is given here.

[0138] The switching device implements the switching method shown in any of the foregoing figures through software. The switching device and its respective units may also be software modules. The above switching method is implemented by the processor calling the software module. The processor may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or a programmable logic device (PLD). The above PLD may be a complex programmable logic device (CPLD), a field programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0139] It can be understood that Figure 5 and Figure 6 The devices shown are only examples provided in this embodiment. Depending on the different switching processes, the switching device may include more or fewer units, which is not limited in this application.

[0140] When the switching device is implemented by hardware, the hardware may be implemented by a processor, a chip, or a chip system. The chip system includes one or more chips, and each chip includes an interface circuit and a control circuit. The interface circuit is used to receive data from other devices outside the chip and transmit it to the control circuit, or send the data from the control circuit to other devices outside the chip. The control circuit and the interface circuit use logic circuits or execute code instructions to implement the method of any possible implementation manner in the above embodiment. The beneficial effects can be referred to the description of any aspect in the above embodiment, which will not be elaborated here.

[0141] It can be understood that the processor in the embodiments of this application may be a CPU, or other general-purpose processors, digital signal processors (DSPs), ASICs, FPGAs, or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0142] In addition, Figure 5 and Figure 6 The devices shown may also be implemented by an electronic device, such as Figure 5The switching device 500 in Figure 1 can be implemented by a controller. For example, the controller includes a control circuit and an interface circuit. The interface circuit is used to send identification commands and cooperate with the control circuit to execute the switching method of data access in any of the foregoing embodiments. For the specific implementation of the controller, reference can be made to the foregoing

[0143] Figure 6 The switching device in Figure 7 can be implemented by a host, such as Figure 7 FIG. is a schematic structural diagram of a host provided by the present application. The host can be used to implement the functions of the host in the foregoing method embodiments, and thus can also achieve the beneficial effects possessed by the foregoing method embodiments. In this embodiment, the host can be, for example, Figure 1 the data access device 100 shown, or the host 21 in subsequent embodiments, or a module (such as a chip) applied to the data access device.

[0144] For example, Figure 7 as shown, the host 700 may include a processor 720. Optionally, the host 700 may further include a memory 730 and / or a transceiver 710. Among them, the processor 720 is coupled to the memory 730 and the transceiver 710, and can be connected through a communication bus, for example. The communication bus may include, but is not limited to: a PCIe bus, or an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), etc.

[0145] Next, in combination with Figure 7 each component of the host 700 will be specifically introduced:

[0146] Among them, the processor 720 is the control center of the host 700, and can be a single processor or a collective term for multiple processing elements. For example, the processor 720 is one or more CPUs, or can be an ASIC, or an integrated circuit configured to implement the embodiments of the present application, for example: one or more digital signal processors (DSPs), or one or more field programmable gate arrays (FPGAs).

[0147] Optionally, the processor 720 can execute various functions of the host 700 by running or executing software programs stored in the memory 730 and invoking data stored in the memory 730. In a specific implementation, as an example, the processor 720 can include one or more CPUs.

[0148] Optionally, the host 700 can also include multiple processors. Each of these processors can be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processors here can refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0149] Among them, the memory 730 is used to store the software program for implementing the solution of this application and is controlled by the processor 720 for execution. The specific implementation method can refer to the above method embodiments and will not be elaborated here. Exemplarily, the memory 730 can be a ROM or other types of static storage devices that can store static information and instructions, a RAM or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM), or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic storage media such as disk storage, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 730 can be integrated with the processor 720 or exist independently and be coupled to the processor 720 through the interface circuit of the host 700 ( Figure 7 not shown in the figure), and the embodiments of this application do not make specific limitations on this.

[0150] The transceiver 710 is used for communication with other devices. For example, if the host 700 is a client or an application server, the transceiver 710 can be used for communication with a storage device or with another host. Another example is that if the host 700 is a smart network interface card (SNIC), the transceiver 710 can be used for communication with a storage device or with another smart network interface card. Still another example is that if the host 700 is a multi-core chip, the transceiver 710 can be used for communication with another multi-core chip.

[0151] Optionally, the transceiver 710 can include a receiver and a transmitter ( Figure 7(not shown separately). Among them, the receiver is used to implement the receiving function, and the transmitter is used to implement the transmitting function. Optionally, the transceiver 710 may be integrated with the processor 720 or exist independently and be coupled to the processor 720 through the interface circuit of the host 700 ( Figure 7 (not shown in the figure), and the embodiments of the present application do not make specific limitations on this.

[0152] In this embodiment, the transceiver 710 is used to: receive an identification command, and the identification command includes the control upgrade waiting delay time of the first storage controller. The processor 720 is used to: cooperate with the transceiver 710 according to the above identification command to execute the data access switching method in any one of the foregoing embodiments.

[0153] The method steps in this embodiment can be implemented in a hardware manner or by a processor executing software instructions. The software instructions may be composed of corresponding software modules, and the software modules may be stored in RAM, flash memory, ROM, PROM, EPROM, EEPROM, registers, hard disks, removable hard disks, CD-ROMs, or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in an ASIC. In addition, the ASIC may be located in a computing device. Of course, the processor and the storage medium may also exist as discrete components in a network device or a terminal device.

[0154] The present application provides a storage system. For the specific implementation of the storage system, reference may be made to the foregoing Figure 1 description, which will not be elaborated here.

[0155] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are executed in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device, or other programmable devices. The computer program or instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired or wireless manner. The computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium, such as a floppy disk, a hard disk, or a magnetic tape; it may also be an optical medium, such as a digital video disc (DVD); or it may be a semiconductor medium, such as a solid state drive (SSD).

[0156] As described above, the foregoing are only specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present application can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for switching data access, characterized in that, The method includes: The first storage controller sends an identification command to the host and establishes a first path with the host; the identification command includes an upgrade waiting delay time. The first storage controller receives a first data access request from the host through the first path and performs the access indicated by the first data access request. The first storage controller sends an upgrade notification command to the host, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. The first storage controller executes an upgrade process within the upgrade waiting delay time.

2. The method according to claim 1, wherein After the upgrade of the first storage controller is completed, the method further includes: The first storage controller receives a connection establishment request from the host. The first storage controller establishes a second path with the host according to the connection establishment request. The first storage controller receives a third data access request from the host through the second path and performs the access indicated by the third data access request; the third data access request and the second data access request belong to the same traffic flow.

3. The method according to claim 1 or 2, characterized in that, The upgrade waiting delay time is a controlled upgrade waiting delay time, the upgrade notification command is an asynchronous event information notification command, and the identifier is a controlled upgrade start identifier.

4. The method according to claim 3, characterized in that, The tail of the identification command includes a first reserved field for carrying the controlled upgrade waiting delay time.

5. The method according to claim 4, wherein Bytes 1806 - 1807 in the identification command are used to carry the controlled upgrade waiting delay time.

6. The method according to any one of claims 3 to 5, characterized in that, The asynchronous event information notification command includes a second reserved field for carrying the controlled upgrade start identifier.

7. The method according to claim 6, characterized in that, The value of the second reserved field is F1h.

8. A method for switching data access, characterized in that, The method includes: The host receives the identification commands of the first storage controller and the second storage controller in the storage system, and establishes a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. The host sends a first data access request to the first storage controller through the first path. The host receives the upgrade notification command sent by the first storage controller, and the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same traffic flow. The host responds to the upgrade notification command and sends the second data access request to the second storage controller through the second path.

9. The method according to claim 8, wherein After sending the second data access request to the second storage controller through the second path, the method further includes: Waiting for the upgrade waiting delay time of the first storage controller, sending a connection establishment request to the first storage controller, and establishing a third path with the first storage controller. Send a third data access request to the first storage controller through the third path, where the third data access request and the second data access request belong to the same service flow.

10. The method according to claim 8 or 9, characterized in that The upgrade waiting delay time is the control upgrade waiting delay time, the upgrade notification command is an asynchronous event information notification command, and the identifier is the control upgrade start identifier.

11. The method according to claim 10, characterized in that, The tail of the identification command includes a first reserved field for carrying the control upgrade waiting delay time.

12. The method according to claim 11, wherein Bytes 1806 - 1807 in the identification command are used to carry the control upgrade waiting delay time.

13. The method according to any one of claims 10 to 12, characterized in that, The asynchronous event information notification command includes a second reserved field for carrying the control upgrade start identifier.

14. The method according to claim 13, wherein The value of the second reserved field is F1h.

15. A switching device for data access, characterized in that, Applied to a first storage controller, the device includes: A transceiver module for sending an identification command to the host and establishing a first path with the host; the identification command includes an upgrade waiting delay time. An execution module for receiving a first data access request from the host through the first path and executing the access indicated by the first data access request. The transceiver module is further configured to send an upgrade notification command to the host, where the upgrade notification command carries: an identifier indicating that the host sends a second data access request to a second storage controller in the storage system, and the second data access request and the first data access request belong to the same service flow. An upgrade module for executing an upgrade process within the upgrade waiting delay time.

16. A switching device for data access, characterized in that, The device is applied to a host, and the device includes: A receiving module for receiving an identification command of a first storage controller and an identification command of a second storage controller in the storage system, and establishing a first path with the first storage controller and a second path with the second storage controller; the identification command of the first storage controller includes the upgrade waiting delay time of the first storage controller. A sending module for sending a first data access request to the first storage controller through the first path. The receiving module is further configured to receive an upgrade notification command sent by the first storage controller, where the upgrade notification command carries: an identifier indicating that the host sends a second data access request to the second storage controller, and the second data access request and the first data access request belong to the same service flow. The sending module is further configured to respond to the upgrade notification command and send the second data access request to the second storage controller through the second path.

17. A controller, characterized in that, Includes: A control circuit and an interface circuit; The interface circuit is configured to send an identification command and cooperate with the control circuit to execute the method according to any one of claims 1 - 7.

18. A storage system, characterized in that, Includes: A hard disk and multiple controllers according to claim 17; The hard disk is used to store data; The controller is configured to receive a data access request for the data and cooperate with the hard disk to execute the method according to any one of claims 1 - 7.

19. A host, characterized in that, Includes: A processor and a transceiver; The transceiver is used to receive an identification command and cooperate with the processor to execute the method described in any one of claims 8-14.

20. A readable storage medium, characterized in that, The readable storage medium includes a computer program or instruction. When the computer program or instruction runs on an electronic device, the electronic device executes the method described in any one of claims 1-7 or the method described in any one of claims 8-14.

21. A computer program product, characterized in that, The computer program product includes a computer program or instruction. When the computer program or instruction runs on an electronic device, the electronic device executes the method described in any one of claims 1-7 or the method described in any one of claims 8-14.

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